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* sbc8548: don't enable the 3rd and 4th eTSECPaul Gortmaker2008-12-19-14/+1
| | | | | | | These interfaces don't have usable connectors on the board, so don't bother enumerating or configuring them. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* Set IVPR to kenrel entry point in second core boot pageHaiying Wang2008-12-19-0/+1
| | | | | | | | | | | Assuming the OSes exception vectors start from the base of kernel address, and the kernel physical starting address can be relocated to an non-zero address. This patch enables the second core to have a valid IVPR for debugger before kernel setting IVPR in CAMP mode. Otherwise, IVPR is 0x0 and it is not a valid value for second core which runs kernel at different physical address other than 0x0. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* mpc8xxx: LCRR[CLKDIV] is sometimes five bitsTrent Piepho2008-12-19-15/+18
| | | | | | | | | | | | | | On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com>
* mpc8[56]xx: Put localbus clock in device treeTrent Piepho2008-12-19-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Export the localbus frequency in the device tree, the same way the CPU, TB, CCB, and various other frequencies are exported in their respective device tree nodes. Some localbus devices need this information to be programed correctly, so it makes sense to export it along with the other frequencies. Unfortunately, when someone wrote the localbus dts bindings, they didn't bother to define what the "compatible" property should be. So it seems no one was quite sure what to put in their dts files. Based on current existing dts files in the kernel source, I've used "fsl,pq3-localbus" and "fsl,elbc" for MPC85xx, which are used by almost all of the 85xx devices, and are looked for by the Linux code. The eLBC is apparently not entirely backward compatible with the pq3 LBC and so eLBC equipped platforms like 8572 won't use pq3-localbus. For MPC86xx, I've used "fsl,elbc" which is used by some of the 86xx systems and is also looked for by the Linux code. On MPC8641, I've also used "fsl,mpc8641-localbus" as it is also commonly used in dts files, some of which don't use "fsl,elbc" or any other acceptable name to match on. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com>
* NAND FSL elbc: Use virt_to_phys to determine which bank is in useKumar Gala2008-12-19-2/+4
| | | | | | | | | | | | | The current code that determines which bank/chipselect is used for a given NAND instance only worked for 32-bit addresses and assumed a 1:1 mapping. This breaks in 36-bit physical configs. The proper way to handle this is to use the virt_to_phys() and BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address with the the virtual address the NAND code uses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Scott Wood <scottwood@freescale.com>
* ppc: Use addrmap in virt_to_phys and map_physmem.Kumar Gala2008-12-19-0/+12
| | | | | | | If we have addr map support enabled use the mapping functions to implement virt_to_phys() and map_physmem(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add support to populate addr map based on TLB settingsKumar Gala2008-12-19-0/+45
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* XPedite5200 board supportPeter Tyser2008-12-19-5/+106
| | | | | | | Initial support for Extreme Engineering Solutions XPedite5200 - a MPC8548-based PMC single board computer. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* 85xx: Enable inbound PCI config cycles for X-ES boardsPeter Tyser2008-12-19-0/+15
| | | | | | | Update X-ES Freescale boards to allow inbound PCI configuration cycles when configured as agent/endpoint. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* XPedite5370 board supportPeter Tyser2008-12-19-0/+1832
| | | | | | | | Initial support for Extreme Engineering Solutions XPedite5370 - a MPC8572-based 3U VPX single board computer with a PMC/XMC site. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Add support for PCA953x I2C gpio devicesPeter Tyser2008-12-19-0/+324
| | | | | | | | | | | Initial support for NXP's 4 and 8 bit I2C gpio expanders (eg pca9537, pca9557, etc). The CONFIG_PCA953X define enables support for the devices while the CONFIG_CMD_PCA953X define enables the pca953x command. The CONFIG_CMD_PCA953X_INFO define enables an 'info' sub-command which provides summary information for the given pca953x device. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* pci/fsl_pci_init: Enable inbound PCI config cyclesPeter Tyser2008-12-19-0/+29
| | | | | | | | Add fsl_pci_config_unlock() function to enable a PCI/PCIe interface configured in agent/endpoint mode to respond to inbound PCI configuration cycles. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Prepare 2009.01-rc1v2009.01-rc1Wolfgang Denk2008-12-16-3/+105
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* include/configs/at91cap9adk.h: fix typo.Wolfgang Denk2008-12-16-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* board/trab/memory.c: Fix compile problems.Wolfgang Denk2008-12-16-3/+3
| | | | | | | | | | | Apply changes from commit 44b4dbed to board/trab/memory.c, too. Actually we'd need a major cleanup here - as it turns out, board/trab/memory.c is more or less a verbatim copy of post/drivers/memory.c ... but then, trab is EOL anyway,r so this is not worth the effort. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/masterWolfgang Denk2008-12-16-327/+3006
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| * jffs2: include <linux/mtd/compat.h> instead of defining own min_tIlya Yanok2008-12-16-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | Include <linux/mtd/compat.h> header for min_t definition instead of providing our own one. Removes warnings in case of OneNAND support enabled. Although I thinks it's a bit silly to include <linux/mtd/compat.h> just for min_t... Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Stefan Roese <sr@denx.de>
| * powerpc: fix io.h build warning with CONFIG_PHYS_64BITBecky Bruce2008-12-16-1/+1
| | | | | | | | | | | | | | | | Casting a pointer to a phys_addr_t when it's an unsigned long long on a 32-bit system without first casting to a non-pointer type generates a compiler warning. Fix this. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
| * post/Makefile: fix dependency problem with parallel buildsWolfgang Denk2008-12-16-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Parallel builds (using "make -jN") would occasionally fail with error messages like ppc_4xxFP-objdump: string.o: File format not recognized or post/libpost.a(cpu.o): In function `cpu_post_test': /home/wd/git/u-boot/work/post/lib_ppc/cpu.c:130: undefined reference to `cpu_post_test_string' or similar. We now make sure to run the 'postdeps" step before attempting to build the specific POST libraries. Signed-off-by: Wolfgang Denk <wd@denx.de>
| * Makefile: fix dependency problem with parallel buildsWolfgang Denk2008-12-16-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Parallel builds (using "make -jN") would occasionally fail with error messages like include/autoconf.mk:212: *** missing separator. Stop. Line numbers and affected boards were changing. Obviously some Makefiles included autoconf.mk while it was still being written to. As a fix, we now write to a temporary file first and then rename it, so that it is really ready to use as soon as it appears. Signed-off-by: Wolfgang Denk <wd@denx.de>
| * Coding style cleanup, update CHANGELOG.Wolfgang Denk2008-12-16-22/+2684
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * spi/stmicro: fix debug() display of cmdMike Frysinger2008-12-16-1/+1
| | | | | | | | | | | | | | | | The stmicro_wait_ready() func tries to show the actual opcode that was sent to the device, but instead it displays the array pointer. Fix it to pull out the opcode from the start of the array. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * env_sf: support embedded environmentsMike Frysinger2008-12-16-5/+36
| | | | | | | | | | | | | | | | | | | | | | | | If both CONFIG_ENV_SECT_SIZE and CONFIG_ENV_SIZE are defined, and the sect size is larger than the env size, then it means the env is embedded in a block. So we have to save/restore the part of the sector which is not the environment. Previously, saving the environment in SPI flash in this setup would probably brick the board as the rest of the sector tends to contain actual U-Boot data/code. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * i2c: merge all i2c_reg_read() and i2c_reg_write() into inline functionsTimur Tabi2008-12-15-231/+60
| | | | | | | | | | | | | | | | | | | | All implementations of the functions i2c_reg_read() and i2c_reg_write() are identical. We can save space and simplify the code by converting these functions into inlines and putting them in i2c.h. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-By: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * lib_ppc: rework the flush_cacheDave Liu2008-12-15-19/+17
| | | | | | | | | | | | | | | | | | | | - It is possible to miss flush/invalidate the last cache line, we fix it at here. - add the volatile and memory clobber. They are pointed by Scott Wood. Signed-off-by: Dave Liu <daveliu@freescale.com>
| * Introduce addr_map libraryKumar Gala2008-12-15-0/+111
| | | | | | | | | | | | | | | | | | Add a library that helps in translating between virtual and physical addresses. This library can be useful as a simple means to implement map_physmem() and virt_to_phys() for platforms that need functionality beyond the simple 1:1 mapping. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * Introduce virt_to_phys()Kumar Gala2008-12-15-1/+56
| | | | | | | | | | | | | | | | | | | | | | | | virt_to_phys() returns the physical address given a virtual. In most cases this will be just the input value as the vast majority of systems run in a 1:1 mode. However in systems that are not running this way it should report the physical address or ~0 if no mapping exists for the given virtual address. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * POST Make: fix the sub-dir dependencies missing.Yuri Tikhonov2008-12-15-1/+6
| | | | | | | | Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
| * Fix a typo in fw_env.configMartin Michlmayr2008-12-15-1/+1
| | | | | | | | | | Reported-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
| * Remove unused CONFIG_ADDR_STREAMING definesPeter Tyser2008-12-14-20/+0
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * cmd_mem: Remove unused variablePeter Tyser2008-12-14-1/+0
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * Fix new found CFG_Jean-Christophe PLAGNIOL-VILLARD2008-12-14-14/+14
| | | | | | | | | | | | | | Also fix some minor typos. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
| * Remove compiler warning: target CPU does not support interworkingSergei Poselenov2008-12-13-0/+10
| | | | | | | | | | | | | | This warning is issued by modern ARM-EABI GCC on non-thumb targets. Signed-off-by: Vladimir Panfilov <pvr@emcraft.com> Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * Fix FIT and FDT support to have CONFIG_OF_LIBFDT and CONFIG_FIT independentJean-Christophe PLAGNIOL-VILLARD2008-12-13-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FDT support is used for both FIT style images and for architectures that can pass a fdt blob to an OS (ppc, m68k, sparc). For other architectures and boards which do not pass a fdt blob to an OS but want to use the new uImage format, we just need FIT support. Now we can have the 4 following configurations : 1) FIT only CONFIG_FIT 2) fdt blob only CONFIG_OF_LIBFDT 3) both CONFIG_OF_LIBFDT & CONFIG_FIT 4) none none Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | trab: make trab_fkt standalone code independent of libgccWolfgang Denk2008-12-16-1/+8
|/ | | | | | Use our own local functions in lib_arm/ instead. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2008-12-13-21/+25
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| * ppc4xx: Disable EEPROM write access on PMC440 boardsMatthias Fuchs2008-12-10-1/+1
| | | | | | | | | | | | This patch disables EEPROM wrtie access by default on PMC440 board. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * ppc4xx: Fix Ethernet PHY LED configuration on PMC440 boardsMatthias Fuchs2008-12-10-4/+18
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * ppc4xx: Update TEXT_BASE for CPCI405 boardsMatthias Fuchs2008-12-10-12/+5
| | | | | | | | | | | | | | This patch fixes building U-Boot for CPCI405 boards. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Remove some features from ALPR to fit into 256k againStefan Roese2008-12-10-4/+1
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2008-12-13-12/+45
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| * | MIPS: Flush data cache upon relocationStefan Roese2008-12-10-7/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch now adds a flush to the data cache upon relocation. The current implementation is missing this. Only a comment states that it should be done. So let's really do it now. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
| * | MIPS: Add CONFIG_SKIP_LOWLEVEL_INITStefan Roese2008-12-10-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the CONFIG_SKIP_LOWLEVEL_INIT option to start.S. This enables support for boards where the lowlevel initialization is already done when U-Boot runs (e.g. via OnChip ROM). This will be used in the upcoming VCTH board support. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
| * | MIPS: Add board_early_init_f() to init_sequenceStefan Roese2008-12-10-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the board_early_init_f() call to the MIPS init sequence. A weak dummy implementation is also added which can be overridden by a board specific version. This will be used by the upcoming VCTH board support. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
| * | MIPS: Add onenand_init() to board.c and move nand_init()Stefan Roese2008-12-10-5/+10
| |/ | | | | | | | | | | | | | | | | This patch adds a call to onenand_init() for OneNAND support and moves the nand_init() call to an earlier place, so that the environment can be used from NAND and OneNAND. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* | Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2008-12-13-270/+138
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| * | sh: Update sh2/sh2a timerNobuhiro Iwamatsu2008-12-10-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | Renesas SH2/SH2A timer broken. This patch fix timer function. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: r2dplus fix register accessJean-Christophe PLAGNIOL-VILLARD2008-12-10-3/+3
| | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: r2dplus/lowlevel_init: coding style fixJean-Christophe PLAGNIOL-VILLARD2008-12-10-21/+21
| | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Changed value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFTNobuhiro Iwamatsu2008-12-10-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | SH4 is different a value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT every CPU. This patch corrects these values. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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