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* ENGR00227413 Change configuration file names on AIAlejandro Sierra2012-10-12-8/+8
| | | | | | | Change configuration file names for AI platform. From solo to DL. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00228238 i.mx6/i.mx6dl: sabresd: add solo-ddr32bit supportJason Liu2012-10-11-2/+478
| | | | | | | | This patch adds the solo-ddr32bit config support. The DDR script got from: http://compass.freescale.net/livelink/livelink/227589697/ MX6DL_init_DDR3_400MHz_32bit_For_SD_1.0.inc.txt?func=doc.Fetch&nodeid=227589697 Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00223797-3 IPUv3:Wait for sw reset finishLiu Ying2012-09-27-1/+4
| | | | | | | | | This patch checks self-clear sw_ipu_rst bit in SCR register of SRC controller to be cleared after setting it to reset IPUv3. This makes sure that IPUv3 finishes sofware resetting. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00223797-2 MX6Q/DL CPU:Do not disable IPU display channelLiu Ying2012-09-27-2/+4
| | | | | | | | | This patch changes to keep IPU display channel being running rather than disable IPU display channel when we leave uboot stage and go to kernel stage. This may support smooth tranistion from Uboot splash screen to kernel stage. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00223797-1 MX6 SabreSD:Align IPU related clocks with kernelLiu Ying2012-09-27-18/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch aligns IPU related clocks with imx_3.0.35(_android) kernel setting to support smooth transition from uboot splash screen to kernel stage. The IPU related clock trees are: 1) MX6DQ SabreSD: ipu1_clk -- osc_clk(24M)->pll2_528_bus_main_clk(528M)->periph_clk(528M) ->mmdc_ch0_axi_clk(528M)->ipu1_clk(264M) ipu1_pixel_clk_x -- osc_clk(24M)->pll2_528_bus_main_clk(528M)-> pll2_pfd_352M(452.57M)->ldb_dix_clk(64.65M)-> ipu1_di_clk_x(64.65M)->ipu1_pixel_clk_x(64.65M) 2) MX6DL SabreSD: ipu1_clk -- osc_clk(24M)->pll3_usb_otg_main_clk(480M)-> pll3_pfd_540M(540M)->ipu1_clk(270M) ipu1_pixel_clk_x -- osc_clk(24M)->pll2_528_bus_main_clk(528M)-> pll2_pfd_352M(452.57M)->ldb_dix_clk(64.65M)-> ipu1_di_clk_x(64.65M)->ipu1_pixel_clk_x(64.65M) Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00223794 MX6 SabreSD:Enable LVDS panel pwm backlightLiu Ying2012-09-27-14/+21
| | | | | | | | | | | | | This patch enables pwm backlight for LVDS panel and stops using gpio backlight to align with kernel to avoid unstable backlight when booting into kernel, as kernel usually uses pwm backlight instead of gpio backlight. Following items are done to support this: 1) Add PWM1 and PWM2 controller base addresses. 2) Change PIN SD1_DAT3 mux from GPIO to PWM1_PWMO. 3) Set default backlight density to 50%. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00226048 Fix weim nor for mfg toolAlejandro Sierra2012-09-26-3/+2
| | | | | | | | Weim interface share pins with I2C. A define was declared to enable weim pins and disable I2C when mfg tool is used. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00225691 NAND support on i.MX6Solo ARDAlejandro Sierra2012-09-24-0/+630
| | | | | | | | NAND support on i.MX6Solo ARD. Two files were added. mx6solo_sabreauto_nand.h --> bootloader's image mx6solo_sabreauto_nand_mfg.h --> mfg tool bootloader Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00225486 Support for spi-nor bootAlejandro Sierra2012-09-21-0/+727
| | | | | | | | | | | Support for spi-nor boot with valid "extra_env_settings". It used to be the same as the SD Card boot, however it couldn't read/write the env settings because the CONFIG_FSL_ENV_IN_MMC was set instead of CONFIG_FSL_ENV_IN_SF. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00224313:i.MX6 general:enable CONFIG_CMD_IMXOTP to fix the build errorimx-android-r13.5-betaimx-android-r13.4-gaEric Sun2012-09-14-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7942886(ENGR00221503-2 imx6: add cpu serial number support) introduces dependency on "CONFIG_SERIAL_TAG" and "CONFIG_CMD_IMXOTP". On U-boot configuration header files which only defines the first one, build error will be met. --- build error message --- arm_cortexa8/mx6/libmx6.a(generic.o): In function `get_board_serial': arm_cortexa8/mx6/generic.c:1438: undefined reference to `imx_otp_read_one_u32' arm_cortexa8/mx6/generic.c:1439: undefined reference to `imx_otp_read_one_u32' --------------------------- To fix it, add missing "CONFIG_CMD_IMXOTP" macro definition in the config head file. Configs affected are: --------------------------- mx6q_arm2_iram mx6q_sabresd_iram mx6dl_arm2_iram mx6sl_arm2_iram mx6sl_evk_iram Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00224291:i.MX6Q/ARM2-LPDDR2:enable CONFIG_CMD_IMXOTP to fix the build errorJason Liu2012-09-14-0/+11
| | | | | | | | | Need enable CONFIG_CMD_IMXOTP to fix the build error: arm_cortexa8/mx6/generic.c:1438: undefined reference to `imx_otp_read_one_u32' arm_cortexa8/mx6/generic.c:1439: undefined reference to `imx_otp_read_one_u32' Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00224272: MFG:i.mx6q/ARM2 enable CONFIG_CMD_IMXOTP to fix the build errorJason Liu2012-09-14-0/+11
| | | | | | | | | Need enable CONFIG_CMD_IMXOTP to fix the build error: arm_cortexa8/mx6/generic.c:1438: undefined reference to `imx_otp_read_one_u32' arm_cortexa8/mx6/generic.c:1439: undefined reference to `imx_otp_read_one_u32' Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00223788 mx6sl_evk: change boot args to boot from mmc/sdRobby Cai2012-09-13-2/+2
| | | | | | | | | default setting is to boot via nfs. By this way, after mfgtool burned the whole image on EVK, the system will probably not load the Linux kernel if the network is not correctly set or not availabe for it. Change to mmc/sd boot to make sure an entire boot process can be completed, in order to easily verify mfgtool. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00223027 Add support for nand on MFG for IMX6QAlejandro Sierra2012-09-11-2/+304
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for nand flash on IMX6Q. Modifying partitions number and size. mx6q_sabreauto_nand_boot.h --> Modify the size of partitions used to 3. PARTITION 0 (16M) ------------------------------ | | | uboot | | | ------------------------------ PARTITION 1 (16M) ------------------------------ | | | Kernel | | | ------------------------------ PARTITION 2 (128M) ------------------------------ | | | | | Root file system | | | | | ------------------------------ mx6q_sabreauto_mfg_enable_nand.h --> Enable partitions on manufacturing tool Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00223236-1 [MX6]Change the temperature range to -40C ~ 125CAnson Huang2012-09-06-6/+7
| | | | | | | | | Previous temperature range is -25C ~ 125C, according to latest datasheet, change it to -40C to 125C. Fix temperature report error when it is < 0C. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00222170: Add mx6sl_evk_android_config for mx6sl evk boardLiGang2012-09-06-1/+97
| | | | | | | - mx6sl_evk_android.h is a new file, copied from mx6sl_arm2_android.h - set default sdio port as mmc1 Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00221503-2 imx6: add cpu serial number support.Zhang Jiejing2012-08-31-0/+53
| | | | | | | | add cpu serial number tag, kernel will read this number and put it in /proc/cpuinfo, as 'Serial' part it can be used as a UUID source in software. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00221503-1 cmd_imxotp: refine the help of this command.Zhang Jiejing2012-08-31-5/+10
| | | | | | | This command use index but not addr, it confuse user, add a help how to convert the addr from fuse map to the index. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00222005 mfgtool can't work on mx6slrel_imx_3.0.35_12.09.02Tony LIU2012-08-30-1/+316
| | | | | | | | - for arm2 board, the I2C module is not defined in mfg config - and a new config file for evk board - change some prompt information Signed-off-by: Tony LIU <junjie.liu@freescale.com>
* ENGR00219316-2: mx6q sabreauto enable lvds backlight by defaultAdrian Alonso2012-08-29-25/+32
| | | | | | | | | | | | | * Enable lvds backlight by default, configure io_expander A to enable backlight. * As weimnor_d18, spinor_d18, i2c3_sda share the pad MX6Q_PAD_EIM_D18 if wiemnor or spinor is enabled it overrides i2c3 settings and kernel fails to configure io_expander causing read/write errors. * This commit allows a default configuration on control lines behind io_expander A. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00219316-1: mx6 sabreauto: enable mxc_gpio supportAdrian Alonso2012-08-29-9/+20
| | | | | | | | * Enable mxc_gpio support in order to configure steer logic circuits so attached pads can be used by dedicated IP modules I2C3, SPI-NOR, WEIM-NOR. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00221013 MX6 SabreSD:Disable LVDS panel CABC functionLiu Ying2012-08-28-0/+38
| | | | | | | | | This patch sets CABC_EN0/1 pins to low to disable LVDS panel CABC function. This function will turn backlight automatically according to display content which may cause potential unstable backlight phenomena. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00221332: U_BOOT: remove "boot" and "enable" from configs' nameTerry Lv2012-08-24-7/+7
| | | | | | | | | | | | | | | | | | | | | Remove "boot" and "enable" from some configs' name. Affacted configs: mx6q_sabreauto_boot_weimnor mx6q_sabreauto_mfg_enable_weimnor mx6solo_sabreauto_boot_weimnor mx6solo_sabreauto_mfg_enable_weimnor mx6q_sabreauto_mfg_enable_spi-nor mx6solo_sabreauto_mfg_enable_spi-nor mx6q_sabreauto_nand_boot Currently, various u-boot are built in nightlybuild, to make it easier, we naming u-boot binary name and config as <soc_name>_<board_type>_<ddr_type>_<boot_device>. Then it is easier to be parsed, also easier to be maintained in nightlybuild and u-boot git. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00221135: imx6x: clear PowerDown Enable bit of WDOG1_WMCRRobby Cai2012-08-24-4/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | From IC spec: --- The Power down Counter inside WDOG-1 will be enabled out of reset. This counter has a fixed time-out value of 16 seconds, after which it will drive the WDOG-1 signal low. To prevent this, the software must disable this counter by clearing the PDE bit of Watchdog Miscellaneous Control Register (WDOG_WMCR) within 16 seconds of reset de-assertion. Once disabled, this counter cannot be enabled again until the next system reset occurs. This feature is provided to prevent the hanging up of cores after reset, as WDOG-1 is not enabled out of reset. --- NOTE for the last sentence: This feature requires a dedicated WDOG_B pin for it. The fact that changing the IOMUX configuration can alter the WDOG_B functionality (GPIO by default) is not ideal as it defeats the purpose of this feature. But it still takes effect when the muxed pin is configured as WDOG_B within 16 seconds. Clear PDE bit to avoid WDOG_B (aka, WDOG-1) assertion. Tested on MX6SL. May add this for other MX6x. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00221150 Support spi-nor on manufacturing toolimx-android-r13.4-betaAlejandro Sierra2012-08-22-0/+590
| | | | | | | | | | | Two configuration files were included to suppoort spi-nor on the manufacturing tool. Basically these files send the parameter "spi-nor" to the kernel, so the SPI interface can be setup. Files included are: mx6q_sabreauto_mfg_enable_spi-nor.h --> For Quad mx6solo_sabreauto_mfg_enable_spi-nor.h --> For solo Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00220824: mx6sl_evk: mmc: only SD1 supports 8bit on evk board.Ryan QIAN2012-08-21-6/+2
| | | | | | - configure SD1 to support 8bit on evk Signed-off-by: Ryan QIAN <b32804@freescale.com>
* ENGR00180538-1 MFG download burn sd,spi, nand, nor failed.Francisco Munoz2012-08-21-9/+1330
| | | | | | | | | | | | | | | | | | | | | Added two new board files for Solo and Quad which allow uboot to be booted from WEIM NOR. Also amended the word “weim-nor” in both mfg configuration files which allow to erase/write u-boot and uImage in Parallel nor using the mfg tool. Lastly just added a label in the regular board files indicating that another config file has to be used in the case of NOR boot. Modified files: Makefile common/env_common.c include/configs/mx6q_sabreauto.h include/configs/mx6q_sabreauto_boot_weimnor.h include/configs/mx6q_sabreauto_mfg_enable_weimnor.h include/configs/mx6solo_sabreauto.h include/configs/mx6solo_sabreauto_boot_weimnor.h include/configs/mx6solo_sabreauto_mfg_enable_weimnor.h Signed-off-by: Francisco Munoz <francisco.munoz@freescale.com>
* ENGR00217505-8 uboot: MX6Q-ARD: set the default gpmi clock to 20MHzHuang Shijie2012-08-20-3/+2
| | | | | | Set the default clock to 20MHz. The 11Mhz is too slow. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00217505-7 uboot: gpmi: update the mtd->ecc_stats when reading page failedHuang Shijie2012-08-20-3/+8
| | | | | | | | | | | | If tell the real correcting infomation to the upper layer of MTD, the torture thread of UBIFS will do the torture test in a very often frequency. This will eat up all the reservation blocks of the UBIFS. So tell the real correcting infomation only when the failure occured, or the corrected times nearly reached the ECC threshold. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00217505-6 uboot: gpmi: set default value for busy_timeoutHuang Shijie2012-08-20-0/+5
| | | | | | | Set 0x500 to the busy_timeout in HW_GPMI_TIMING1. If we do not set this busy_timeout, the gpmi may become unstable. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00217505-5 uboot: gpmi: update the ecc_strength codeHuang Shijie2012-08-20-66/+160
| | | | | | | Rewrite the code for calculate the ecc strength. Use the same code as in the gpmi driver. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00217505-4 uboot: gpmi: replace the gpmi_nfc_reset_block()Huang Shijie2012-08-20-77/+96
| | | | | | Use the latest gpmi_reset_block(), and remove the old gpmi_nfc_reset_block(). Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00217505-3 uboot: gpmi: use the community's nand chip databaseHuang Shijie2012-08-20-108/+19
| | | | | | Abandon our nand chip database, use the community's database. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00217505-2 uboot: mtd: update nand_get_flash_type()Huang Shijie2012-08-20-33/+325
| | | | | | | update nand_get_flash_type() to the latest code. Also add the support of ONFI nand. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00217505-1 uboot: MX6Q-ARD: add a NAND boot configHuang Shijie2012-08-20-0/+272
| | | | | | add a new config for NAND boot in the mx6q-ard board. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00220486 Modify ODT values for Solo AIAlejandro Sierra2012-08-20-4/+4
| | | | | | | | | | | | | | | | | | Modify ODT values for Solo AI. Some Solo boards did not passed the "mtest" from uboot using the previous configuration. Old configuration: MXC_DCD_ITEM(76, MMDC_P0_BASE_ADDR + 0x818, 0x00000007) MXC_DCD_ITEM(77, MMDC_P1_BASE_ADDR + 0x818, 0x00000007) MXC_DCD_ITEM(67, MMDC_P0_BASE_ADDR + 0x818, 0x00000007) MXC_DCD_ITEM(68, MMDC_P1_BASE_ADDR + 0x818, 0x00000007) New configuration: MXC_DCD_ITEM(76, MMDC_P0_BASE_ADDR + 0x818, 0x00011117) MXC_DCD_ITEM(77, MMDC_P1_BASE_ADDR + 0x818, 0x00011117) MXC_DCD_ITEM(67, MMDC_P0_BASE_ADDR + 0x818, 0x00011117) MXC_DCD_ITEM(68, MMDC_P1_BASE_ADDR + 0x818, 0x00011117) Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00220161: imx6sl: Add MX6SL EVK SupportRobby Cai2012-08-14-0/+2567
| | | | | | | | | Add mx6sl evk board support - copied from ARM2 board support - added a new board revision - removed unused boot device detection Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00220164 pfuze:rise VDDARM_IN to 1.425V and work around pfuze1.0Robin Gong2012-08-13-0/+45
| | | | | | | | | 1.Considering pfuze tolerance and IR drop and board ripple, need rise from 1.375V to 1.425V. Only for Sabresd. 2.workaround pfuze1.0 ER1, set all buck regulator except SW1C to PWM mode. now for mx6sl_arm2 and mx6_sabresd. Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00220076 fix the fastboot usb re-connect issueLiGang2012-08-10-0/+8
| | | | | | | in fastboot mode, if usb cable re-connectted, the fastboot feature will fail. This issue is caused by logic control oversight. Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00219854-1 Enable fastboot feature on mx6q-arm2 boardLiGang2012-08-09-7/+54
| | | | | | | | 1. enable fastboot feature on mx6q-arm2 board 2. enlarge fastboot buffer to 320MB 3. correct some usb descriptors Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00219636 MX6 UBOOT : Enlarge command line buffer sizeEric Sun2012-08-07-11/+12
| | | | | | | | | | | | | | | | | | There is a problem that a too long command line parameter in U-Boot console will actually be truncated and not properly truncated to the kernel. The root cause is that the command line in the U-Boot console is read into a buffer --- console_buffer[CONFIG_SYS_CBSIZE]. Currently the CONFIG_SYS_CBSIZE is set as 256. Command line parameter larger than it will not be recorded. On the other hand, max length of boot parameter of linux kernel is set to 1024, which means it can accept parameter size as large as 1024. So we need to align these 2 values. Enlarge CONFIG_SYS_CBSIZE to 1024 as well. Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00218915-2 MX6 SabreSD:Use new 8bit bmp boot logoLiu Ying2012-08-03-5/+5
| | | | | | | | This patch changes to use new 8bit 600x400 bmp boot logo. As this boot logo has black background and white words, the user experience will be better. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00218915-1 FSL common:Add new boot logoLiu Ying2012-08-03-1/+30159
| | | | | | | This patch adds new boot 8bit 600x400 bmp logo who has black background and white words. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00218972 MX6 Secure Boot, Change to dynamic HAB data authenticationEric Sun2012-08-01-24/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original secure boot implementation make a consumption that u-boot.bin will not exceed 0x2F000. With this consumption, the hab data is hard coded in linker script file to relative address 0x2F000 without causing any problem. But when this consumption don't hold, the hard coded way will cause memory region overlap and break build. So we need to change to a dynamic way of allocating hab_data. The new implementation put hab data at the next 0x1000 alignment after u-boot data and text section, instead of hard coded to 0x2F000. Similar changes is made to uImage authentication implementation. Changes in U-Boot includes: - in u-boot.lds file, change "__hab_data" to dynamic align to 0x1000 - change authenticate_image implementation, originally the uImage parameters are hard coded, now they are retrived from the "load_addr" and the image_hdr The new secure image layout: U-Boot +-------------------+ DDR_START | | | U-Boot Image | | | +-------------------+ DDR_START + UBOOT_SIZE | PADDING | +-------------------+ align to 0x1000 | CSF Data | - +-------------------+ +-- CSF + Pad, Size : 0x2000 | PADDING | - +-------------------+ uImage +-------------------+ DDR_START | | | uImage | | | +-------------------+ DDR_START + UIMAGE_SIZE | PADDING | +-------------------+ align to 0x1000 | IVT | ---- Size : 0x20 +-------------------+ | CSF Data | - +-------------------+ +-- CSF + Pad, Size : 0x2000 | PADDING | - +-------------------+ Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00218583-5 MX6DL SabreSD Android:Add splashimage uboot varLiu Ying2012-07-31-1/+4
| | | | | | | | This patch adds splashimage related variables to board configure file so that splashimage can work without touching the uboot variables. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00218583-4 MX6Q SabreSD Android:Add splashimage uboot varLiu Ying2012-07-31-2/+4
| | | | | | | | This patch adds splashimage related variables to board configure file so that splashimage can work without touching the uboot variables. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00218583-3 MX6DL SabreSD:Enable splashimage by defaultLiu Ying2012-07-31-0/+1
| | | | | | | This patch adds CONFIG_SPLASH_SCREEN definition to board config file to enable splashimage by default. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00218583-2 MX6Q SabreSD:Enable splashimage by defaultLiu Ying2012-07-31-0/+1
| | | | | | | This patch adds CONFIG_SPLASH_SCREEN definition to board config file to enable splashimage by default. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00218583-1 MX6Q/DL SabreSD:Support LVDS1 splashimageLiu Ying2012-07-31-0/+9
| | | | | | | This patch configures iomux gpr3 register to enable LVDS1 via IPU1 DI1 if user chooses to use it. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00218805 imx6: print the silicon revision correctlyJason Liu2012-07-30-11/+4
| | | | | | | | | | | | | | The silicon revision is not printed correctly, on ARM2 and sabrelite board, the log is just as the following: CPU: Freescale i.MX6 family TO0.0 at 792 MHz We need print the silicon revision correctly as: CPU: Freescale i.MX6 family TO1.2 at 792 MHz with i.mx6q TO1.2 chip Signed-off-by: Jason Liu <r64343@freescale.com>
generated by cgit v1.1 at 2024-11-28 19:35:41 +0000