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-rw-r--r--post/cpu/ppc4xx/spr.c14
-rw-r--r--post/drivers/memory.c6
2 files changed, 17 insertions, 3 deletions
diff --git a/post/cpu/ppc4xx/spr.c b/post/cpu/ppc4xx/spr.c
index c12e378..37c9559 100644
--- a/post/cpu/ppc4xx/spr.c
+++ b/post/cpu/ppc4xx/spr.c
@@ -43,6 +43,12 @@
#include <asm/processor.h>
+#ifdef CONFIG_4xx_DCACHE
+#include <asm/mmu.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
static struct {
int number;
char * name;
@@ -164,6 +170,10 @@ int spr_post_test (int flags)
};
unsigned long (*get_spr) (void) = (void *) code;
+#ifdef CONFIG_4xx_DCACHE
+ /* disable cache */
+ change_tlb(gd->bd->bi_memstart, gd->bd->bi_memsize, TLB_WORD2_I_ENABLE);
+#endif
for (i = 0; i < spr_test_list_size; i++) {
int num = spr_test_list[i].number;
@@ -180,6 +190,10 @@ int spr_post_test (int flags)
ret = -1;
}
}
+#ifdef CONFIG_4xx_DCACHE
+ /* enable cache */
+ change_tlb(gd->bd->bi_memstart, gd->bd->bi_memsize, 0);
+#endif
return ret;
}
diff --git a/post/drivers/memory.c b/post/drivers/memory.c
index fbc349a..fb96985 100644
--- a/post/drivers/memory.c
+++ b/post/drivers/memory.c
@@ -186,7 +186,7 @@ DECLARE_GLOBAL_DATA_PTR;
*
* For other processors, let the compiler generate the best code it can.
*/
-static void move64(unsigned long long *src, unsigned long long *dest)
+static void move64(const unsigned long long *src, unsigned long long *dest)
{
#if defined(CONFIG_MPC8260) || defined(CONFIG_MPC824X)
asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
@@ -233,12 +233,12 @@ static int memory_post_dataline(unsigned long long * pmem)
int ret = 0;
for ( i = 0; i < num_patterns; i++) {
- move64((unsigned long long *)&(pattern[i]), pmem++);
+ move64(&(pattern[i]), pmem++);
/*
* Put a different pattern on the data lines: otherwise they
* may float long enough to read back what we wrote.
*/
- move64((unsigned long long *)&otherpattern, pmem--);
+ move64(&otherpattern, pmem--);
move64(pmem, &temp64);
#ifdef INJECT_DATA_ERRORS