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-rw-r--r--post/board/lwmon5/dsp.c4
-rw-r--r--post/board/lwmon5/dspic.c12
-rw-r--r--post/board/lwmon5/fpga.c6
-rw-r--r--post/board/lwmon5/gdc.c4
-rw-r--r--post/board/lwmon5/sysmon.c6
-rw-r--r--post/board/lwmon5/watchdog.c26
6 files changed, 29 insertions, 29 deletions
diff --git a/post/board/lwmon5/dsp.c b/post/board/lwmon5/dsp.c
index a96ac7d..0e6d908 100644
--- a/post/board/lwmon5/dsp.c
+++ b/post/board/lwmon5/dsp.c
@@ -26,7 +26,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_DSP
+#if CONFIG_POST & CONFIG_SYS_POST_DSP
#include <asm/io.h>
/* This test verifies DSP status bits in FPGA */
@@ -50,4 +50,4 @@ int dsp_post_test(int flags)
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_DSP */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_DSP */
diff --git a/post/board/lwmon5/dspic.c b/post/board/lwmon5/dspic.c
index eb1c31c..ff2ed05 100644
--- a/post/board/lwmon5/dspic.c
+++ b/post/board/lwmon5/dspic.c
@@ -40,12 +40,12 @@ DECLARE_GLOBAL_DATA_PTR;
#define DSPIC_SYS_ERROR_REG 0x802
#define DSPIC_VERSION_REG 0x804
-#if CONFIG_POST & CFG_POST_BSPEC1
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
/* Verify that dsPIC ready test done early at hw init passed ok */
int dspic_init_post_test(int flags)
{
- if (in_be32((void *)CFG_DSPIC_TEST_ADDR) & CFG_DSPIC_TEST_MASK) {
+ if (in_be32((void *)CONFIG_SYS_DSPIC_TEST_ADDR) & CONFIG_SYS_DSPIC_TEST_MASK) {
post_log("dsPIC init test failed\n");
return 1;
}
@@ -53,15 +53,15 @@ int dspic_init_post_test(int flags)
return 0;
}
-#endif /* CONFIG_POST & CFG_POST_BSPEC1 */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC1 */
-#if CONFIG_POST & CFG_POST_BSPEC2
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
/* Read a register from the dsPIC. */
int dspic_read(ushort reg)
{
uchar buf[2];
- if (i2c_read(CFG_I2C_DSPIC_IO_ADDR, reg, 2, buf, 2))
+ if (i2c_read(CONFIG_SYS_I2C_DSPIC_IO_ADDR, reg, 2, buf, 2))
return -1;
return (uint)((buf[0] << 8) | buf[1]);
@@ -102,4 +102,4 @@ int dspic_post_test(int flags)
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_BSPEC2 */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC2 */
diff --git a/post/board/lwmon5/fpga.c b/post/board/lwmon5/fpga.c
index ef641d7..2b84290 100644
--- a/post/board/lwmon5/fpga.c
+++ b/post/board/lwmon5/fpga.c
@@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define FPGA_RAM_END 0xC4203FFF
#define FPGA_STAT 0xC400000C
-#if CONFIG_POST & CFG_POST_BSPEC3
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
/* Testpattern for fpga memorytest */
static uint pattern[] = {
@@ -127,7 +127,7 @@ int fpga_post_test(int flags)
/* Enable write to FPGA RAM */
out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) | 0x1000);
- read_value = get_ram_size((void *)CFG_FPGA_BASE_1, 0x4000);
+ read_value = get_ram_size((void *)CONFIG_SYS_FPGA_BASE_1, 0x4000);
post_log("FPGA RAM size: %d bytes\n", read_value);
for (address = 0; address < 0x1000; address++) {
@@ -141,4 +141,4 @@ out:
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_BSPEC3 */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC3 */
diff --git a/post/board/lwmon5/gdc.c b/post/board/lwmon5/gdc.c
index bc16685..eb16e36 100644
--- a/post/board/lwmon5/gdc.c
+++ b/post/board/lwmon5/gdc.c
@@ -38,7 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define GDC_RAM_START 0xC0000000
#define GDC_RAM_END 0xC2000000
-#if CONFIG_POST & CFG_POST_BSPEC4
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
static int gdc_test_reg_one(uint value)
{
@@ -93,4 +93,4 @@ int gdc_post_test(int flags)
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_BSPEC4 */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC4 */
diff --git a/post/board/lwmon5/sysmon.c b/post/board/lwmon5/sysmon.c
index 2766224..aef5bd0 100644
--- a/post/board/lwmon5/sysmon.c
+++ b/post/board/lwmon5/sysmon.c
@@ -51,7 +51,7 @@
#include <mb862xx.h>
#endif
-#if CONFIG_POST & CFG_POST_SYSMON
+#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
DECLARE_GLOBAL_DATA_PTR;
@@ -90,7 +90,7 @@ struct sysmon_s
};
static sysmon_t sysmon_dspic =
- {CFG_I2C_DSPIC_IO_ADDR, sysmon_dspic_init, sysmon_dspic_read};
+ {CONFIG_SYS_I2C_DSPIC_IO_ADDR, sysmon_dspic_init, sysmon_dspic_read};
static sysmon_t * sysmon_list[] =
{
@@ -267,4 +267,4 @@ int sysmon_post_test (int flags)
return res;
}
-#endif /* CONFIG_POST & CFG_POST_SYSMON */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_SYSMON */
diff --git a/post/board/lwmon5/watchdog.c b/post/board/lwmon5/watchdog.c
index 1246278..44f0488 100644
--- a/post/board/lwmon5/watchdog.c
+++ b/post/board/lwmon5/watchdog.c
@@ -31,7 +31,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_WATCHDOG
+#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
#include <watchdog.h>
#include <asm/gpio.h>
@@ -39,20 +39,20 @@
static uint watchdog_magic_read(void)
{
- return in_be32((void *)CFG_WATCHDOG_FLAGS_ADDR) &
- CFG_WATCHDOG_MAGIC_MASK;
+ return in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
+ CONFIG_SYS_WATCHDOG_MAGIC_MASK;
}
static void watchdog_magic_write(uint value)
{
- out_be32((void *)CFG_WATCHDOG_FLAGS_ADDR, value |
- (in_be32((void *)CFG_WATCHDOG_FLAGS_ADDR) &
- ~CFG_WATCHDOG_MAGIC_MASK));
+ out_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR, value |
+ (in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
+ ~CONFIG_SYS_WATCHDOG_MAGIC_MASK));
}
int sysmon1_post_test(int flags)
{
- if (gpio_read_in_bit(CFG_GPIO_SYSMON_STATUS) == 0) {
+ if (gpio_read_in_bit(CONFIG_SYS_GPIO_SYSMON_STATUS) == 0) {
/*
* 3.1. GPIO62 is low
* Assuming system voltage failure.
@@ -79,7 +79,7 @@ int lwmon5_watchdog_post_test(int flags)
return 1;
}
- if (watchdog_magic_read() != CFG_WATCHDOG_MAGIC) {
+ if (watchdog_magic_read() != CONFIG_SYS_WATCHDOG_MAGIC) {
/* 3.2. Scratch register 1 differs from magic value 0x1248xxxx
* Assuming PowerOn
*/
@@ -88,18 +88,18 @@ int lwmon5_watchdog_post_test(int flags)
ulong time;
/* 3.2.1. Set magic value to scratch register */
- watchdog_magic_write(CFG_WATCHDOG_MAGIC);
+ watchdog_magic_write(CONFIG_SYS_WATCHDOG_MAGIC);
ints = disable_interrupts ();
/* 3.2.2. strobe watchdog once */
WATCHDOG_RESET();
- out_be32((void *)CFG_WATCHDOG_TIME_ADDR, 0);
+ out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, 0);
/* 3.2.3. save time of strobe in scratch register 2 */
base = post_time_ms (0);
/* 3.2.4. Wait for 150 ms (enough for reset to happen) */
while ((time = post_time_ms (base)) < 150)
- out_be32((void *)CFG_WATCHDOG_TIME_ADDR, time);
+ out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, time);
if (ints)
enable_interrupts ();
@@ -116,7 +116,7 @@ int lwmon5_watchdog_post_test(int flags)
*/
ulong time;
/* 3.3.1. So, the test succeed, save measured time to syslog. */
- time = in_be32((void *)CFG_WATCHDOG_TIME_ADDR);
+ time = in_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR);
post_log("hw watchdog time : %u ms, passed ", time);
/* 3.3.2. Set scratch register 1 to 0x0000xxxx */
watchdog_magic_write(0);
@@ -125,4 +125,4 @@ int lwmon5_watchdog_post_test(int flags)
return -1;
}
-#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */
generated by cgit v1.1 at 2024-11-16 07:45:40 +0000