diff options
Diffstat (limited to 'nand_spl')
| -rw-r--r-- | nand_spl/board/amcc/sequoia/Makefile | 99 | ||||
| -rw-r--r-- | nand_spl/board/amcc/sequoia/config.mk | 49 | ||||
| -rw-r--r-- | nand_spl/board/amcc/sequoia/u-boot.lds | 65 | ||||
| -rw-r--r-- | nand_spl/nand_boot.c | 177 |
4 files changed, 390 insertions, 0 deletions
diff --git a/nand_spl/board/amcc/sequoia/Makefile b/nand_spl/board/amcc/sequoia/Makefile new file mode 100644 index 0000000..a71f583 --- /dev/null +++ b/nand_spl/board/amcc/sequoia/Makefile @@ -0,0 +1,99 @@ +# +# (C) Copyright 2006 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk +include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_NAND_SPL + +SOBJS = start.o init.o resetvec.o +COBJS = nand_boot.o ndfc.o sdram.o + +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +all: $(obj).depend $(ALL) + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) + cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +# create symbolic links for common files + +# from cpu directory +$(obj)ndfc.c: + @rm -f $(obj)ndfc.c + ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c + +$(obj)resetvec.S: + @rm -f $(obj)resetvec.S + ln -s $(SRCTREE)/cpu/ppc4xx/resetvec.S $(obj)resetvec.S + +$(obj)start.S: + @rm -f $(obj)start.S + ln -s $(SRCTREE)/cpu/ppc4xx/start.S $(obj)start.S + +# from board directory +$(obj)init.S: + @rm -f $(obj)init.S + ln -s $(SRCTREE)/board/amcc/sequoia/init.S $(obj)init.S + +$(obj)sdram.c: + @rm -f $(obj)sdram.c + ln -s $(SRCTREE)/board/amcc/sequoia/sdram.c $(obj)sdram.c + +# from nand_spl directory +$(obj)nand_boot.c: + @rm -f $(obj)nand_boot.c + ln -s $(SRCTREE)/nand_spl/nand_boot.c $(obj)nand_boot.c + +######################################################################### + +$(obj)%.o: $(obj)%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(obj)%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/nand_spl/board/amcc/sequoia/config.mk b/nand_spl/board/amcc/sequoia/config.mk new file mode 100644 index 0000000..a29ba5f --- /dev/null +++ b/nand_spl/board/amcc/sequoia/config.mk @@ -0,0 +1,49 @@ +# +# (C) Copyright 2006 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# +# AMCC 440EPx Reference Platform (Sequoia) board +# + +# +# TEXT_BASE for SPL: +# +# On 440EP(x) platforms the SPL is located at 0xfffff000...0xffffffff, +# in the last 4kBytes of memory space in cache. +# We will copy this SPL into internal SRAM in start.S. So we set +# TEXT_BASE to starting address in internal SRAM here. +# +TEXT_BASE = 0xE0013000 + +# PAD_TO used to generate a 16kByte binary needed for the combined image +# -> PAD_TO = TEXT_BASE + 0x4000 +PAD_TO = 0xE0017000 + +PLATFORM_CPPFLAGS += -DCONFIG_440=1 + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif + +ifeq ($(dbcr),1) +PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000 +endif diff --git a/nand_spl/board/amcc/sequoia/u-boot.lds b/nand_spl/board/amcc/sequoia/u-boot.lds new file mode 100644 index 0000000..1563689 --- /dev/null +++ b/nand_spl/board/amcc/sequoia/u-boot.lds @@ -0,0 +1,65 @@ +/* + * (C) Copyright 2006 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc:common) +SECTIONS +{ + .resetvec 0xE0013FFC : + { + *(.resetvec) + } = 0xffff + + .text : + { + start.o (.text) + init.o (.text) + nand_boot.o (.text) + sdram.o (.text) + ndfc.o (.text) + + *(.text) + *(.fixup) + } + _etext = .; + + .data : + { + *(.rodata*) + *(.data*) + *(.sdata*) + __got2_start = .; + *(.got2) + __got2_end = .; + } + + _edata = .; + + __bss_start = .; + .bss : + { + *(.sbss) + *(.bss) + } + + _end = . ; +} diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c new file mode 100644 index 0000000..a136fb7 --- /dev/null +++ b/nand_spl/nand_boot.c @@ -0,0 +1,177 @@ +/* + * (C) Copyright 2006 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <nand.h> + +#define CFG_NAND_READ_DELAY \ + { volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; } + +extern void board_nand_init(struct nand_chip *nand); +extern void ndfc_hwcontrol(struct mtd_info *mtdinfo, int cmd); +extern void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte); +extern u_char ndfc_read_byte(struct mtd_info *mtdinfo); +extern int ndfc_dev_ready(struct mtd_info *mtdinfo); +extern int jump_to_ram(ulong delta); +extern int jump_to_uboot(ulong addr); + +static int nand_is_bad_block(struct mtd_info *mtd, int block) +{ + struct nand_chip *this = mtd->priv; + int page_addr = block * CFG_NAND_PAGE_COUNT; + + /* Begin command latch cycle */ + this->hwcontrol(mtd, NAND_CTL_SETCLE); + this->write_byte(mtd, NAND_CMD_READOOB); + /* Set ALE and clear CLE to start address cycle */ + this->hwcontrol(mtd, NAND_CTL_CLRCLE); + this->hwcontrol(mtd, NAND_CTL_SETALE); + /* Column address */ + this->write_byte(mtd, CFG_NAND_BAD_BLOCK_POS); /* A[7:0] */ + this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[16:9] */ + this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[24:17] */ +#ifdef CFG_NAND_4_ADDR_CYCLE + /* One more address cycle for devices > 32MiB */ + this->write_byte(mtd, (uchar)((page_addr >> 16) & 0x0f)); /* A[xx:25] */ +#endif + /* Latch in address */ + this->hwcontrol(mtd, NAND_CTL_CLRALE); + + /* + * Wait a while for the data to be ready + */ + if (this->dev_ready) + this->dev_ready(mtd); + else + CFG_NAND_READ_DELAY; + + /* + * Read on byte + */ + if (this->read_byte(mtd) != 0xff) + return 1; + + return 0; +} + +static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst) +{ + struct nand_chip *this = mtd->priv; + int page_addr = page + block * CFG_NAND_PAGE_COUNT; + int i; + + /* Begin command latch cycle */ + this->hwcontrol(mtd, NAND_CTL_SETCLE); + this->write_byte(mtd, NAND_CMD_READ0); + /* Set ALE and clear CLE to start address cycle */ + this->hwcontrol(mtd, NAND_CTL_CLRCLE); + this->hwcontrol(mtd, NAND_CTL_SETALE); + /* Column address */ + this->write_byte(mtd, 0); /* A[7:0] */ + this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[16:9] */ + this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[24:17] */ +#ifdef CFG_NAND_4_ADDR_CYCLE + /* One more address cycle for devices > 32MiB */ + this->write_byte(mtd, (uchar)((page_addr >> 16) & 0x0f)); /* A[xx:25] */ +#endif + /* Latch in address */ + this->hwcontrol(mtd, NAND_CTL_CLRALE); + + /* + * Wait a while for the data to be ready + */ + if (this->dev_ready) + this->dev_ready(mtd); + else + CFG_NAND_READ_DELAY; + + /* + * Read page into buffer + */ + for (i=0; i<CFG_NAND_PAGE_SIZE; i++) + *dst++ = this->read_byte(mtd); + + return 0; +} + +static int nand_load(struct mtd_info *mtd, int offs, int uboot_size, uchar *dst) +{ + int block; + int blockcopy_count; + int page; + + /* + * offs has to be aligned to a block address! + */ + block = offs / CFG_NAND_BLOCK_SIZE; + blockcopy_count = 0; + + while (blockcopy_count < (uboot_size / CFG_NAND_BLOCK_SIZE)) { + if (!nand_is_bad_block(mtd, block)) { + /* + * Skip bad blocks + */ + for (page = 0; page < CFG_NAND_PAGE_COUNT; page++) { + nand_read_page(mtd, block, page, dst); + dst += CFG_NAND_PAGE_SIZE; + } + + blockcopy_count++; + } + + block++; + } + + return 0; +} + +void nand_boot(void) +{ + ulong mem_size; + struct nand_chip nand_chip; + nand_info_t nand_info; + int ret; + void (*uboot)(void); + + /* + * Init sdram, so we have access to memory + */ + mem_size = initdram(0); + + /* + * Init board specific nand support + */ + nand_info.priv = &nand_chip; + nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CFG_NAND_BASE; + nand_chip.dev_ready = NULL; /* preset to NULL */ + board_nand_init(&nand_chip); + + /* + * Load U-Boot image from NAND into RAM + */ + ret = nand_load(&nand_info, CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE, + (uchar *)CFG_NAND_U_BOOT_DST); + + /* + * Jump to U-Boot image + */ + uboot = (void (*)(void))CFG_NAND_U_BOOT_START; + (*uboot)(); +} |