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-rw-r--r--lib_blackfin/Makefile4
-rw-r--r--lib_blackfin/board.c61
-rw-r--r--lib_blackfin/cache.c18
-rw-r--r--lib_blackfin/clocks.c77
-rw-r--r--lib_blackfin/post.c4
-rw-r--r--lib_blackfin/string.c38
-rw-r--r--lib_blackfin/tests.c3
7 files changed, 136 insertions, 69 deletions
diff --git a/lib_blackfin/Makefile b/lib_blackfin/Makefile
index fee0fda..46ef7f3 100644
--- a/lib_blackfin/Makefile
+++ b/lib_blackfin/Makefile
@@ -39,10 +39,10 @@ SOBJS-y += memset.o
COBJS-y += board.o
COBJS-y += boot.o
COBJS-y += cache.o
+COBJS-y += clocks.o
COBJS-y += muldi3.o
-COBJS-y += post.o
+COBJS-$(CONFIG_POST) += post.o tests.o
COBJS-y += string.o
-COBJS-y += tests.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
diff --git a/lib_blackfin/board.c b/lib_blackfin/board.c
index 01b71d4..c223711 100644
--- a/lib_blackfin/board.c
+++ b/lib_blackfin/board.c
@@ -44,50 +44,6 @@ static inline void serial_early_puts(const char *s)
#endif
}
-/* Get the input voltage */
-static u_long get_vco(void)
-{
- u_long msel;
- u_long vco;
-
- msel = (*pPLL_CTL >> 9) & 0x3F;
- if (0 == msel)
- msel = 64;
-
- vco = CONFIG_CLKIN_HZ;
- vco >>= (1 & *pPLL_CTL); /* DF bit */
- vco = msel * vco;
- return vco;
-}
-
-/* Get the Core clock */
-u_long get_cclk(void)
-{
- u_long csel, ssel;
- if (*pPLL_STAT & 0x1)
- return CONFIG_CLKIN_HZ;
-
- ssel = *pPLL_DIV;
- csel = ((ssel >> 4) & 0x03);
- ssel &= 0xf;
- if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
- return get_vco() / ssel;
- return get_vco() >> csel;
-}
-
-/* Get the System clock */
-u_long get_sclk(void)
-{
- u_long ssel;
-
- if (*pPLL_STAT & 0x1)
- return CONFIG_CLKIN_HZ;
-
- ssel = (*pPLL_DIV & 0xf);
-
- return get_vco() / ssel;
-}
-
static void *mem_malloc_start, *mem_malloc_end, *mem_malloc_brk;
static void mem_malloc_init(void)
@@ -114,7 +70,11 @@ void *sbrk(ptrdiff_t increment)
static int display_banner(void)
{
printf("\n\n%s\n\n", version_string);
- printf("CPU: ADSP " MK_STR(CONFIG_BFIN_CPU) " (Detected Rev: 0.%d)\n", bfin_revid());
+ printf("CPU: ADSP " MK_STR(CONFIG_BFIN_CPU) " "
+ "(Detected Rev: 0.%d) "
+ "(%s boot)\n",
+ bfin_revid(),
+ get_bfin_boot_mode(CONFIG_BFIN_BOOT_MODE));
return 0;
}
@@ -435,10 +395,19 @@ void board_init_r(gd_t * id, ulong dest_addr)
#ifdef CONFIG_CMD_NET
printf("Net: ");
eth_initialize(gd->bd);
- if (getenv("ethaddr"))
+ if ((s = getenv("ethaddr"))) {
+# ifndef CONFIG_NET_MULTI
+ size_t i;
+ char *e;
+ for (i = 0; i < 6; ++i) {
+ bd->bi_enetaddr[i] = simple_strtoul(s, &e, 16);
+ s = (*e) ? e + 1 : e;
+ }
+# endif
printf("MAC: %02X:%02X:%02X:%02X:%02X:%02X\n",
bd->bi_enetaddr[0], bd->bi_enetaddr[1], bd->bi_enetaddr[2],
bd->bi_enetaddr[3], bd->bi_enetaddr[4], bd->bi_enetaddr[5]);
+ }
#endif
display_global_data();
diff --git a/lib_blackfin/cache.c b/lib_blackfin/cache.c
index 870c5bf..1557864 100644
--- a/lib_blackfin/cache.c
+++ b/lib_blackfin/cache.c
@@ -15,15 +15,25 @@
void flush_cache(unsigned long addr, unsigned long size)
{
+ void *start_addr, *end_addr;
+ int istatus, dstatus;
+
/* no need to flush stuff in on chip memory (L1/L2/etc...) */
if (addr >= 0xE0000000)
return;
- if (icache_status())
- blackfin_icache_flush_range((void *)addr, (void *)(addr + size));
+ start_addr = (void *)addr;
+ end_addr = (void *)(addr + size);
+ istatus = icache_status();
+ dstatus = dcache_status();
- if (dcache_status())
- blackfin_dcache_flush_range((void *)addr, (void *)(addr + size));
+ if (istatus) {
+ if (dstatus)
+ blackfin_icache_dcache_flush_range(start_addr, end_addr);
+ else
+ blackfin_icache_flush_range(start_addr, end_addr);
+ } else if (dstatus)
+ blackfin_dcache_flush_range(start_addr, end_addr);
}
void icache_enable(void)
diff --git a/lib_blackfin/clocks.c b/lib_blackfin/clocks.c
new file mode 100644
index 0000000..0be395b
--- /dev/null
+++ b/lib_blackfin/clocks.c
@@ -0,0 +1,77 @@
+/*
+ * clocks.c - figure out sclk/cclk/vco and such
+ *
+ * Copyright (c) 2005-2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <asm/blackfin.h>
+
+/* Get the voltage input multiplier */
+static u_long cached_vco_pll_ctl, cached_vco;
+u_long get_vco(void)
+{
+ u_long msel;
+
+ u_long pll_ctl = bfin_read_PLL_CTL();
+ if (pll_ctl == cached_vco_pll_ctl)
+ return cached_vco;
+ else
+ cached_vco_pll_ctl = pll_ctl;
+
+ msel = (pll_ctl >> 9) & 0x3F;
+ if (0 == msel)
+ msel = 64;
+
+ cached_vco = CONFIG_CLKIN_HZ;
+ cached_vco >>= (1 & pll_ctl); /* DF bit */
+ cached_vco *= msel;
+ return cached_vco;
+}
+
+/* Get the Core clock */
+static u_long cached_cclk_pll_div, cached_cclk;
+u_long get_cclk(void)
+{
+ u_long csel, ssel;
+
+ if (bfin_read_PLL_STAT() & 0x1)
+ return CONFIG_CLKIN_HZ;
+
+ ssel = bfin_read_PLL_DIV();
+ if (ssel == cached_cclk_pll_div)
+ return cached_cclk;
+ else
+ cached_cclk_pll_div = ssel;
+
+ csel = ((ssel >> 4) & 0x03);
+ ssel &= 0xf;
+ if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
+ cached_cclk = get_vco() / ssel;
+ else
+ cached_cclk = get_vco() >> csel;
+ return cached_cclk;
+}
+
+/* Get the System clock */
+static u_long cached_sclk_pll_div, cached_sclk;
+u_long get_sclk(void)
+{
+ u_long ssel;
+
+ if (bfin_read_PLL_STAT() & 0x1)
+ return CONFIG_CLKIN_HZ;
+
+ ssel = bfin_read_PLL_DIV();
+ if (ssel == cached_sclk_pll_div)
+ return cached_sclk;
+ else
+ cached_sclk_pll_div = ssel;
+
+ ssel &= 0xf;
+
+ cached_sclk = get_vco() / ssel;
+ return cached_sclk;
+}
diff --git a/lib_blackfin/post.c b/lib_blackfin/post.c
index 4ab9e8b..35ccd3c 100644
--- a/lib_blackfin/post.c
+++ b/lib_blackfin/post.c
@@ -30,8 +30,6 @@
#include <logbuff.h>
#endif
-#ifdef CONFIG_POST
-
DECLARE_GLOBAL_DATA_PTR;
#define POST_MAX_NUMBER 32
@@ -421,5 +419,3 @@ unsigned long post_time_ms(unsigned long base)
{
return (unsigned long)get_ticks() / (get_tbclk() / CONFIG_SYS_HZ) - base;
}
-
-#endif /* CONFIG_POST */
diff --git a/lib_blackfin/string.c b/lib_blackfin/string.c
index 36eecdf..12b6d24 100644
--- a/lib_blackfin/string.c
+++ b/lib_blackfin/string.c
@@ -136,6 +136,16 @@ int strncmp(const char *cs, const char *ct, size_t count)
*/
void dma_memcpy_nocache(void *dst, const void *src, size_t count)
{
+ uint16_t wdsize, mod;
+
+ /* Disable DMA in case it's still running (older u-boot's did not
+ * always turn them off). Do it before the if statement below so
+ * we can be cheap and not do a SSYNC() due to the forced abort.
+ */
+ bfin_write_MDMA_D0_CONFIG(0);
+ bfin_write_MDMA_S0_CONFIG(0);
+ bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR);
+
/* Scratchpad cannot be a DMA source or destination */
if (((unsigned long)src >= L1_SRAM_SCRATCH &&
(unsigned long)src < L1_SRAM_SCRATCH_END) ||
@@ -143,9 +153,18 @@ void dma_memcpy_nocache(void *dst, const void *src, size_t count)
(unsigned long)dst < L1_SRAM_SCRATCH_END))
hang();
- bfin_write_MDMA_S0_CONFIG(0);
- bfin_write_MDMA_D0_CONFIG(0);
- bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR);
+ if (((unsigned long)dst | (unsigned long)src | count) & 0x1) {
+ wdsize = WDSIZE_8;
+ mod = 1;
+ } else if (((unsigned long)dst | (unsigned long)src | count) & 0x2) {
+ wdsize = WDSIZE_16;
+ count >>= 1;
+ mod = 2;
+ } else {
+ wdsize = WDSIZE_32;
+ count >>= 2;
+ mod = 4;
+ }
/* Copy sram functions from sdram to sram */
/* Setup destination start address */
@@ -153,25 +172,24 @@ void dma_memcpy_nocache(void *dst, const void *src, size_t count)
/* Setup destination xcount */
bfin_write_MDMA_D0_X_COUNT(count);
/* Setup destination xmodify */
- bfin_write_MDMA_D0_X_MODIFY(1);
+ bfin_write_MDMA_D0_X_MODIFY(mod);
/* Setup Source start address */
bfin_write_MDMA_S0_START_ADDR(src);
/* Setup Source xcount */
bfin_write_MDMA_S0_X_COUNT(count);
/* Setup Source xmodify */
- bfin_write_MDMA_S0_X_MODIFY(1);
+ bfin_write_MDMA_S0_X_MODIFY(mod);
/* Enable source DMA */
- bfin_write_MDMA_S0_CONFIG(DMAEN);
-
- bfin_write_MDMA_D0_CONFIG(WNR | DMAEN);
+ bfin_write_MDMA_S0_CONFIG(wdsize | DMAEN);
+ bfin_write_MDMA_D0_CONFIG(wdsize | DMAEN | WNR | DI_EN);
SSYNC();
- while (bfin_read_MDMA_D0_IRQ_STATUS() & DMA_RUN)
+ while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
continue;
- bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_RUN | DMA_DONE | DMA_ERR);
+ bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR);
bfin_write_MDMA_D0_CONFIG(0);
bfin_write_MDMA_S0_CONFIG(0);
}
diff --git a/lib_blackfin/tests.c b/lib_blackfin/tests.c
index c2319ec..bf7fba0 100644
--- a/lib_blackfin/tests.c
+++ b/lib_blackfin/tests.c
@@ -27,7 +27,6 @@
#include <common.h>
#include <config.h>
-#ifdef CONFIG_POST
#include <post.h>
#define CONFIG_SYS_POST_FLASH 0x00004000
@@ -249,5 +248,3 @@ struct post_test post_list[] = {
};
unsigned int post_list_size = sizeof(post_list) / sizeof(struct post_test);
-
-#endif /* CONFIG_POST */