diff options
Diffstat (limited to 'include')
39 files changed, 0 insertions, 105 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 6b56fe7..2a205cd 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -61,7 +61,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 3edf52e..282366c 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -46,7 +46,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_TSEC_ENET #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 557f6ef..969f448 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -68,7 +68,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ #if defined(CONFIG_PCI) diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index b5d3737..3af2425 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -68,7 +68,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ #ifdef CONFIG_PCI diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index a444a78..05a2360 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -130,7 +130,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ #if defined(CONFIG_PCI) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 480261b..325baa2 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -40,7 +40,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 275d898..e850f54 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -28,8 +28,6 @@ #define CONFIG_DEEP_SLEEP -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ - #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index e464683..9a4af80 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -26,8 +26,6 @@ #define CONFIG_ENV_OVERWRITE -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ - /* support deep sleep */ #ifdef CONFIG_ARCH_T1024 #define CONFIG_DEEP_SLEEP diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 6fd8827..8343f37 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -51,7 +51,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index b3e9c28..bd1cfd4 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -161,7 +161,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index ff6fc2d..17daf1d 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -33,7 +33,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_RAMBOOT_PBL diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index f9534b7..e3d57e6 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -27,7 +27,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_RAMBOOT_PBL diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 3ef647e..9d4baaa 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -12,7 +12,6 @@ #define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE4 -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index c35506c..e8ac43c 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -72,7 +72,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 18938bf..9408759 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -18,10 +18,6 @@ */ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP3_AM3517CRANE 1 /* working with CRANEBOARD */ -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index c98c663..f1584e4 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -19,11 +19,6 @@ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 - #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ /* diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 74fd9c4..e6f2422 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -47,10 +47,6 @@ /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 -/* CPU Errata */ -#define CONFIG_ARM_ERRATA_773022 -#define CONFIG_ARM_ERRATA_774769 - /* Power */ #define CONFIG_POWER #define CONFIG_POWER_I2C diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index d244824..e8b79a2 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -25,10 +25,6 @@ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP_GPIO #define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */ -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 #define CONFIG_SDRC /* The chip has SDRC controller */ diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index bfd3b50..c179a2b 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -15,10 +15,6 @@ */ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_CM_T3517 /* working with CM-T3517 */ -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 #define CONFIG_SYS_TEXT_BASE 0x80008000 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 8bed3e3..f810d34 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -58,7 +58,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index c4ee23e..2fc3fe9 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -118,8 +118,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_FSL_CAAM /* Enable CAAM */ - /* * Serial Port */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 774a1de..6b640c4 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -129,8 +129,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#define CONFIG_FSL_CAAM /* Enable CAAM */ - #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ !defined(CONFIG_QSPI_BOOT) #define CONFIG_U_QE diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index c49ad36..7279c89 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -154,8 +154,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_FSL_CAAM /* Enable CAAM */ - #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ !defined(CONFIG_QSPI_BOOT) #define CONFIG_U_QE diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index c4b05e0..9a01e48 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -145,8 +145,6 @@ #endif #endif -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ - /* FMan ucode */ #define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index be65e4f..8ec1247 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -118,8 +118,6 @@ #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ - #define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ /* FMan ucode */ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 4bfd0ac..4ba273a 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -21,8 +21,6 @@ /* We need architecture specific misc initializations */ -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ - /* Link Definitions */ #ifndef CONFIG_QSPI_BOOT #ifdef CONFIG_SPL diff --git a/include/configs/mcx.h b/include/configs/mcx.h index ef44110..06c1a95 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -15,10 +15,6 @@ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP3_MCX /* working with mcx */ #define CONFIG_OMAP_GPIO -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 #define CONFIG_MACH_TYPE MACH_TYPE_MCX diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 39d6418..afe9b93 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -8,11 +8,6 @@ #define __MX6_COMMON_H #ifndef CONFIG_MX6UL -#define CONFIG_ARM_ERRATA_743622 -#define CONFIG_ARM_ERRATA_751472 -#define CONFIG_ARM_ERRATA_794072 -#define CONFIG_ARM_ERRATA_761320 - #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE @@ -90,7 +85,6 @@ /* Secure boot (HAB) support */ #ifdef CONFIG_SECURE_BOOT #define CONFIG_CSF_SIZE 0x2000 -#define CONFIG_FSL_CAAM #define CONFIG_CMD_DEKBLOB #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_DRIVERS_MISC_SUPPORT diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 837d5f7..b10b7f1 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -68,7 +68,6 @@ /* Secure boot (HAB) support */ #ifdef CONFIG_SECURE_BOOT #define CONFIG_CSF_SIZE 0x2000 -#define CONFIG_FSL_CAAM #define CONFIG_CMD_DEKBLOB #endif diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index e17c3c0..5b0cb2e 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -27,10 +27,6 @@ #define CONFIG_OMAP3430 /* which is in a 3430 */ #define CONFIG_OMAP3_RX51 /* working with RX51 */ #define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */ -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 #define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51 diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 6a57ebd..a28f9ba 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -85,10 +85,6 @@ */ #define CONFIG_OMAP /* This is TI OMAP core */ #define CONFIG_OMAP_GPIO -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 #define CONFIG_SDRC /* The chip has SDRC controller */ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index fb28dcd..83fa6e0 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -17,9 +17,6 @@ */ #define CONFIG_ARM_ARCH_CP15_ERRATA -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 /* * Platform diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 87b5315..2704319 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -15,10 +15,6 @@ */ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP_GPIO -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 #define CONFIG_SYS_TEXT_BASE 0x80008000 diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 89d2e6b..ead8ea7 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -19,10 +19,6 @@ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP_GPIO -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 #define CONFIG_SDRC /* Has an SDRC controller */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 793310f..db1cc24 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -10,13 +10,6 @@ #include "tegra-common.h" /* - * Errata configuration - */ -#define CONFIG_ARM_ERRATA_716044 -#define CONFIG_ARM_ERRATA_742230 -#define CONFIG_ARM_ERRATA_751472 - -/* * NS16550 Configuration */ #define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */ diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index baf3d00..6083847 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -10,12 +10,6 @@ #include "tegra-common.h" /* - * Errata configuration - */ -#define CONFIG_ARM_ERRATA_743622 -#define CONFIG_ARM_ERRATA_751472 - -/* * NS16550 Configuration */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 0ad3235..0147662 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -21,11 +21,6 @@ #include <asm/arch/cpu.h> #include <asm/arch/omap.h> -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 - /* The chip has SDRC controller */ #define CONFIG_SDRC diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 37d6565..7fb1bb6 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -17,9 +17,6 @@ #ifndef __CONFIG_TI_OMAP5_COMMON_H #define __CONFIG_TI_OMAP5_COMMON_H -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_798870 - /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index e4b3290..2b80352 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -19,10 +19,6 @@ /* High Level Configuration Options */ #define CONFIG_SYS_THUMB_BUILD #define CONFIG_OMAP /* in a TI OMAP core */ -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER /* |