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-rw-r--r--include/asm-m68k/fsl_i2c.h9
-rw-r--r--include/configs/M5235EVB.h7
-rw-r--r--include/configs/M5249EVB.h4
-rw-r--r--include/configs/M5253DEMO.h11
-rw-r--r--include/configs/M5271EVB.h2
-rw-r--r--include/configs/M5272C3.h5
-rw-r--r--include/configs/M5275EVB.h5
-rw-r--r--include/configs/M5282EVB.h4
-rw-r--r--include/configs/M54451EVB.h5
-rw-r--r--include/configs/M54455EVB.h5
-rw-r--r--include/configs/M5475EVB.h2
-rw-r--r--include/configs/M5485EVB.h2
-rw-r--r--include/configs/ads5121.h1
-rw-r--r--include/mpc512x.h1
-rw-r--r--include/mpc5xxx_sdma.h93
15 files changed, 128 insertions, 28 deletions
diff --git a/include/asm-m68k/fsl_i2c.h b/include/asm-m68k/fsl_i2c.h
index 4f71341..2bc9bf4 100644
--- a/include/asm-m68k/fsl_i2c.h
+++ b/include/asm-m68k/fsl_i2c.h
@@ -72,15 +72,6 @@ typedef struct fsl_i2c {
#define I2C_DR 0xFF
#define I2C_DR_SHIFT 0
#define I2C_DR_RES ~(I2C_DR)
-
- u8 dfsrr; /* I2C digital filter sampling rate register */
- u8 res5[3];
-#define I2C_DFSRR 0x3F
-#define I2C_DFSRR_SHIFT 0
-#define I2C_DFSRR_RES ~(I2C_DR)
-
- /* Fill out the reserved block */
- u8 res6[0xE8];
} fsl_i2c_t;
#endif /* _ASM_I2C_H_ */
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index e836132..b32eabe 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -102,12 +102,15 @@
/* I2C */
#define CONFIG_FSL_I2C
-#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CONFIG_HARD_I2C /* I2C with hw support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CFG_I2C_SPEED 80000
#define CFG_I2C_SLAVE 0x7F
#define CFG_I2C_OFFSET 0x00000300
#define CFG_IMMR CFG_MBAR
+#define CFG_I2C_PINMUX_REG (gpio->par_qspi)
+#define CFG_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK)
+#define CFG_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA)
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h
index c2f5dd9..6bf2d99 100644
--- a/include/configs/M5249EVB.h
+++ b/include/configs/M5249EVB.h
@@ -41,8 +41,8 @@
#define CONFIG_MCFUART
#define CFG_UART_PORT (0)
-#define CONFIG_BAUDRATE 19200
-#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#undef CONFIG_WATCHDOG
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index f2c2317..9f78f6e 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -118,6 +118,17 @@
#define CONFIG_HOSTNAME M5253DEMO
+/* I2C */
+#define CONFIG_FSL_I2C
+#define CONFIG_HARD_I2C /* I2C with hw support */
+#define CFG_I2C_SPEED 80000
+#define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_OFFSET 0x00000280
+#define CFG_IMMR CFG_MBAR
+#define CFG_I2C_PINMUX_REG (*(u32 *) (CFG_MBAR+0x19C))
+#define CFG_I2C_PINMUX_CLR (0xFFFFE7FF)
+#define CFG_I2C_PINMUX_SET (0)
+
#define CFG_PROMPT "=> "
#define CFG_LONGHELP /* undef to save memory */
diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h
index 12f9783..78a1b93 100644
--- a/include/configs/M5271EVB.h
+++ b/include/configs/M5271EVB.h
@@ -42,7 +42,7 @@
#define CONFIG_MCFUART
#define CFG_UART_PORT (0)
-#define CONFIG_BAUDRATE 19200
+#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#undef CONFIG_WATCHDOG /* disable watchdog */
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 7edd322..fc457e3 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -40,8 +40,8 @@
#define CONFIG_MCFUART
#define CFG_UART_PORT (0)
-#define CONFIG_BAUDRATE 19200
-#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#undef CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
@@ -91,6 +91,7 @@
#ifdef CONFIG_MCFFEC
# define CONFIG_NET_MULTI 1
# define CONFIG_MII 1
+# define CONFIG_MII_INIT 1
# define CFG_DISCOVER_PHY
# define CFG_RX_ETH_BUFFER 8
# define CFG_FAULT_ECHO_LINK_DOWN
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 30c70e5..430af6b 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -45,7 +45,7 @@
#define CONFIG_MCFUART
#define CFG_UART_PORT (0)
-#define CONFIG_BAUDRATE 19200
+#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
/* Configuration for environment
@@ -118,6 +118,9 @@
#define CFG_I2C_SLAVE 0x7F
#define CFG_I2C_OFFSET 0x00000300
#define CFG_IMMR CFG_MBAR
+#define CFG_I2C_PINMUX_REG (gpio_reg->par_feci2c)
+#define CFG_I2C_PINMUX_CLR (0xFFF0)
+#define CFG_I2C_PINMUX_SET (0x000F)
#ifdef CONFIG_MCFFEC
#define CONFIG_ETHADDR 00:06:3b:01:41:55
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index 279a12b..eb59c25 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -40,8 +40,8 @@
#define CONFIG_MCFUART
#define CFG_UART_PORT (0)
-#define CONFIG_BAUDRATE 19200
-#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index 588c00c..cf58239 100644
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -140,9 +140,8 @@
"u-boot=u-boot.bin\0" \
"load=tftp ${loadaddr) ${u-boot}\0" \
"upd=run load; run prog\0" \
- "prog=prot off 0 " MK_STR(CFG_UBOOT_END)\
- "; era 0 " MK_STR(CFG_UBOOT_END) \
- "2ffff;" \
+ "prog=prot off 0 " MK_STR(CFG_UBOOT_END) \
+ "; era 0 " MK_STR(CFG_UBOOT_END) " ;" \
"cp.b ${loadaddr} 0 ${filesize};" \
"save\0" \
""
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index 476aba3..ad9c15e 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -157,7 +157,7 @@
" " MK_STR(CFG_UBOOT_END) ";" \
"era " MK_STR(CFG_FLASH_BASE) " " \
MK_STR(CFG_UBOOT_END) ";" \
- "cp.b ${loadaddr} " MK_STR(CFG_FLASH_BASE)\
+ "cp.b ${loadaddr} " MK_STR(CFG_FLASH_BASE) \
" ${filesize}; save\0" \
""
#endif
@@ -388,9 +388,6 @@
#endif
#endif
-#define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
-#define CFG_FLASH_CHECKSUM
-
/*
* This is setting for JFFS2 support in u-boot.
* NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h
index 4037efb..af6723c 100644
--- a/include/configs/M5475EVB.h
+++ b/include/configs/M5475EVB.h
@@ -226,7 +226,7 @@
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_SDRAM_CFG1 0x73711630
-#define CFG_SDRAM_CFG2 0x46370000
+#define CFG_SDRAM_CFG2 0x46770000
#define CFG_SDRAM_CTRL 0xE10B0000
#define CFG_SDRAM_EMOD 0x40010000
#define CFG_SDRAM_MODE 0x018D0000
diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h
index a14c55b..248db53 100644
--- a/include/configs/M5485EVB.h
+++ b/include/configs/M5485EVB.h
@@ -212,7 +212,7 @@
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_SDRAM_CFG1 0x73711630
-#define CFG_SDRAM_CFG2 0x46370000
+#define CFG_SDRAM_CFG2 0x46770000
#define CFG_SDRAM_CTRL 0xE10B0000
#define CFG_SDRAM_EMOD 0x40010000
#define CFG_SDRAM_MODE 0x018D0000
diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h
index 5f74afb..f516c46 100644
--- a/include/configs/ads5121.h
+++ b/include/configs/ads5121.h
@@ -210,6 +210,7 @@
#define CFG_CS0_CFG 0x05059310 /* ALE active low, data size 4bytes */
#define CFG_CS2_CFG 0x05059010 /* ALE active low, data size 1byte */
+#define CFG_CS_ALETIMING 0x00000005 /* Use alternative CS timing for CS0 and CS2 */
/* Use SRAM for initial stack */
#define CFG_INIT_RAM_ADDR CFG_SRAM_BASE /* Initial RAM address */
diff --git a/include/mpc512x.h b/include/mpc512x.h
index a76b1ca..cb418d1 100644
--- a/include/mpc512x.h
+++ b/include/mpc512x.h
@@ -58,6 +58,7 @@
#define CS5_CONFIG 0x00014
#define CS6_CONFIG 0x00018
#define CS7_CONFIG 0x0001C
+#define CS_ALE_TIMING_CONFIG 0x00034
#define CS_CTRL 0x00020
#define CS_CTRL_ME 0x01000000 /* CS Master Enable bit */
diff --git a/include/mpc5xxx_sdma.h b/include/mpc5xxx_sdma.h
new file mode 100644
index 0000000..8b740e4
--- /dev/null
+++ b/include/mpc5xxx_sdma.h
@@ -0,0 +1,93 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * This file is based on code
+ * (C) Copyright Motorola, Inc., 2000
+ *
+ * odin smartdma header file
+ */
+
+#ifndef __MPC5XXX_SDMA_H
+#define __MPC5XXX_SDMA_H
+
+#include <common.h>
+#include <mpc5xxx.h>
+
+/* Task number assignment */
+#define FEC_RECV_TASK_NO 0
+#define FEC_XMIT_TASK_NO 1
+
+/*---------------------------------------------------------------------*/
+
+/* Stuff for Ethernet Tx/Rx tasks */
+
+/*---------------------------------------------------------------------*/
+
+/* Layout of Ethernet controller Parameter SRAM area:
+----------------------------------------------------------------
+0x00: TBD_BASE, base address of TX BD ring
+0x04: TBD_NEXT, address of next TX BD to be processed
+0x08: RBD_BASE, base address of RX BD ring
+0x0C: RBD_NEXT, address of next RX BD to be processed
+---------------------------------------------------------------
+ALL PARAMETERS ARE ALL LONGWORDS (FOUR BYTES EACH).
+*/
+
+/* base address of SRAM area to store parameters used by Ethernet tasks */
+#define FEC_PARAM_BASE (MPC5XXX_SRAM + 0x0800)
+
+/* base address of SRAM area for buffer descriptors */
+#define FEC_BD_BASE (MPC5XXX_SRAM + 0x0820)
+
+/*---------------------------------------------------------------------*/
+
+/* common shortcuts used by driver C code */
+
+/*---------------------------------------------------------------------*/
+
+/* Disable SmartDMA task */
+#define SDMA_TASK_DISABLE(tasknum) \
+{ \
+ volatile ushort *tcr = (ushort *)(MPC5XXX_SDMA + 0x0000001c + 2 * tasknum); \
+ *tcr = (*tcr) & (~0x8000); \
+}
+
+/* Enable SmartDMA task */
+#define SDMA_TASK_ENABLE(tasknum) \
+{ \
+ volatile ushort *tcr = (ushort *) (MPC5XXX_SDMA + 0x0000001c + 2 * tasknum); \
+ *tcr = (*tcr) | 0x8000; \
+}
+
+/* Enable interrupt */
+#define SDMA_INT_ENABLE(tasknum) \
+{ \
+ struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA; \
+ sdma->IntMask &= ~(1 << tasknum); \
+}
+
+/* Disable interrupt */
+#define SDMA_INT_DISABLE(tasknum) \
+{ \
+ struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA; \
+ sdma->IntMask |= (1 << tasknum); \
+}
+
+
+/* Clear interrupt pending bits */
+#define SDMA_CLEAR_IEVENT(tasknum) \
+{ \
+ struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA; \
+ sdma->IntPend = (1 << tasknum); \
+}
+
+/* get interupt pending bit of a task */
+#define SDMA_GET_PENDINGBIT(tasknum) \
+ ((*(vu_long *)(MPC5XXX_SDMA + 0x14)) & (1<<(tasknum)))
+
+/* get interupt mask bit of a task */
+#define SDMA_GET_MASKBIT(tasknum) \
+ ((*(vu_long *)(MPC5XXX_SDMA + 0x18)) & (1<<(tasknum)))
+
+#endif /* __MPC5XXX_SDMA_H */
generated by cgit v1.1 at 2024-11-14 02:57:00 +0000