diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/bf537-pnav.h | 9 | ||||
| -rw-r--r-- | include/configs/bf537-stamp.h | 9 | ||||
| -rw-r--r-- | include/configs/bf561-acvilon.h | 8 | ||||
| -rw-r--r-- | include/configs/ip04.h | 10 | ||||
| -rw-r--r-- | include/environment.h | 21 | ||||
| -rw-r--r-- | include/nand.h | 9 |
6 files changed, 28 insertions, 38 deletions
diff --git a/include/configs/bf537-pnav.h b/include/configs/bf537-pnav.h index 8daebc8..39bbb41 100644 --- a/include/configs/bf537-pnav.h +++ b/include/configs/bf537-pnav.h @@ -132,7 +132,6 @@ #define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2)) #define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1)) -#define BFIN_NAND_READY PF12 #define BFIN_NAND_WRITE(addr, cmd) \ do { \ bfin_write8(addr, cmd); \ @@ -141,13 +140,7 @@ #define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd) #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) -#define NAND_PLAT_DEV_READY(chip) (bfin_read_PORTHIO() & BFIN_NAND_READY) -#define NAND_PLAT_INIT() \ - do { \ - bfin_write_PORTH_FER(bfin_read_PORTH_FER() & ~BFIN_NAND_READY); \ - bfin_write_PORTHIO_DIR(bfin_read_PORTHIO_DIR() & ~BFIN_NAND_READY); \ - bfin_write_PORTHIO_INEN(bfin_read_PORTHIO_INEN() | BFIN_NAND_READY); \ - } while (0) +#define NAND_PLAT_GPIO_DEV_READY GPIO_PF12 /* diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index 3592862..96704d7 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -155,7 +155,6 @@ #define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2)) #define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1)) -#define BFIN_NAND_READY PF3 #define BFIN_NAND_WRITE(addr, cmd) \ do { \ bfin_write8(addr, cmd); \ @@ -164,13 +163,7 @@ #define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd) #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) -#define NAND_PLAT_DEV_READY(chip) (bfin_read_PORTFIO() & BFIN_NAND_READY) -#define NAND_PLAT_INIT() \ - do { \ - bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~BFIN_NAND_READY); \ - bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() & ~BFIN_NAND_READY); \ - bfin_write_PORTFIO_INEN(bfin_read_PORTFIO_INEN() | BFIN_NAND_READY); \ - } while (0) +#define NAND_PLAT_GPIO_DEV_READY GPIO_PF3 /* diff --git a/include/configs/bf561-acvilon.h b/include/configs/bf561-acvilon.h index 44854c7..0c0204f 100644 --- a/include/configs/bf561-acvilon.h +++ b/include/configs/bf561-acvilon.h @@ -144,7 +144,6 @@ #define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2)) #define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 3)) -#define BFIN_NAND_READY PF10 #define BFIN_NAND_WRITE(addr, cmd) \ do { \ bfin_write8(addr, cmd); \ @@ -153,12 +152,7 @@ #define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd) #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) -#define NAND_PLAT_DEV_READY(chip) (bfin_read_FIO0_FLAG_D() & BFIN_NAND_READY) -#define NAND_PLAT_INIT() \ - do { \ - bfin_write_FIO0_DIR(bfin_read_FIO0_DIR() & ~BFIN_NAND_READY); \ - bfin_write_FIO0_INEN(bfin_read_FIO0_INEN() | BFIN_NAND_READY); \ - } while (0) +#define NAND_PLAT_GPIO_DEV_READY GPIO_PF10 /* diff --git a/include/configs/ip04.h b/include/configs/ip04.h index 425a745..c024d78 100644 --- a/include/configs/ip04.h +++ b/include/configs/ip04.h @@ -116,7 +116,6 @@ #define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2)) #define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1)) -#define BFIN_NAND_READY PF10 #define BFIN_NAND_WRITE(addr, cmd) \ do { \ bfin_write8(addr, cmd); \ @@ -125,14 +124,7 @@ #define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd) #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) -#define NAND_PLAT_DEV_READY(chip) (bfin_read_FIO_FLAG_D() & BFIN_NAND_READY) -#define NAND_PLAT_INIT() \ - do { \ - bfin_write_FIO_DIR(bfin_read_FIO_DIR() & ~BFIN_NAND_READY); \ - bfin_write_FIO_INEN(bfin_read_FIO_INEN() | BFIN_NAND_READY); \ - bfin_write_FIO_EDGE(bfin_read_FIO_EDGE() & ~BFIN_NAND_READY); \ - bfin_write_FIO_POLAR(bfin_read_FIO_POLAR() & ~BFIN_NAND_READY); \ - } while (0) +#define NAND_PLAT_GPIO_DEV_READY GPIO_PF10 /* diff --git a/include/environment.h b/include/environment.h index 203f731..fbccf6a 100644 --- a/include/environment.h +++ b/include/environment.h @@ -74,15 +74,24 @@ #endif /* CONFIG_ENV_IS_IN_FLASH */ #if defined(CONFIG_ENV_IS_IN_NAND) -# ifndef CONFIG_ENV_OFFSET -# error "Need to define CONFIG_ENV_OFFSET when using CONFIG_ENV_IS_IN_NAND" -# endif +# if defined(CONFIG_ENV_OFFSET_OOB) +# ifdef CONFIG_ENV_OFFSET_REDUND +# error "CONFIG_ENV_OFFSET_REDUND is not supported when CONFIG_ENV_OFFSET_OOB" +# error "is set" +# endif +extern unsigned long nand_env_oob_offset; +# define CONFIG_ENV_OFFSET nand_env_oob_offset +# else +# ifndef CONFIG_ENV_OFFSET +# error "Need to define CONFIG_ENV_OFFSET when using CONFIG_ENV_IS_IN_NAND" +# endif +# ifdef CONFIG_ENV_OFFSET_REDUND +# define CONFIG_SYS_REDUNDAND_ENVIRONMENT +# endif +# endif /* CONFIG_ENV_OFFSET_OOB */ # ifndef CONFIG_ENV_SIZE # error "Need to define CONFIG_ENV_SIZE when using CONFIG_ENV_IS_IN_NAND" # endif -# ifdef CONFIG_ENV_OFFSET_REDUND -# define CONFIG_SYS_REDUNDAND_ENVIRONMENT -# endif #endif /* CONFIG_ENV_IS_IN_NAND */ #if defined(CONFIG_ENV_IS_IN_MG_DISK) diff --git a/include/nand.h b/include/nand.h index 2a81597..8bdf419 100644 --- a/include/nand.h +++ b/include/nand.h @@ -130,3 +130,12 @@ void board_nand_select_device(struct nand_chip *nand, int chip); __attribute__((noreturn)) void nand_boot(void); #endif + +#ifdef CONFIG_ENV_OFFSET_OOB +#define ENV_OOB_MARKER 0x30425645 /*"EVB0" in little-endian -- offset is stored + as block number*/ +#define ENV_OOB_MARKER_OLD 0x30564e45 /*"ENV0" in little-endian -- offset is + stored as byte number */ +#define ENV_OFFSET_SIZE 8 +int get_nand_env_oob(nand_info_t *nand, unsigned long *result); +#endif |