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-rw-r--r--include/configs/HIDDEN_DRAGON.h4
-rw-r--r--include/configs/M5253DEMO.h1
-rw-r--r--include/configs/M5253EVBE.h1
-rw-r--r--include/configs/M54455EVB.h1
-rw-r--r--include/configs/MPC8349ITX.h7
-rw-r--r--include/configs/MPC8536DS.h6
-rw-r--r--include/configs/MPC8544DS.h6
-rw-r--r--include/configs/MPC8572DS.h6
-rw-r--r--include/configs/MPC8610HPCD.h4
-rw-r--r--include/configs/MPC8641HPCN.h4
-rw-r--r--include/configs/MVBLM7.h2
-rw-r--r--include/configs/P2020DS.h6
-rw-r--r--include/configs/mpc7448hpc2.h4
-rw-r--r--include/configs/r2dplus.h2
-rw-r--r--include/pci_ids.h2
15 files changed, 3 insertions, 53 deletions
diff --git a/include/configs/HIDDEN_DRAGON.h b/include/configs/HIDDEN_DRAGON.h
index f6777b9..251fe67 100644
--- a/include/configs/HIDDEN_DRAGON.h
+++ b/include/configs/HIDDEN_DRAGON.h
@@ -103,9 +103,7 @@
#define PCI_ENET1_MEMADDR 0x81000000
#define CONFIG_RTL8139
-#define _IO_BASE 0x00000000
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) (x)
+
/* Make sure the ethaddr can be overwritten
TODO: Remove this on final product
*/
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 50b3a03..5e86e4c 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -85,7 +85,6 @@
# define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
# define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
# define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
-# define _IO_BASE 0
#endif
#define CONFIG_NET_MULTI 1
diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h
index cf8b773..df6970c 100644
--- a/include/configs/M5253EVBE.h
+++ b/include/configs/M5253EVBE.h
@@ -91,7 +91,6 @@
#define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
#define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
#define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
-#define _IO_BASE 0
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index 101dced..87f3a73 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -180,7 +180,6 @@
#define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
#define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
#define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
-#define _IO_BASE 0
/* Realtime clock */
#define CONFIG_MCFRTC
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index f2e574b..d4d3256 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -360,16 +360,9 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_SYS_PCI2_IO_SIZE 0x01000000 /* 16M */
#endif
-#define _IO_BASE 0x00000000 /* points to PCI I/O space */
-
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) (x)
-#endif
-
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR 0x00000000
#define PCI_ENET0_MEMADDR CONFIG_SYS_PCI2_MEM_BASE
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 9e00b89..7085d28 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -427,12 +427,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
#undef CONFIG_TULIP
#undef CONFIG_RTL8139
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) ({u32 _x=le32_to_cpu(*(u32 *)(x)); (&_x);})
-#define _IO_BASE 0x00000000
-#endif
-
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BUS
#define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_IO_BUS
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 59cfde6..1d8fecf 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -340,12 +340,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#undef CONFIG_TULIP
#define CONFIG_RTL8139
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) (x)
-#define _IO_BASE 0x00000000
-#endif
-
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BUS
#define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_IO_BUS
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 6f1b1a4..235be51 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -484,12 +484,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
#undef CONFIG_TULIP
#undef CONFIG_RTL8139
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) (x)
-#define _IO_BASE 0x00000000
-#endif
-
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR CONFIG_SYS_PCIE3_IO_BUS
#define PCI_ENET0_MEMADDR CONFIG_SYS_PCIE3_IO_BUS
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 1091043..2f40ef4 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -280,10 +280,6 @@
#define CONFIG_SYS_PCI1_IO_VIRT 0xe1000000
#define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */
-/* For RTL8139 */
-#define KSEG1ADDR(x) ({u32 _x = le32_to_cpu(*(u32 *)(x)); (&_x); })
-#define _IO_BASE 0x00000000
-
/* controller 1, Base address 0xa000 */
#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000
#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BUS
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 035874b..60ce0f3 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -348,10 +348,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
| CONFIG_SYS_PHYS_ADDR_HIGH)
#define CONFIG_SYS_PCI1_IO_SIZE 0x00010000 /* 64K */
-/* For RTL8139 */
-#define KSEG1ADDR(x) ({u32 _x=le32_to_cpu(*(u32 *)(x)); (&_x);})
-#define _IO_BASE 0x00000000
-
#ifdef CONFIG_PHYS_64BIT
/*
* Use the same PCI bus address on PCI1 and PCI2 if we have PHYS_64BIT.
diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h
index 9675205..ac8cb57 100644
--- a/include/configs/MVBLM7.h
+++ b/include/configs/MVBLM7.h
@@ -193,8 +193,6 @@
#define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000
#define CONFIG_SYS_PCI1_IO_SIZE 0x01000000
-#define _IO_BASE 0x00000000
-
#define CONFIG_NET_MULTI 1
#define CONFIG_NET_RETRY_COUNT 3
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index 9306860..676f013 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -519,12 +519,6 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
#undef CONFIG_TULIP
#define CONFIG_RTL8139
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) (x)
-#define _IO_BASE 0x00000000
-#endif
-
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR CONFIG_SYS_PCIE3_IO_BUS
#define PCI_ENET0_MEMADDR CONFIG_SYS_PCIE3_IO_BUS
diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h
index 7d42155..4f98ba4 100644
--- a/include/configs/mpc7448hpc2.h
+++ b/include/configs/mpc7448hpc2.h
@@ -124,8 +124,6 @@
/* Networking Configuration */
-#define KSEG1ADDR(a) (a) /* Needed by the rtl8139 driver */
-
#define CONFIG_TSI108_ETH
#define CONFIG_TSI108_ETH_NUM_PORTS 2
@@ -303,8 +301,6 @@
#define CONFIG_SYS_PCI_IO_SIZE 0x01000000 /* 16MB */
-#define _IO_BASE 0x00000000 /* points to PCI I/O space */
-
/* PCI Config Space mapping */
#define CONFIG_SYS_PCI_CFG_BASE 0xfb000000 /* Changed from FE000000 */
#define CONFIG_SYS_PCI_CFG_SIZE 0x01000000 /* 16MB */
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index 25f5012..8931b97 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -123,7 +123,5 @@
*/
#define CONFIG_NET_MULTI
#define CONFIG_RTL8139
-#define _IO_BASE 0x00000000
-#define KSEG1ADDR(x) (x)
#endif /* __CONFIG_H */
diff --git a/include/pci_ids.h b/include/pci_ids.h
index ae642b1..400c540 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -1519,6 +1519,8 @@
#define PCI_DEVICE_ID_AUREAL_VORTEX_1 0x0001
#define PCI_DEVICE_ID_AUREAL_VORTEX_2 0x0002
+#define PCI_VENDOR_ID_ESDGMBH 0x12fe
+
#define PCI_VENDOR_ID_CBOARDS 0x1307
#define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
generated by cgit v1.1 at 2024-11-01 21:05:33 +0000