diff options
Diffstat (limited to 'include')
35 files changed, 381 insertions, 185 deletions
diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 81e8a7c..d68993b 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -27,6 +27,7 @@ #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_ASIX88179 /* MMC SPL */ #define CONFIG_EXYNOS_SPL diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 5d765f3..5df460c 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -76,6 +76,16 @@ #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX +/* PCI host support */ +#define CONFIG_PCI +#define CONFIG_PCI_TEGRA +#define CONFIG_PCI_PNP +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PCI_ENUM + +/* PCI networking support */ +#define CONFIG_RTL8169 + /* General networking support */ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 758b7ad..5e13b65 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -78,6 +78,16 @@ #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX +/* PCI host support */ +#define CONFIG_PCI +#define CONFIG_PCI_TEGRA +#define CONFIG_PCI_PNP +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PCI_ENUM + +/* PCI networking support */ +#define CONFIG_RTL8169 + /* General networking support */ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 645b31c..8930210 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -25,10 +25,10 @@ #define CONFIG_X86_RESET_VECTOR #define CONFIG_NR_DRAM_BANKS 8 -#define CONFIG_X86_MRC_START 0xfffa0000 +#define CONFIG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_CACHE_MRC_SIZE_KB 512 -#define CONFIG_COREBOOT_SERIAL +#define CONFIG_X86_SERIAL #define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \ PCI_DEVICE_ID_INTEL_NM10_AHCI}, \ @@ -39,7 +39,7 @@ {PCI_VENDOR_ID_INTEL, \ PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE} -#define CONFIG_X86_OPTION_ROM_FILENAME pci8086,0166.bin +#define CONFIG_X86_OPTION_ROM_FILE pci8086,0166.bin #define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000 #define CONFIG_VIDEO_X86 diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 2581380..990a2d1 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -49,7 +49,7 @@ {PCI_VENDOR_ID_INTEL, \ PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE} -#define CONFIG_COREBOOT_SERIAL +#define CONFIG_X86_SERIAL #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \ "stdout=vga,serial,cbmem\0" \ diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h new file mode 100644 index 0000000..eadb339 --- /dev/null +++ b/include/configs/crownbay.h @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/x86-common.h> + +#define CONFIG_SYS_MONITOR_LEN (1 << 20) +#define CONFIG_SYS_X86_START16 0xfffff800 +#define CONFIG_BOARD_EARLY_INIT_F + +#define CONFIG_X86_RESET_VECTOR +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_X86_SERIAL +#define CONFIG_SMSC_LPC47M + +#define CONFIG_PCI_MEM_BUS 0x40000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x80000000 + +#define CONFIG_PCI_PREF_BUS 0xc0000000 +#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS +#define CONFIG_PCI_PREF_SIZE 0x20000000 + +#define CONFIG_PCI_IO_BUS 0x2000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0xe000 + +#define CONFIG_SYS_EARLY_PCI_INIT +#define CONFIG_PCI_PNP +#define CONFIG_E1000 + +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + +#define CONFIG_SCSI_DEV_LIST \ + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA} + +#define CONFIG_SPI_FLASH_SST + +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC_SDMA +#define CONFIG_CMD_MMC + +/* Video is not supported */ +#undef CONFIG_VIDEO +#undef CONFIG_CFB_CONSOLE + +#endif /* __CONFIG_H */ diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 185edbe..b4b3ae8 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -78,14 +78,7 @@ #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC #define CONFIG_BOUNCE_BUFFER -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_DOS_PARTITION - -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_MII -#define CONFIG_CMD_NET + #define CONFIG_FEC_MXC #define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR @@ -114,151 +107,19 @@ /* Command definition */ #include <config_cmd_default.h> +#undef CONFIG_CMD_FPGA #define CONFIG_CMD_BMODE -#define CONFIG_CMD_BOOTZ #define CONFIG_CMD_SETEXPR #undef CONFIG_CMD_IMLS -#define CONFIG_BOOTDELAY 1 - #define CONFIG_LOADADDR 0x12000000 #define CONFIG_SYS_TEXT_BASE 0x17800000 -#ifdef CONFIG_SUPPORT_EMMC_BOOT -#define EMMC_ENV \ - "emmcdev=2\0" \ - "update_emmc_firmware=" \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "if ${get_cmd} ${update_sd_firmware_filename}; then " \ - "if mmc dev ${emmcdev}; then " \ - "setexpr fw_sz ${filesize} / 0x200; " \ - "setexpr fw_sz ${fw_sz} + 1; " \ - "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ - "fi; " \ - "fi\0" -#else -#define EMMC_ENV "" -#endif - -#ifdef CONFIG_CMD_SF -#define SF_ENV \ - "update_spi_firmware=" \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "if ${get_cmd} ${update_spi_firmware_filename}; then " \ - "if sf probe; then " \ - "sf erase 0 0xc0000; " \ - "sf write ${loadaddr} 0x400 ${filesize}; " \ - "fi; " \ - "fi\0" -#else -#define SF_ENV "" -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=zImage\0" \ - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "fdt_addr=0x18000000\0" \ - "boot_fdt=try\0" \ - "ip_dyn=yes\0" \ - "console=" CONFIG_CONSOLE_DEV "\0" \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" \ - "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=1\0" \ - "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ - "update_sd_firmware=" \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "if mmc dev ${mmcdev}; then " \ - "if ${get_cmd} ${update_sd_firmware_filename}; then " \ - "setexpr fw_sz ${filesize} / 0x200; " \ - "setexpr fw_sz ${fw_sz} + 1; " \ - "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ - "fi; " \ - "fi\0" \ - EMMC_ENV \ - SF_ENV \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${image}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 256 /* Print Buffer Size */ @@ -272,7 +133,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING #define CONFIG_STACKSIZE (128 * 1024) /* Physical Memory Map */ @@ -295,14 +155,14 @@ #if defined(CONFIG_ENV_IS_IN_MMC) /* RiOTboard */ -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-riotboard.dtb" +#define CONFIG_FDTFILE "imx6dl-riotboard.dtb" #define CONFIG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */ #define CONFIG_ENV_OFFSET (6 * 64 * 1024) #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) /* MarSBoard */ -#define CONFIG_DEFAULT_FDT_FILE "imx6q-marsboard.dtb" +#define CONFIG_FDTFILE "imx6q-marsboard.dtb" #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_ENV_OFFSET (768 * 1024) #define CONFIG_ENV_SECT_SIZE (8 * 1024) @@ -312,8 +172,6 @@ #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED #endif -#define CONFIG_OF_LIBFDT - #ifndef CONFIG_SYS_DCACHE_OFF #define CONFIG_CMD_CACHE #endif @@ -335,4 +193,43 @@ #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP +#include <config_distro_defaults.h> + +/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt, + * 1M script, 1M pxe and the ramdisk at the end */ +#define MEM_LAYOUT_ENV_SETTINGS \ + "bootm_size=0x10000000\0" \ + "kernel_addr_r=0x12000000\0" \ + "fdt_addr_r=0x13000000\0" \ + "scriptaddr=0x13100000\0" \ + "pxefile_addr_r=0x13200000\0" \ + "ramdisk_addr_r=0x13300000\0" + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 2) \ + func(USB, usb, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> + +#define CONSOLE_STDIN_SETTINGS \ + "stdin=serial\0" + +#define CONSOLE_STDOUT_SETTINGS \ + "stdout=serial\0" \ + "stderr=serial\0" + +#define CONSOLE_ENV_SETTINGS \ + CONSOLE_STDIN_SETTINGS \ + CONSOLE_STDOUT_SETTINGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONSOLE_ENV_SETTINGS \ + MEM_LAYOUT_ENV_SETTINGS \ + "fdtfile=" CONFIG_FDTFILE "\0" \ + BOOTENV + #endif /* __RIOTBOARD_CONFIG_H */ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 8f9b780..ad63f3c 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -174,6 +174,16 @@ #define CONFIG_CMD_GPIO +/* USB */ +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 + +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX + /* USB boot mode */ #define CONFIG_USB_BOOTING #define EXYNOS_COPY_USB_FNPTR_ADDR 0x02020070 diff --git a/include/configs/exynos5250-common.h b/include/configs/exynos5250-common.h index a0107e8..6714313 100644 --- a/include/configs/exynos5250-common.h +++ b/include/configs/exynos5250-common.h @@ -22,11 +22,6 @@ #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) -/* USB */ -#define CONFIG_CMD_USB -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 -#define CONFIG_USB_STORAGE - #define CONFIG_SPL_TEXT_BASE 0x02023400 #define CONFIG_IRAM_STACK 0x02050000 diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index ef6e155..fe72bd0 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -13,13 +13,6 @@ /* A variant of Exynos5420 (Exynos5 Family) */ #define CONFIG_EXYNOS5800 -#define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_SPI_FLASH -#define CONFIG_ENV_SPI_BASE 0x12D30000 -#define FLASH_SIZE (0x4 << 20) -#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) -#define CONFIG_SPI_BOOTING - #include <configs/exynos5-common.h> #define CONFIG_ARCH_EARLY_INIT_R @@ -29,8 +22,6 @@ #define CONFIG_VAR_SIZE_SPL -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_TEXT_BASE 0x23E00000 #ifdef CONFIG_VAR_SIZE_SPL #define CONFIG_SPL_TEXT_BASE 0x02024410 #else @@ -47,15 +38,4 @@ #define CONFIG_BOARD_REV_GPIO_COUNT 2 -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 - -/* - * Put the initial stack pointer 1KB below this to allow room for the - * SPL marker. This value is arbitrary, but gd_t is placed starting here. - */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) - -/* Miscellaneous configurable options */ -#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" - #endif /* __CONFIG_EXYNOS5420_H */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 620f950..4f137fc 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -39,6 +39,7 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) /* Init Functions */ #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index a7d7665..0a79c7c 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -10,6 +10,9 @@ #include <linux/sizes.h> +/* enable PMIC */ +#define CONFIG_AS3722_POWER + #include "tegra124-common.h" /* High-level configuration options */ @@ -61,6 +64,16 @@ #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX +/* PCI host support */ +#define CONFIG_PCI +#define CONFIG_PCI_TEGRA +#define CONFIG_PCI_PNP +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PCI_ENUM + +/* PCI networking support */ +#define CONFIG_RTL8169 + /* General networking support */ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 6e01fa0..76cfef1 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -189,4 +189,18 @@ #define CONFIG_OF_LIBFDT #define CONFIG_CMD_BOOTZ +/* USB Configs */ +#define CONFIG_CMD_USB +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#endif + #endif /* __CONFIG_H */ diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index a346542..99d9d4d 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -60,4 +60,18 @@ #define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +/* USB Configs */ +#define CONFIG_CMD_USB +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ +#endif + #endif /* __MX6QSABRESD_CONFIG_H */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 879141a..ea75d2c 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -12,6 +12,7 @@ /* System configurations */ #define CONFIG_MX6 #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_MISC_INIT_R #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DISPLAY_CPUINFO @@ -115,6 +116,7 @@ #define CONFIG_SYS_MEMTEST_END 0x20000000 #define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) /* SPL */ #define CONFIG_SPL_FAT_SUPPORT @@ -225,7 +227,6 @@ /* Video output */ #ifdef CONFIG_VIDEO -#define CONFIG_VIDEO #define CONFIG_VIDEO_IPUV3 #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h new file mode 100644 index 0000000..9fa8660 --- /dev/null +++ b/include/configs/odroid_xu3.h @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2013 Samsung Electronics + * Hyungwon Hwang <human.hwang@samsung.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ODROID_XU3_H +#define __CONFIG_ODROID_XU3_H + +#include "exynos5420-common.h" + +#define CONFIG_SYS_PROMPT "ODROID-XU3 # " +#define CONFIG_IDENT_STRING " for ODROID-XU3" + +#define CONFIG_BOARD_COMMON + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CONFIG_SYS_TEXT_BASE 0x43E00000 + +/* select serial console configuration */ +#define CONFIG_SERIAL2 /* use SERIAL 2 */ + +#define TZPC_BASE_OFFSET 0x10000 + +#define CONFIG_CMD_MMC + +/* + * FIXME: The number of bank is actually 8. But there is no way to reserve the + * last 16 Mib in the last bank now. So I just excluded the last bank + * temporally. + */ +#define CONFIG_NR_DRAM_BANKS 7 +#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ + +#define CONFIG_ENV_IS_IN_MMC + +#undef CONFIG_ENV_SIZE +#undef CONFIG_ENV_OFFSET +#define CONFIG_ENV_SIZE 4096 +#define CONFIG_ENV_OFFSET (SZ_1K * 1280) /* 1.25 MiB offset */ + +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) + +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" + +/* USB */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_EXYNOS + +/* FIXME: MUST BE REMOVED AFTER TMU IS TURNED ON */ +#undef CONFIG_EXYNOS_TMU +#undef CONFIG_TMU_CMD_DTT + +#endif /* __CONFIG_H */ diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h index 9512b1e..255c933 100644 --- a/include/configs/ot1200.h +++ b/include/configs/ot1200.h @@ -85,6 +85,7 @@ /* USB Configs */ #define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MX6 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) @@ -197,6 +198,8 @@ #define CONFIG_CMD_EXT4 #define CONFIG_DOS_PARTITION #define CONFIG_CMD_FS_GENERIC +#define CONFIG_LIB_UUID +#define CONFIG_CMD_FS_UUID #define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_BOOTFILE diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index 8a82402..a1c980d 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -14,14 +14,20 @@ #define CONFIG_ENV_SPI_BASE 0x12D30000 #define FLASH_SIZE (0x4 << 20) #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) +#define CONFIG_SPI_BOOTING #include <configs/exynos5420-common.h> #include <configs/exynos5-dt-common.h> #define CONFIG_BOARD_COMMON +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_TEXT_BASE 0x23E00000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) + /* select serial console configuration */ #define CONFIG_SERIAL3 /* use SERIAL 3 */ +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" #define CONFIG_SYS_PROMPT "Peach-Pi # " #define CONFIG_IDENT_STRING " for Peach-Pi" diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h index ad5db57..6516a72 100644 --- a/include/configs/peach-pit.h +++ b/include/configs/peach-pit.h @@ -14,14 +14,20 @@ #define CONFIG_ENV_SPI_BASE 0x12D30000 #define FLASH_SIZE (0x4 << 20) #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) +#define CONFIG_SPI_BOOTING #include <configs/exynos5420-common.h> #include <configs/exynos5-dt-common.h> #define CONFIG_BOARD_COMMON +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_TEXT_BASE 0x23E00000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) + /* select serial console configuration */ #define CONFIG_SERIAL3 /* use SERIAL 3 */ +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" #define CONFIG_SYS_PROMPT "Peach-Pit # " #define CONFIG_IDENT_STRING " for Peach-Pit" diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 5c9a3c0..61f582f 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -9,20 +9,35 @@ #ifndef __CONFIG_SMDK5420_H #define __CONFIG_SMDK5420_H +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_SPI_FLASH +#define CONFIG_ENV_SPI_BASE 0x12D30000 +#define FLASH_SIZE (0x4 << 20) +#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) +#define CONFIG_SPI_BOOTING + #include <configs/exynos5420-common.h> #define CONFIG_BOARD_COMMON #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_TEXT_BASE 0x23E00000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) /* select serial console configuration */ #define CONFIG_SERIAL3 /* use SERIAL 3 */ +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" #define CONFIG_SYS_PROMPT "SMDK5420 # " #define CONFIG_IDENT_STRING " for SMDK5420" #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" +/* USB */ +#define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_EXYNOS + /* DRAM Memory Banks */ #define CONFIG_NR_DRAM_BANKS 7 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 6bb9473..6b1f967 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -139,7 +139,7 @@ #define CONFIG_DESIGNWARE_WATCHDOG #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #define CONFIG_DW_WDT_CLOCK_KHZ 25000 -#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 12000 +#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 30000 #endif /* diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 0685328..8f1e370 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -47,7 +47,9 @@ * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ -#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) +#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) + +#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ /* * NS16550 Configuration diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index a254f86..59f4f67 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -60,6 +60,16 @@ #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX +/* PCI host support */ +#define CONFIG_PCI +#define CONFIG_PCI_TEGRA +#define CONFIG_PCI_PNP +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PCI_ENUM + +/* PCI networking support */ +#define CONFIG_RTL8169 + /* General networking support */ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index dd022fb..5a53c50 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -187,6 +187,8 @@ #define CONFIG_FAT_WRITE #define CONFIG_DOS_PARTITION +#define CONFIG_CMD_DM + /* memtest works on */ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) @@ -273,7 +275,11 @@ #define CONFIG_SYS_SPL_MALLOC_START (0x0ff00000) #define CONFIG_SYS_SPL_MALLOC_SIZE (0x00004000) +#ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_INIT_SP_ADDR (0x0ff08000) +#else +#define CONFIG_SYS_INIT_SP_ADDR ((CONFIG_SYS_TEXT_BASE) - 0x00001000) +#endif #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SUPPORT diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index f3af971..027d78b 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -8,6 +8,9 @@ #ifndef __VEXPRESS_AEMV8A_H #define __VEXPRESS_AEMV8A_H +/* We use generic board for v8 Versatile Express */ +#define CONFIG_SYS_GENERIC_BOARD + #ifdef CONFIG_BASE_FVP #ifndef CONFIG_SEMIHOSTING #error CONFIG_BASE_FVP requires CONFIG_SEMIHOSTING @@ -25,8 +28,6 @@ /*#define CONFIG_ARMV8_SWITCH_TO_EL1*/ -/*#define CONFIG_SYS_GENERIC_BOARD*/ - #define CONFIG_SYS_NO_FLASH #define CONFIG_SUPPORT_RAW_INITRD diff --git a/include/dfu.h b/include/dfu.h index f1a71c7..c27856c 100644 --- a/include/dfu.h +++ b/include/dfu.h @@ -150,9 +150,6 @@ struct dfu_entity *dfu_get_entity(int alt); char *dfu_extract_token(char** e, int *n); void dfu_trigger_reset(void); int dfu_get_alt(char *name); -bool dfu_detach(void); -void dfu_trigger_detach(void); -void dfu_clear_detach(void); int dfu_init_env_entities(char *interface, char *devstr); unsigned char *dfu_get_buf(struct dfu_entity *dfu); unsigned char *dfu_free_buf(void); diff --git a/include/dt-bindings/clock/tegra20-car.h b/include/dt-bindings/clock/tegra20-car.h index 9406207..a1ae9a8 100644 --- a/include/dt-bindings/clock/tegra20-car.h +++ b/include/dt-bindings/clock/tegra20-car.h @@ -92,7 +92,7 @@ #define TEGRA20_CLK_OWR 71 #define TEGRA20_CLK_AFI 72 #define TEGRA20_CLK_CSITE 73 -/* 74 */ +#define TEGRA20_CLK_PCIE_XCLK 74 #define TEGRA20_CLK_AVPUCQ 75 #define TEGRA20_CLK_LA 76 /* 77 */ diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h index 889e49b..2244582 100644 --- a/include/dt-bindings/clock/tegra30-car.h +++ b/include/dt-bindings/clock/tegra30-car.h @@ -92,7 +92,7 @@ #define TEGRA30_CLK_OWR 71 #define TEGRA30_CLK_AFI 72 #define TEGRA30_CLK_CSITE 73 -/* 74 */ +#define TEGRA30_CLK_PCIEX 74 #define TEGRA30_CLK_AVPUCQ 75 #define TEGRA30_CLK_LA 76 /* 77 */ diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h b/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h new file mode 100644 index 0000000..914d56d --- /dev/null +++ b/include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h @@ -0,0 +1,7 @@ +#ifndef _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H +#define _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H 1 + +#define TEGRA_XUSB_PADCTL_PCIE 0 +#define TEGRA_XUSB_PADCTL_SATA 1 + +#endif /* _DT_BINDINGS_PINCTRL_TEGRA_XUSB_H */ diff --git a/include/fdtdec.h b/include/fdtdec.h index d2b665c..5effa24 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -86,6 +86,11 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA20_SFLASH, /* Tegra 2 SPI flash controller */ COMPAT_NVIDIA_TEGRA20_SLINK, /* Tegra 2 SPI SLINK controller */ COMPAT_NVIDIA_TEGRA114_SPI, /* Tegra 114 SPI controller */ + COMPAT_NVIDIA_TEGRA124_PCIE, /* Tegra 124 PCIe controller */ + COMPAT_NVIDIA_TEGRA30_PCIE, /* Tegra 30 PCIe controller */ + COMPAT_NVIDIA_TEGRA20_PCIE, /* Tegra 20 PCIe controller */ + COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL, + /* Tegra124 XUSB pad controller */ COMPAT_SMSC_LAN9215, /* SMSC 10/100 Ethernet LAN9215 */ COMPAT_SAMSUNG_EXYNOS5_SROMC, /* Exynos5 SROMC */ COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller */ @@ -123,6 +128,7 @@ enum fdt_compat_id { COMPAT_INTEL_PANTHERPOINT_AHCI, /* Intel Pantherpoint AHCI */ COMPAT_INTEL_MODEL_206AX, /* Intel Model 206AX CPU */ COMPAT_INTEL_GMA, /* Intel Graphics Media Accelerator */ + COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */ COMPAT_COUNT, }; diff --git a/include/g_dnl.h b/include/g_dnl.h index 1b1b35e..4eeb5e4 100644 --- a/include/g_dnl.h +++ b/include/g_dnl.h @@ -39,4 +39,8 @@ int g_dnl_register(const char *s); void g_dnl_unregister(void); void g_dnl_set_serialnumber(char *); +bool g_dnl_detach(void); +void g_dnl_trigger_detach(void); +void g_dnl_clear_detach(void); + #endif /* __G_DOWNLOAD_H_ */ diff --git a/include/parade.h b/include/parade.h new file mode 100644 index 0000000..887f56d --- /dev/null +++ b/include/parade.h @@ -0,0 +1,18 @@ +/* + * (C) Copyright 2012 Samsung Electronics + * Donghwa Lee <dh09.lee@samsung.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __PARADE_H__ +#define __PARADE_H__ + +/* Initialize the Parade dP<->LVDS bridge if present */ +#ifdef CONFIG_VIDEO_PARADE +int parade_init(const void *blob); +#else +static inline int parade_init(const void *blob) { return -1; } +#endif + +#endif /* __PARADE_H__ */ diff --git a/include/part.h b/include/part.h index a496a4a..8ea9b30 100644 --- a/include/part.h +++ b/include/part.h @@ -244,6 +244,26 @@ int gpt_fill_header(block_dev_desc_t *dev_desc, gpt_header *gpt_h, */ int gpt_restore(block_dev_desc_t *dev_desc, char *str_disk_guid, disk_partition_t *partitions, const int parts_count); + +/** + * is_valid_gpt_buf() - Ensure that the Primary GPT information is valid + * + * @param dev_desc - block device descriptor + * @param buf - buffer which contains the MBR and Primary GPT info + * + * @return - '0' on success, otherwise error + */ +int is_valid_gpt_buf(block_dev_desc_t *dev_desc, void *buf); + +/** + * write_mbr_and_gpt_partitions() - write MBR, Primary GPT and Backup GPT + * + * @param dev_desc - block device descriptor + * @param buf - buffer which contains the MBR and Primary GPT info + * + * @return - '0' on success, otherwise error + */ +int write_mbr_and_gpt_partitions(block_dev_desc_t *dev_desc, void *buf); #endif #endif /* _PART_H */ diff --git a/include/power/as3722.h b/include/power/as3722.h new file mode 100644 index 0000000..aa966d2 --- /dev/null +++ b/include/power/as3722.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2014 NVIDIA Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __POWER_AS3722_H__ +#define __POWER_AS3722_H__ + +#include <asm/types.h> + +#define AS3722_GPIO_OUTPUT_VDDH (1 << 0) +#define AS3722_GPIO_INVERT (1 << 1) + +struct udevice; + +int as3722_init(struct udevice **devp); +int as3722_sd_enable(struct udevice *pmic, unsigned int sd); +int as3722_sd_set_voltage(struct udevice *pmic, unsigned int sd, u8 value); +int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo); +int as3722_ldo_set_voltage(struct udevice *pmic, unsigned int ldo, u8 value); +int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio, + unsigned long flags); +int as3722_gpio_direction_output(struct udevice *pmic, unsigned int gpio, + unsigned int level); + +#endif /* __POWER_AS3722_H__ */ diff --git a/include/usb_ether.h b/include/usb_ether.h index 35700a2..b38d037 100644 --- a/include/usb_ether.h +++ b/include/usb_ether.h @@ -49,6 +49,12 @@ int asix_eth_probe(struct usb_device *dev, unsigned int ifnum, int asix_eth_get_info(struct usb_device *dev, struct ueth_data *ss, struct eth_device *eth); +void ax88179_eth_before_probe(void); +int ax88179_eth_probe(struct usb_device *dev, unsigned int ifnum, + struct ueth_data *ss); +int ax88179_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + struct eth_device *eth); + void mcs7830_eth_before_probe(void); int mcs7830_eth_probe(struct usb_device *dev, unsigned int ifnum, struct ueth_data *ss); |