diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/bios_emul.h | 19 | ||||
| -rw-r--r-- | include/common.h | 3 | ||||
| -rw-r--r-- | include/configs/T4240RDB.h | 10 | ||||
| -rw-r--r-- | include/configs/imx6_spl.h | 1 | ||||
| -rw-r--r-- | include/configs/mx6_common.h | 2 | ||||
| -rw-r--r-- | include/configs/mx6ul_14x14_evk.h | 3 | ||||
| -rw-r--r-- | include/configs/mx7_common.h | 2 | ||||
| -rw-r--r-- | include/configs/mx7dsabresd.h | 25 | ||||
| -rw-r--r-- | include/configs/omap3_igep00x0.h | 2 | ||||
| -rw-r--r-- | include/configs/omap3_logic.h | 3 | ||||
| -rw-r--r-- | include/configs/qemu-x86.h | 1 | ||||
| -rw-r--r-- | include/dm/uclass-id.h | 3 | ||||
| -rw-r--r-- | include/fdtdec.h | 1 | ||||
| -rw-r--r-- | include/linux/bug.h | 55 | ||||
| -rw-r--r-- | include/part.h | 2 | ||||
| -rw-r--r-- | include/pch.h | 78 | ||||
| -rw-r--r-- | include/pci.h | 17 | ||||
| -rw-r--r-- | include/syscon.h | 14 | ||||
| -rw-r--r-- | include/wait_bit.h | 71 |
19 files changed, 299 insertions, 13 deletions
diff --git a/include/bios_emul.h b/include/bios_emul.h index 80979ed..7571263 100644 --- a/include/bios_emul.h +++ b/include/bios_emul.h @@ -31,7 +31,11 @@ typedef struct { int bus; u32 VendorID; u32 DeviceID; +#ifdef CONFIG_DM_PCI + struct udevice *pcidev; +#else pci_dev_t pcidev; +#endif void *BIOSImage; u32 BIOSImageLen; u8 LowMem[1536]; @@ -39,7 +43,12 @@ typedef struct { struct vbe_mode_info; -int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int cleanUp); +#ifdef CONFIG_DM_PCI +int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo, + int clean_up); +#else +int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up); +#endif /* Run a BIOS ROM natively (only supported on x86 machines) */ void bios_run_on_x86(struct udevice *dev, unsigned long addr, int vesa_mode, @@ -57,10 +66,18 @@ void bios_set_interrupt_handler(int intnum, int (*int_handler_func)(void)); void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void)); +#ifdef CONFIG_DM_PCI +int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **pVGAInfo); + +int biosemu_run(struct udevice *dev, uchar *bios_rom, int bios_len, + BE_VGAInfo *vga_info, int clean_up, int vesa_mode, + struct vbe_mode_info *mode_info); +#else int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo); int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len, BE_VGAInfo *vga_info, int clean_up, int vesa_mode, struct vbe_mode_info *mode_info); +#endif #endif diff --git a/include/common.h b/include/common.h index 7bed0cc..1563d64 100644 --- a/include/common.h +++ b/include/common.h @@ -146,9 +146,6 @@ void __assert_fail(const char *assertion, const char *file, unsigned line, #define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0) #endif /* BUG */ -/* Force a compilation error if condition is true */ -#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) - typedef void (interrupt_handler_t)(void *); #include <asm/u-boot.h> /* boot information for Linux kernel */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 73279c8..4a17f41 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -606,6 +606,16 @@ unsigned long get_board_ddr_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 +#define CONFIG_VID_FLS_ENV "t4240rdb_vdd_mv" +#ifndef CONFIG_SPL_BUILD +#define CONFIG_VID +#endif +#define CONFIG_VOL_MONITOR_IR36021_SET +#define CONFIG_VOL_MONITOR_IR36021_READ +/* The lowest and highest voltage allowed for T4240RDB */ +#define VDD_MV_MIN 819 +#define VDD_MV_MAX 1212 + /* * eSPI - Enhanced SPI */ diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 43ce7fe..68d3fd7 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -34,6 +34,7 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_I2C_SUPPORT #define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL_WATCHDOG_SUPPORT /* NAND support */ #if defined(CONFIG_SPL_NAND_SUPPORT) diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 174ea08..179b4f9 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -25,6 +25,8 @@ #define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_BOOTM_LEN 0x1000000 + #include <linux/sizes.h> #include <asm/arch/imx-regs.h> #include <asm/imx-common/gpio.h> diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index c946176..4374c3a 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -156,7 +156,7 @@ /* Miscellaneous configurable options */ #define CONFIG_CMD_MEMTEST #define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 @@ -203,6 +203,7 @@ #define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 40000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SPI_FLASH_STMICRO #define FSL_QSPI_FLASH_NUM 1 #define FSL_QSPI_FLASH_SIZE SZ_32M #endif diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index d507fb4..fac7c3f 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -23,6 +23,8 @@ #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ #define CONFIG_SYS_FSL_CLK +#define CONFIG_SYS_BOOTM_LEN 0x1000000 + /* Enable iomux-lpsr support */ #define CONFIG_IOMUX_LPSR #define CONFIG_IMX_FIXED_IVT_OFFSET diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 22e515c..d23e4f3 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -179,8 +179,33 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_SIZE SZ_8K #define CONFIG_ENV_IS_IN_MMC + +/* + * If want to use nand, define CONFIG_NAND_MXS and rework board + * to support nand, since emmc has pin conflicts with nand + */ +#ifdef CONFIG_NAND_MXS +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_TRIMFFS + +/* NAND stuff */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* DMA stuff, needed for GPMI/MXS NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 +#endif + #define CONFIG_ENV_OFFSET (8 * SZ_64K) +#ifdef CONFIG_NAND_MXS +#define CONFIG_SYS_FSL_USDHC_NUM 1 +#else #define CONFIG_SYS_FSL_USDHC_NUM 2 +#endif #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 5da6cfd..5e33845 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -19,8 +19,6 @@ #include <configs/ti_omap3_common.h> #include <asm/mach-types.h> -#undef CONFIG_BOOTDELAY - /* * Display CPU and Board information */ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 7b60f29..e9ce3f6 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -50,6 +50,9 @@ * Hardware drivers */ +/* GPIO banks */ +#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ + /* * select serial console configuration */ diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 4258dcb..b0d2ffe 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -14,7 +14,6 @@ #include <configs/x86-common.h> #define CONFIG_SYS_MONITOR_LEN (1 << 20) -#define CONFIG_ARCH_MISC_INIT #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_PCI_PNP diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 8391e38..73cd3ac 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -29,6 +29,7 @@ enum uclass_id { UCLASS_CLK, /* Clock source, e.g. used by peripherals */ UCLASS_CPU, /* CPU, typically part of an SoC */ UCLASS_CROS_EC, /* Chrome OS EC */ + UCLASS_DISK, /* Disk controller, e.g. SATA */ UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */ UCLASS_RAM, /* RAM controller */ UCLASS_ETH, /* Ethernet device */ @@ -37,6 +38,7 @@ enum uclass_id { UCLASS_I2C_EEPROM, /* I2C EEPROM device */ UCLASS_I2C_GENERIC, /* Generic I2C device */ UCLASS_I2C_MUX, /* I2C multiplexer */ + UCLASS_IRQ, /* Interrupt controller */ UCLASS_KEYBOARD, /* Keyboard input device */ UCLASS_LED, /* Light-emitting diode (LED) */ UCLASS_LPC, /* x86 'low pin count' interface */ @@ -45,6 +47,7 @@ enum uclass_id { UCLASS_MMC, /* SD / MMC card or chip */ UCLASS_MOD_EXP, /* RSA Mod Exp device */ UCLASS_MTD, /* Memory Technology Device (MTD) device */ + UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */ UCLASS_PANEL, /* Display panel, such as an LCD */ UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */ UCLASS_PCH, /* x86 platform controller hub */ diff --git a/include/fdtdec.h b/include/fdtdec.h index 25e98c9..dd82916 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -163,7 +163,6 @@ enum fdt_compat_id { COMPAT_INTEL_X86_PINCTRL, /* Intel ICH7/9 pin control */ COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */ COMPAT_INTEL_PCH, /* Intel PCH */ - COMPAT_INTEL_IRQ_ROUTER, /* Intel Interrupt Router */ COMPAT_ALTERA_SOCFPGA_DWMAC, /* SoCFPGA Ethernet controller */ COMPAT_ALTERA_SOCFPGA_DWMMC, /* SoCFPGA DWMMC controller */ COMPAT_ALTERA_SOCFPGA_DWC2USB, /* SoCFPGA DWC2 USB controller */ diff --git a/include/linux/bug.h b/include/linux/bug.h new file mode 100644 index 0000000..920e379 --- /dev/null +++ b/include/linux/bug.h @@ -0,0 +1,55 @@ +#ifndef _LINUX_BUG_H +#define _LINUX_BUG_H + +#include <linux/compiler.h> + +#ifdef __CHECKER__ +#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0) +#define BUILD_BUG_ON_ZERO(e) (0) +#define BUILD_BUG_ON_NULL(e) ((void*)0) +#define BUILD_BUG_ON_INVALID(e) (0) +#define BUILD_BUG_ON(condition) (0) +#define BUILD_BUG() (0) +#else /* __CHECKER__ */ + +/* Force a compilation error if a constant expression is not a power of 2 */ +#define BUILD_BUG_ON_NOT_POWER_OF_2(n) \ + BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0)) + +/* Force a compilation error if condition is true, but also produce a + result (of value 0 and type size_t), so the expression can be used + e.g. in a structure initializer (or where-ever else comma expressions + aren't permitted). */ +#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); })) +#define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:-!!(e); })) + +/* + * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the + * expression but avoids the generation of any code, even if that expression + * has side-effects. + */ +#define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e)))) + +/** + * BUILD_BUG_ON - break compile if a condition is true. + * @condition: the condition which the compiler should know is false. + * + * If you have some code which relies on certain constants being equal, or + * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to + * detect if someone changes it. + * + * The implementation uses gcc's reluctance to create a negative array, but gcc + * (as of 4.4) only emits that error for obvious cases (e.g. not arguments to + * inline functions). Luckily, in 4.3 they added the "error" function + * attribute just for this type of case. Thus, we use a negative sized array + * (should always create an error on gcc versions older than 4.4) and then call + * an undefined function with the error attribute (should always create an + * error on gcc 4.3 and later). If for some reason, neither creates a + * compile-time error, we'll still have a link-time error, which is harder to + * track down. + */ +#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) + +#endif /* __CHECKER__ */ + +#endif /* _LINUX_BUG_H */ diff --git a/include/part.h b/include/part.h index 4d00e22..dc23949 100644 --- a/include/part.h +++ b/include/part.h @@ -10,8 +10,6 @@ #include <ide.h> #include <common.h> -typedef struct block_dev_desc block_dev_desc_t; - struct block_dev_desc { int if_type; /* type of the interface */ int dev; /* device number */ diff --git a/include/pch.h b/include/pch.h new file mode 100644 index 0000000..79f49bd --- /dev/null +++ b/include/pch.h @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2015 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __pch_h +#define __pch_h + +enum pch_version { + PCHV_UNKNOWN, + PCHV_7, + PCHV_9, +}; + +#define PCH_RCBA 0xf0 + +#define BIOS_CTRL_BIOSWE BIT(0) + +/* Operations for the Platform Controller Hub */ +struct pch_ops { + /** + * get_sbase() - get the address of SPI base + * + * @dev: PCH device to check + * @sbasep: Returns address of SPI base if available, else 0 + * @return 0 if OK, -ve on error (e.g. there is no SPI base) + */ + int (*get_sbase)(struct udevice *dev, ulong *sbasep); + + /** + * get_version() - get the PCH version + * + * @return version, or -ENOSYS if unknown + */ + enum pch_version (*get_version)(struct udevice *dev); + + /** + * set_spi_protect() - set whether SPI flash is protected or not + * + * @dev: PCH device to adjust + * @protect: true to protect, false to unprotect + * + * @return 0 on success, -ENOSYS if not implemented + */ + int (*set_spi_protect)(struct udevice *dev, bool protect); +}; + +#define pch_get_ops(dev) ((struct pch_ops *)(dev)->driver->ops) + +/** + * pch_get_sbase() - get the address of SPI base + * + * @dev: PCH device to check + * @sbasep: Returns address of SPI base if available, else 0 + * @return 0 if OK, -ve on error (e.g. there is no SPI base) + */ +int pch_get_sbase(struct udevice *dev, ulong *sbasep); + +/** + * pch_get_version() - get the PCH version + * + * @return version, or -ENOSYS if unknown + */ +enum pch_version pch_get_version(struct udevice *dev); + +/** + * set_spi_protect() - set whether SPI flash is protected or not + * + * @dev: PCH device to adjust + * @protect: true to protect, false to unprotect + * + * @return 0 on success, -ENOSYS if not implemented + */ +int pch_set_spi_protect(struct udevice *dev, bool protect); + +#endif diff --git a/include/pci.h b/include/pci.h index cb2562f..d0d152c 100644 --- a/include/pci.h +++ b/include/pci.h @@ -757,7 +757,9 @@ extern void pci_mpc85xx_init (struct pci_controller *hose); /** * pci_write_bar32() - Write the address of a BAR including control bits * - * This writes a raw address (with control bits) to a bar + * This writes a raw address (with control bits) to a bar. This can be used + * with devices which require hard-coded addresses, not part of the normal + * PCI enumeration process. * * @hose: PCI hose to use * @dev: PCI device to update @@ -765,7 +767,7 @@ extern void pci_mpc85xx_init (struct pci_controller *hose); * @addr: BAR address with control bits */ void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum, - u32 addr_and_ctrl); + u32 addr); /** * pci_read_bar32() - read the address of a bar @@ -1167,6 +1169,17 @@ int pci_get_regions(struct udevice *dev, struct pci_region **iop, struct pci_region **memp, struct pci_region **prefp); /** + * dm_pci_write_bar32() - Write the address of a BAR + * + * This writes a raw address to a bar + * + * @dev: PCI device to update + * @barnum: BAR number (0-5) + * @addr: BAR address + */ +void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr); + +/** * dm_pci_read_bar32() - read a base address register from a device * * @dev: Device to check diff --git a/include/syscon.h b/include/syscon.h index c62ccd6..4593b6e 100644 --- a/include/syscon.h +++ b/include/syscon.h @@ -37,6 +37,20 @@ struct regmap *syscon_get_regmap(struct udevice *dev); * * Each system controller can be accessed by its driver data, which is * assumed to be unique through the scope of all system controllers that + * are in use. This function looks up the controller given this driver data. + * + * @driver_data: Driver data value to look up + * @devp: Returns the controller correponding to @driver_data + * @return 0 on success, -ENODEV if the ID was not found, or other -ve error + * code + */ +int syscon_get_by_driver_data(ulong driver_data, struct udevice **devp); + +/** + * syscon_get_regmap_by_driver_data() - Look up a controller by its ID + * + * Each system controller can be accessed by its driver data, which is + * assumed to be unique through the scope of all system controllers that * are in use. This function looks up the regmap given this driver data. * * @driver_data: Driver data value to look up diff --git a/include/wait_bit.h b/include/wait_bit.h new file mode 100644 index 0000000..061a2db --- /dev/null +++ b/include/wait_bit.h @@ -0,0 +1,71 @@ +/* + * Wait for bit with timeout and ctrlc + * + * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __WAIT_BIT_H +#define __WAIT_BIT_H + +#include <common.h> +#include <console.h> +#include <asm/errno.h> +#include <asm/io.h> + +/** + * wait_for_bit() waits for bit set/cleared in register + * + * Function polls register waiting for specific bit(s) change + * (either 0->1 or 1->0). It can fail under two conditions: + * - Timeout + * - User interaction (CTRL-C) + * Function succeeds only if all bits of masked register are set/cleared + * (depending on set option). + * + * @param prefix Prefix added to timeout messagge (message visible only + * with debug enabled) + * @param reg Register that will be read (using readl()) + * @param mask Bit(s) of register that must be active + * @param set Selects wait condition (bit set or clear) + * @param timeout_ms Timeout (in miliseconds) + * @param breakable Enables CTRL-C interruption + * @return 0 on success, -ETIMEDOUT or -EINTR on failure + */ +static inline int wait_for_bit(const char *prefix, const u32 *reg, + const u32 mask, const bool set, + const unsigned int timeout_ms, + const bool breakable) +{ + u32 val; + unsigned long start = get_timer(0); + + while (1) { + val = readl(reg); + + if (!set) + val = ~val; + + if ((val & mask) == mask) + return 0; + + if (get_timer(start) > timeout_ms) + break; + + if (breakable && ctrlc()) { + puts("Abort\n"); + return -EINTR; + } + + udelay(1); + } + + debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n", prefix, reg, mask, + set); + + return -ETIMEDOUT; +} + + +#endif |