diff options
Diffstat (limited to 'include')
378 files changed, 2963 insertions, 3054 deletions
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 746bf18..cdc5ff1 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -70,6 +70,7 @@ #define CONFIG_CMD_PORTIO /* Port I/O */ #define CONFIG_CMD_REGINFO /* Register dump */ #define CONFIG_CMD_REISER /* Reiserfs support */ +#define CONFIG_CMD_RARP /* rarpboot support */ #define CONFIG_CMD_RUN /* run command in env variable */ #define CONFIG_CMD_SAVEENV /* saveenv */ #define CONFIG_CMD_SAVES /* save S record dump */ diff --git a/include/configs/A3000.h b/include/configs/A3000.h index 6d8870c..26d4d8a 100644 --- a/include/configs/A3000.h +++ b/include/configs/A3000.h @@ -45,6 +45,7 @@ #define CONFIG_MPC8245 1 #define CONFIG_A3000 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 @@ -135,7 +136,7 @@ #define CONFIG_SYS_EUMB_ADDR 0xFC000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -170,7 +171,7 @@ * Definitions for initial stack pointer and data area */ -/* #define CONFIG_SYS_MONITOR_BASE TEXT_BASE */ +/* #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE */ /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 @@ -310,12 +311,4 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ADCIOP.h b/include/configs/ADCIOP.h index d8303f3..5610914 100644 --- a/include/configs/ADCIOP.h +++ b/include/configs/ADCIOP.h @@ -36,6 +36,8 @@ #define CONFIG_IOP480 1 /* This is a IOP480 CPU */ #define CONFIG_ADCIOP 1 /* ...on a ADCIOP board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ @@ -200,13 +202,4 @@ #define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */ #define FLASH_BASE1_PRELIM 0xFFE00000 /* FLASH bank #1 */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ADS860.h b/include/configs/ADS860.h index 688e77a..82ea172 100644 --- a/include/configs/ADS860.h +++ b/include/configs/ADS860.h @@ -20,6 +20,8 @@ /* Processor type */ #define CONFIG_MPC860 1 +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE diff --git a/include/configs/AMX860.h b/include/configs/AMX860.h index 6e2907e..aa35cbc 100644 --- a/include/configs/AMX860.h +++ b/include/configs/AMX860.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 #define CONFIG_AMX860 1 +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #undef CONFIG_8xx_CONS_SMC1 /* Console is on SCC2 */ #undef CONFIG_8xx_CONS_SMC2 #define CONFIG_8xx_CONS_SCC2 1 @@ -297,12 +299,4 @@ #define CONFIG_SYS_OR6_PRELIM 0xFFFF8000 /* 32kB, 15 waits, cs after addr, no bursts */ #define CONFIG_SYS_BR6_PRELIM 0x60000401 /* use GPCM for CS generation, 8 bit port */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/AP1000.h b/include/configs/AP1000.h index e707075..f1ae16c 100644 --- a/include/configs/AP1000.h +++ b/include/configs/AP1000.h @@ -27,6 +27,13 @@ #define CONFIG_AP1000 1 /* ...on an AP1000 board */ +/* + * Start at bottom of RAM, but at an aliased address so that it looks + * like it's not in RAM. This is a bit of voodoo to allow it to be + * run from RAM instead of Flash. + */ +#define CONFIG_SYS_TEXT_BASE 0x08000000 + #define CONFIG_PCI 1 #define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */ @@ -141,7 +148,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0x20000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ @@ -213,14 +220,6 @@ */ #define SPD_EEPROM_ADDRESS 0x50 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/APC405.h b/include/configs/APC405.h index cb3f80b..b846afc 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -38,6 +38,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_APCG405 1 /* ...on a APC405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_BOARD_EARLY_INIT_R 1 #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -429,14 +431,6 @@ #endif /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * PCI OHCI controller */ #define CONFIG_USB_OHCI_NEW 1 diff --git a/include/configs/AR405.h b/include/configs/AR405.h index 568ce15..b4ff718 100644 --- a/include/configs/AR405.h +++ b/include/configs/AR405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_AR405 1 /* ...on a AR405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ @@ -182,8 +184,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ /* @@ -269,12 +271,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index 789f750..480051b 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_ASH405 1 /* ...on a ASH405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -351,14 +353,6 @@ #define CONFIG_SYS_DUART_RST (0x80000000 >> 14) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h index 58f0c1f..dda6baa 100644 --- a/include/configs/ATUM8548.h +++ b/include/configs/ATUM8548.h @@ -47,6 +47,10 @@ #define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_MPC8548 1 /* MPC8548 specific */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#endif + #define CONFIG_PCI 1 /* enable any pci type devices */ #define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -173,7 +177,7 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 8000 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_CFI 1 @@ -378,14 +382,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/Adder.h b/include/configs/Adder.h index e4d30a1..a1c530b 100644 --- a/include/configs/Adder.h +++ b/include/configs/Adder.h @@ -32,6 +32,8 @@ #define CONFIG_ADDER /* Analogue&Micro Adder board */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_BAUDRATE 38400 @@ -130,7 +132,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */ #ifdef CONFIG_BZIP2 #define CONFIG_SYS_MALLOC_LEN (2500 << 10) /* Reserve ~2.5 MB for malloc() */ @@ -207,14 +209,6 @@ */ #define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx chips */ -/*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/Alaska8220.h b/include/configs/Alaska8220.h index 576aa74..b5c9049 100644 --- a/include/configs/Alaska8220.h +++ b/include/configs/Alaska8220.h @@ -31,6 +31,9 @@ #define CONFIG_MPC8220 1 #define CONFIG_ALASKA8220 1 /* ... on Alaska board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* Input clock running at 30Mhz, read Hid1 for the CPU multiplier to @@ -38,9 +41,6 @@ #define CONFIG_SYS_MPC8220_CLKIN 30000000/* ... running at 30MHz */ #define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 16 /* VCO multiplier can't be read from any register */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* * Serial console configuration */ @@ -252,7 +252,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/BAB7xx.h b/include/configs/BAB7xx.h index 555145e..9250ef3 100644 --- a/include/configs/BAB7xx.h +++ b/include/configs/BAB7xx.h @@ -35,6 +35,8 @@ * (easy to change) */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* these hardware addresses are pretty bogus, please change them to suit your needs */ @@ -466,15 +468,6 @@ extern unsigned long bab7xx_get_gclk_freq (void); #define CONFIG_SYS_L2_BAB7xx -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define CONFIG_NET_MULTI /* Multi ethernet cards support */ #define CONFIG_TULIP #define CONFIG_TULIP_SELECT_MEDIA diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h index 44befe9..d051704 100644 --- a/include/configs/BC3450.h +++ b/include/configs/BC3450.h @@ -56,10 +56,17 @@ #define CONFIG_BC3450_FP 1 /* + enable FP O/P */ #undef CONFIG_BC3450_CRT /* + enable CRT O/P (Debug only!) */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low (standard configuration with room for + * max 64 MByte Flash ROM) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -207,7 +214,7 @@ #define CONFIG_TIMESTAMP /* display image timestamps */ -#if (TEXT_BASE == 0xFC000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -324,7 +331,7 @@ /* * Flash configuration */ -#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */ /* use CFI flash driver if no module variant is spezified */ #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ @@ -386,7 +393,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/BMW.h b/include/configs/BMW.h index 98f6396..7d928eb 100644 --- a/include/configs/BMW.h +++ b/include/configs/BMW.h @@ -45,6 +45,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_BMW 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ #define CONFIG_BCM570x 1 /* Use Broadcom BCM570x Ethernet Driver */ @@ -124,7 +126,7 @@ #define CONFIG_SYS_EUMB_ADDR 0xFC000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (2048 << 10) /* Reserve 2MB for malloc() */ @@ -300,13 +302,4 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/CANBT.h b/include/configs/CANBT.h index ad075b8..9c55805 100644 --- a/include/configs/CANBT.h +++ b/include/configs/CANBT.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CANBT 1 /* ...on a CANBT board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */ @@ -127,8 +129,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ /* @@ -226,13 +228,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 764f71b..ad36a14 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -75,6 +75,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PPCHAMELEONEVB 1 /* ...on a PPChameleonEVB board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 /* Reserve 320 kB for Monitor */ + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -540,15 +542,6 @@ #define CONFIG_SYS_GPIO0_TSRH 0x00000000 #define CONFIG_SYS_GPIO0_TCR 0xF7FF8014 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define CONFIG_NO_SERIAL_EEPROM /*--------------------------------------------------------------------*/ diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 9c57acb..3e973f2 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_VOM405 1 /* ...on a VOM405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC8000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -207,8 +209,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (256 * 1024) #if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) @@ -318,14 +320,6 @@ #define CONFIG_SYS_PLD_RESET (0x80000000 >> 12) /* GPIO12 */ /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/CPC45.h b/include/configs/CPC45.h index 6451263..486a4e0 100644 --- a/include/configs/CPC45.h +++ b/include/configs/CPC45.h @@ -45,6 +45,7 @@ #define CONFIG_MPC8245 1 #define CONFIG_CPC45 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 @@ -126,7 +127,7 @@ #define CONFIG_SYS_EUMB_ADDR 0xFCE00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -338,16 +339,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - - /*----------------------------------------------------------------------*/ /* CPC45 Memory Map */ /*----------------------------------------------------------------------*/ diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h index c6882fd..e4d8f9c 100644 --- a/include/configs/CPCI2DP.h +++ b/include/configs/CPCI2DP.h @@ -36,6 +36,8 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 33330000 /* external frequency to pll */ @@ -270,12 +272,4 @@ #define CONFIG_SYS_PB_LED (0x80000000 >> 16) /* GPIO16 */ #define CONFIG_SYS_INTA_FAKE (0x80000000 >> 23) /* GPIO23 */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index da57b04..6b2986d 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CPCI405 1 /* ...on a CPCI405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -204,9 +206,9 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ /* @@ -338,13 +340,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index d682d37..908b872 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -39,6 +39,8 @@ #define CONFIG_CPCI405_VER2 1 /* ...version 2 */ #undef CONFIG_CPCI405_6U /* enable this for 6U boards */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -399,13 +401,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 1c521f2..a2b8d72 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -39,6 +39,8 @@ #define CONFIG_CPCI405_VER2 1 /* ...version 2 */ #define CONFIG_CPCI405AB 1 /* ...and special AB version */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -391,13 +393,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index c7b7931..7fea5e3 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -38,6 +38,8 @@ #define CONFIG_CPCI405 1 /* ...on a CPCI405 board */ #define CONFIG_CPCI405_VER2 1 /* ...version 2 */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -394,12 +396,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPCI750.h b/include/configs/CPCI750.h index f2d51f7..37341cb 100644 --- a/include/configs/CPCI750.h +++ b/include/configs/CPCI750.h @@ -57,6 +57,8 @@ #define CONFIG_CPCI750 1 /* this is an CPCI750 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BAUDRATE 9600 /* console baudrate = 9600 */ #define CONFIG_MV64360_ECC /* enable ECC support */ @@ -616,14 +618,6 @@ #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOARD_ASM_INIT 1 #define CPCI750_SLAVE_TEST (((in8(0xf0300000) & 0x80) == 0) ? 0 : 1) diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h index f114290..5aff74c 100644 --- a/include/configs/CPCIISER4.h +++ b/include/configs/CPCIISER4.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CPCIISER4 1 /* ...on a CPCIISER4 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */ @@ -252,12 +254,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h index 6d76d9f..233d36b 100644 --- a/include/configs/CPU86.h +++ b/include/configs/CPU86.h @@ -37,6 +37,12 @@ #define CONFIG_CPU86 1 /* ...on a CPU86 board */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#ifdef CONFIG_BOOT_ROM +#define CONFIG_SYS_TEXT_BASE 0xFF800000 +#else +#define CONFIG_SYS_TEXT_BASE 0xFF000000 +#endif + /* * select serial console configuration * @@ -304,7 +310,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_MAX_SIZE 0x08000000 /* max. 128 MB */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -333,15 +339,6 @@ #define CONFIG_ENV_SIZE (2048 - 512) #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h index 83b010c..560e449 100644 --- a/include/configs/CPU87.h +++ b/include/configs/CPU87.h @@ -38,6 +38,12 @@ #define CONFIG_PCI #define CONFIG_CPM2 1 /* Has a CPM2 */ +#ifdef CONFIG_BOOT_ROM +#define CONFIG_SYS_TEXT_BASE 0xFF800000 +#else +#define CONFIG_SYS_TEXT_BASE 0xFF000000 +#endif + /* * select serial console configuration * @@ -319,7 +325,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_MAX_SIZE 0x08000000 /* max. 128 MB */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -354,15 +360,6 @@ #define CONFIG_ENV_SIZE (2048 - 512) #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h index f6cd760..6ababa1 100644 --- a/include/configs/CRAYL1.h +++ b/include/configs/CRAYL1.h @@ -36,6 +36,13 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC405 family */ + +/* + * Note: I make an "image" from U-Boot itself, which prefixes 0x40 + * bytes of header info, hence start address is thus shifted. + */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0040 + #define CONFIG_SYS_CLK_FREQ 25000000 #define CONFIG_BAUDRATE 9600 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ @@ -159,7 +166,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFC00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 192 kB for Monitor */ @@ -241,12 +248,4 @@ #define EEPROM_WRITE_ADDRESS 0xA0 #define EEPROM_READ_ADDRESS 0xA1 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CU824.h b/include/configs/CU824.h index 4a3f2bc..8e19aeb3 100644 --- a/include/configs/CU824.h +++ b/include/configs/CU824.h @@ -45,6 +45,7 @@ #define CONFIG_MPC8240 1 #define CONFIG_CU824 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 @@ -114,7 +115,7 @@ #define CONFIG_SYS_EUMB_ADDR 0xFCE00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -290,14 +291,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- diff --git a/include/configs/DASA_SIM.h b/include/configs/DASA_SIM.h index 21230e1..fc2727e 100644 --- a/include/configs/DASA_SIM.h +++ b/include/configs/DASA_SIM.h @@ -36,6 +36,8 @@ #define CONFIG_IOP480 1 /* This is a IOP480 CPU */ #define CONFIG_DASA_SIM 1 /* ...on a DASA_SIM board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ @@ -190,13 +192,4 @@ #define FLASH_BASE0_PRELIM 0xFFE00000 /* FLASH bank #0 */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/DB64360.h b/include/configs/DB64360.h index 910933a..26bb649 100644 --- a/include/configs/DB64360.h +++ b/include/configs/DB64360.h @@ -120,6 +120,8 @@ if we use PCI it has its own MAC addr */ #define CONFIG_DB64360 1 /* this is an DB64360 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BAUDRATE 115200 /* console baudrate = 115000 */ /*ronen - we don't use the global CONFIG_ECC, since in the global ecc we initialize the DRAM for ECC in the phase we are relocating to it, which isn't so sufficient. @@ -593,14 +595,6 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOARD_ASM_INIT 1 #endif /* __CONFIG_H */ diff --git a/include/configs/DB64460.h b/include/configs/DB64460.h index 765eaaf..74312cd 100644 --- a/include/configs/DB64460.h +++ b/include/configs/DB64460.h @@ -58,6 +58,8 @@ #define CONFIG_DB64460 1 /* this is an DB64460 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BAUDRATE 115200 /* console baudrate = 115000 */ /*ronen - we don't use the global CONFIG_ECC, since in the global ecc we initialize the DRAM for ECC in the phase we are relocating to it, which isn't so sufficient. @@ -531,14 +533,6 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOARD_ASM_INIT 1 #endif /* __CONFIG_H */ diff --git a/include/configs/DP405.h b/include/configs/DP405.h index 5311dfb..cb110e3 100644 --- a/include/configs/DP405.h +++ b/include/configs/DP405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_DP405 1 /* ...on a DP405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -157,8 +159,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (256 * 1024) #if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) @@ -257,14 +259,6 @@ #define CONFIG_SYS_GPIO0_TCR 0xB7FE0014 /* 0 ... 31 */ /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/DU405.h b/include/configs/DU405.h index 6ba9f13..d99b840 100644 --- a/include/configs/DU405.h +++ b/include/configs/DU405.h @@ -36,6 +36,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_DU405 1 /* ...on a DU405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -289,13 +291,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 9c34994..e6e2b30 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -37,6 +37,10 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333400 /* external freq to pll */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ #define CONFIG_LAST_STAGE_INIT 1 /* last_stage_init */ @@ -51,7 +55,7 @@ #define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000 #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND0_ADDR 0xd0000000 /* NAND Flash */ #define CONFIG_SYS_NAND1_ADDR 0xd0100000 /* NAND Flash */ #define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */ @@ -417,14 +421,6 @@ int du440_phy_addr(int devnum); #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND0_ADDR + CONFIG_SYS_NAND0_CS, \ CONFIG_SYS_NAND1_ADDR + CONFIG_SYS_NAND1_CS} -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/EB+MCF-EV123.h b/include/configs/EB+MCF-EV123.h index 880cb4e..af57fb9 100644 --- a/include/configs/EB+MCF-EV123.h +++ b/include/configs/EB+MCF-EV123.h @@ -173,10 +173,10 @@ /* If M5282 port is fully implemented the monitor base will be behind * the vector table. */ -#if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) -#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) +#if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else -#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ #endif #define CONFIG_SYS_MONITOR_LEN 0x20000 diff --git a/include/configs/ELPPC.h b/include/configs/ELPPC.h index 84d27b6..7e940b8 100644 --- a/include/configs/ELPPC.h +++ b/include/configs/ELPPC.h @@ -35,6 +35,8 @@ * (easy to change) */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* these hardware addresses are pretty bogus, please change them to suit your needs */ @@ -347,14 +349,6 @@ #endif #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_NET_MULTI /* Multi ethernet cards support */ #define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/ELPT860.h b/include/configs/ELPT860.h index 0f56302..f38160a 100644 --- a/include/configs/ELPT860.h +++ b/include/configs/ELPT860.h @@ -47,6 +47,8 @@ #define CONFIG_MPC860T 1 #define CONFIG_ELPT860 1 /* ...on a LEOX's ELPT860 CPU board */ +#define CONFIG_SYS_TEXT_BASE 0x02000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -386,17 +388,4 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/*----------------------------------------------------------------------- - * Internal Definitions - *----------------------------------------------------------------------- - * - */ - -/* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/EP88x.h b/include/configs/EP88x.h index e1c6096..ec1cc4eb 100644 --- a/include/configs/EP88x.h +++ b/include/configs/EP88x.h @@ -30,6 +30,8 @@ #define CONFIG_EP88X /* Embedded Planet EP88x board */ +#define CONFIG_SYS_TEXT_BASE 0xFC000000 + #define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ @@ -125,7 +127,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */ #ifdef CONFIG_BZIP2 #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve ~4 MB for malloc() */ @@ -205,12 +207,4 @@ */ #define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx chips */ -/*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ERIC.h b/include/configs/ERIC.h index da3b4ae..42465da 100644 --- a/include/configs/ERIC.h +++ b/include/configs/ERIC.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_ERIC 1 /* ...on a ERIC board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* run board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ @@ -361,14 +363,6 @@ */ #define SPD_EEPROM_ADDRESS 0x50 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/ESTEEM192E.h b/include/configs/ESTEEM192E.h index 11a862e..d5a3cd3 100644 --- a/include/configs/ESTEEM192E.h +++ b/include/configs/ESTEEM192E.h @@ -36,6 +36,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_ESTEEM192E 1 /* ...on a EST ESTEEM192E */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_FLASH_16BIT 1 /* Rom 16 bit data bus */ #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ @@ -310,22 +312,4 @@ #define CONFIG_SYS_MAMR_8COL 0x18803112 #define CONFIG_SYS_MAMR_9COL 0x18803112 /* same as 8 column because its just easier to port with*/ - -/* - * Internal Definitions - * - * Boot Flags - */ - -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ETX094.h b/include/configs/ETX094.h index c36f2bb1..e890a97 100644 --- a/include/configs/ETX094.h +++ b/include/configs/ETX094.h @@ -36,6 +36,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_ETX094 1 /* ...on a ETX_094 board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -355,13 +357,4 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_1X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/EVB64260.h b/include/configs/EVB64260.h index 0903536..d312811 100644 --- a/include/configs/EVB64260.h +++ b/include/configs/EVB64260.h @@ -42,6 +42,8 @@ #define CONFIG_EVB64260 1 /* this is an EVB64260 board */ #define CONFIG_SYS_GT_6426x GT_64260 /* with a 64260 system controller */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BAUDRATE 38400 /* console baudrate = 38400 */ #undef CONFIG_ECC /* enable ECC support */ @@ -419,14 +421,6 @@ #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOARD_ASM_INIT 1 diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h index 4d08243..1489d30 100644 --- a/include/configs/EXBITGEN.h +++ b/include/configs/EXBITGEN.h @@ -165,7 +165,7 @@ #define CONFIG_SYS_FLASH1_SIZE 0x02000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE #define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH0_SIZE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ @@ -205,14 +205,6 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/FADS823.h b/include/configs/FADS823.h index cb75960..9795834 100644 --- a/include/configs/FADS823.h +++ b/include/configs/FADS823.h @@ -38,6 +38,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_ETHADDR 08:00:22:50:70:63 /* Ethernet address */ #define CONFIG_ENV_OVERWRITE 1 /* Overwrite the environment */ @@ -341,13 +343,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_MAMR 0x13a01114 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ /* values according to the manual */ diff --git a/include/configs/FADS850SAR.h b/include/configs/FADS850SAR.h index 84187fb..9e2b1a4 100644 --- a/include/configs/FADS850SAR.h +++ b/include/configs/FADS850SAR.h @@ -34,6 +34,8 @@ #define CONFIG_MPC850SAR 1 #define CONFIG_FADS 1 +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -295,14 +297,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_MAMR 0x13a01114 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* values according to the manual */ diff --git a/include/configs/FADS860T.h b/include/configs/FADS860T.h index dcb0c39..ed7484b 100644 --- a/include/configs/FADS860T.h +++ b/include/configs/FADS860T.h @@ -20,6 +20,8 @@ /* processor type */ #define CONFIG_MPC860T 1 /* 860T */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE diff --git a/include/configs/FLAGADM.h b/include/configs/FLAGADM.h index 0f4277c..12144cd 100644 --- a/include/configs/FLAGADM.h +++ b/include/configs/FLAGADM.h @@ -37,6 +37,8 @@ #define CONFIG_FLAGADM 1 /* ...on a FLAGA DM */ #define CONFIG_8xx_GCLK_FREQ 48000000 /*48MHz*/ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #undef CONFIG_8xx_CONS_SMC1 /* Console is on SMC1 */ #define CONFIG_8xx_CONS_SMC2 1 #undef CONFIG_8xx_CONS_NONE @@ -312,12 +314,4 @@ #define CONFIG_SYS_OR4 ( OR_AM_MSK | OR_CSNT_SAM | OR_BI | OR_G5LS) #define CONFIG_SYS_BR4 ( (DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_UPMB | BR_V ) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/FPS850L.h b/include/configs/FPS850L.h index addca2f..1a3d2f8 100644 --- a/include/configs/FPS850L.h +++ b/include/configs/FPS850L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_FPS850L 1 /* ...on a FingerPrint Sensor */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -428,15 +430,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/FPS860L.h b/include/configs/FPS860L.h index ec9000d..20e618f 100644 --- a/include/configs/FPS860L.h +++ b/include/configs/FPS860L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_FPS860L 1 /* ...on a FingerPrint Sensor */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -428,15 +430,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET /* pass open firmware flat tree */ diff --git a/include/configs/G2000.h b/include/configs/G2000.h index e2e6cb2..00f27cc 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_G2000 1 /* ...on a PLU405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -381,14 +383,6 @@ #define CONFIG_SYS_GPIO0_TCR 0xF7FF8014 /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h index 12f879a..915aff3 100644 --- a/include/configs/GEN860T.h +++ b/include/configs/GEN860T.h @@ -35,6 +35,8 @@ #define CONFIG_MPC860 #define CONFIG_GEN860T +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* * Identify the board */ @@ -725,12 +727,6 @@ ) /* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * FEC interrupt assignment */ #define FEC_INTERRUPT SIU_LEVEL1 diff --git a/include/configs/GENIETV.h b/include/configs/GENIETV.h index fadd830..dc925af 100644 --- a/include/configs/GENIETV.h +++ b/include/configs/GENIETV.h @@ -38,6 +38,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x00000000 + #define CONFIG_ETHADDR 08:00:22:50:70:63 /* Ethernet address */ #define CONFIG_ENV_OVERWRITE 1 /* Overwrite the environment */ @@ -331,14 +333,6 @@ MAMR_G0CLA_A11 | MAMR_RLFA_1X | MAMR_WLFA_1X \ | MAMR_TLFA_4X) /* 0x5d802114 */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 diff --git a/include/configs/HH405.h b/include/configs/HH405.h index 0db9298..8a31324 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -43,6 +43,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_HH405 1 /* ...on a HH405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -311,7 +313,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFF80000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4 MB for malloc() */ @@ -481,14 +483,6 @@ #define CONFIG_SYS_LCD1_RST (0x80000000 >> 31) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/HIDDEN_DRAGON.h b/include/configs/HIDDEN_DRAGON.h index 251fe67..6cb19c5 100644 --- a/include/configs/HIDDEN_DRAGON.h +++ b/include/configs/HIDDEN_DRAGON.h @@ -42,6 +42,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_HIDDEN_DRAGON 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #if 0 #define USE_DINK32 1 #else @@ -131,7 +133,7 @@ #else #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00030000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -376,14 +378,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 #define CONFIG_SDRAM_50MHZ diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index 5dea96e..863204e 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_HUB405 1 /* ...on a HUB405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -354,14 +356,6 @@ #define CONFIG_SYS_UART5_RS232 (0x80000000 >> 8) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/IAD210.h b/include/configs/IAD210.h index ea1e706..5633177 100644 --- a/include/configs/IAD210.h +++ b/include/configs/IAD210.h @@ -44,6 +44,8 @@ #define CONFIG_MPC860T 1 #define CONFIG_MPC862 1 +#define CONFIG_SYS_TEXT_BASE 0x08000000 + #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #undef CONFIG_8xx_CONS_SMC1 @@ -370,15 +372,6 @@ MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_8X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_MPC860T /* Interrupt level assignments. diff --git a/include/configs/ICU862.h b/include/configs/ICU862.h index 917135e..3fa6130 100644 --- a/include/configs/ICU862.h +++ b/include/configs/ICU862.h @@ -39,6 +39,8 @@ #define CONFIG_ICU862 1 #define CONFIG_MPC862 1 +#define CONFIG_SYS_TEXT_BASE 0x40F00000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -210,7 +212,7 @@ #else #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */ /* @@ -448,13 +450,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_MAMR 0x13a01114 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ #ifdef CONFIG_MPC860T diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index 4e73941..1b90a6b 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -39,6 +39,8 @@ #define CPU_ID_STR "MPC8247" #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_BOOTCOUNT_LIMIT @@ -229,7 +231,7 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { 0xFF800000 } #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/ids8247/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/ids8247/config.mk * The main FLASH is whichever is connected to *CS0. */ #define CONFIG_SYS_FLASH0_BASE 0xFFF00000 @@ -305,19 +307,10 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/IP860.h b/include/configs/IP860.h index ed6b7fd..df7ea9a 100644 --- a/include/configs/IP860.h +++ b/include/configs/IP860.h @@ -35,6 +35,9 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_IP860 1 /* ...on a IP860 board */ + +#define CONFIG_SYS_TEXT_BASE 0x10000000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ @@ -455,18 +458,4 @@ typedef struct ip860_bcsr_s { #define BD_CTRL_FLWE 0x20 /* Flash Write Enable */ #define BD_CTRL_RWDN 0x10 /* VMEBus Requester Release When Done Enable */ -/*----------------------------------------------------------------------- - * - *----------------------------------------------------------------------- - * - */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/IPHASE4539.h b/include/configs/IPHASE4539.h index 3cb6cf7..281d0bd 100644 --- a/include/configs/IPHASE4539.h +++ b/include/configs/IPHASE4539.h @@ -38,6 +38,8 @@ #define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */ #define CONFIG_IPHASE4539 1 /* ...on a Interphase 4539 PMC */ +#define CONFIG_SYS_TEXT_BASE 0xffb00000 + #define CONFIG_CPM2 1 /* Has a CPM2 */ /*----------------------------------------------------------------------- @@ -193,7 +195,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFF800000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -250,15 +252,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - -/*----------------------------------------------------------------------- * Cache Configuration */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPU */ diff --git a/include/configs/ISPAN.h b/include/configs/ISPAN.h index c0b1d86..e651658 100644 --- a/include/configs/ISPAN.h +++ b/include/configs/ISPAN.h @@ -33,6 +33,8 @@ #define CONFIG_ISPAN /* ...on one of Interphase iSPAN boards */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xFE7A0000 + /*----------------------------------------------------------------------- * Select serial console configuration * @@ -171,7 +173,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ #ifdef CONFIG_BZIP2 #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ @@ -235,14 +237,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/*----------------------------------------------------------------------- * Cache Configuration */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPU */ diff --git a/include/configs/IVML24.h b/include/configs/IVML24.h index 1a4924e..6444bd1 100644 --- a/include/configs/IVML24.h +++ b/include/configs/IVML24.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_IVML24 1 /* ...on a IVML24 board */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #if defined (CONFIG_IVML24_16M) # define CONFIG_IDENT_STRING " IVML24" #elif defined (CONFIG_IVML24_32M) @@ -473,13 +475,4 @@ MBMR_AMB_TYPE_1 | MBMR_DSB_1_CYCL | MBMR_G0CLB_A10 | \ MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X) #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/IVMS8.h b/include/configs/IVMS8.h index 256cabd..1ebbc45 100644 --- a/include/configs/IVMS8.h +++ b/include/configs/IVMS8.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_IVMS8 1 /* ...on a IVMS8 board */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #if defined (CONFIG_IVMS8_16M) # define CONFIG_IDENT_STRING " IVMS8" #elif defined (CONFIG_IVMS8_32M) @@ -456,13 +458,4 @@ MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X) #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h index 3961100..f54a393 100644 --- a/include/configs/IceCube.h +++ b/include/configs/IceCube.h @@ -33,10 +33,18 @@ #define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */ #define CONFIG_ICECUBE 1 /* ... on IceCube board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0xFF000000 boot low for 16 MiB boards + * 0xFF800000 boot low for 8 MiB boards + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -122,11 +130,11 @@ #endif -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #endif -#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ #if defined(CONFIG_LITE5200B) # error CONFIG_SYS_LOWBOOT08 is incompatible with the Lite5200B #else @@ -274,7 +282,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/JSE.h b/include/configs/JSE.h index b0b1175..2a1cc58 100644 --- a/include/configs/JSE.h +++ b/include/configs/JSE.h @@ -37,7 +37,7 @@ /* JSE has a PPC405GPr */ #define CONFIG_405GP 1 /* ... which is a 4xxx series */ -#define CONFIG_4xx 1 +#define CONFIG_4x 1 /* ... with a 33MHz OSC. connected to the SysCLK input */ #define CONFIG_SYS_CLK_FREQ 33333333 /* ... with on-chip memory here (4KBytes) */ @@ -46,6 +46,8 @@ /* Do not set up locked dcache as init ram. */ #undef CONFIG_SYS_INIT_DCACHE_CS +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /* Map the SystemACE chip (CS#1) here. (Must be a multiple of 1Meg) */ #define CONFIG_SYSTEMACE 1 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000 @@ -293,15 +295,6 @@ /* Configuration Port location */ #define CONFIG_PORT_ADDR 0xF0000500 - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h index 94cc317..46b9175 100644 --- a/include/configs/KAREF.h +++ b/include/configs/KAREF.h @@ -43,6 +43,9 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #undef CONFIG_SYS_DRAM_TEST /* Disable-takes long time!*/ #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ @@ -286,14 +289,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */ #define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */ diff --git a/include/configs/KUP4K.h b/include/configs/KUP4K.h index c6978c3..9702d63 100644 --- a/include/configs/KUP4K.h +++ b/include/configs/KUP4K.h @@ -38,6 +38,8 @@ #define CONFIG_MPC855 1 /* This is a MPC855 CPU */ #define CONFIG_KUP4K 1 /* ...on a KUP4K module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -495,15 +497,6 @@ #define LATCH_ADDR 0x90000200 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ #define CONFIG_AUTOBOOT_STOP_STR "." #define CONFIG_SILENT_CONSOLE 1 diff --git a/include/configs/KUP4X.h b/include/configs/KUP4X.h index ab535e1..9613ed9 100644 --- a/include/configs/KUP4X.h +++ b/include/configs/KUP4X.h @@ -38,6 +38,8 @@ #define CONFIG_MPC859T 1 /* This is a MPC859T CPU */ #define CONFIG_KUP4X 1 /* ...on a KUP4X module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -446,15 +448,6 @@ #define LATCH_ADDR 0x90000200 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ #define CONFIG_AUTOBOOT_STOP_STR "." /* easy to stop for now */ diff --git a/include/configs/LANTEC.h b/include/configs/LANTEC.h index 6e8a4b8..7c58f68 100644 --- a/include/configs/LANTEC.h +++ b/include/configs/LANTEC.h @@ -40,6 +40,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_LANTEC 2 /* ...on a Lantec rev.2 board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* * Port assignments (CONFIG_LANTEC == 1): * - SMC1: J11 (MDB) ? @@ -340,14 +342,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * JFFS2 partitions * */ diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 6c6b5d6..887bd63 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -232,7 +232,7 @@ #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) #ifdef CONFIG_CF_SBF -# define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) +# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #endif diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 6e0aa14..46f60bf 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -172,10 +172,10 @@ /* If M5282 port is fully implemented the monitor base will be behind * the vector table. */ -#if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) +#if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #else -#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ #endif #define CONFIG_SYS_MONITOR_LEN 0x20000 diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index a80d330..1ff80ee 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -245,7 +245,7 @@ #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) #ifdef CONFIG_CF_SBF -# define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) +# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #endif diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 5b4bba8..1cdc373 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -305,7 +305,7 @@ #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) #ifdef CONFIG_CF_SBF -# define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) +# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #endif diff --git a/include/configs/MBX.h b/include/configs/MBX.h index 5f7c7a8..3b4d60c 100644 --- a/include/configs/MBX.h +++ b/include/configs/MBX.h @@ -46,6 +46,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_MBX 1 /* ...on an MBX module */ +#define CONFIG_SYS_TEXT_BASE 0xfe000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -310,12 +312,4 @@ */ #define CONFIG_SYS_DER 0 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/MBX860T.h b/include/configs/MBX860T.h index afe2383..6964bec 100644 --- a/include/configs/MBX860T.h +++ b/include/configs/MBX860T.h @@ -28,6 +28,8 @@ #define CONFIG_MPC860T 1 #define CONFIG_MBX 1 +#define CONFIG_SYS_TEXT_BASE 0xfe000000 + #define CONFIG_8xx_CPUCLOCK 40 #define CONFIG_8xx_BUSCLOCK (CONFIG_8xx_CPUCLOCK) #define TARGET_SYSTEM_FREQUENCY 40 @@ -282,14 +284,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_MAMR 0x13821000 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* values according to the manual */ diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h index 2e63306..d79b702 100644 --- a/include/configs/METROBOX.h +++ b/include/configs/METROBOX.h @@ -109,6 +109,9 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #undef CONFIG_SYS_DRAM_TEST /* Disable-takes long time!*/ #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ @@ -351,14 +354,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */ #define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */ diff --git a/include/configs/MHPC.h b/include/configs/MHPC.h index 19a288c..6ad0658 100644 --- a/include/configs/MHPC.h +++ b/include/configs/MHPC.h @@ -43,6 +43,8 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* do special hardware init. */ #define CONFIG_MISC_INIT_R 1 +#define CONFIG_SYS_TEXT_BASE 0xfe000000 + #define CONFIG_8xx_GCLK_FREQ MPC8XX_SPEED #undef CONFIG_8xx_CONS_SMC1 #define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ @@ -386,12 +388,4 @@ */ #define CONFIG_SYS_DER 0 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index bfff750..58764d0 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -35,6 +35,9 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_MIP405 1 /* ...on a MIP405 board */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /*********************************************************** * Note that it may also be a MIP405T board which is a subset of the * MIP405 @@ -315,15 +318,6 @@ #define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 12) #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*********************************************************************** * External peripheral base address ***********************************************************************/ diff --git a/include/configs/ML2.h b/include/configs/ML2.h index 2fc0119..8579f96 100644 --- a/include/configs/ML2.h +++ b/include/configs/ML2.h @@ -30,6 +30,7 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_ML2 1 /* ...on a ML2 board */ +#define CONFIG_SYS_TEXT_BASE 0x18000000 #define CONFIG_ENV_IS_IN_FLASH 1 @@ -221,14 +222,6 @@ */ #define SPD_EEPROM_ADDRESS 0x50 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MOUSSE.h b/include/configs/MOUSSE.h index 986590a..69c0cab 100644 --- a/include/configs/MOUSSE.h +++ b/include/configs/MOUSSE.h @@ -48,7 +48,11 @@ #define CONFIG_MPC824X 1 #define CONFIG_MPC8240 1 #define CONFIG_MOUSSE 1 + +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_SYS_ADDR_MAP_B 1 + #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 #if 1 @@ -312,15 +316,6 @@ */ #define CONFIG_SYS_CACHELINE_SIZE 16 - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* Localizations */ #if 0 #define CONFIG_ETHADDR 0:0:0:0:1:d diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h index ffd37fd..05caf21 100644 --- a/include/configs/MPC8260ADS.h +++ b/include/configs/MPC8260ADS.h @@ -48,12 +48,16 @@ #define CONFIG_MPC8260ADS 1 /* Motorola PQ2 ADS family board */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */ +#endif + #define CONFIG_CPM2 1 /* Has a CPM2 */ /* * Figure out if we are booting low via flash HRCW or high via the BCSR. */ -#if (TEXT_BASE != 0xFFF00000) /* Boot low (flash HRCW) */ +#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000) /* Boot low (flash HRCW) */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -373,10 +377,8 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT #endif @@ -537,11 +539,11 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=" MK_STR(CONFIG_NETDEV) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=400000\0" \ "console=ttyCPM0\0" \ "setbootargs=setenv bootargs " \ diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h index 55d77f8..97202df 100644 --- a/include/configs/MPC8266ADS.h +++ b/include/configs/MPC8266ADS.h @@ -33,7 +33,7 @@ /* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! !! !! !! This configuration requires JP3 to be in position 1-2 to work !! - !! To make it work for the default, the TEXT_BASE define in !! + !! To make it work for the default, the CONFIG_SYS_TEXT_BASE define in !! !! board/mpc8266ads/config.mk must be changed from 0xfe000000 to !! !! 0xfff00000 !! !! The CONFIG_SYS_HRCW_MASTER define below must also be changed to match !! @@ -53,6 +53,8 @@ #define CONFIG_MPC8266ADS 1 /* ...on motorola ADS board */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xfe000000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ @@ -419,10 +421,8 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT #endif diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 1314271..2eab1c4 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -33,6 +33,8 @@ #define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ #define CONFIG_MPC8308RDB 1 /* MPC8308RDB board specific */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_MISC_INIT_R /* @@ -200,7 +202,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ @@ -496,14 +498,6 @@ #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 3fdd1b0..1b2bebb 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -35,6 +35,10 @@ #define CONFIG_MPC8313 1 #define CONFIG_MPC8313ERDB 1 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFE000000 +#endif + #define CONFIG_PCI #define CONFIG_FSL_ELBC 1 @@ -196,7 +200,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && !defined(CONFIG_NAND_SPL) #define CONFIG_SYS_RAMBOOT @@ -577,14 +581,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_OVERWRITE @@ -609,11 +605,11 @@ "ethprime=TSEC1\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=780000\0" \ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \ "console=ttyS0\0" \ diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index abc29c0..17ce3bc 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -25,9 +25,13 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifdef CONFIG_MK_NAND +#ifdef CONFIG_NAND #define CONFIG_NAND_U_BOOT 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0x00100000 +#define CONFIG_SYS_TEXT_BASE 0x00100000 +#endif + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFE000000 #endif /* @@ -177,7 +181,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ @@ -604,14 +608,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 0719fcea..abbb92a 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -17,6 +17,8 @@ #define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC832x 1 /* MPC832x CPU specific */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_PCI 1 /* @@ -146,7 +148,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -507,14 +509,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if (CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -551,11 +545,11 @@ "netdev=" MK_STR(CONFIG_NETDEV) "\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftp $loadaddr $uboot;" \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=780000\0" \ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \ "ramdiskaddr=1000000\0" \ diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index bed62bd..6009d44 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -28,8 +28,8 @@ #define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC832x 1 /* MPC832x CPU specific */ #define CONFIG_MPC832XEMDS 1 /* MPC832XEMDS board specific */ -#undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */ -#undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */ + +#define CONFIG_SYS_TEXT_BASE 0xFE000000 /* * System Clock Setup @@ -135,7 +135,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -526,14 +526,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 55e9de0..5682787 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2006 + * (C) Copyright 2006-2010 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -38,8 +38,10 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */ -#define PCI_66M -#ifdef PCI_66M +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + +#define CONFIG_PCI_66M +#ifdef CONFIG_PCI_66M #define CONFIG_83XX_CLKIN 66000000 /* in Hz */ #else #define CONFIG_83XX_CLKIN 33000000 /* in Hz */ @@ -51,7 +53,7 @@ #endif /* CONFIG_PCISLAVE */ #ifndef CONFIG_SYS_CLK_FREQ -#ifdef PCI_66M +#ifdef CONFIG_PCI_66M #define CONFIG_SYS_CLK_FREQ 66000000 #define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1 #else @@ -172,7 +174,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -667,14 +669,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 117f745..5d10a5e 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -56,7 +56,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#if (TEXT_BASE == 0xFE000000) +#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) #define CONFIG_SYS_LOWBOOT #endif @@ -67,6 +67,10 @@ #define CONFIG_MPC834x /* MPC834x family (8343, 8347, 8349) */ #define CONFIG_MPC8349 /* MPC8349 specific */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFEF00000 +#endif + #define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */ #define CONFIG_MISC_INIT_F @@ -292,7 +296,7 @@ boards, we say we have two, but don't display a message if we find only one. */ /* * U-Boot memory configuration */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -394,8 +398,8 @@ boards, we say we have two, but don't display a message if we find only one. */ #endif -#define PCI_66M -#ifdef PCI_66M +#define CONFIG_PCI_66M +#ifdef CONFIG_PCI_66M #define CONFIG_83XX_CLKIN 66666666 /* in Hz */ #else #define CONFIG_83XX_CLKIN 33333333 /* in Hz */ @@ -660,14 +664,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -716,11 +712,11 @@ boards, we say we have two, but don't display a message if we find only one. */ "netdev=" MK_STR(CONFIG_NETDEV) "\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=780000\0" \ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index d7381aa..bc644ba 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -30,6 +30,9 @@ #define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ #define CONFIG_MPC8360EMDS 1 /* MPC8360EMDS board specific */ + +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */ #undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */ @@ -161,7 +164,7 @@ * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -567,14 +570,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index fc53ecc..e9a6400 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -26,18 +26,20 @@ #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ #define CONFIG_MPC8360ERDK 1 /* MPC8360ERDK board specific */ +#define CONFIG_SYS_TEXT_BASE 0xFF800000 + /* * System Clock Setup */ #ifdef CONFIG_CLKIN_33MHZ #define CONFIG_83XX_CLKIN 33333333 #define CONFIG_SYS_CLK_FREQ 33333333 -#define PCI_33M 1 +#define CONFIG_PCI_33M 1 #define HRCWL_CSB_TO_CLKIN_MPC8360ERDK HRCWL_CSB_TO_CLKIN_10X1 #else #define CONFIG_83XX_CLKIN 66000000 #define CONFIG_SYS_CLK_FREQ 66000000 -#define PCI_66M 1 +#define CONFIG_PCI_66M 1 #define HRCWL_CSB_TO_CLKIN_MPC8360ERDK HRCWL_CSB_TO_CLKIN_5X1 #endif /* CONFIG_CLKIN_33MHZ */ @@ -153,7 +155,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_FLASH_BASE 0xFF800000 /* FLASH base address */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) @@ -484,14 +486,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif /* CONFIG_PCI */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 8546ebc..fa0da48 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -29,6 +29,8 @@ #define CONFIG_MPC837x 1 /* MPC837x CPU specific */ #define CONFIG_MPC837XEMDS 1 /* MPC837XEMDS board specific */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + /* * System Clock Setup */ @@ -196,7 +198,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -618,14 +620,6 @@ extern int board_pci_host_broken(void); #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 20c2304..9d99a93 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -30,6 +30,8 @@ #define CONFIG_MPC837x 1 /* MPC837x CPU specific */ #define CONFIG_MPC837XERDB 1 +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_PCI 1 #define CONFIG_BOARD_EARLY_INIT_F @@ -220,7 +222,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -627,14 +629,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -667,11 +661,11 @@ "netdev=" MK_STR(CONFIG_NETDEV) "\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftp $loadaddr $uboot;" \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=780000\0" \ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \ "ramdiskaddr=1000000\0" \ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 0a9f47b..8b8f467 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -29,24 +29,28 @@ #include "../board/freescale/common/ics307_clk.h" -#ifdef CONFIG_MK_36BIT +#ifdef CONFIG_36BIT #define CONFIG_PHYS_64BIT 1 #endif -#ifdef CONFIG_MK_NAND +#ifdef CONFIG_NAND #define CONFIG_NAND_U_BOOT 1 #define CONFIG_RAMBOOT_NAND 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000 +#define CONFIG_SYS_TEXT_BASE 0xf8f82000 #endif -#ifdef CONFIG_MK_SDCARD +#ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#define CONFIG_SYS_TEXT_BASE 0xf8f80000 #endif -#ifdef CONFIG_MK_SPIFLASH +#ifdef CONFIG_SPIFLASH #define CONFIG_RAMBOOT_SPIFLASH 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#define CONFIG_SYS_TEXT_BASE 0xf8f80000 +#endif + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 #endif /* High Level Configuration Options */ @@ -229,7 +233,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) @@ -707,14 +711,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -759,11 +755,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8536ds/ramdisk.uboot\0" \ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index c133895..b1ee07b 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -41,6 +41,12 @@ #define CONFIG_MPC8540 1 /* MPC8540 specific */ #define CONFIG_MPC8540ADS 1 /* MPC8540ADS board specific */ +/* + * default CCARBAR is at 0xff700000 + * assume U-Boot is less than 0.5MB + */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #ifndef CONFIG_HAS_FEC #define CONFIG_HAS_FEC 1 /* 8540 has FEC */ #endif @@ -137,7 +143,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -420,14 +426,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 75227a6..cc52a67 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -36,6 +36,8 @@ #define CONFIG_MPC8540 1 /* MPC8540 specific */ #define CONFIG_MPC8540EVAL 1 /* MPC8540EVAL board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #undef CONFIG_PCI /* pci ethernet support */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -107,7 +109,7 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms)*/ #define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -330,14 +332,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index c3167e9..037aae7 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -37,6 +37,8 @@ #define CONFIG_MPC8541 1 /* MPC8541 specific */ #define CONFIG_MPC8541CDS 1 /* MPC8541CDS board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -145,7 +147,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -436,14 +438,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 1804582..0b69885 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -34,6 +34,10 @@ #define CONFIG_MPC8544 1 #define CONFIG_MPC8544DS 1 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#endif + #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -154,7 +158,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -451,14 +455,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -498,11 +494,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8544ds/ramdisk.uboot\0" \ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index e1e4acf..5d21d11 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -36,6 +36,10 @@ #define CONFIG_MPC8548 1 /* MPC8548 specific */ #define CONFIG_MPC8548CDS 1 /* MPC8548CDS board specific */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#endif + #define CONFIG_PCI /* enable any pci type devices */ #define CONFIG_PCI1 /* PCI controller 1 */ #define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ @@ -157,7 +161,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -491,14 +495,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -542,11 +538,11 @@ extern unsigned long get_clock_freq(void); "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS1\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=ramdisk.uboot\0" \ diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index b0dd175..0068684 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -37,6 +37,8 @@ #define CONFIG_MPC8555 1 /* MPC8555 specific */ #define CONFIG_MPC8555CDS 1 /* MPC8555CDS board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -143,7 +145,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -434,14 +436,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 31740fd..96f7383 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -42,6 +42,12 @@ #define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */ #define CONFIG_MPC8560 1 +/* + * default CCARBAR is at 0xff700000 + * assume U-Boot is less than 0.5MB + */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -134,7 +140,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -461,14 +467,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index a98ecde..d6171b4 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -33,6 +33,8 @@ #define CONFIG_MPC8568 1 /* MPC8568 specific */ #define CONFIG_MPC8568MDS 1 /* MPC8568MDS board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* PCI controller */ #define CONFIG_PCIE1 1 /* PCIE controller */ @@ -154,7 +156,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -451,14 +453,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 95c0a9f..e3a997e 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -51,7 +51,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CLK_FREQ 66666666 #define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ -#ifdef CONFIG_MK_ATM +#ifdef CONFIG_ATM #define CONFIG_PQ_MDS_PIB #define CONFIG_PQ_MDS_PIB_ATM #endif @@ -62,10 +62,14 @@ extern unsigned long get_clock_freq(void); #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#ifdef CONFIG_MK_NAND +#ifdef CONFIG_NAND #define CONFIG_NAND_U_BOOT 1 #define CONFIG_RAMBOOT_NAND 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000 +#define CONFIG_SYS_TEXT_BASE 0xf8f82000 +#endif + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 #endif /* @@ -190,7 +194,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) #define CONFIG_SYS_RAMBOOT @@ -585,14 +589,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 34ebbdb..e8206ea 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -29,7 +29,7 @@ #include "../board/freescale/common/ics307_clk.h" -#ifdef CONFIG_MK_36BIT +#ifdef CONFIG_36BIT #define CONFIG_PHYS_64BIT #endif @@ -41,6 +41,10 @@ #define CONFIG_MPC8572DS 1 #define CONFIG_MP 1 /* support multiple processors */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#endif + #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -189,7 +193,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -601,14 +605,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -654,11 +650,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8572ds/ramdisk.uboot\0" \ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 645d947..c876e98 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -19,6 +19,8 @@ #define CONFIG_MPC8610HPCD 1 /* MPC8610HPCD board specific */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ /* video */ @@ -53,6 +55,7 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported & enabled */ #define CONFIG_ALTIVEC 1 @@ -184,7 +187,7 @@ #undef CONFIG_SYS_FLASH_CHECKSUM #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ #define CONFIG_FLASH_CFI_DRIVER @@ -423,7 +426,7 @@ /* Map the last 1M of flash where we're running from reset */ #define CONFIG_SYS_DBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT6U_EARLY CONFIG_SYS_DBAT6U_EARLY @@ -519,14 +522,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -605,11 +600,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8610hpcd/ramdisk.uboot\0" \ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 3b80d14..9009e3c 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -41,6 +41,12 @@ /*#define CONFIG_PHYS_64BIT 1*/ /* Place devices in 36-bit space */ #define CONFIG_ADDR_MAP 1 /* Use addr map */ +/* + * default CCSRBAR is at 0xff700000 + * assume U-Boot is less than 0.5MB + */ +#define CONFIG_SYS_TEXT_BASE 0xeff00000 + #ifdef RUN_DIAG #define CONFIG_SYS_DIAG_ADDR CONFIG_SYS_FLASH_BASE #endif @@ -68,6 +74,7 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #define CONFIG_SYS_NUM_ADDR_MAP 8 /* Number of addr map slots = 8 dbats */ @@ -238,7 +245,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #undef CONFIG_SYS_FLASH_CHECKSUM #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ #define CONFIG_FLASH_CFI_DRIVER @@ -586,7 +593,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* Map the last 1M of flash where we're running from reset */ #define CONFIG_SYS_DBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT6U_EARLY CONFIG_SYS_DBAT6U_EARLY @@ -674,14 +681,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -727,11 +726,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=your.ramdisk.u-boot\0" \ diff --git a/include/configs/MPC86xADS.h b/include/configs/MPC86xADS.h index 85c6890..beada7e 100644 --- a/include/configs/MPC86xADS.h +++ b/include/configs/MPC86xADS.h @@ -28,6 +28,8 @@ #undef CONFIG_MPC859DSL #undef CONFIG_MPC852T +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE diff --git a/include/configs/MPC885ADS.h b/include/configs/MPC885ADS.h index 8ffc1b2..eeb2355 100644 --- a/include/configs/MPC885ADS.h +++ b/include/configs/MPC885ADS.h @@ -15,6 +15,8 @@ #define CONFIG_MPC885 1 /* MPC885 CPU (Duet family) */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE diff --git a/include/configs/MUSENKI.h b/include/configs/MUSENKI.h index ec9e1ec..e0bfd08 100644 --- a/include/configs/MUSENKI.h +++ b/include/configs/MUSENKI.h @@ -45,6 +45,7 @@ #define CONFIG_MPC8245 1 #define CONFIG_MUSENKI 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 @@ -118,7 +119,7 @@ #define CONFIG_SYS_EUMB_ADDR 0xFC000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -153,7 +154,7 @@ * Definitions for initial stack pointer and data area */ -/* #define CONFIG_SYS_MONITOR_BASE TEXT_BASE */ +/* #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE */ /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 @@ -293,12 +294,4 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index 8f6b16b..acc7187 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -32,10 +32,11 @@ #define CONFIG_MPC5xxx 1 #define CONFIG_MPC5200 1 -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFF800000 +#endif -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 #define CONFIG_MISC_INIT_R 1 @@ -211,7 +212,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_LOWBOOT -#define CONFIG_SYS_FLASH_BASE TEXT_BASE +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_FLASH_SIZE 0x00800000 /* @@ -240,7 +241,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index 25d8077..04d97cd 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -37,6 +37,8 @@ #define CONFIG_MPC834x 1 #define CONFIG_MPC8343 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_SYS_IMMR 0xE0000000 #define CONFIG_PCI @@ -116,7 +118,7 @@ /* * U-Boot memory configuration */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_INIT_RAM_LOCK @@ -186,7 +188,7 @@ #define CONFIG_NET_MULTI 1 #define CONFIG_NET_RETRY_COUNT 3 -#define PCI_66M +#define CONFIG_PCI_66M #define CONFIG_83XX_CLKIN 66666667 #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW @@ -379,15 +381,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - -/* * Environment Configuration */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/MVBLUE.h b/include/configs/MVBLUE.h index 669816c..dd392d0 100644 --- a/include/configs/MVBLUE.h +++ b/include/configs/MVBLUE.h @@ -43,6 +43,8 @@ #define MVBLUE_BOARD_BOX 1 #define MVBLUE_BOARD_LYNX 2 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #if 0 #define ERR_LED(code) do { if (code) \ *(volatile char *)(0xff000003) = ( 3 | (code<<4) ) & 0xf3; \ @@ -172,7 +174,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFF00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 #define CONFIG_SYS_EUMB_ADDR 0xFC000000 @@ -340,13 +342,4 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/MVS1.h b/include/configs/MVS1.h index 10210f0..9bf7fcb 100644 --- a/include/configs/MVS1.h +++ b/include/configs/MVS1.h @@ -406,13 +406,4 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A7 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/MVSMR.h b/include/configs/MVSMR.h index 000c4c6..c125157 100644 --- a/include/configs/MVSMR.h +++ b/include/configs/MVSMR.h @@ -32,10 +32,11 @@ #define CONFIG_MPC5xxx 1 #define CONFIG_MPC5200 1 -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFF800000 +#endif -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 #define CONFIG_MISC_INIT_R 1 @@ -177,7 +178,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_LOWBOOT -#define CONFIG_SYS_FLASH_BASE TEXT_BASE +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_FLASH_SIZE 0x00800000 /* @@ -210,7 +211,7 @@ CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/NC650.h b/include/configs/NC650.h index 6343cfe..df1c1ca 100644 --- a/include/configs/NC650.h +++ b/include/configs/NC650.h @@ -36,6 +36,8 @@ #define CONFIG_MPC852T 1 #define CONFIG_NC650 1 +#define CONFIG_SYS_TEXT_BASE 0x40700000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -213,7 +215,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */ /* @@ -424,14 +426,6 @@ #define CONFIG_SYS_MBMR_NAND ( MBMR_WLFB_5X ) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */ #define NAND_CACHE_PAGES 16 /* size of nand cache in 512 bytes pages */ diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index 76ca916..62eef46 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -41,6 +41,8 @@ #define CONFIG_MPC870 1 /* This is a MPC885 CPU */ #define CONFIG_NETPHONE 1 /* ...on a NetPhone board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -478,14 +480,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */ /****************************************************************/ diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 4f9f9fe..db22ba3 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -37,6 +37,8 @@ #define CONFIG_MPC885 1 /* This is a MPC885 CPU */ #define CONFIG_NETTA 1 /* ...on a NetTA board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -487,14 +489,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */ /*********************************************************************************************************** diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index d060cb7..87000e6 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -41,6 +41,8 @@ #define CONFIG_MPC870 1 /* This is a MPC885 CPU */ #define CONFIG_NETTA2 1 /* ...on a NetTA2 board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -479,14 +481,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */ /****************************************************************/ diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h index a18b480..b7119fd 100644 --- a/include/configs/NETVIA.h +++ b/include/configs/NETVIA.h @@ -37,6 +37,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_NETVIA 1 /* ...on a NetVia board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #if !defined(CONFIG_NETVIA_VERSION) || CONFIG_NETVIA_VERSION == 1 #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 @@ -346,14 +348,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* Ethernet at SCC2 */ #define CONFIG_SCC2_ENET diff --git a/include/configs/NSCU.h b/include/configs/NSCU.h index 6a4c47d..4f76ca1 100644 --- a/include/configs/NSCU.h +++ b/include/configs/NSCU.h @@ -37,6 +37,8 @@ #define CONFIG_TQM855M 1 /* ...on a TQM8xxM module */ #define CONFIG_NSCU 1 +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SCC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -474,15 +476,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #undef CONFIG_SCC1_ENET #define CONFIG_FEC_ENET diff --git a/include/configs/NX823.h b/include/configs/NX823.h index 5054d5e..e588ea3 100644 --- a/include/configs/NX823.h +++ b/include/configs/NX823.h @@ -39,6 +39,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_NX823 1 /* ...on a NEXUS 823 module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /*#define CONFIG_VIDEO 1 */ #define CONFIG_8xx_GCLK_FREQ MPC8XX_SPEED @@ -356,15 +358,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_ENV_OVERWRITE /* allow changes to ethaddr (for now) */ #define CONFIG_ETHADDR 00:10:20:30:40:50 #define CONFIG_IPADDR 10.77.77.20 diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h index ad2e4da..0343043 100644 --- a/include/configs/OCRTC.h +++ b/include/configs/OCRTC.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_OCRTC 1 /* ...on a OCRTC board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ @@ -300,13 +302,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h index 3d35362..cef1117 100644 --- a/include/configs/ORSG.h +++ b/include/configs/ORSG.h @@ -298,13 +298,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/OXC.h b/include/configs/OXC.h index 74c51f4..9a0c558 100644 --- a/include/configs/OXC.h +++ b/include/configs/OXC.h @@ -39,6 +39,8 @@ #define CONFIG_MPC8240 1 #define CONFIG_OXC 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_IDENT_STRING " [oxc] " @@ -136,7 +138,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN 0x00030000 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_PRELIMBASE) @@ -314,13 +316,4 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index da826fc..1a4632f 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -22,6 +22,10 @@ #define CONFIG_P1022DS #define CONFIG_MP /* support multiple processors */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#endif + #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ @@ -125,7 +129,7 @@ #define CONFIG_SYS_MAX_FLASH_BANKS 2 #define CONFIG_SYS_MAX_FLASH_SECT 1024 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -397,14 +401,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -432,11 +428,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=uramdisk\0" \ diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index fa45b5b..cff0ed34 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -30,33 +30,37 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifdef CONFIG_MK_P1011RDB +#ifdef CONFIG_P1011RDB #define CONFIG_P1011 #endif -#ifdef CONFIG_MK_P1020RDB +#ifdef CONFIG_P1020RDB #define CONFIG_P1020 #endif -#ifdef CONFIG_MK_P2010RDB +#ifdef CONFIG_P2010RDB #define CONFIG_P2010 #endif -#ifdef CONFIG_MK_P2020RDB +#ifdef CONFIG_P2020RDB #define CONFIG_P2020 #endif -#ifdef CONFIG_MK_NAND +#ifdef CONFIG_NAND #define CONFIG_NAND_U_BOOT 1 #define CONFIG_RAMBOOT_NAND 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000 +#define CONFIG_SYS_TEXT_BASE 0xf8f82000 #endif -#ifdef CONFIG_MK_SDCARD +#ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#define CONFIG_SYS_TEXT_BASE 0xf8f80000 #endif -#ifdef CONFIG_MK_SPIFLASH +#ifdef CONFIG_SPIFLASH #define CONFIG_RAMBOOT_SPIFLASH 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#define CONFIG_SYS_TEXT_BASE 0xf8f80000 +#endif + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 #endif /* High Level Configuration Options */ @@ -188,7 +192,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) @@ -538,14 +542,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20)/* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -579,11 +575,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "loadaddr=1000000\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 74cff0c..e7cdb92 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -29,7 +29,7 @@ #include "../board/freescale/common/ics307_clk.h" -#ifdef CONFIG_MK_36BIT +#ifdef CONFIG_36BIT #define CONFIG_PHYS_64BIT #endif @@ -41,6 +41,10 @@ #define CONFIG_P2020DS 1 #define CONFIG_MP 1 /* support multiple processors */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#endif + #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -92,7 +96,7 @@ /* DDR Setup */ #define CONFIG_VERY_BIG_RAM -#ifdef CONFIG_MK_DDR2 +#ifdef CONFIG_DDR2 #define CONFIG_FSL_DDR2 #else #define CONFIG_FSL_DDR3 1 @@ -224,7 +228,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -605,14 +609,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -659,11 +655,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=p2020ds/ramdisk.uboot\0" \ diff --git a/include/configs/P3G4.h b/include/configs/P3G4.h index 890170d..47b7558 100644 --- a/include/configs/P3G4.h +++ b/include/configs/P3G4.h @@ -42,6 +42,8 @@ #define CONFIG_P3G4 1 /* this is a P3G4 board */ #define CONFIG_SYS_GT_6426x GT_64260 /* with a 64260 system controller */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BAUDRATE 115200 /* console baudrate = 115200 */ #undef CONFIG_ECC /* enable ECC support */ @@ -198,7 +200,7 @@ #define CONFIG_SYS_FLASH_BASE 0xff000000 #define CONFIG_SYS_RESET_ADDRESS 0xfff00100 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ /* areas to map different things with the GT in physical space */ @@ -421,14 +423,6 @@ #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOARD_ASM_INIT 1 diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h index 87703c9..5e7b81f 100644 --- a/include/configs/P4080DS.h +++ b/include/configs/P4080DS.h @@ -36,4 +36,8 @@ #define CONFIG_SYS_P4080_ERRATUM_CPU22 #define CONFIG_SYS_P4080_ERRATUM_SERDES8 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#endif + #include "corenet_ds.h" diff --git a/include/configs/PATI.h b/include/configs/PATI.h index 88e9528..b07cac1 100644 --- a/include/configs/PATI.h +++ b/include/configs/PATI.h @@ -33,6 +33,9 @@ #define CONFIG_MPC555 1 /* This is an MPC555 CPU */ #define CONFIG_PATI 1 /* ...On a PATI board */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* Serial Console Configuration */ #define CONFIG_5xx_CONS_SCI1 #undef CONFIG_5xx_CONS_SCI2 @@ -144,7 +147,7 @@ #define PLD_CONFIG_BASE 0x04001000 /* PLD (CS3) */ #define CONFIG_SYS_MONITOR_BASE 0xFFF00000 -/* CONFIG_SYS_FLASH_BASE */ /* TEXT_BASE is defined in the board config.mk file. */ +/* CONFIG_SYS_FLASH_BASE */ /* CONFIG_SYS_TEXT_BASE is defined in the board config.mk file. */ /* This adress is given to the linker with -Ttext to */ /* locate the text section at this adress. */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 192 kB for Monitor */ @@ -283,16 +286,6 @@ */ #define CONFIG_SYS_DER 0x00000000 - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define VERSION_TAG "released" #define CONFIG_ISO_STRING "MEV-10084-001" diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h index 244d6fe..28769b3 100644 --- a/include/configs/PCI405.h +++ b/include/configs/PCI405.h @@ -39,6 +39,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PCI405 1 /* ...on a PCI405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() on init */ @@ -311,12 +313,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/PCI5441.h b/include/configs/PCI5441.h index c60a9f7..3e7e74b 100644 --- a/include/configs/PCI5441.h +++ b/include/configs/PCI5441.h @@ -63,7 +63,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h index c30ac78..d0ce924 100644 --- a/include/configs/PCIPPC2.h +++ b/include/configs/PCIPPC2.h @@ -43,6 +43,8 @@ #define CONFIG_PCIPPC2 1 /* this is a PCIPPC2 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BOARD_EARLY_INIT_F 1 #define CONFIG_MISC_INIT_R 1 @@ -117,7 +119,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -238,14 +240,6 @@ L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- RTC m48t59 */ diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h index bc67480..8f7ec02 100644 --- a/include/configs/PCIPPC6.h +++ b/include/configs/PCIPPC6.h @@ -43,6 +43,8 @@ #define CONFIG_PCIPPC2 1 /* this is a PCIPPC2 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BOARD_EARLY_INIT_F 1 #define CONFIG_MISC_INIT_R 1 @@ -119,7 +121,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -240,14 +242,6 @@ L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- RTC m48t59 */ diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 2901cfd..e3cf943 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -35,6 +35,9 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PIP405 1 /* ...on a PIP405 board */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /*********************************************************** * Clock ***********************************************************/ @@ -260,15 +263,6 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*********************************************************************** * External peripheral base address ***********************************************************************/ diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h index 874c20b..8e8c049 100644 --- a/include/configs/PK1C20.h +++ b/include/configs/PK1C20.h @@ -65,7 +65,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 928ed8e..3844e48 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PLU405 1 /* ...on a PLU405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -268,8 +270,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* @@ -396,14 +398,6 @@ #define CONFIG_SYS_EEPROM_WP (0x80000000 >> 0) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in MHz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/PM520.h b/include/configs/PM520.h index 22de207..5832307 100644 --- a/include/configs/PM520.h +++ b/include/configs/PM520.h @@ -33,13 +33,12 @@ #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_PM520 1 /* ... on PM520 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */ #define CONFIG_MISC_INIT_R -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -241,7 +240,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/PM826.h b/include/configs/PM826.h index 636bd26..d26254f 100644 --- a/include/configs/PM826.h +++ b/include/configs/PM826.h @@ -39,6 +39,10 @@ #define CONFIG_PM826 1 /* ...on a PM8260 module */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFF000000 /* Standard: boot 64-bit flash */ +#endif + #undef CONFIG_DB_CR826_J30x_ON /* J30x jumpers on D.B. carrier */ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ @@ -304,7 +308,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -318,15 +322,6 @@ #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/PM828.h b/include/configs/PM828.h index 9d620af..3053ad4 100644 --- a/include/configs/PM828.h +++ b/include/configs/PM828.h @@ -39,6 +39,10 @@ #define CONFIG_PM828 1 /* ...on a PM828 module */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0x40000000 /* Standard: boot 64-bit flash */ +#endif + #undef CONFIG_DB_CR826_J30x_ON /* J30x jumpers on D.B. carrier */ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ @@ -298,7 +302,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -312,15 +316,6 @@ #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/PM854.h b/include/configs/PM854.h index cf8a8cf..5963334 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -41,6 +41,8 @@ #define CONFIG_MPC8540 1 /* MPC8540 specific */ #define CONFIG_PM854 1 /* PM854 board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -137,7 +139,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) @@ -365,14 +367,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/PM856.h b/include/configs/PM856.h index 0bd28fc..1559fd6 100644 --- a/include/configs/PM856.h +++ b/include/configs/PM856.h @@ -42,6 +42,8 @@ #define CONFIG_CPM2 1 /* Has a CPM2 */ #define CONFIG_PM856 1 /* PM856 board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -139,7 +141,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -365,14 +367,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h index c420efe..b1d0ea5 100644 --- a/include/configs/PMC405.h +++ b/include/configs/PMC405.h @@ -32,6 +32,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PMC405 1 /* ...on a PMC405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -195,8 +197,8 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* 128 kB for malloc() */ #define CONFIG_PRAM 0 /* use pram variable to overwrite */ @@ -334,14 +336,6 @@ CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_OF_LIBFDT #define CONFIG_OF_BOARD_SETUP diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h index 5b1048e..74b656c 100644 --- a/include/configs/PMC405DE.h +++ b/include/configs/PMC405DE.h @@ -28,6 +28,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PMC405DE 1 /* ...on a PMC405DE board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ #define CONFIG_BOARD_TYPES 1 /* support board types */ @@ -205,8 +207,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xfe000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index bf2247d..7585e6e 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -39,6 +39,10 @@ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_4xx 1 /* ... PPC4xx family */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF90000 +#endif + #define CONFIG_SYS_CLK_FREQ 33333400 #if 0 /* temporary disabled because OS/9 does not like dcache on startup */ @@ -53,7 +57,7 @@ * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) *----------------------------------------------------------------------*/ -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 256 kB for malloc() */ #define CONFIG_PRAM 0 /* use pram variable to overwrite */ @@ -61,7 +65,7 @@ #define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000 #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_ADDR 0xd0000000 /* NAND Flash */ #define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */ #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE @@ -503,14 +507,6 @@ #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ #define CONFIG_SYS_NAND_QUIET_TEST 1 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/PN62.h b/include/configs/PN62.h index 562c5c3..01878ab 100644 --- a/include/configs/PN62.h +++ b/include/configs/PN62.h @@ -39,6 +39,8 @@ #define CONFIG_MPC8240 1 #define CONFIG_PN62 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_CONS_INDEX 1 @@ -148,7 +150,7 @@ #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00030000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -301,14 +303,4 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index f9b2014..3bc3d70 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -75,6 +75,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PPCHAMELEONEVB 1 /* ...on a PPChameleonEVB board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 /* Reserve 320 kB for Monitor */ + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -557,15 +559,6 @@ #define CONFIG_SYS_GPIO0_TSRH 0x00000000 #define CONFIG_SYS_GPIO0_TCR 0xF7FF8014 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define CONFIG_NO_SERIAL_EEPROM /*--------------------------------------------------------------------*/ diff --git a/include/configs/QS823.h b/include/configs/QS823.h index c1416cb..ec2e0c9 100644 --- a/include/configs/QS823.h +++ b/include/configs/QS823.h @@ -53,6 +53,8 @@ #define CONFIG_QS823 1 /* ...on a QS823 module */ #define CONFIG_SCC2_ENET 1 /* SCC2 10BaseT ethernet */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* Select the target clock speed */ #undef CONFIG_CLOCK_16MHZ /* cpu=16,777,216 Hz, mem=16Mhz */ #undef CONFIG_CLOCK_33MHZ /* cpu=33,554,432 Hz, mem=33Mhz */ @@ -563,14 +565,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_BR7_PRELIM 0xF0700000 /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Sanity checks */ #if defined(CONFIG_SCC1_ENET) && defined(CONFIG_FEC_ENET) diff --git a/include/configs/QS850.h b/include/configs/QS850.h index de74fee..3d455c4 100644 --- a/include/configs/QS850.h +++ b/include/configs/QS850.h @@ -53,6 +53,8 @@ #define CONFIG_QS850 1 /* ...on a QS850 module */ #define CONFIG_SCC2_ENET 1 /* SCC2 10BaseT ethernet */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* Select the target clock speed */ #undef CONFIG_CLOCK_16MHZ /* cpu=16,777,216 Hz, mem=16Mhz */ #undef CONFIG_CLOCK_33MHZ /* cpu=33,554,432 Hz, mem=33Mhz */ @@ -563,14 +565,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_BR7_PRELIM 0xF0700000 /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Sanity checks */ #if defined(CONFIG_SCC1_ENET) && defined(CONFIG_FEC_ENET) diff --git a/include/configs/QS860T.h b/include/configs/QS860T.h index 705d375..99ccf08 100644 --- a/include/configs/QS860T.h +++ b/include/configs/QS860T.h @@ -54,6 +54,9 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_QS860T 1 /* ...on a QS860T module */ +/* Start address of 512K Socketed Flash */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_FEC_ENET 1 /* FEC 10/100BaseT ethernet */ #define CONFIG_MII #define FEC_INTERRUPT SIU_LEVEL1 @@ -400,15 +403,6 @@ CONFIG_SPI /* #define CONFIG_SYS_OR7 0xFF000000 */ /* #define CONFIG_SYS_BR7 0xE8000000 */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* * Sanity checks */ diff --git a/include/configs/R360MPI.h b/include/configs/R360MPI.h index 830f4bc..a0355f1 100644 --- a/include/configs/R360MPI.h +++ b/include/configs/R360MPI.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_R360MPI 1 +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_LCD #undef CONFIG_EDT32F10 #define CONFIG_SHARP_LQ057Q3DC02 @@ -475,13 +477,4 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index 00ac6cf..5a23e56 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -39,6 +39,7 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_RBC823 1 /* ...on a RBC823 module */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 #if 0 #define DEBUG 1 @@ -406,15 +407,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* * JFFS2 partitions * diff --git a/include/configs/RPXClassic.h b/include/configs/RPXClassic.h index bec5278..e8e8a5d 100644 --- a/include/configs/RPXClassic.h +++ b/include/configs/RPXClassic.h @@ -42,6 +42,8 @@ #define CONFIG_MPC860 1 #define CONFIG_RPXCLASSIC 1 +#define CONFIG_SYS_TEXT_BASE 0xff000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -442,15 +444,6 @@ MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A12 | \ MAMR_GPL_A4DIS | MAMR_RLFA_4X | MAMR_WLFA_3X | MAMR_TLFA_16X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ /* Configuration variable added by yooth. */ /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ diff --git a/include/configs/RPXlite.h b/include/configs/RPXlite.h index dd9134d..a7609ca 100644 --- a/include/configs/RPXlite.h +++ b/include/configs/RPXlite.h @@ -39,6 +39,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_RPXLITE 1 +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -129,7 +131,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFC00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #ifdef CONFIG_BZIP2 #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve ~4 MB for malloc() */ @@ -335,15 +337,6 @@ MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A12 | \ MAMR_GPL_A4DIS | MAMR_RLFA_4X | MAMR_WLFA_3X | MAMR_TLFA_16X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ /* Configuration variable added by yooth. */ /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ diff --git a/include/configs/RPXlite_DW.h b/include/configs/RPXlite_DW.h index a59053c..b895f05 100644 --- a/include/configs/RPXlite_DW.h +++ b/include/configs/RPXlite_DW.h @@ -51,6 +51,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823e CPU. */ #define CONFIG_RPXLITE 1 /* RPXlite DW version board */ +#define CONFIG_SYS_TEXT_BASE 0xff000000 + #ifdef CONFIG_LCD /* with LCD controller ? */ #define CONFIG_SPLASH_SCREEN /* ... with splashscreen support*/ #endif @@ -414,14 +416,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10) /* CONFIG_SYS_MAMR_9COL:0x20904000 @ 64MHz */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ /* Configuration variable added by yooth. */ /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ diff --git a/include/configs/RPXsuper.h b/include/configs/RPXsuper.h index da962f3..2ac764d 100644 --- a/include/configs/RPXsuper.h +++ b/include/configs/RPXsuper.h @@ -1,6 +1,7 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x80F00000 /***************************************************************************** * @@ -34,7 +35,7 @@ #undef CONFIG_SYS_SBC_BOOT_LOW /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/sbc8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sbc8260/config.mk * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -504,12 +505,4 @@ ORxG_SCY_5_CLK |\ ORxG_TRLX) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/RRvision.h b/include/configs/RRvision.h index 6ec5be0..9530381 100644 --- a/include/configs/RRvision.h +++ b/include/configs/RRvision.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_RRVISION 1 /* ...on a RRvision board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_GCLK_FREQ 64000000 #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ @@ -468,12 +470,4 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/Rattler.h b/include/configs/Rattler.h index e630afe..cdfce6a 100644 --- a/include/configs/Rattler.h +++ b/include/configs/Rattler.h @@ -33,6 +33,8 @@ #define CPU_ID_STR "MPC8250" #endif /* CONFIG_MPC8248 */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_CPM2 1 /* Has a CPM2 */ #define CONFIG_RATTLER /* Analogue&Micro Rattler board */ @@ -220,7 +222,7 @@ */ #endif /* CONFIG_CMD_JFFS2 */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif @@ -262,9 +264,6 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index d6b3cb8..b91dc4b 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -34,7 +34,7 @@ /* * Top level Makefile configuration choices */ -#ifdef CONFIG_MK_66 +#ifdef CONFIG_66 #define CONFIG_PCI_66 #endif @@ -48,6 +48,8 @@ #define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ #define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */ +#define CONFIG_SYS_TEXT_BASE 0xfffc0000 + #define CONFIG_CPM2 1 /* has CPM2 */ @@ -324,7 +326,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if 0 /* XXX This doesn't work and I don't want to fix it */ @@ -420,14 +422,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/SCM.h b/include/configs/SCM.h index c6fb074..edad459 100644 --- a/include/configs/SCM.h +++ b/include/configs/SCM.h @@ -38,6 +38,8 @@ #define CONFIG_SCM 1 /* ...on a System Controller Module */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #if (CONFIG_TQM8260 <= 100) # error "TQM8260 module revison not supported" #endif @@ -247,7 +249,7 @@ /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/tqm8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/tqm8260/config.mk * The main FLASH is whichever is connected to *CS0. */ #define CONFIG_SYS_FLASH0_BASE 0x40000000 @@ -338,19 +340,10 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 9c8c318..15d99f9 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -36,6 +36,10 @@ #define CONFIG_MPC831x 1 #define CONFIG_MPC8313 1 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0x00100000 +#endif + #define CONFIG_PCI #define CONFIG_FSL_ELBC 1 @@ -91,7 +95,7 @@ */ #define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if !defined(CONFIG_NAND_SPL) #define CONFIG_SYS_RAMBOOT @@ -477,14 +481,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_OVERWRITE @@ -511,11 +507,11 @@ "ethprime=TSEC1\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=ae0000\0" \ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \ "console=ttyS0\0" \ diff --git a/include/configs/SM850.h b/include/configs/SM850.h index 56f03e2..259f8ab 100644 --- a/include/configs/SM850.h +++ b/include/configs/SM850.h @@ -38,6 +38,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_SM850 1 /*...on a MPC850 Service Module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -363,15 +365,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/SMN42.h b/include/configs/SMN42.h index adb6ac5..ba3ada1 100644 --- a/include/configs/SMN42.h +++ b/include/configs/SMN42.h @@ -198,6 +198,6 @@ #define CONFIG_INITRD_TAG #define CONFIG_MMC 1 /* we use this ethernet chip */ -#define CONFIG_ENC28J60 +#define CONFIG_ENC28J60_LPC2292 #endif /* __CONFIG_H */ diff --git a/include/configs/SPD823TS.h b/include/configs/SPD823TS.h index fa77882..b132a78 100644 --- a/include/configs/SPD823TS.h +++ b/include/configs/SPD823TS.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_SPD823TS 1 /* ...on a SPD823TS board */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ @@ -417,12 +419,4 @@ MBMR_AMB_TYPE_0 | MBMR_DSB_1_CYCL | MBMR_G0CLB_A11 | \ MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h index 8ee8cbf..7c3f874 100644 --- a/include/configs/SXNI855T.h +++ b/include/configs/SXNI855T.h @@ -64,6 +64,8 @@ #define CONFIG_MPC860T 1 #define CONFIG_MPC855T 1 +#define CONFIG_SYS_TEXT_BASE 0xF8000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_SCC1 @@ -372,13 +374,6 @@ #define DUART_BR5_VALUE ((CONFIG_SYS_DUARTA_BASE & BR_BA_MSK ) | DUART_BR_VALUE) #define DUART_BR6_VALUE ((CONFIG_SYS_DUARTB_BASE & BR_BA_MSK ) | DUART_BR_VALUE) -/********************************************************** - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_RESET_ON_PANIC /* reset if system panic() */ #define CONFIG_ENV_IS_IN_FLASH diff --git a/include/configs/Sandpoint8240.h b/include/configs/Sandpoint8240.h index 125b9a2..f6107ce 100644 --- a/include/configs/Sandpoint8240.h +++ b/include/configs/Sandpoint8240.h @@ -39,6 +39,8 @@ #define CONFIG_MPC8240 1 #define CONFIG_SANDPOINT 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #if 0 #define USE_DINK32 1 #else @@ -159,7 +161,7 @@ #else #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00030000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -400,16 +402,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 diff --git a/include/configs/Sandpoint8245.h b/include/configs/Sandpoint8245.h index 8cb920e..66a98c1 100644 --- a/include/configs/Sandpoint8245.h +++ b/include/configs/Sandpoint8245.h @@ -39,6 +39,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_SANDPOINT 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #if 0 #define USE_DINK32 1 #else @@ -129,7 +131,7 @@ #else #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00030000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -378,16 +380,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h index 7a6602c..ad86e2e 100644 --- a/include/configs/TB5200.h +++ b/include/configs/TB5200.h @@ -37,10 +37,18 @@ #define CONFIG_TQM5200 1 /* ... on TQM5200 module */ #define CONFIG_TB5200 1 /* ... on a TB5200 base board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low (standard configuration with room for + * max 64 MByte Flash ROM) + * 0xFFF00000 boot high (for a backup copy of U-Boot) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -132,7 +140,7 @@ #define CONFIG_TIMESTAMP /* display image timestamps */ -#if (TEXT_BASE == 0xFC000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -251,7 +259,7 @@ /* * Flash configuration */ -#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */ /* use CFI flash driver */ #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ @@ -329,7 +337,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/TK885D.h b/include/configs/TK885D.h index 7cefa32..d849dbc 100644 --- a/include/configs/TK885D.h +++ b/include/configs/TK885D.h @@ -40,6 +40,8 @@ #define CONFIG_TQM885D 1 /* ...on a TQM88D module */ #define CONFIG_TK885D 1 /* ...in a TK885D base board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */ #define CONFIG_SYS_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */ #define CONFIG_SYS_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */ @@ -484,14 +486,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Network configuration */ #define CONFIG_FEC_ENET /* enable ethernet on FEC */ diff --git a/include/configs/TOP5200.h b/include/configs/TOP5200.h index 50197f4..ab1773c 100644 --- a/include/configs/TOP5200.h +++ b/include/configs/TOP5200.h @@ -45,10 +45,15 @@ #define CONFIG_MPC5200 1 /* More exactly a MPC5200 */ #define CONFIG_TOP5200 1 /* ... on TOP5200 board - we need this for FEC.C */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * allowed and functional CONFIG_SYS_TEXT_BASE values: + * 0xff000000 low boot at 0x00000100 (default board setting) + * 0xfff00000 high boot at 0xfff00100 (board needs modification) + * 0x00100000 RAM load and test + */ +#define CONFIG_SYS_TEXT_BASE 0xff000000 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -138,11 +143,11 @@ /* * MUST be low boot - HIGHBOOT is not supported anymore */ -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #else -# error "TEXT_BASE must be 0xff000000" +# error "CONFIG_SYS_TEXT_BASE must be 0xff000000" #endif /* @@ -299,7 +304,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/TOP860.h b/include/configs/TOP860.h index b9e450d..a9d9bed 100644 --- a/include/configs/TOP860.h +++ b/include/configs/TOP860.h @@ -53,6 +53,9 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_MPC860T 1 /* even better... an FEC! */ #define CONFIG_TOP860 1 /* ...on a TOP860 module */ + +#define CONFIG_SYS_TEXT_BASE 0x80000000 + #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_IDENT_STRING " EMK TOP860" @@ -212,7 +215,7 @@ * adresses */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ /*----------------------------------------------------------------------- @@ -246,14 +249,6 @@ */ #define FEC_INTERRUPT SIU_LEVEL1 /* FEC interrupt */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- * Debug Enable Register *----------------------------------------------------------------------- diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index 107bff1..2612c7a 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -37,6 +37,17 @@ #define CONFIG_TQM5200 1 /* ... on TQM5200 module */ #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low (standard configuration with room for + * max 64 MByte Flash ROM) + * 0xFFF00000 boot high (for a backup copy of U-Boot) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif + /* On a Cameron or on a FO300 board or ... */ #if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300) #define CONFIG_STK52XX 1 /* ... on a STK52XX board */ @@ -44,9 +55,6 @@ #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -214,7 +222,7 @@ #define CONFIG_TIMESTAMP /* display image timestamps */ -#if (TEXT_BASE != 0xFFF00000) +#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000) # define CONFIG_SYS_LOWBOOT 1 /* Boot low */ #endif @@ -489,7 +497,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h index 372c76d..b68d7a7 100644 --- a/include/configs/TQM823L.h +++ b/include/configs/TQM823L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_TQM823L 1 /* ...on a TQM8xxL module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #ifdef CONFIG_LCD /* with LCD controller ? */ #define CONFIG_LCD_LOGO 1 /* print our logo on the LCD */ #define CONFIG_LCD_INFO 1 /* ... and some board info */ @@ -481,15 +483,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h index 64c9707..374300b 100644 --- a/include/configs/TQM823M.h +++ b/include/configs/TQM823M.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_TQM823M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #ifdef CONFIG_LCD /* with LCD controller ? */ /* #define CONFIG_NEC_NL6448BC20 1 / * use NEC NL6448BC20 display */ #endif @@ -477,15 +479,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/TQM8260.h b/include/configs/TQM8260.h index 582e670..2104e03 100644 --- a/include/configs/TQM8260.h +++ b/include/configs/TQM8260.h @@ -44,6 +44,8 @@ * (easy to change) */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_MPC8260 1 /* This is a MPC8260 CPU */ #if 0 @@ -279,7 +281,7 @@ /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/tqm8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/tqm8260/config.mk * The main FLASH is whichever is connected to *CS0. */ #define CONFIG_SYS_FLASH0_BASE 0x40000000 @@ -375,19 +377,10 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc()*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h index 12a7eda..063ca23 100644 --- a/include/configs/TQM8272.h +++ b/include/configs/TQM8272.h @@ -37,6 +37,8 @@ #define CONFIG_MPC8272_FAMILY 1 #define CONFIG_TQM8272 1 +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_GET_CPU_STR_F 1 /* Get the CPU ID STR */ #define CONFIG_BOARD_GET_CPU_CLK_F 1 /* Get the CLKIN from board fct */ @@ -357,7 +359,7 @@ /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/tqm8272/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/tqm8272/config.mk * The main FLASH is whichever is connected to *CS0. */ #define CONFIG_SYS_FLASH0_BASE 0x40000000 @@ -498,18 +500,10 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index d0c6a4d..36399ca 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -37,6 +37,8 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_TQM834X 1 /* TQM834X board specific */ +#define CONFIG_SYS_TEXT_BASE 0x80000000 + /* IMMR Base Addres Register, use Freescale default: 0xff400000 */ #define CONFIG_SYS_IMMR 0xff400000 @@ -139,7 +141,7 @@ /* * Monitor config */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT @@ -458,14 +460,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h index bf6ecce..c97bf66 100644 --- a/include/configs/TQM850L.h +++ b/include/configs/TQM850L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_TQM850L 1 /* ...on a TQM8xxL module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -466,15 +468,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h index 7442452..3e13f61 100644 --- a/include/configs/TQM850M.h +++ b/include/configs/TQM850M.h @@ -36,6 +36,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_TQM850M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -466,15 +468,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h index 5bf8f02..1bc2861 100644 --- a/include/configs/TQM855L.h +++ b/include/configs/TQM855L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC855 1 /* This is a MPC855 CPU */ #define CONFIG_TQM855L 1 /* ...on a TQM8xxL module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -470,15 +472,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h index 456ed7e..197ffde 100644 --- a/include/configs/TQM855M.h +++ b/include/configs/TQM855M.h @@ -36,6 +36,8 @@ #define CONFIG_MPC855 1 /* This is a MPC855 CPU */ #define CONFIG_TQM855M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -505,15 +507,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index ccb339d..59655b1 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -41,6 +41,12 @@ #define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */ +#if defined(CONFIG_TQM8548_BE) +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#else +#define CONFIG_SYS_TEXT_BASE 0xfffc0000 +#endif + #if defined(CONFIG_TQM8548_AG) || defined(CONFIG_TQM8548_BE) #define CONFIG_TQM8548 #endif @@ -75,7 +81,7 @@ * NAND flash support (disabled by default) * * Warning: NAND support will likely increase the U-Boot image size - * to more than 256 KB. Please adjust TEXT_BASE if necessary. + * to more than 256 KB. Please adjust CONFIG_SYS_TEXT_BASE if necessary. */ #ifdef CONFIG_TQM8548_BE #define CONFIG_NAND @@ -219,7 +225,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ /* * Note: when changing the Local Bus clock divider you have to @@ -243,7 +249,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_LEN (~TEXT_BASE + 1)/* Reserved for Monitor */ +#define CONFIG_SYS_MONITOR_LEN (~CONFIG_SYS_TEXT_BASE + 1)/* Reserved for Monitor */ #define CONFIG_SYS_MALLOC_LEN (384 * 1024) /* Reserved for malloc */ /* Serial Port */ @@ -623,14 +629,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -659,7 +657,7 @@ MK_STR(CONFIG_HOSTNAME)".dtb\0" #define CONFIG_ENV_BOOTFILE "bootfile="MK_STR(CONFIG_HOSTNAME)"/uImage\0" #define CONFIG_ENV_UBOOT "uboot="MK_STR(CONFIG_HOSTNAME)"/u-boot.bin\0" \ - "uboot_addr="MK_STR(TEXT_BASE)"\0" + "uboot_addr="MK_STR(CONFIG_SYS_TEXT_BASE)"\0" #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_ENV_BOOTFILE \ diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h index 94b9a3b..d3d0db4 100644 --- a/include/configs/TQM860L.h +++ b/include/configs/TQM860L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_TQM860L 1 /* ...on a TQM8xxL module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -469,15 +471,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h index ce5e691..0854d95 100644 --- a/include/configs/TQM860M.h +++ b/include/configs/TQM860M.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_TQM860M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -474,14 +476,6 @@ MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A9 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h index d77df9c..c247737 100644 --- a/include/configs/TQM862L.h +++ b/include/configs/TQM862L.h @@ -39,6 +39,8 @@ #define CONFIG_TQM862L 1 /* ...on a TQM8xxL module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -474,15 +476,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_NET_MULTI #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h index a6c465b..1b6d9cb 100644 --- a/include/configs/TQM862M.h +++ b/include/configs/TQM862M.h @@ -39,6 +39,8 @@ #define CONFIG_TQM862M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -475,15 +477,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_NET_MULTI #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index 9ec815c..a5018d5 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -36,6 +36,8 @@ #define CONFIG_MPC866 1 /* This is a MPC866 CPU */ #define CONFIG_TQM866M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */ #define CONFIG_SYS_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */ #define CONFIG_SYS_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */ @@ -496,14 +498,6 @@ MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A9 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/TQM885D.h b/include/configs/TQM885D.h index c715c07..507fb2f 100644 --- a/include/configs/TQM885D.h +++ b/include/configs/TQM885D.h @@ -39,6 +39,8 @@ #define CONFIG_MPC885 1 /* This is a MPC885 CPU */ #define CONFIG_TQM885D 1 /* ...on a TQM88D module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */ #define CONFIG_SYS_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */ #define CONFIG_SYS_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */ @@ -482,14 +484,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Network configuration */ #define CONFIG_SCC2_ENET /* enable ethernet on SCC2 */ diff --git a/include/configs/Total5200.h b/include/configs/Total5200.h index 7510ab1..c518d6e 100644 --- a/include/configs/Total5200.h +++ b/include/configs/Total5200.h @@ -44,10 +44,17 @@ #define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */ #define CONFIG_TOTAL5200 1 /* ... on Total5200 board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0xFE000000 boot low + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -132,7 +139,7 @@ #define CONFIG_CMD_USB -#if (TEXT_BASE == 0xFE000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -245,7 +252,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index b9ea610..026d2a4 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_VOH405 1 /* ...on a VOH405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -257,7 +259,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFF80000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (2 * 1024*1024) /* Reserve 2 MB for malloc() */ @@ -409,14 +411,6 @@ #define CONFIG_SYS_EEPROM_WP (0x80000000 >> 0) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index a88b41a..fddefb2 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -35,6 +35,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_VOM405 1 /* ...on a VOM405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC8000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -183,8 +185,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (256 * 1024) #if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) @@ -287,14 +289,6 @@ #define CONFIG_SYS_GPIO0_TCR 0xF7FE0014 /* 0 ... 31 */ /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/VoVPN-GW.h b/include/configs/VoVPN-GW.h index 3614184..6243afe 100644 --- a/include/configs/VoVPN-GW.h +++ b/include/configs/VoVPN-GW.h @@ -29,6 +29,8 @@ /* define busmode: 8260 */ #undef CONFIG_BUSMODE_60x +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + /* system clock rate (CLKIN) - equal to the 60x and local bus speed */ #ifdef CONFIG_CLKIN_66MHz #define CONFIG_8260_CLKIN 66666666 /* in Hz */ @@ -308,15 +310,11 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE (32*1024*1024) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_FLASH (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_OFFSET) #define CONFIG_SYS_MONITOR_LEN 0x00020000 #define CONFIG_SYS_MALLOC_LEN 0x00020000 -/* boot flags */ -#define BOOTFLAG_COLD 0x01 /* normal power-on */ -#define BOOTFLAG_WARM 0x02 /* software reboot */ - /* cache configuration */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* for MPC8260 */ #if defined(CONFIG_CMD_KGDB) diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index 0fbe80c..9eacd82 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -38,6 +38,8 @@ #define CONFIG_W7O 1 /* ...on a Wave 7 Optics board */ #define CONFIG_W7OLMC 1 /* ...specifically an LMC */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_F 1 /* and misc_init_f() */ #define CONFIG_MISC_INIT_R 1 /* and misc_init_r() */ @@ -316,15 +318,6 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index f12fa55..6591d02 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -38,6 +38,8 @@ #define CONFIG_W7O 1 /* ...on a Wave 7 Optics board */ #define CONFIG_W7OLMG 1 /* ...specifically an LMG */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_F 1 /* and misc_init_f() */ #define CONFIG_MISC_INIT_R 1 /* and misc_init_r() */ @@ -319,15 +321,6 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index 34a5fff..e23ad41 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -38,6 +38,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_WUH405 1 /* ...on a WUH405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -348,14 +350,6 @@ #define CONFIG_SYS_DUART_RST (0x80000000 >> 14) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/XPEDITE1000.h b/include/configs/XPEDITE1000.h index 8b47862..5605849 100644 --- a/include/configs/XPEDITE1000.h +++ b/include/configs/XPEDITE1000.h @@ -39,6 +39,8 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /* * DDR config */ @@ -52,7 +54,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ #define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */ #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */ @@ -247,12 +249,6 @@ extern void out32(unsigned int, unsigned long); #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ /* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_IS_IN_FLASH 1 @@ -269,7 +265,7 @@ extern void out32(unsigned int, unsigned long); * ff000000 - ffbfffff OS Use/Filesystem (12MB) */ -#define CONFIG_UBOOT_ENV_ADDR MK_STR(TEXT_BASE) +#define CONFIG_UBOOT_ENV_ADDR MK_STR(CONFIG_SYS_TEXT_BASE) #define CONFIG_FDT_ENV_ADDR MK_STR(0xfff00000) #define CONFIG_OS_ENV_ADDR MK_STR(0xffc00000) diff --git a/include/configs/XPEDITE5170.h b/include/configs/XPEDITE5170.h index 8770a8d..1851997 100644 --- a/include/configs/XPEDITE5170.h +++ b/include/configs/XPEDITE5170.h @@ -36,9 +36,12 @@ #define CONFIG_SYS_BOARD_NAME "XPedite5170" #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #define CONFIG_ALTIVEC 1 +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ @@ -151,7 +154,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff00000, 0xc0000}, \ {0xf7f00000, 0xc0000} } -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ /* @@ -491,7 +494,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); BATL_PP_RW |\ BATL_CACHEINHIBIT |\ BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE |\ +#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE |\ BATU_BL_1M |\ BATU_VS |\ BATU_VP) @@ -575,12 +578,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ /* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_IS_IN_FLASH 1 diff --git a/include/configs/XPEDITE5200.h b/include/configs/XPEDITE5200.h index 1fbe4fb..d0e9492 100644 --- a/include/configs/XPEDITE5200.h +++ b/include/configs/XPEDITE5200.h @@ -38,6 +38,10 @@ #define CONFIG_SYS_BOARD_NAME "XPedite5200" #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#endif + #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ @@ -130,7 +134,7 @@ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xfbf40000, 0xc0000} } -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ /* * Chip select configuration @@ -370,12 +374,6 @@ #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ /* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_IS_IN_FLASH 1 diff --git a/include/configs/XPEDITE5370.h b/include/configs/XPEDITE5370.h index 8225fff..629dc0d 100644 --- a/include/configs/XPEDITE5370.h +++ b/include/configs/XPEDITE5370.h @@ -38,6 +38,10 @@ #define CONFIG_SYS_BOARD_NAME "XPedite5370" #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#endif + #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ @@ -151,7 +155,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xf7f40000, 0xc0000} } -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ /* * Chip select configuration @@ -427,12 +431,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ /* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_IS_IN_FLASH 1 diff --git a/include/configs/Yukon8220.h b/include/configs/Yukon8220.h index c439068..a0fca03 100644 --- a/include/configs/Yukon8220.h +++ b/include/configs/Yukon8220.h @@ -31,6 +31,9 @@ #define CONFIG_MPC8220 1 #define CONFIG_YUKON8220 1 /* ... on Yukon board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* Input clock running at 30Mhz, read Hid1 for the CPU multiplier to @@ -38,9 +41,6 @@ #define CONFIG_SYS_MPC8220_CLKIN 30000000/* ... running at 30MHz */ #define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 16 /* VCO multiplier can't be read from any register */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* * Serial console configuration */ @@ -263,7 +263,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/ZPC1900.h b/include/configs/ZPC1900.h index 8ae765c..0eabf37 100644 --- a/include/configs/ZPC1900.h +++ b/include/configs/ZPC1900.h @@ -29,6 +29,9 @@ #define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */ #define CONFIG_ZPC1900 1 /* ...on Zephyr ZPC.1900 board */ + +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CPU_ID_STR "MPC8265" #define CONFIG_CPM2 1 /* Has a CPM2 */ @@ -212,10 +215,8 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif diff --git a/include/configs/ZUMA.h b/include/configs/ZUMA.h index fcc47a9..17ada0d 100644 --- a/include/configs/ZUMA.h +++ b/include/configs/ZUMA.h @@ -41,6 +41,8 @@ #define CONFIG_EVB64260 1 /* this is an EVB64260 board */ #define CONFIG_ZUMA_V2 1 /* always define this for ZUMA v2 */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + /* #define CONFIG_ZUMA_V2_OLD 1 */ /* backwards compat for old V2 board */ #define CONFIG_BAUDRATE 38400 /* console baudrate = 38400 */ @@ -387,12 +389,4 @@ */ #define CONFIG_GT_I2C -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/a4m072.h b/include/configs/a4m072.h new file mode 100644 index 0000000..6dcebe6 --- /dev/null +++ b/include/configs/a4m072.h @@ -0,0 +1,384 @@ +/* + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2010 + * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ + +#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ +#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */ +#define CONFIG_A4M072 1 /* ... on A4M072 board */ +#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ + +#define CONFIG_MISC_INIT_R + +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ + +#define CONFIG_HIGH_BATS 1 /* High BATs supported */ + +/* + * Serial console configuration + */ +#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ +#define CONFIG_BAUDRATE 9600 /* ... at 9600 bps */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } +/* define to enable silent console */ +#define CONFIG_SILENT_CONSOLE +#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */ + +/* + * PCI Mapping: + * 0x40000000 - 0x4fffffff - PCI Memory + * 0x50000000 - 0x50ffffff - PCI IO Space + */ +#define CONFIG_PCI + +#if defined(CONFIG_PCI) +#define CONFIG_PCI_PNP 1 +#define CONFIG_PCI_SCAN_SHOW 1 +#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 + +#define CONFIG_PCI_MEM_BUS 0x40000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x10000000 + +#define CONFIG_PCI_IO_BUS 0x50000000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0x01000000 +#endif + +#define CONFIG_SYS_XLB_PIPELINING 1 + +#undef CONFIG_NET_MULTI +#undef CONFIG_EEPRO100 + +/* Partitions */ +#define CONFIG_MAC_PARTITION +#define CONFIG_DOS_PARTITION + +/* USB */ +#define CONFIG_USB_OHCI_NEW +#define CONFIG_USB_STORAGE +#define CONFIG_SYS_OHCI_BE_CONTROLLER +#undef CONFIG_SYS_USB_OHCI_BOARD_INIT +#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 + +#define CONFIG_TIMESTAMP /* Print image info with timestamp */ + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IDE +#define CONFIG_CMD_NFS +#define CONFIG_CMD_SNTP +#define CONFIG_CMD_USB +#define CONFIG_CMD_MII +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_CMD_DISPLAY + +#if defined(CONFIG_PCI) +#define CONFIG_CMD_PCI +#endif + +#if (TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */ +#define CONFIG_SYS_LOWBOOT 1 +#define CONFIG_SYS_LOWBOOT32 1 +#endif + +/* + * Autobooting + */ +#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ + +#define CONFIG_SYS_AUTOLOAD "n" + +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay +#define CONFIG_AUTOBOOT_DELAY_STR "asdfg" + +#undef CONFIG_BOOTARGS +#define CONFIG_PREBOOT "run try_update" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bk=run add_mtd ; run add_consolespec ; bootm 200000\0" \ + "cf1=diskboot 200000 0:1\0" \ + "bootcmd_cf1=run bcf1\0" \ + "bcf=setenv bootargs root=/dev/hda3\0" \ + "bootcmd_nfs=run bnfs\0" \ + "norargs=setenv bootargs root=/dev/mtdblock3 rootfstype=cramfs\0" \ + "bootcmd_nor=cp.b ${kernel_addr} 200000 100000; run norargs addip; run bk\0" \ + "bnfs=nfs 200000 ${rootpath}/boot/uImage ; run nfsargs addip ; run bk\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath}\0" \ + "try_update=usb start;sleep 2;usb start;sleep 1;fatload usb 0 2F0000 PCPUUPDT 2FF;usb stop;source 2F0000\0" \ + "env_addr=FE060000\0" \ + "kernel_addr=FE100000\0" \ + "rootfs_addr=FE200000\0" \ + "add_mtd=setenv bootargs ${bootargs} mtdparts=phys_mapped_flash:384k(u),640k(e),1m(k),30m(r)\0" \ + "bcf1=run cf1; run bcf; run addip; run bk\0" \ + "add_consolespec=setenv bootargs ${bootargs} console=/dev/null quiet\0" \ + "addip=if test \"${ethaddr}\" != \"00:00:00:00:00:00\" ; then if test -n ${ipaddr}; then setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off panic=1; fi ; fi\0" \ + "hostname=CPUP0\0" \ + "ethaddr=00:00:00:00:00:00\0" \ + "netdev=eth0\0" \ + "bootcmd=run bootcmd_nor\0" \ + "" +/* + * IPB Bus clocking configuration. + */ +#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ + +/* + * I2C configuration + */ +#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ +#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */ + +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ +#define CONFIG_SYS_I2C_SLAVE 0x7F + +/* + * EEPROM configuration + */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010010x */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 +#define CONFIG_SYS_EEPROM_WREN 1 +#define CONFIG_SYS_EEPROM_WP GPIO_PSC2_4 + +/* + * Flash configuration + */ +#define CONFIG_SYS_FLASH_BASE 0xFE000000 +#define CONFIG_SYS_FLASH_SIZE 0x02000000 +#if !defined(CONFIG_SYS_LOWBOOT) +#error "CONFIG_SYS_LOWBOOT not defined?" +#else /* CONFIG_SYS_LOWBOOT */ +#if defined(CONFIG_SYS_LOWBOOT32) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000) +#endif +#endif /* CONFIG_SYS_LOWBOOT */ + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_CS0_START} + +/* + * Environment settings + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +#define CONFIG_ENV_OVERWRITE 1 + +/* + * Memory map + */ +#define CONFIG_SYS_MBAR 0xF0000000 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 + +/* Use SRAM until RAM will be available */ +#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM +#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ + + +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) +# define CONFIG_SYS_RAMBOOT 1 +#endif + +#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */ +#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +/* + * Ethernet configuration + */ +#define CONFIG_MPC5xxx_FEC 1 +#define CONFIG_MPC5xxx_FEC_MII100 +/* + * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb + */ +/* #define CONFIG_MPC5xxx_FEC_MII10 */ +#define CONFIG_PHY_ADDR 0x1f +#define CONFIG_PHY_TYPE 0x79c874 /* AMD Phy Controller */ + +/* + * GPIO configuration + */ +#define CONFIG_SYS_GPS_PORT_CONFIG 0x18000004 + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_CMDLINE_EDITING 1 +#ifdef CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#endif +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ + +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ + +#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ +#if defined(CONFIG_CMD_KGDB) +# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ +#endif + + +/* + * Various low-level settings + */ +#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI +#define CONFIG_SYS_HID0_FINAL HID0_ICE +/* Flash at CSBoot, CS0 */ +#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE +#define CONFIG_SYS_BOOTCS_CFG 0x0002DD00 +#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE +/* External SRAM at CS1 */ +#define CONFIG_SYS_CS1_START 0x62000000 +#define CONFIG_SYS_CS1_SIZE 0x00400000 +#define CONFIG_SYS_CS1_CFG 0x00009930 +#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_CS1_START +#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_CS1_SIZE +/* LED display at CS7 */ +#define CONFIG_SYS_CS7_START 0x6a000000 +#define CONFIG_SYS_CS7_SIZE (64*1024) +#define CONFIG_SYS_CS7_CFG 0x0000bf30 + +#define CONFIG_SYS_CS_BURST 0x00000000 +#define CONFIG_SYS_CS_DEADCYCLE 0x33333003 + +#define CONFIG_SYS_RESET_ADDRESS 0xff000000 + +/*----------------------------------------------------------------------- + * USB stuff + *----------------------------------------------------------------------- + */ +#define CONFIG_USB_CLOCK 0x0001BBBB +#define CONFIG_USB_CONFIG 0x00001000 /* 0x4000 for SE mode */ + +/*----------------------------------------------------------------------- + * IDE/ATA stuff Supports IDE harddisk + *----------------------------------------------------------------------- + */ + +#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ + +#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ +#undef CONFIG_IDE_LED /* LED for ide not supported */ + +#define CONFIG_IDE_PREINIT + +#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ +#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */ + +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 + +#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA + +/* Offset for data I/O */ +#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060) + +/* Offset for normal register accesses */ +#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET) + +/* Offset for alternate registers */ +#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C) + +/* Interval between registers */ +#define CONFIG_SYS_ATA_STRIDE 4 + +#define CONFIG_ATAPI 1 + +/*----------------------------------------------------------------------- + * Open firmware flat tree support + *----------------------------------------------------------------------- + */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#define OF_CPU "PowerPC,5200@0" +#define OF_SOC "soc5200@f0000000" +#define OF_TBCLK (bd->bi_busfreq / 4) +#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000" + +/* Support for the 7-segment display */ +#define CONFIG_SYS_DISP_CHR_RAM CONFIG_SYS_CS7_START +#define CONFIG_SHOW_ACTIVITY /* used for display realization */ + +#define CONFIG_SHOW_BOOT_PROGRESS + +#endif /* __CONFIG_H */ diff --git a/include/configs/acadia.h b/include/configs/acadia.h index 39f85ae..c1bd4be 100644 --- a/include/configs/acadia.h +++ b/include/configs/acadia.h @@ -35,6 +35,10 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EZ 1 /* Specifc 405EZ support*/ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/aev.h b/include/configs/aev.h index 54e6c57..10ffb2e 100644 --- a/include/configs/aev.h +++ b/include/configs/aev.h @@ -41,10 +41,18 @@ #define CONFIG_AEVFIFO 1 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low (standard configuration with room for + * max 64 MByte Flash ROM) + * 0xFFF00000 boot high (for a backup copy of U-Boot) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* * Serial console configuration @@ -128,7 +136,7 @@ #define CONFIG_TIMESTAMP /* display image timestamps */ -#if (TEXT_BASE == 0xFC000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -221,7 +229,7 @@ /* * Flash configuration */ -#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */ /* use CFI flash driver if no module variant is spezified */ #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ @@ -273,7 +281,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 7038291..dfe7802 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -33,6 +33,9 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_LAST_STAGE_INIT 1 /* call last_stage_init() */ + +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ #define CONFIG_4xx_DCACHE /* Enable i- and d-cache */ @@ -362,14 +365,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index 9c53d37..b9f1f6b 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -24,7 +24,7 @@ #define __AMCC_COMMON_H #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ #define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1) #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* Reserved for malloc */ diff --git a/include/configs/aria.h b/include/configs/aria.h index c5a3feb..a63c453 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -51,6 +51,8 @@ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ #define CONFIG_FSL_DIU_LOGO_BMP 1 /* Don't include FSL DIU binary bmp */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* video */ #undef CONFIG_VIDEO @@ -305,7 +307,7 @@ CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (384 * 1024) #ifdef CONFIG_FSL_DIU_FB @@ -525,14 +527,6 @@ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/assabet.h b/include/configs/assabet.h index d17d4bd..58cdbd5 100644 --- a/include/configs/assabet.h +++ b/include/configs/assabet.h @@ -140,7 +140,7 @@ #define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */ #define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */ #if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 7c8281c..f2bc26a 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -69,17 +69,17 @@ #include <config_cmd_default.h> /* - * CONFIG_MK_RAM defines if u-boot is loaded via BDM (or started from + * CONFIG_RAM defines if u-boot is loaded via BDM (or started from * a different bootloader that has already performed RAM setup) or * started directly from flash, which is the regular case for production * boards. */ -#ifdef CONFIG_MK_RAM +#ifdef CONFIG_RAM #define CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_TEXT_BASE 0x40020000 +#define CONFIG_SYS_TEXT_BASE 0x40020000 #define ENABLE_JFFS 0 #else -#define CONFIG_TEXT_BASE 0x00000000 +#define CONFIG_SYS_TEXT_BASE 0x00000000 #define ENABLE_JFFS 1 #endif @@ -343,7 +343,7 @@ #define CONFIG_SYS_FLASH_BASE 0x00000000 #ifdef CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_SYS_MONITOR_BASE CONFIG_TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #else /* This is mainly used during relocation in start.S */ #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) diff --git a/include/configs/atc.h b/include/configs/atc.h index 24015b7..62e38e1 100644 --- a/include/configs/atc.h +++ b/include/configs/atc.h @@ -37,6 +37,8 @@ #define CONFIG_ATC 1 /* ...on a ATC board */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + /* * select serial console configuration * @@ -256,7 +258,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_MAX_SIZE 0x08000000 /* max. 128 MB */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -280,14 +282,6 @@ #define CONFIG_ENV_SIZE 2048 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-byte page size */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- * Cache Configuration diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h index 18276c5..1bdfd9d 100644 --- a/include/configs/bamboo.h +++ b/include/configs/bamboo.h @@ -36,6 +36,10 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/barco.h b/include/configs/barco.h index b1af701..b656c01 100644 --- a/include/configs/barco.h +++ b/include/configs/barco.h @@ -62,6 +62,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_BARCOBCD_STREAMING 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #undef USE_DINK32 #define CONFIG_CONS_INDEX 3 /* set to '3' for on-chip DUART */ @@ -156,7 +158,7 @@ #else #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00030000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -353,15 +355,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h index 54fc063..fa9053b 100644 --- a/include/configs/bf527-ezkit.h +++ b/include/configs/bf527-ezkit.h @@ -154,7 +154,7 @@ /* * Video Settings */ -#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1 +#ifdef CONFIG_BF527_EZKIT_REV_2_1 # define CONFIG_LQ035Q1_SPI_BUS 0 # define CONFIG_LQ035Q1_SPI_CS 7 #endif diff --git a/include/configs/bluestone.h b/include/configs/bluestone.h index 560c64f..0bb97d9 100644 --- a/include/configs/bluestone.h +++ b/include/configs/bluestone.h @@ -31,6 +31,11 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h index 3e64492..7262b3e 100644 --- a/include/configs/bubinga.h +++ b/include/configs/bubinga.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_BUBINGA 1 /* ...on a BUBINGA board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/c2mon.h b/include/configs/c2mon.h index 4508d75..1351f29 100644 --- a/include/configs/c2mon.h +++ b/include/configs/c2mon.h @@ -36,6 +36,8 @@ #define CONFIG_MPC855 1 /* This is a MPC855 CPU */ #define CONFIG_C2MON 1 /* ...on a C2MON module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_80MHz 1 /* Running at 5 * 16 = 80 MHz */ #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ @@ -417,13 +419,4 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/canmb.h b/include/configs/canmb.h index 1f275e5..e1ee158 100644 --- a/include/configs/canmb.h +++ b/include/configs/canmb.h @@ -33,10 +33,14 @@ #define CONFIG_MPC5200 1 /* More exactly a MPC5200 */ #define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * allowed and functional CONFIG_SYS_TEXT_BASE values: + * 0xfe000000 low boot at 0x00000100 (default board setting) + * 0x00100000 RAM load and test + */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_BOARD_EARLY_INIT_R @@ -77,11 +81,11 @@ /* * MUST be low boot - HIGHBOOT is not supported anymore */ -#if (TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #else -# error "TEXT_BASE must be 0xFE000000" +# error "CONFIG_SYS_TEXT_BASE must be 0xFE000000" #endif /* @@ -160,7 +164,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index 51087f7..fcc7d0e 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -48,6 +48,10 @@ #define CONFIG_440 1 #define CONFIG_4xx 1 /* ... PPC4xx family */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h index 72cf941..1b129a2 100644 --- a/include/configs/cm5200.h +++ b/include/configs/cm5200.h @@ -31,6 +31,8 @@ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_CM5200 1 /* ... on CM5200 platform */ +#define CONFIG_SYS_TEXT_BASE 0xfc000000 + #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -169,7 +171,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* 256 kB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */ @@ -317,9 +319,6 @@ #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI #define CONFIG_SYS_HID0_FINAL HID0_ICE -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_XLB_PIPELINING 1 /* enable transaction pipeling */ /* diff --git a/include/configs/cmi_mpc5xx.h b/include/configs/cmi_mpc5xx.h index c3c603b..88a45c3 100644 --- a/include/configs/cmi_mpc5xx.h +++ b/include/configs/cmi_mpc5xx.h @@ -38,6 +38,8 @@ #define CONFIG_MPC555 1 /* This is an MPC555 CPU */ #define CONFIG_CMI 1 /* Using the customized cmi board */ +#define CONFIG_SYS_TEXT_BASE 0x02000000 /* Boot from flash at location 0x00000000 */ + /* Serial Console Configuration */ #define CONFIG_5xx_CONS_SCI1 #undef CONFIG_5xx_CONS_SCI2 @@ -142,7 +144,7 @@ #define ANYBUS_BASE 0x03010000 /* Anybus Module */ #define CONFIG_SYS_RESET_ADRESS 0x01000000 /* Adress which causes reset */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* TEXT_BASE is defined in the board config.mk file. */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* CONFIG_SYS_TEXT_BASE is defined in the board config.mk file. */ /* This adress is given to the linker with -Ttext to */ /* locate the text section at this adress. */ #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ @@ -267,13 +269,4 @@ */ #define CONFIG_SYS_DER 0x00000000 - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 330e3ac..18710fb 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -107,7 +107,7 @@ * * Setting #if 0: u-boot will start from flash and relocate itself to RAM * - * Please do not forget to modify the setting of TEXT_BASE + * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) * * --- diff --git a/include/configs/cogent_mpc8260.h b/include/configs/cogent_mpc8260.h index 566565a..8bfd702 100644 --- a/include/configs/cogent_mpc8260.h +++ b/include/configs/cogent_mpc8260.h @@ -37,6 +37,8 @@ #define CONFIG_COGENT 1 /* using Cogent Modular Architecture */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ #define CONFIG_MISC_INIT_R /* Use misc_init_r() */ @@ -238,7 +240,7 @@ #else #define CONFIG_SYS_FLASH_BASE CMA_MB_FLASH_BASE /* flash on m/b */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -368,7 +370,7 @@ * (the *_SIZE vars must be a power of 2) */ -#define CONFIG_SYS_CMA_CS0_BASE TEXT_BASE /* EPROM */ +#define CONFIG_SYS_CMA_CS0_BASE CONFIG_SYS_TEXT_BASE /* EPROM */ #define CONFIG_SYS_CMA_CS0_SIZE (1 << 20) #if 0 #define CONFIG_SYS_CMA_CS2_BASE 0x10000000 /* Local Bus SDRAM */ @@ -407,13 +409,4 @@ #endif #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/cogent_mpc8xx.h b/include/configs/cogent_mpc8xx.h index 750c0df..3cc95b4 100644 --- a/include/configs/cogent_mpc8xx.h +++ b/include/configs/cogent_mpc8xx.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is an MPC860 CPU */ #define CONFIG_COGENT 1 /* using Cogent Modular Architecture */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ #define CONFIG_MISC_INIT_R /* Use misc_init_r() */ @@ -185,7 +187,7 @@ #else #define CONFIG_SYS_FLASH_BASE CMA_MB_FLASH_BASE /* flash on m/b */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -310,7 +312,7 @@ * (the *_SIZE vars must be a power of 2) */ -#define CONFIG_SYS_CMA_CS0_BASE TEXT_BASE /* EPROM */ +#define CONFIG_SYS_CMA_CS0_BASE CONFIG_SYS_TEXT_BASE /* EPROM */ #define CONFIG_SYS_CMA_CS0_SIZE (1 << 20) #define CONFIG_SYS_CMA_CS1_BASE CMA_MB_RAM_BASE /* RAM + I/O SLOT 1 */ #define CONFIG_SYS_CMA_CS1_SIZE (64 << 20) @@ -364,13 +366,4 @@ #define CONFIG_SYS_OR3_PRELIM ((~(CONFIG_SYS_CMA_CS3_SIZE-1)&OR_AM_MSK)|OR_BI|OR_SETA) #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 9184eeb..c021d82 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -240,7 +240,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 @@ -587,14 +587,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -619,7 +611,7 @@ "bank_intlv=cs0_cs1\0" \ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" MK_STR(TEXT_BASE) "\0" \ + "ubootaddr=" MK_STR(CONFIG_SYS_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ "erase $ubootaddr +$filesize && " \ diff --git a/include/configs/cpci5200.h b/include/configs/cpci5200.h index f7290d6..a865296 100644 --- a/include/configs/cpci5200.h +++ b/include/configs/cpci5200.h @@ -45,10 +45,11 @@ #define CONFIG_CPCI5200 1 /* ... on CPCI5200 board */ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */ +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -126,11 +127,11 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_DATE -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #endif -#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT08 1 #endif @@ -240,7 +241,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/csb272.h b/include/configs/csb272.h index 7108210..acd9c93 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -40,6 +40,8 @@ #define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */ #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * OS Bootstrap configuration * @@ -251,7 +253,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFE000000 #define CONFIG_SYS_FLASH_SIZE 0x02000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KB for malloc() */ @@ -303,13 +305,4 @@ #define CONFIG_SYS_I2C_PLL_ADDR 0x58 /* I2C address of AMIS FS6377-01 PLL */ #define CONFIG_I2CFAST 1 /* enable "i2cfast" env. setting */ -/* - * Internal Definitions - * - * Boot Flags - * - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/csb472.h b/include/configs/csb472.h index 7b9f29a..69abb16 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -40,6 +40,8 @@ #define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */ #define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * OS Bootstrap configuration * @@ -250,7 +252,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFF800000 #define CONFIG_SYS_FLASH_SIZE 0x00800000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KB for malloc() */ @@ -301,13 +303,4 @@ */ #define CONFIG_I2CFAST 1 /* enable "i2cfast" env. setting */ -/* - * Internal Definitions - * - * Boot Flags - * - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index e0a3bae..7bf6336 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -26,6 +26,7 @@ /* * Board */ +#define CONFIG_DRIVER_TI_EMAC /* * SoC Configuration @@ -79,6 +80,43 @@ #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ /* + * Flash & Environment + */ +#ifdef CONFIG_USE_NAND +#undef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ +#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST +#define CONFIG_SYS_NAND_PAGE_2K +#define CONFIG_SYS_NAND_CS 3 +#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE +#define CONFIG_SYS_CLE_MASK 0x10 +#define CONFIG_SYS_ALE_MASK 0x8 +#undef CONFIG_SYS_NAND_HW_ECC +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define NAND_MAX_CHIPS 1 +#define DEF_BOOTM "" +#endif + +/* + * Network & Ethernet Configuration + */ +#ifdef CONFIG_DRIVER_TI_EMAC +#define CONFIG_EMAC_MDIO_PHY_NUM 0 +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI +#endif + +/* * U-Boot general configuration */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ @@ -100,7 +138,7 @@ /* * Linux Information */ -#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) +#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_BOOTARGS \ @@ -127,6 +165,20 @@ #undef CONFIG_CMD_PING #endif +#ifdef CONFIG_USE_NAND +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_NAND + +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_LZO +#define CONFIG_RBTREE +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#endif + #if !defined(CONFIG_USE_NAND) && \ !defined(CONFIG_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH) diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 4c01844..1746495 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -118,6 +118,7 @@ #define CONFIG_SYS_NAND_CS 2 #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_OVERWRITE /* instead if obsoleted forceenv() */ #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */ #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h index b439c80..d8c9362 100644 --- a/include/configs/dbau1x00.h +++ b/include/configs/dbau1x00.h @@ -186,7 +186,7 @@ #define CONFIG_FLASH_CFI_DRIVER 1 /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/debris.h b/include/configs/debris.h index dc59df9..188061e 100644 --- a/include/configs/debris.h +++ b/include/configs/debris.h @@ -30,6 +30,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* Environments */ /* bootargs */ @@ -204,7 +206,7 @@ #else #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00040000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -451,16 +453,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index 7a1a7c3..2e9a13f 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -40,10 +40,17 @@ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_DIGSY_MTC 1 /* ... on InterControl digsyMTC board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0xFE000000 boot low + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */ +#endif -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 #define CONFIG_SYS_CACHELINE_SIZE 32 @@ -103,7 +110,7 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_USB -#if (TEXT_BASE == 0xFF000000) +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) #define CONFIG_SYS_LOWBOOT 1 #endif @@ -308,7 +315,7 @@ (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h index 21d2d28..0d44eda 100644 --- a/include/configs/dlvision.h +++ b/include/configs/dlvision.h @@ -28,6 +28,8 @@ #define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_DLVISION 1 /* on a Neo board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/eNET.h b/include/configs/eNET.h index fc7c1c6..78cab29 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -172,7 +172,7 @@ #define CONFIG_SYS_STACK_SIZE 0x8000 /* Size of bootloader stack */ #define CONFIG_SYS_BL_START_FLASH 0x38040000 /* Address of relocated code */ #define CONFIG_SYS_BL_START_RAM 0x03fd0000 /* Address of relocated code */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ #define CONFIG_SYS_FLASH_BASE 0x38000000 /* Boot Flash */ #define CONFIG_SYS_FLASH_BASE_1 0x10000000 /* StrataFlash 1 */ diff --git a/include/configs/eXalion.h b/include/configs/eXalion.h index 85bf236..637cc55 100644 --- a/include/configs/eXalion.h +++ b/include/configs/eXalion.h @@ -40,6 +40,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_EXALION 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #if defined (CONFIG_MPC8240) /* #warning ---------- eXalion with MPC8240 --------------- */ #elif defined (CONFIG_MPC8245) @@ -109,7 +111,7 @@ #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area @@ -412,16 +414,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 #define CONFIG_SDRAM_50MHZ diff --git a/include/configs/ebony.h b/include/configs/ebony.h index 8c3284a..a0d3869 100644 --- a/include/configs/ebony.h +++ b/include/configs/ebony.h @@ -37,6 +37,8 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h index 4b00391..ff25ee2 100644 --- a/include/configs/edb93xx.h +++ b/include/configs/edb93xx.h @@ -5,21 +5,21 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifdef CONFIG_MK_edb9301 +#ifdef CONFIG_edb9301 #define CONFIG_EDB9301 -#elif defined(CONFIG_MK_edb9302) +#elif defined(CONFIG_edb9302) #define CONFIG_EDB9302 -#elif defined(CONFIG_MK_edb9302a) +#elif defined(CONFIG_edb9302a) #define CONFIG_EDB9302A -#elif defined(CONFIG_MK_edb9307) +#elif defined(CONFIG_edb9307) #define CONFIG_EDB9307 -#elif defined(CONFIG_MK_edb9307a) +#elif defined(CONFIG_edb9307a) #define CONFIG_EDB9307A -#elif defined(CONFIG_MK_edb9312) +#elif defined(CONFIG_edb9312) #define CONFIG_EDB9312 -#elif defined(CONFIG_MK_edb9315) +#elif defined(CONFIG_edb9315) #define CONFIG_EDB9315 -#elif defined(CONFIG_MK_edb9315a) +#elif defined(CONFIG_edb9315a) #define CONFIG_EDB9315A #else #error "no board defined" diff --git a/include/configs/ep8248.h b/include/configs/ep8248.h index a738425..5f083bd 100644 --- a/include/configs/ep8248.h +++ b/include/configs/ep8248.h @@ -31,6 +31,8 @@ #define CONFIG_EP8248 /* Embedded Planet EP8248 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ @@ -197,7 +199,7 @@ #define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif @@ -232,9 +234,6 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index 3f4425a..cbf55db 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -48,6 +48,8 @@ #define CONFIG_SYS_EP8260_H2 1 /* #undef CONFIG_SYS_EP8260_H2 */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_CPM2 1 /* Has a CPM2 */ /* What is the oscillator's (UX2) frequency in Hz? */ @@ -97,7 +99,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/ep8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/ep8260/config.mk * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -438,7 +440,7 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 * Note also that the logic that sets CONFIG_SYS_RAMBOOT is platform dependent. */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) @@ -746,14 +748,6 @@ #endif /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * JFFS2 partitions * */ diff --git a/include/configs/ep82xxm.h b/include/configs/ep82xxm.h index b52b941..48985a0 100644 --- a/include/configs/ep82xxm.h +++ b/include/configs/ep82xxm.h @@ -31,6 +31,8 @@ #define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board */ /* 256MB SDRAM / 64MB FLASH */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ @@ -333,7 +335,7 @@ #define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif @@ -361,9 +363,6 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h index 29951f7..d95144d 100644 --- a/include/configs/galaxy5200.h +++ b/include/configs/galaxy5200.h @@ -42,8 +42,20 @@ #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0xFE000000 boot low + * 0x00100000 boot from RAM (for testing only) does not work + */ +#ifdef CONFIG_galaxy5200_LOWBOOT +#define CONFIG_SYS_TEXT_BASE 0xFE000000 +#endif + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */ +#endif /* * Serial console configuration @@ -76,7 +88,7 @@ #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ -#if (TEXT_BASE == 0xFE000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low */ #define CONFIG_SYS_LOWBOOT 1 #endif /* RAMBOOT will be defined automatically in memory section */ @@ -204,7 +216,7 @@ CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h index d6db7bf..282afbc 100644 --- a/include/configs/gdppc440etx.h +++ b/include/configs/gdppc440etx.h @@ -40,6 +40,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/gr_cpci_ax2000.h b/include/configs/gr_cpci_ax2000.h index d188439..bb4ea79 100644 --- a/include/configs/gr_cpci_ax2000.h +++ b/include/configs/gr_cpci_ax2000.h @@ -270,7 +270,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) #define CONFIG_SYS_STACK_SIZE (0x10000-32) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -287,7 +287,7 @@ #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) /* make un relocated address from relocated address */ -#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)) +#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) /* * Ethernet configuration uses on board SMC91C111 diff --git a/include/configs/gr_ep2s60.h b/include/configs/gr_ep2s60.h index 3a568ff..35c4a08 100644 --- a/include/configs/gr_ep2s60.h +++ b/include/configs/gr_ep2s60.h @@ -238,7 +238,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) #define CONFIG_SYS_STACK_SIZE (0x10000-32) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -255,7 +255,7 @@ #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) /* make un relocated address from relocated address */ -#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)) +#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) /* * Ethernet configuration uses on board SMC91C111, however if a mezzanine diff --git a/include/configs/gr_xc3s_1500.h b/include/configs/gr_xc3s_1500.h index 4dd9a0f..92fbbbb 100644 --- a/include/configs/gr_xc3s_1500.h +++ b/include/configs/gr_xc3s_1500.h @@ -215,7 +215,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) #define CONFIG_SYS_STACK_SIZE (0x10000-32) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -232,7 +232,7 @@ #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) /* make un relocated address from relocated address */ -#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)) +#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) /* * Ethernet configuration diff --git a/include/configs/grsim.h b/include/configs/grsim.h index c3f1a31..5dfdf51 100644 --- a/include/configs/grsim.h +++ b/include/configs/grsim.h @@ -240,7 +240,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) #define CONFIG_SYS_STACK_SIZE (0x10000-32) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -257,7 +257,7 @@ #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) /* make un relocated address from relocated address */ -#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)) +#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) /* * Ethernet configuration diff --git a/include/configs/grsim_leon2.h b/include/configs/grsim_leon2.h index 7ebbf25..39af8fe 100644 --- a/include/configs/grsim_leon2.h +++ b/include/configs/grsim_leon2.h @@ -238,7 +238,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) #define CONFIG_SYS_STACK_SIZE (0x10000-32) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -255,7 +255,7 @@ #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) /* make un relocated address from relocated address */ -#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)) +#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) /* * Ethernet configuration diff --git a/include/configs/gth2.h b/include/configs/gth2.h index 677baea..b5f454c 100644 --- a/include/configs/gth2.h +++ b/include/configs/gth2.h @@ -141,7 +141,7 @@ #define PHYS_FLASH 0xbfc00000 /* Flash Bank #1 */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/gw8260.h b/include/configs/gw8260.h index 9ed3846..6c1ddac 100644 --- a/include/configs/gw8260.h +++ b/include/configs/gw8260.h @@ -50,6 +50,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* Enable debug prints */ #undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ @@ -83,7 +85,7 @@ #define CONFIG_SYS_SBC_BOOT_LOW 1 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/sbc8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sbc8260/config.mk * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -819,13 +821,4 @@ ORxG_SCY_11_CLK |\ ORxG_EHTR) #endif /* CONFIG_SYS_IO_BASE */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/hcu4.h b/include/configs/hcu4.h index 68bf998..dd5e5a2 100644 --- a/include/configs/hcu4.h +++ b/include/configs/hcu4.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 #define CONFIG_HOSTNAME hcu4 +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 + /* * Include common defines/options for all boards produced by Netstal Maschinen */ @@ -57,7 +59,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* ... with on-chip memory here (4KBytes) */ #define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000 diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h index 5aa304d..a2edf51 100644 --- a/include/configs/hcu5.h +++ b/include/configs/hcu5.h @@ -41,6 +41,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_HOSTNAME hcu5 +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 + /* * Include common defines/options for all boards produced by Netstal Maschinen */ @@ -61,7 +63,7 @@ #define CONFIG_SYS_BOOT_BASE_ADDR 0xfff00000 #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */ #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE #define CONFIG_SYS_PCI_BASE 0xe0000000 /* Internal PCI regs */ diff --git a/include/configs/hermes.h b/include/configs/hermes.h index 0df46fa..58fc4ce 100644 --- a/include/configs/hermes.h +++ b/include/configs/hermes.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860T CPU */ #define CONFIG_HERMES 1 /* ...on a HERMES-PRO board */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -332,13 +334,4 @@ #define CONFIG_SYS_MAMR_9COL ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h index d40b7a9..60e5c2b 100644 --- a/include/configs/hmi1001.h +++ b/include/configs/hmi1001.h @@ -33,10 +33,11 @@ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_HMI1001 1 /* HMI1001 board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_BOARD_EARLY_INIT_R @@ -80,7 +81,7 @@ #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ -#if (TEXT_BASE == 0xFFF00000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFFF00000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -149,7 +150,7 @@ #define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */ #define CONFIG_SYS_MAX_FLASH_SECT 67 /* max num of sects on one chip */ -#define CONFIG_ENV_ADDR (TEXT_BASE+0x40000) /* second sector */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE+0x40000) /* second sector */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks (= chip selects) */ #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ @@ -204,7 +205,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -352,6 +353,7 @@ /* Display addresses */ /*---------------------------------------------------------------------*/ +#define CONFIG_PDSP188x #define CONFIG_SYS_DISP_CHR_RAM (CONFIG_SYS_DISPLAY_BASE + 0x38) #define CONFIG_SYS_DISP_CWORD (CONFIG_SYS_DISPLAY_BASE + 0x30) diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 5a282ff..ccfc3df 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -37,6 +37,8 @@ #define CONFIG_HYMOD 1 /* ...on a Hymod board */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ #define CONFIG_BOARD_POSTCLK_INIT /* have board_postclk_init() function */ @@ -386,8 +388,8 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_FPGA_BASE 0x80000000 /* * unfortunately, CONFIG_SYS_MONITOR_LEN must include the @@ -728,14 +730,6 @@ #define FPGA_MAIN_IRQ SIU_INT_IRQ2 /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * JFFS2 partitions * */ diff --git a/include/configs/icon.h b/include/configs/icon.h index ad0ca5d..8d98d57 100644 --- a/include/configs/icon.h +++ b/include/configs/icon.h @@ -35,6 +35,9 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_440SPE 1 /* Specifc SPe support */ + +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ #define CONFIG_SYS_4xx_RESET_TYPE 0x2 /* use chip reset on this board */ diff --git a/include/configs/igep0020.h b/include/configs/igep0020.h new file mode 100644 index 0000000..34e8a57 --- /dev/null +++ b/include/configs/igep0020.h @@ -0,0 +1,228 @@ +/* + * (C) Copyright 2010 + * ISEE 2007 SL, <www.iseebcn.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/* + * High Level Configuration Options + */ +#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ +#define CONFIG_OMAP 1 /* in a TI OMAP core */ +#define CONFIG_OMAP34XX 1 /* which is a 34XX */ +#define CONFIG_OMAP3430 1 /* which is in a 3430 */ +#define CONFIG_OMAP3_IGEP0020 1 /* working with IGEP0020 */ + +#define CONFIG_SDRC /* The chip has SDRC controller */ + +#include <asm/arch/cpu.h> +#include <asm/arch/omap3.h> + +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#define CONFIG_REVISION_TAG 1 + +/* + * NS16550 Configuration + */ + +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK + +/* select serial console configuration */ +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CONFIG_SERIAL3 3 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} +#define CONFIG_MMC 1 +#define CONFIG_OMAP3_MMC 1 +#define CONFIG_DOS_PARTITION 1 + +/* DDR */ +#define CONFIG_OMAP3_NUMONYX_DDR 1 + +/* USB */ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_OMAP3 1 +#define CONFIG_TWL4030_USB 1 + +/* USB device configuration */ +#define CONFIG_USB_DEVICE 1 +#define CONFIG_USB_TTY 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + +/* Change these to suit your needs */ +#define CONFIG_USBD_VENDORID 0x0451 +#define CONFIG_USBD_PRODUCTID 0x5678 +#define CONFIG_USBD_MANUFACTURER "Texas Instruments" +#define CONFIG_USBD_PRODUCT_NAME "IGEP" + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_ONENAND /* ONENAND support */ +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ +#define CONFIG_MTD_DEVICE + +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#undef CONFIG_CMD_IMLS /* List all found images */ + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_BUS 0 +#define CONFIG_SYS_I2C_BUS_SELECT 1 +#define CONFIG_DRIVER_OMAP34XX_I2C 1 + +/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER 1 + +/* Environment information */ +#define CONFIG_BOOTCOMMAND \ + "mmc init 0 ; fatload mmc 0 0x80000000 setup.ini ; source \0" + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "usbtty=cdc_acm\0" + +#define CONFIG_AUTO_COMPLETE 1 + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "U-Boot # " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) + +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ + /* works on */ +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ + 0x01F00000) /* 31MB */ + +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ + /* load address */ + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) + +/* + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/* + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ + +/* + * Physical Memory Map + * + */ +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */ +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* SDRAM Bank Allocation method */ +#define SDRC_R_B_C 1 + +/* + * FLASH and environment organization + */ + +#define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */ + +#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP + +#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ + +#define CONFIG_ENV_IS_IN_ONENAND 1 +#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ +#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes for initial data */ + +/* + * SMSC911x Ethernet + */ +#if defined(CONFIG_CMD_NET) +#define CONFIG_NET_MULTI +#define CONFIG_SMC911X +#define CONFIG_SMC911X_32_BIT +#define CONFIG_SMC911X_BASE 0x2C000000 +#endif /* (CONFIG_CMD_NET) */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) + +#endif /* __CONFIG_H */ diff --git a/include/configs/igep0030.h b/include/configs/igep0030.h new file mode 100644 index 0000000..5e2e0ed --- /dev/null +++ b/include/configs/igep0030.h @@ -0,0 +1,215 @@ +/* + * (C) Copyright 2010 + * ISEE 2007 SL, <www.iseebcn.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/* + * High Level Configuration Options + */ +#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ +#define CONFIG_OMAP 1 /* in a TI OMAP core */ +#define CONFIG_OMAP34XX 1 /* which is a 34XX */ +#define CONFIG_OMAP3430 1 /* which is in a 3430 */ +#define CONFIG_OMAP3_IGEP0030 1 /* working with IGEP0030 */ + +#define CONFIG_SDRC /* The chip has SDRC controller */ + +#include <asm/arch/cpu.h> +#include <asm/arch/omap3.h> + +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#define CONFIG_REVISION_TAG 1 + +/* + * NS16550 Configuration + */ + +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK + +/* select serial console configuration */ +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CONFIG_SERIAL3 3 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} +#define CONFIG_MMC 1 +#define CONFIG_OMAP3_MMC 1 +#define CONFIG_DOS_PARTITION 1 + +/* DDR */ +#define CONFIG_OMAP3_NUMONYX_DDR 1 + +/* USB */ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_OMAP3 1 +#define CONFIG_TWL4030_USB 1 + +/* USB device configuration */ +#define CONFIG_USB_DEVICE 1 +#define CONFIG_USB_TTY 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + +/* Change these to suit your needs */ +#define CONFIG_USBD_VENDORID 0x0451 +#define CONFIG_USBD_PRODUCTID 0x5678 +#define CONFIG_USBD_MANUFACTURER "Texas Instruments" +#define CONFIG_USBD_PRODUCT_NAME "IGEP" + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_ONENAND /* ONENAND support */ +#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ +#define CONFIG_MTD_DEVICE + +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#undef CONFIG_CMD_IMLS /* List all found images */ + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_BUS 0 +#define CONFIG_SYS_I2C_BUS_SELECT 1 +#define CONFIG_DRIVER_OMAP34XX_I2C 1 + +/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER 1 + +/* Environment information */ +#define CONFIG_BOOTCOMMAND \ + "mmc init 0 ; fatload mmc 0 0x80000000 setup.ini ; source \0" + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "usbtty=cdc_acm\0" + +#define CONFIG_AUTO_COMPLETE 1 + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "U-Boot # " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) + +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ + /* works on */ +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ + 0x01F00000) /* 31MB */ + +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ + /* load address */ + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) + +/* + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/* + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ + +/* + * Physical Memory Map + * + */ +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */ +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* SDRAM Bank Allocation method */ +#define SDRC_R_B_C 1 + +/* + * FLASH and environment organization + */ + +#define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */ + +#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP + +#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ + +#define CONFIG_ENV_IS_IN_ONENAND 1 +#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ +#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes for initial data */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) + +#endif /* __CONFIG_H */ diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index 88c62d1..9425237 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -147,6 +147,13 @@ #define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) +#undef CONFIG_SYS_ARM_WITHOUT_RELOC +#define CONFIG_SYS_SDRAM_BASE CSD0_BASE +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_END IRAM_SIZE +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET) + /*----------------------------------------------------------------------- * FLASH and environment organization */ diff --git a/include/configs/incaip.h b/include/configs/incaip.h index 2129dfd..b7ba6f4 100644 --- a/include/configs/incaip.h +++ b/include/configs/incaip.h @@ -139,7 +139,7 @@ #define PHYS_FLASH_2 0xb0800000 /* Flash Bank #2 */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h index 69365e6..3636d12 100644 --- a/include/configs/inka4x0.h +++ b/include/configs/inka4x0.h @@ -36,10 +36,16 @@ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_INKA4X0 1 /* INKA4x0 board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFE00000 boot low + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFE00000 /* Standard: boot low */ +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ @@ -105,7 +111,7 @@ #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ -#if (TEXT_BASE == 0xFFE00000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFFE00000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -214,7 +220,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/intip.h b/include/configs/intip.h index 82c8282..56d2be2 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -45,6 +45,10 @@ #define CONFIG_440 1 #define CONFIG_4xx 1 /* ... PPC4xx family */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/ipek01.h b/include/configs/ipek01.h index 6903b36..c37b83b 100644 --- a/include/configs/ipek01.h +++ b/include/configs/ipek01.h @@ -37,13 +37,12 @@ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ #define CONFIG_IPEK01 /* Motherboard is ipek01 */ +#define CONFIG_SYS_TEXT_BASE 0xfc000000 + #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */ #define CONFIG_MISC_INIT_R -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ #ifdef CONFIG_CMD_KGDB #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ @@ -274,7 +273,7 @@ CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/jupiter.h b/include/configs/jupiter.h index 9c45acf..6f5ac94 100644 --- a/include/configs/jupiter.h +++ b/include/configs/jupiter.h @@ -33,14 +33,20 @@ #define CONFIG_MPC5200 1 /* especially an MPC5200 */ #define CONFIG_JUPITER 1 /* ... on Jupiter board */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_BOARD_EARLY_INIT_R 1 #define CONFIG_BOARD_EARLY_INIT_F 1 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -184,7 +190,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */ -#define CONFIG_ENV_ADDR (TEXT_BASE + 0x40000) /* third sector */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */ #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ @@ -226,7 +232,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/katmai.h b/include/configs/katmai.h index e4ccd7d..135a4c2 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -41,6 +41,8 @@ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ #define CONFIG_SYS_4xx_RESET_TYPE 0x2 /* use chip reset on this board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + /* * Enable this board for more than 2GB of SDRAM */ diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index 612a0fe..e153b31 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -39,6 +39,10 @@ #define CONFIG_405EX 1 /* Specifc 405EX support*/ #define CONFIG_SYS_CLK_FREQ 33333333 /* ext frequency to pll */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/km8xx.h b/include/configs/km8xx.h index a10744e..2a42e99 100644 --- a/include/configs/km8xx.h +++ b/include/configs/km8xx.h @@ -271,14 +271,6 @@ #define CONFIG_SYS_BR3_PRELIM (0x30000401) #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC3_ENET #define CONFIG_ETHPRIME "SCC" #define CONFIG_HAS_ETH0 diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index 4794256..03d3aac 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -30,6 +30,8 @@ #define CONFIG_KMETER1 1 /* KMETER1 board specific */ #define CONFIG_HOSTNAME kmeter1 +#define CONFIG_SYS_TEXT_BASE 0xF0000000 + /* include common defines/options for all Keymile boards */ #include "keymile-common.h" @@ -157,7 +159,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_FLASH_BASE 0xF0000000 #define CONFIG_SYS_PIGGY_BASE 0xE8000000 #define CONFIG_SYS_PIGGY_SIZE 128 @@ -440,14 +442,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif /* CONFIG_PCI */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define BOOTFLASH_START F0000000 #define CONFIG_PRAM 512 /* protected RAM [KBytes] */ diff --git a/include/configs/kmsupx4.h b/include/configs/kmsupx4.h index 8f1e602..228bdd7 100644 --- a/include/configs/kmsupx4.h +++ b/include/configs/kmsupx4.h @@ -32,6 +32,8 @@ #define CONFIG_KMSUPX4 1 /* ...on a kmsupx4 board */ #define CONFIG_HOSTNAME kmsupx4 +#define CONFIG_SYS_TEXT_BASE 0xf0000000 + /* include common defines/options for all Keymile 8xx boards */ #include "km8xx.h" diff --git a/include/configs/korat.h b/include/configs/korat.h index 55ef4f0..3a0531b 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -38,6 +38,12 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333333 +#ifdef CONFIG_KORAT_PERMANENT +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#else +#define CONFIG_SYS_TEXT_BASE 0xF7F60000 +#endif + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ @@ -64,7 +70,7 @@ #define CONFIG_SYS_FLASH1_MAX_SIZE 0x08000000 #define CONFIG_SYS_FLASH1_ADDR (CONFIG_SYS_FLASH1_TOP - CONFIG_SYS_FLASH1_MAX_SIZE) #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH1_ADDR /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */ #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE #define CONFIG_SYS_PCI_BASE 0xe0000000 /* Internal PCI regs */ @@ -552,14 +558,6 @@ } \ } -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/kvme080.h b/include/configs/kvme080.h index 0d95263..fa87625 100644 --- a/include/configs/kvme080.h +++ b/include/configs/kvme080.h @@ -28,6 +28,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_KVME080 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 @@ -136,7 +138,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_MONITOR_LEN 0x00040000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (512 << 10) #define CONFIG_SYS_BOOTMAPSZ (8 << 20) @@ -268,7 +270,4 @@ #define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 - #endif /* __CONFIG_H */ diff --git a/include/configs/linkstation.h b/include/configs/linkstation.h index 6883e79..aaf663a 100644 --- a/include/configs/linkstation.h +++ b/include/configs/linkstation.h @@ -20,6 +20,22 @@ #ifndef __CONFIG_H #define __CONFIG_H +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * + * Standard configuration - all models + * 0xFFF00000 boot from flash + * + * Test configuration (boot from RAM using uloader.o) + * LinkStation HD-HLAN and KuroBox Standard + * 0x03F00000 boot from RAM + * LinkStation HD-HGLAN and KuroBox HG + * 0x07F00000 boot from RAM + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #if 0 #define DEBUG #endif @@ -217,7 +233,7 @@ #define CONFIG_SYS_FLASH_BASE 0xFFC00000 #define CONFIG_SYS_FLASH_SIZE 0x00400000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 #define CONFIG_SYS_EUMB_ADDR 0x80000000 @@ -240,7 +256,7 @@ #endif /*----------------------------------------------------------------------- - * Change TEXT_BASE in bord/linkstation/config.mk to get a RAM build + * Change CONFIG_SYS_TEXT_BASE in bord/linkstation/config.mk to get a RAM build * * RAM based builds are for testing purposes. A Linux module, uloader.o, * exists to load U-Boot and pass control to it @@ -495,12 +511,4 @@ */ #define CONFIG_DOS_PARTITION -/*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/logodl.h b/include/configs/logodl.h deleted file mode 100644 index 0535ee1..0000000 --- a/include/configs/logodl.h +++ /dev/null @@ -1,299 +0,0 @@ -/* - * (C) Copyright 2003 - * Robert Schwebel, Pengutronix, r.schwebel@pengutronix.de. - * - * Configuration for the Logotronic DL board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * include/configs/logodl.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_PXA250 1 /* This is an PXA250 CPU */ -#define CONFIG_GEALOG 1 /* on a Logotronic GEALOG SG board */ - -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - /* for timer/console/ethernet */ - -/* we will never enable dcache, because we have to setup MMU first */ -#define CONFIG_SYS_NO_DCACHE - -/* - * Hardware drivers - */ - -/* - * select serial console configuration - */ -#define CONFIG_PXA_SERIAL -#define CONFIG_FFUART 1 /* we use FFUART */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 19200 -#undef CONFIG_MISC_INIT_R /* FIXME: misc_init_r() missing */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_RUN - - -#define CONFIG_BOOTDELAY 3 -/* #define CONFIG_BOOTARGS "root=/dev/nfs ip=bootp console=ttyS0,19200" */ -#define CONFIG_BOOTARGS "console=ttyS0,19200" -#define CONFIG_ETHADDR FF:FF:FF:FF:FF:FF -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_IPADDR 192.168.1.56 -#define CONFIG_SERVERIP 192.168.1.2 -#define CONFIG_BOOTCOMMAND "bootm 0x40000" -#define CONFIG_SHOW_BOOT_PROGRESS - -#define CONFIG_CMDLINE_TAG 1 - -/* - * Miscellaneous configurable options - */ - -/* - * Size of malloc() pool; this lives below the uppermost 128 KiB which are - * used for the RAM copy of the uboot code - * - */ -#define CONFIG_SYS_MALLOC_LEN (256*1024) - -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "uboot> " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x08000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0800ffff /* 64 KiB */ - -#define CONFIG_SYS_LOAD_ADDR 0x08000000 /* load kernel to this address */ - -#define CONFIG_SYS_HZ 1000 - /* RS: the oscillator is actually 3680130?? */ - -#define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 200/200/100 MHz */ - /* 0101000001 */ - /* ^^^^^ Memory Speed 99.53 MHz */ - /* ^^ Run Mode Speed = 2x Mem Speed */ - /* ^^ Turbo Mode Sp. = 1x Run M. Sp. */ - -#define CONFIG_SYS_MONITOR_LEN 0x20000 /* 128 KiB */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/* - * SMSC91C111 Network Card - */ -#if 0 -#define CONFIG_NET_MULTI -#define CONFIG_SMC91111 1 -#define CONFIG_SMC91111_BASE 0x10000000 /* chip select 4 */ -#undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */ -#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ -#undef CONFIG_SHOW_ACTIVITY -#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ -#endif - -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of RAM */ -#define PHYS_SDRAM_1 0x08000000 /* SRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE (4*1024*1024) /* 4 MB */ - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_2 0x01000000 /* Flash Bank #2 */ -#define PHYS_FLASH_SIZE (32*1024*1024) /* 32 MB */ - -#define CONFIG_SYS_DRAM_BASE PHYS_SDRAM_1 /* RAM starts here */ -#define CONFIG_SYS_DRAM_SIZE PHYS_SDRAM_1_SIZE - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - - -/* - * GPIO settings - * - * GP?? == FOOBAR is 0/1 - */ - -#define _BIT0 0x00000001 -#define _BIT1 0x00000002 -#define _BIT2 0x00000004 -#define _BIT3 0x00000008 - -#define _BIT4 0x00000010 -#define _BIT5 0x00000020 -#define _BIT6 0x00000040 -#define _BIT7 0x00000080 - -#define _BIT8 0x00000100 -#define _BIT9 0x00000200 -#define _BIT10 0x00000400 -#define _BIT11 0x00000800 - -#define _BIT12 0x00001000 -#define _BIT13 0x00002000 -#define _BIT14 0x00004000 -#define _BIT15 0x00008000 - -#define _BIT16 0x00010000 -#define _BIT17 0x00020000 -#define _BIT18 0x00040000 -#define _BIT19 0x00080000 - -#define _BIT20 0x00100000 -#define _BIT21 0x00200000 -#define _BIT22 0x00400000 -#define _BIT23 0x00800000 - -#define _BIT24 0x01000000 -#define _BIT25 0x02000000 -#define _BIT26 0x04000000 -#define _BIT27 0x08000000 - -#define _BIT28 0x10000000 -#define _BIT29 0x20000000 -#define _BIT30 0x40000000 -#define _BIT31 0x80000000 - - -#define CONFIG_SYS_LED_A_BIT (_BIT18) -#define CONFIG_SYS_LED_A_SR GPSR0 -#define CONFIG_SYS_LED_A_CR GPCR0 - -#define CONFIG_SYS_LED_B_BIT (_BIT16) -#define CONFIG_SYS_LED_B_SR GPSR1 -#define CONFIG_SYS_LED_B_CR GPCR1 - - -/* LED A: off, LED B: off */ -#define CONFIG_SYS_GPSR0_VAL (_BIT1+_BIT6+_BIT8+_BIT9+_BIT11+_BIT15+_BIT16+_BIT18) -#define CONFIG_SYS_GPSR1_VAL (_BIT0+_BIT1+_BIT16+_BIT24+_BIT25 +_BIT7+_BIT8+_BIT9+_BIT11+_BIT13) -#define CONFIG_SYS_GPSR2_VAL (_BIT14+_BIT15+_BIT16) - -#define CONFIG_SYS_GPCR0_VAL 0x00000000 -#define CONFIG_SYS_GPCR1_VAL 0x00000000 -#define CONFIG_SYS_GPCR2_VAL 0x00000000 - -#define CONFIG_SYS_GPDR0_VAL (_BIT1+_BIT6+_BIT8+_BIT9+_BIT11+_BIT15+_BIT16+_BIT17+_BIT18) -#define CONFIG_SYS_GPDR1_VAL (_BIT0+_BIT1+_BIT16+_BIT24+_BIT25 +_BIT7+_BIT8+_BIT9+_BIT11+_BIT13) -#define CONFIG_SYS_GPDR2_VAL (_BIT14+_BIT15+_BIT16) - -#define CONFIG_SYS_GAFR0_L_VAL (_BIT22+_BIT24+_BIT31) -#define CONFIG_SYS_GAFR0_U_VAL (_BIT15+_BIT17+_BIT19+\ - _BIT20+_BIT22+_BIT24+_BIT26+_BIT29+_BIT31) -#define CONFIG_SYS_GAFR1_L_VAL (_BIT3+_BIT4+_BIT6+_BIT8+_BIT10+_BIT12+_BIT15+_BIT17+_BIT19+\ - _BIT20+_BIT23+_BIT24+_BIT27+_BIT28+_BIT31) -#define CONFIG_SYS_GAFR1_U_VAL (_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31) -#define CONFIG_SYS_GAFR2_L_VAL (_BIT1+_BIT3+_BIT5+_BIT7+_BIT9+_BIT11+_BIT13+_BIT15+_BIT17+\ - _BIT19+_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31) -#define CONFIG_SYS_GAFR2_U_VAL (_BIT1) - -#define CONFIG_SYS_PSSR_VAL (0x20) - -/* - * Memory settings - */ -#define CONFIG_SYS_MSC0_VAL 0x123c2980 -#define CONFIG_SYS_MSC1_VAL 0x123c2661 -#define CONFIG_SYS_MSC2_VAL 0x7ff87ff8 - - -/* no sdram/pcmcia here */ -#define CONFIG_SYS_MDCNFG_VAL 0x00000000 -#define CONFIG_SYS_MDREFR_VAL 0x00000000 -#define CONFIG_SYS_MDREFR_VAL_100 0x00000000 -#define CONFIG_SYS_MDMRS_VAL 0x00000000 - -/* only SRAM */ -#define SXCNFG_SETTINGS 0x00000000 - -/* - * PCMCIA and CF Interfaces - */ - -#define CONFIG_SYS_MECR_VAL 0x00000000 -#define CONFIG_SYS_MCMEM0_VAL 0x00010504 -#define CONFIG_SYS_MCMEM1_VAL 0x00010504 -#define CONFIG_SYS_MCATT0_VAL 0x00010504 -#define CONFIG_SYS_MCATT1_VAL 0x00010504 -#define CONFIG_SYS_MCIO0_VAL 0x00004715 -#define CONFIG_SYS_MCIO1_VAL 0x00004715 - - -/* - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -/* FIXME */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */ -#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ - -#endif /* __CONFIG_H */ diff --git a/include/configs/lpc2292sodimm.h b/include/configs/lpc2292sodimm.h index 7ce8d6d..65276a2 100644 --- a/include/configs/lpc2292sodimm.h +++ b/include/configs/lpc2292sodimm.h @@ -156,6 +156,6 @@ #define CONFIG_INITRD_TAG #define CONFIG_MMC 1 /* we use this ethernet chip */ -#define CONFIG_ENC28J60 +#define CONFIG_ENC28J60_LPC2292 #endif /* __CONFIG_H */ diff --git a/include/configs/luan.h b/include/configs/luan.h index 6b1a41f..d801404 100644 --- a/include/configs/luan.h +++ b/include/configs/luan.h @@ -37,6 +37,8 @@ #define CONFIG_440 1 #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/lwmon.h b/include/configs/lwmon.h index be20d72..1062765 100644 --- a/include/configs/lwmon.h +++ b/include/configs/lwmon.h @@ -39,6 +39,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823E CPU */ #define CONFIG_LWMON 1 /* ...on a LWMON board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* Default Ethernet MAC address */ #define CONFIG_ETHADDR 00:11:B0:00:00:00 @@ -610,12 +612,4 @@ */ #define CONFIG_SYS_MAR 0x00000088 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 4a3b1dc..d003710 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -36,6 +36,11 @@ #define CONFIG_440EPX 1 /* Specific PPC440EPx */ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_4xx 1 /* ... PPC4xx family */ + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 +#endif + #define CONFIG_SYS_CLK_FREQ 33300000 /* external freq to pll */ #define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */ @@ -48,7 +53,7 @@ * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ #define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1) #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* Reserved for malloc */ @@ -644,14 +649,6 @@ } \ } -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/makalu.h b/include/configs/makalu.h index 80163d4..c4853ab 100644 --- a/include/configs/makalu.h +++ b/include/configs/makalu.h @@ -39,6 +39,8 @@ #define CONFIG_405EX 1 /* Specifc 405EX support*/ #define CONFIG_SYS_CLK_FREQ 33330000 /* ext frequency to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/manroland/common.h b/include/configs/manroland/common.h index 0224608..797378b 100644 --- a/include/configs/manroland/common.h +++ b/include/configs/manroland/common.h @@ -29,9 +29,6 @@ * (easy to change) */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_BOARD_EARLY_INIT_R /* Partitions */ @@ -55,6 +52,11 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_SNTP +/* + * 8-symbol LED display (can be accessed with 'display' command) + */ +#define CONFIG_PDSP188x + #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ /* @@ -101,11 +103,11 @@ "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin \0" \ "u-boot_addr_r=200000\0" \ "load=tftp ${u-boot_addr_r} ${u-boot}\0" \ - "update=protect off " xstr(TEXT_BASE) " +${filesize};" \ - "erase " xstr(TEXT_BASE) " +${filesize};" \ - "cp.b ${u-boot_addr_r} " xstr(TEXT_BASE) \ + "update=protect off " xstr(CONFIG_SYS_TEXT_BASE) " +${filesize};" \ + "erase " xstr(CONFIG_SYS_TEXT_BASE) " +${filesize};" \ + "cp.b ${u-boot_addr_r} " xstr(CONFIG_SYS_TEXT_BASE) \ " ${filesize};" \ - "protect on " xstr(TEXT_BASE) " +${filesize}\0" \ + "protect on " xstr(CONFIG_SYS_TEXT_BASE) " +${filesize}\0" \ "" #define CONFIG_BOOTCOMMAND "run net_nfs" diff --git a/include/configs/manroland/mpc5200-common.h b/include/configs/manroland/mpc5200-common.h index d25e093..7be1354 100644 --- a/include/configs/manroland/mpc5200-common.h +++ b/include/configs/manroland/mpc5200-common.h @@ -42,7 +42,7 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200,\ 230400 } -#if (TEXT_BASE == 0xFFF00000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFFF00000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -88,7 +88,7 @@ #define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */ -#define CONFIG_ENV_ADDR (TEXT_BASE+0x40000) /* second sector */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE+0x40000) /* second sector */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks (= chip selects) */ #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout [ms]*/ @@ -140,7 +140,7 @@ #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index 7ef6385..4d946ab 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -33,13 +33,20 @@ #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_MCC200 1 /* ... on MCC200 board */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low (standard configuration) + * 0xFFF00000 boot high + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif + #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */ #define CONFIG_MISC_INIT_R -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -169,7 +176,7 @@ "rootpath=/opt/eldk/ppc_6xx\0" \ "bootfile=/tftpboot/" CONFIG_SYS__BOARDNAME "/uImage\0" \ "load=tftp 200000 /tftpboot/" CONFIG_SYS__BOARDNAME "/u-boot.bin\0" \ - "text_base=" MK_STR(TEXT_BASE) "\0" \ + "text_base=" MK_STR(CONFIG_SYS_TEXT_BASE) "\0" \ "kernel_addr=0xFC0C0000\0" \ "update=protect off ${text_base} +${filesize};" \ "era ${text_base} +${filesize};" \ @@ -239,7 +246,7 @@ #define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */ -#if TEXT_BASE == CONFIG_SYS_FLASH_BASE +#if CONFIG_SYS_TEXT_BASE == CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_LOWBOOT 1 #endif @@ -259,7 +266,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/mcu25.h b/include/configs/mcu25.h index 8dd87cb..4aef6fc 100644 --- a/include/configs/mcu25.h +++ b/include/configs/mcu25.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 #define CONFIG_HOSTNAME mcu25 +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 + /* * Include common defines/options for all boards produced by Netstal Maschinen */ @@ -57,7 +59,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* ... with on-chip memory here (4KBytes) */ #define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000 diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index a26de0b..1e82bc5 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -48,6 +48,8 @@ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC512X 1 /* MPC512X family */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */ #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ @@ -210,7 +212,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of monitor */ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Monitor length */ #define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Malloc size */ @@ -361,14 +363,6 @@ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/mecp5200.h b/include/configs/mecp5200.h index 73405ea..036b790 100644 --- a/include/configs/mecp5200.h +++ b/include/configs/mecp5200.h @@ -45,10 +45,11 @@ #define CONFIG_MECP5200 1 /* ... on MECP5200 board */ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -105,11 +106,11 @@ #define CONFIG_CMD_ELF -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #endif -#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT08 1 #endif @@ -221,7 +222,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/mgcoge.h b/include/configs/mgcoge.h index 55d1fc9..4dcd679 100644 --- a/include/configs/mgcoge.h +++ b/include/configs/mgcoge.h @@ -34,6 +34,8 @@ #define CONFIG_MGCOGE 1 #define CONFIG_HOSTNAME mgcoge +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_CPM2 1 /* Has a CPM2 */ /* include common defines/options for all Keymile boards */ @@ -123,7 +125,7 @@ CONFIG_SYS_FLASH_BASE_1, \ CONFIG_SYS_FLASH_BASE_2 } -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif @@ -193,9 +195,6 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPUs */ diff --git a/include/configs/mgsuvd.h b/include/configs/mgsuvd.h index 1618f7d..6036da8 100644 --- a/include/configs/mgsuvd.h +++ b/include/configs/mgsuvd.h @@ -32,6 +32,8 @@ #define CONFIG_MGSUVD 1 /* ...on a mgsuvd board */ #define CONFIG_HOSTNAME mgsuvd +#define CONFIG_SYS_TEXT_BASE 0xf0000000 + /* include common defines/options for all Keymile 8xx boards */ #include "km8xx.h" diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 9b1569a..bcdd86e 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007-2008 Michal Simek + * (C) Copyright 2007-2010 Michal Simek * * Michal SIMEK <monstr@monstr.eu> * @@ -27,73 +27,75 @@ #include "../board/xilinx/microblaze-generic/xparameters.h" -#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ +/* MicroBlaze CPU */ +#define CONFIG_MICROBLAZE 1 #define MICROBLAZE_V5 1 /* uart */ #ifdef XILINX_UARTLITE_BASEADDR - #define CONFIG_XILINX_UARTLITE - #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR - #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE - #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } - #define CONSOLE_ARG "console=console=ttyUL0,115200\0" +# define CONFIG_XILINX_UARTLITE +# define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR +# define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE +# define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } +# define CONSOLE_ARG "console=console=ttyUL0,115200\0" #elif XILINX_UART16550_BASEADDR - #define CONFIG_SYS_NS16550 1 - #define CONFIG_SYS_NS16550_SERIAL - #define CONFIG_SYS_NS16550_REG_SIZE -4 - #define CONFIG_CONS_INDEX 1 - #define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) - #define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ - #define CONFIG_BAUDRATE 115200 - - /* The following table includes the supported baudrates */ - #define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} - #define CONSOLE_ARG "console=console=ttyS0,115200\0" +# define CONFIG_SYS_NS16550 1 +# define CONFIG_SYS_NS16550_SERIAL +# define CONFIG_SYS_NS16550_REG_SIZE -4 +# define CONFIG_CONS_INDEX 1 +# define CONFIG_SYS_NS16550_COM1 \ + (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) +# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ +# define CONFIG_BAUDRATE 115200 + +/* The following table includes the supported baudrates */ +# define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} +# define CONSOLE_ARG "console=console=ttyS0,115200\0" #else - #error Undefined uart +# error Undefined uart #endif /* setting reset address */ -/*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/ +/*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ /* ethernet */ #ifdef XILINX_EMACLITE_BASEADDR - #define CONFIG_XILINX_EMACLITE 1 - #define CONFIG_SYS_ENET +# define CONFIG_XILINX_EMACLITE 1 +# define CONFIG_SYS_ENET #elif XILINX_LLTEMAC_BASEADDR - #define CONFIG_XILINX_LL_TEMAC 1 - #define CONFIG_SYS_ENET +# define CONFIG_XILINX_LL_TEMAC 1 +# define CONFIG_SYS_ENET #endif #undef ET_DEBUG /* gpio */ #ifdef XILINX_GPIO_BASEADDR - #define CONFIG_SYS_GPIO_0 1 - #define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR +# define CONFIG_SYS_GPIO_0 1 +# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR #endif /* interrupt controller */ #ifdef XILINX_INTC_BASEADDR - #define CONFIG_SYS_INTC_0 1 - #define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR - #define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS +# define CONFIG_SYS_INTC_0 1 +# define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR +# define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS #endif /* timer */ #ifdef XILINX_TIMER_BASEADDR - #if (XILINX_TIMER_IRQ != -1) - #define CONFIG_SYS_TIMER_0 1 - #define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR - #define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ - #define FREQUENCE XILINX_CLOCK_FREQ - #define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) - #endif +# if (XILINX_TIMER_IRQ != -1) +# define CONFIG_SYS_TIMER_0 1 +# define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR +# define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ +# define FREQUENCE XILINX_CLOCK_FREQ +# define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +# endif #elif XILINX_CLOCK_FREQ - #define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ +# define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ #else - #error BAD CLOCK FREQ +# error BAD CLOCK FREQ #endif /* FSL */ /* #define CONFIG_SYS_FSL_2 */ @@ -101,7 +103,7 @@ /* * memory layout - Example - * TEXT_BASE = 0x1200_0000; + * CONFIG_SYS_TEXT_BASE = 0x1200_0000; * CONFIG_SYS_SRAM_BASE = 0x1000_0000; * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; * @@ -111,7 +113,7 @@ * * 0x1000_0000 CONFIG_SYS_SDRAM_BASE * FREE - * 0x1200_0000 TEXT_BASE + * 0x1200_0000 CONFIG_SYS_TEXT_BASE * U-BOOT code * 0x1202_0000 * FREE @@ -135,15 +137,20 @@ /* global pointer */ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size of global data */ /* start of global data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_GBL_DATA_OFFSET \ + (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE \ + - CONFIG_SYS_GBL_DATA_SIZE) /* monitor code */ -#define SIZE 0x40000 +#define SIZE 0x40000 #define CONFIG_SYS_MONITOR_LEN (SIZE - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_MONITOR_BASE \ + (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_MONITOR_END \ + (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_MALLOC_LEN SIZE -#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_MALLOC_BASE \ + (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) /* stack */ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE @@ -152,55 +159,62 @@ #define FLASH #ifdef FLASH - #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START - #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE - #define CONFIG_SYS_FLASH_CFI 1 - #define CONFIG_FLASH_CFI_DRIVER 1 - #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */ - #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ - #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ - #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ - - #ifdef RAMENV - #define CONFIG_ENV_IS_NOWHERE 1 - #define CONFIG_ENV_SIZE 0x1000 - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - - #else /* !RAMENV */ - #define CONFIG_ENV_IS_IN_FLASH 1 - #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ - #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) - #define CONFIG_ENV_SIZE 0x20000 - #endif /* !RAMBOOT */ +# define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START +# define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE +# define CONFIG_SYS_FLASH_CFI 1 +# define CONFIG_FLASH_CFI_DRIVER 1 +/* ?empty sector */ +# define CONFIG_SYS_FLASH_EMPTY_INFO 1 +/* max number of memory banks */ +# define CONFIG_SYS_MAX_FLASH_BANKS 1 +/* max number of sectors on one chip */ +# define CONFIG_SYS_MAX_FLASH_SECT 512 +/* hardware flash protection */ +# define CONFIG_SYS_FLASH_PROTECTION + +# ifdef RAMENV +# define CONFIG_ENV_IS_NOWHERE 1 +# define CONFIG_ENV_SIZE 0x1000 +# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) + +# else /* !RAMENV */ +# define CONFIG_ENV_IS_IN_FLASH 1 +/* 128K(one sector) for env */ +# define CONFIG_ENV_SECT_SIZE 0x20000 +# define CONFIG_ENV_ADDR \ + (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) +# define CONFIG_ENV_SIZE 0x20000 +# endif /* !RAMBOOT */ #else /* !FLASH */ - /* ENV in RAM */ - #define CONFIG_SYS_NO_FLASH 1 - #define CONFIG_ENV_IS_NOWHERE 1 - #define CONFIG_ENV_SIZE 0x1000 - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ +/* ENV in RAM */ +# define CONFIG_SYS_NO_FLASH 1 +# define CONFIG_ENV_IS_NOWHERE 1 +# define CONFIG_ENV_SIZE 0x1000 +# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) +/* hardware flash protection */ +# define CONFIG_SYS_FLASH_PROTECTION #endif /* !FLASH */ /* system ace */ #ifdef XILINX_SYSACE_BASEADDR - #define CONFIG_SYSTEMACE - /* #define DEBUG_SYSTEMACE */ - #define SYSTEMACE_CONFIG_FPGA - #define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR - #define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH - #define CONFIG_DOS_PARTITION +# define CONFIG_SYSTEMACE +/* #define DEBUG_SYSTEMACE */ +# define SYSTEMACE_CONFIG_FPGA +# define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR +# define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH +# define CONFIG_DOS_PARTITION #endif #if defined(XILINX_USE_ICACHE) - #define CONFIG_ICACHE +# define CONFIG_ICACHE #else - #undef CONFIG_ICACHE +# undef CONFIG_ICACHE #endif #if defined(XILINX_USE_DCACHE) - #define CONFIG_DCACHE +# define CONFIG_DCACHE #else - #undef CONFIG_DCACHE +# undef CONFIG_DCACHE #endif /* @@ -222,36 +236,39 @@ #define CONFIG_CMD_ECHO #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) - #define CONFIG_CMD_CACHE +# define CONFIG_CMD_CACHE #else - #undef CONFIG_CMD_CACHE +# undef CONFIG_CMD_CACHE #endif #ifndef CONFIG_SYS_ENET - #undef CONFIG_CMD_NET +# undef CONFIG_CMD_NET +# undef CONFIG_NET_MULTI #else - #define CONFIG_CMD_PING +# define CONFIG_CMD_PING +# define CONFIG_CMD_DHCP +# define CONFIG_NET_MULTI #endif #if defined(CONFIG_SYSTEMACE) - #define CONFIG_CMD_EXT2 - #define CONFIG_CMD_FAT +# define CONFIG_CMD_EXT2 +# define CONFIG_CMD_FAT #endif #if defined(FLASH) - #define CONFIG_CMD_ECHO - #define CONFIG_CMD_FLASH - #define CONFIG_CMD_IMLS - #define CONFIG_CMD_JFFS2 - - #if !defined(RAMENV) - #define CONFIG_CMD_SAVEENV - #define CONFIG_CMD_SAVES - #endif +# define CONFIG_CMD_ECHO +# define CONFIG_CMD_FLASH +# define CONFIG_CMD_IMLS +# define CONFIG_CMD_JFFS2 + +# if !defined(RAMENV) +# define CONFIG_CMD_SAVEENV +# define CONFIG_CMD_SAVES +# endif #else - #undef CONFIG_CMD_IMLS - #undef CONFIG_CMD_FLASH - #undef CONFIG_CMD_JFFS2 +# undef CONFIG_CMD_IMLS +# undef CONFIG_CMD_FLASH +# undef CONFIG_CMD_JFFS2 #endif #if defined(CONFIG_CMD_JFFS2) @@ -259,21 +276,26 @@ #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_FLASH_CFI_MTD -#define MTDIDS_DEFAULT "nor0=ml401-0" +#define MTDIDS_DEFAULT "nor0=flash-0" /* default mtd partition table */ -#define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\ +#define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ "256k(env),3m(kernel),1m(romfs),"\ "1m(cramfs),-(jffs2)" #endif /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "U-Boot-mONStR> " -#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +/* size of console buffer */ +#define CONFIG_SYS_CBSIZE 512 + /* print buffer size */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 15 #define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */ +/* default load address */ +#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ #define CONFIG_BOOTARGS "root=romfs" @@ -290,9 +312,9 @@ #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" -#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ - "nor0=ml401-0\0"\ - "mtdparts=mtdparts=ml401-0:"\ +#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ + "nor0=flash-0\0"\ + "mtdparts=mtdparts=flash-0:"\ "256k(u-boot),256k(env),3m(kernel),"\ "1m(romfs),1m(cramfs),-(jffs2)\0" @@ -301,7 +323,7 @@ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +# define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #endif #endif /* __CONFIG_H */ diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h index fa4310b..935b5b9 100644 --- a/include/configs/motionpro.h +++ b/include/configs/motionpro.h @@ -37,6 +37,8 @@ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + /* * BOOTP options */ @@ -192,12 +194,12 @@ * (e.g., by the BDI). Otherwise we must specify the default boot-up value of * MBAR, as given in the doccumentation. */ -#if TEXT_BASE == 0x00100000 +#if CONFIG_SYS_TEXT_BASE == 0x00100000 #define CONFIG_SYS_DEFAULT_MBAR 0xf0000000 -#else /* TEXT_BASE != 0x00100000 */ +#else /* CONFIG_SYS_TEXT_BASE != 0x00100000 */ #define CONFIG_SYS_DEFAULT_MBAR 0x80000000 #define CONFIG_SYS_LOWBOOT 1 -#endif /* TEXT_BASE == 0x00100000 */ +#endif /* CONFIG_SYS_TEXT_BASE == 0x00100000 */ /* Use SRAM until RAM will be available */ #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM @@ -207,7 +209,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT 1 #endif @@ -411,9 +413,6 @@ extern void __led_set(led_id_t id, int state); #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI #define CONFIG_SYS_HID0_FINAL HID0_ICE -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index 3740316..fbcc839 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -48,6 +48,8 @@ #define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* video */ #undef CONFIG_VIDEO @@ -274,7 +276,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of monitor */ #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ #ifdef CONFIG_FSL_DIU_FB #define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */ @@ -375,6 +377,20 @@ #define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */ /* + * USB Support + */ +#define CONFIG_CMD_USB + +#if defined(CONFIG_CMD_USB) +#define CONFIG_USB_EHCI /* Enable EHCI Support */ +#define CONFIG_USB_EHCI_FSL /* On a FSL platform */ +#define CONFIG_EHCI_MMIO_BIG_ENDIAN /* With big-endian regs */ +#define CONFIG_EHCI_DESC_BIG_ENDIAN +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#endif + +/* * Environment */ #define CONFIG_ENV_IS_IN_FLASH 1 @@ -442,10 +458,15 @@ "mpc5121.nand:-(data)" -#if defined(CONFIG_CMD_IDE) || defined(CONFIG_CMD_EXT2) +#if defined(CONFIG_CMD_IDE) || defined(CONFIG_CMD_EXT2) || defined(CONFIG_CMD_USB) + #define CONFIG_DOS_PARTITION #define CONFIG_MAC_PARTITION #define CONFIG_ISO_PARTITION + +#define CONFIG_CMD_FAT +#define CONFIG_SUPPORT_VFAT + #endif /* defined(CONFIG_CMD_IDE) */ /* @@ -496,14 +517,6 @@ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h index 497ea42..94a8c93 100644 --- a/include/configs/mpc7448hpc2.h +++ b/include/configs/mpc7448hpc2.h @@ -42,6 +42,8 @@ #define CONFIG_HIGH_BATS /* High BATs supported */ #define CONFIG_ALTIVEC /* undef to disable */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #define CONFIG_SYS_BOARD_NAME "MPC7448 HPC II" #define CONFIG_IDENT_STRING " Freescale MPC7448 HPC II" @@ -251,7 +253,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0x3fffff00 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* u-boot code base */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* u-boot code base */ #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ /* Peripheral Device section */ @@ -399,13 +401,5 @@ #define L2_INIT 0 #define L2_ENABLE (L2_INIT | L2CR_L2E) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ #define CONFIG_SYS_SERIAL_HANG_IN_EXCEPTION #endif /* __CONFIG_H */ diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index b5a19e4..14f663f 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -33,6 +33,10 @@ #define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ #define CONFIG_MPC8308_P1M 1 /* mpc8308_p1m board specific */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif + /* * On-board devices * @@ -206,7 +210,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ @@ -486,14 +490,6 @@ #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 8c06bf2..02090f2 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -65,7 +65,7 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (TEXT_BASE - 0x100000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) /* NOR Flash */ /* #define CONFIG_SYS_FLASH_BASE (0xA1000000)*/ diff --git a/include/configs/muas3001.h b/include/configs/muas3001.h index 43f46bf..345bdd1 100644 --- a/include/configs/muas3001.h +++ b/include/configs/muas3001.h @@ -33,6 +33,8 @@ #define CONFIG_MPC8260 1 #define CONFIG_MUAS3001 1 +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #define CONFIG_CPM2 1 /* Has a CPM2 */ /* Do boardspecific init */ @@ -225,7 +227,7 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif @@ -275,9 +277,6 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ diff --git a/include/configs/mucmc52.h b/include/configs/mucmc52.h index f87dc9c..101788a 100644 --- a/include/configs/mucmc52.h +++ b/include/configs/mucmc52.h @@ -35,6 +35,10 @@ #define CONFIG_MUCMC52 1 /* MUCMC52 board */ #define CONFIG_HOSTNAME mucmc52 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #include "manroland/common.h" #include "manroland/mpc5200-common.h" diff --git a/include/configs/munices.h b/include/configs/munices.h index fa5230f..97330d5 100644 --- a/include/configs/munices.h +++ b/include/configs/munices.h @@ -31,9 +31,12 @@ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */ #define CONFIG_MUNICES 1 /* ... on MUNICes board */ + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -119,7 +122,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -154,11 +157,11 @@ */ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_OFFSET 0x40000 -#define CONFIG_ENV_ADDR (TEXT_BASE + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET) #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x4000 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_ADDR_REDUND (TEXT_BASE + CONFIG_ENV_OFFSET_REDUND) +#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET_REDUND) #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) #define CONFIG_ENV_OVERWRITE 1 diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 8864f3a..6165473 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -30,8 +30,8 @@ #define CONFIG_MX51 /* in a mx51 */ #define CONFIG_SKIP_RELOCATE_UBOOT -#define CONFIG_MX51_HCLK_FREQ 24000000 /* RedBoot says 26MHz */ -#define CONFIG_MX51_CLK32 32768 +#define CONFIG_SYS_MX5_HCLK 24000000 +#define CONFIG_SYS_MX5_CLK32 32768 #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/neo.h b/include/configs/neo.h index f8f53e8..1063d12 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -29,6 +29,8 @@ #define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_NEO 1 /* on a Neo board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h index 8f42b6c..122f139 100644 --- a/include/configs/netstal-common.h +++ b/include/configs/netstal-common.h @@ -27,7 +27,7 @@ #define __NETSTAL_COMMON_H #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ #define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h index bdc0f79..c9c69bb 100644 --- a/include/configs/o2dnt.h +++ b/include/configs/o2dnt.h @@ -32,10 +32,9 @@ #define CONFIG_MPC5200 #define CONFIG_O2DNT 1 /* ... on O2DNT board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 /* boot low for 16 MiB boards */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -102,10 +101,10 @@ #define CONFIG_CMD_PCI -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 #else -# error "TEXT_BASE must be 0xFF000000" +# error "CONFIG_SYS_TEXT_BASE must be 0xFF000000" #endif /* @@ -222,7 +221,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h index d11d218..f33f0ff 100644 --- a/include/configs/ocotea.h +++ b/include/configs/ocotea.h @@ -46,6 +46,8 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 1bd0f37..900dbd3 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -55,6 +55,15 @@ #undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R +#define CONFIG_OF_LIBFDT 1 +/* + * The early kernel mapping on ARM currently only maps from the base of DRAM + * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. + * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, + * so that leaves DRAM base to DRAM base + 0x4000 available. + */ +#define CONFIG_SYS_BOOTMAPSZ 0x4000 + #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 @@ -95,8 +104,9 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} +#define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_OMAP3_MMC 1 +#define CONFIG_OMAP_HSMMC 1 #define CONFIG_DOS_PARTITION 1 /* DDR - I use Micron DDR */ @@ -111,11 +121,6 @@ #define CONFIG_USB_DEVICE 1 #define CONFIG_USB_TTY 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "Beagle" /* commands to include */ #include <config_cmd_default.h> @@ -189,6 +194,7 @@ "vram=12M\0" \ "dvimode=1024x768MR-16@60\0" \ "defaultdisplay=dvi\0" \ + "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "nandroot=/dev/mtdblock4 rw\0" \ @@ -209,10 +215,10 @@ "omapdss.def_disp=${defaultdisplay} " \ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ - "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ + "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source ${loadaddr}\0" \ - "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ + "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "bootm ${loadaddr}\0" \ @@ -222,7 +228,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc init; then " \ + "if mmc rescan ${mmcdev}; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index a0e0f24..69f9126 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -87,8 +87,9 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 115200} +#define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_OMAP3_MMC 1 +#define CONFIG_OMAP_HSMMC 1 #define CONFIG_DOS_PARTITION 1 /* DDR - I use Micron DDR */ @@ -97,6 +98,7 @@ /* commands to include */ #include <config_cmd_default.h> +#define CONFIG_CMD_CACHE #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ @@ -158,6 +160,7 @@ "vram=12M\0" \ "dvimode=1024x768MR-16@60\0" \ "defaultdisplay=dvi\0" \ + "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "nandroot=/dev/mtdblock4 rw\0" \ @@ -178,10 +181,10 @@ "omapdss.def_disp=${defaultdisplay} " \ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ - "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ + "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source ${loadaddr}\0" \ - "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ + "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "bootm ${loadaddr}\0" \ @@ -191,7 +194,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc init; then " \ + "if mmc rescan ${mmcdev}; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ @@ -321,4 +324,7 @@ extern unsigned int boot_flash_type; #endif /* (CONFIG_CMD_NET) */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index a0d27a4..b52ca19 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -89,7 +89,6 @@ #define CONFIG_SYS_NS16550_COM3 UART3_BASE #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} @@ -107,8 +106,9 @@ #define CONFIG_TWL6030_POWER 1 /* MMC */ +#define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_OMAP3_MMC 1 +#define CONFIG_OMAP_HSMMC 1 #define CONFIG_SYS_MMC_SET_DEV 1 #define CONFIG_DOS_PARTITION 1 @@ -120,11 +120,6 @@ #define CONFIG_USB_DEVICE 1 #define CONFIG_USB_TTY 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "OMAP4 Panda" /* Flash */ #define CONFIG_SYS_NO_FLASH 1 @@ -144,18 +139,11 @@ #undef CONFIG_CMD_IMLS /* List all found images */ /* - * Enabling relocation of u-boot by default - * Relocation can be skipped if u-boot is copied to the TEXT_BASE - */ -#undef CONFIG_SKIP_RELOCATE_UBOOT - -/* * Environment setup */ #define CONFIG_BOOTDELAY 3 -/* allow overwriting serial config and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -163,7 +151,7 @@ "console=ttyS2,115200n8\0" \ "usbtty=cdc_acm\0" \ "vram=16M\0" \ - "mmcdev=1\0" \ + "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -179,7 +167,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc init ${mmcdev}; then " \ + "if mmc rescan ${mmcdev}; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ @@ -239,4 +227,7 @@ */ #define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index d5439f9..174d73f 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -63,10 +63,10 @@ /* * Size of malloc() pool - * Total Size Environment - 256k + * Total Size Environment - 128k * Malloc - add 256k */ -#define CONFIG_ENV_SIZE (256 << 10) +#define CONFIG_ENV_SIZE (128 << 10) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10)) #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ /* initial data */ @@ -89,12 +89,9 @@ #define CONFIG_CONS_INDEX 3 #define CONFIG_SYS_NS16550_COM3 UART3_BASE -#define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} - /* I2C */ #define CONFIG_HARD_I2C 1 #define CONFIG_SYS_I2C_SPEED 100000 @@ -108,11 +105,17 @@ #define CONFIG_TWL6030_POWER 1 /* MMC */ +#define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_OMAP3_MMC 1 +#define CONFIG_OMAP_HSMMC 1 #define CONFIG_SYS_MMC_SET_DEV 1 #define CONFIG_DOS_PARTITION 1 +/* MMC ENV related defines */ +#define CONFIG_ENV_IS_IN_MMC 1 +#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ +#define CONFIG_ENV_OFFSET 0xE0000 + /* USB */ #define CONFIG_MUSB_UDC 1 #define CONFIG_USB_OMAP3 1 @@ -121,11 +124,6 @@ #define CONFIG_USB_DEVICE 1 #define CONFIG_USB_TTY 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "SDP4430" /* Flash */ #define CONFIG_SYS_NO_FLASH 1 @@ -138,6 +136,7 @@ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_I2C /* I2C serial bus support */ #define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_SAVEENV /* Disabled commands */ #undef CONFIG_CMD_NET @@ -145,18 +144,11 @@ #undef CONFIG_CMD_IMLS /* List all found images */ /* - * Enabling relocation of u-boot by default - * Relocation can be skipped if u-boot is copied to the TEXT_BASE - */ -#undef CONFIG_SKIP_RELOCATE_UBOOT - -/* * Environment setup */ #define CONFIG_BOOTDELAY 3 -/* allow overwriting serial config and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -164,7 +156,7 @@ "console=ttyS2,115200n8\0" \ "usbtty=cdc_acm\0" \ "vram=16M\0" \ - "mmcdev=1\0" \ + "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -180,7 +172,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc init ${mmcdev}; then " \ + "if mmc rescan ${mmcdev}; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ @@ -240,4 +232,7 @@ */ #define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ diff --git a/include/configs/p3mx.h b/include/configs/p3mx.h index 17ec08f..8b5ef8f 100644 --- a/include/configs/p3mx.h +++ b/include/configs/p3mx.h @@ -40,6 +40,8 @@ *----------------------------------------------------------------------*/ #define CONFIG_P3Mx /* used for both board versions */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #if defined (CONFIG_P3M750) #define CONFIG_750FX /* 750GL/GX/FX */ #define CONFIG_HIGH_BATS /* High BATs supported */ @@ -447,12 +449,4 @@ #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 6edf91e..71529a2 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -39,6 +39,9 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ + +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ /*----------------------------------------------------------------------- @@ -318,14 +321,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h index 5ad745e..d5cf89a 100644 --- a/include/configs/pb1x00.h +++ b/include/configs/pb1x00.h @@ -104,7 +104,7 @@ #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x4000000 diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h index 8acf3c7..5898b4e 100644 --- a/include/configs/pcm030.h +++ b/include/configs/pcm030.h @@ -41,9 +41,18 @@ High Level Configuration Options #define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */ #define CONFIG_PHYCORE_MPC5200B_TINY 1 /* phyCORE-MPC5200B -> */ /* FEC configuration and IDE */ + +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0xFF000000 boot low + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ /*----------------------------------------------------------------------------- Serial console configuration @@ -71,7 +80,7 @@ Serial console configuration #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ -#if (TEXT_BASE == 0xFF000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low */ #define CONFIG_SYS_LOWBOOT 1 #endif /* RAMBOOT will be defined automatically in memory section */ @@ -222,7 +231,7 @@ RTC configuration CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index 85152d1..afdd69c 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -40,6 +40,9 @@ #define CONFIG_440EP 1 /* Specific PPC440EP support */ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_4xx 1 /* ... PPC4xx family */ + +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ @@ -443,14 +446,6 @@ } \ } -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h index f073fcd..37a22a7 100644 --- a/include/configs/pdm360ng.h +++ b/include/configs/pdm360ng.h @@ -49,6 +49,8 @@ #define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ +#define CONFIG_SYS_TEXT_BASE 0xF0000000 + /* Used for silent command in environment */ #define CONFIG_SYS_DEVICE_NULLDEV #define CONFIG_SILENT_CONSOLE @@ -271,7 +273,7 @@ #define CONFIG_FDT_FIXUP_PARTITIONS #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of monitor */ #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* 512 kB for monitor */ #ifdef CONFIG_FSL_DIU_FB #define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* for malloc */ @@ -432,14 +434,6 @@ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/pf5200.h b/include/configs/pf5200.h index 80a0bc6..28dfe3b 100644 --- a/include/configs/pf5200.h +++ b/include/configs/pf5200.h @@ -44,10 +44,11 @@ #define CONFIG_PF5200 1 /* ... on PF5200 board */ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -122,11 +123,11 @@ #define CONFIG_CMD_PCI -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #endif -#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT08 1 #endif @@ -226,7 +227,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/ppmc7xx.h b/include/configs/ppmc7xx.h index 04779c4..e7584c3 100644 --- a/include/configs/ppmc7xx.h +++ b/include/configs/ppmc7xx.h @@ -49,6 +49,7 @@ #undef CONFIG_ALTIVEC #define CONFIG_BUS_CLK 66000000 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* * Monitor configuration @@ -240,7 +241,7 @@ * CONFIG_SYS_MALLOC_LEN - Size of malloc pool (128KB) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN 0x20000 @@ -414,16 +415,4 @@ #define CONFIG_SYS_BOARD_ASM_INIT - -/* - * Boot flags - * - * BOOTFLAG_COLD - Indicates a power-on boot - * BOOTFLAG_WARM - Indicates a software reset - */ - -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 - - #endif /* __CONFIG_H */ diff --git a/include/configs/ppmc8260.h b/include/configs/ppmc8260.h index f387601..7018a8c 100644 --- a/include/configs/ppmc8260.h +++ b/include/configs/ppmc8260.h @@ -34,6 +34,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0xfe000000 + /***************************************************************************** * * These settings must match the way _your_ board is set up @@ -76,7 +78,7 @@ #define CONFIG_SYS_PPMC_BOOT_LOW 1 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/ppmc8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/ppmc8260/config.mk * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -1004,13 +1006,4 @@ ORxG_TRLX |\ ORxG_EHTR) #endif /* CONFIG_SYS_LED_BASE */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/purple.h b/include/configs/purple.h index 2573aa1..25d8ebe 100644 --- a/include/configs/purple.h +++ b/include/configs/purple.h @@ -134,7 +134,7 @@ #define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index cbacdf9..fb697d5 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -136,7 +136,7 @@ */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/qong.h b/include/configs/qong.h index 7f284ef..426d90d 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -66,8 +66,11 @@ #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) /* FPGA */ +#define CONFIG_FPGA #define CONFIG_QONG_FPGA 1 #define CONFIG_FPGA_BASE (CS1_BASE) +#define CONFIG_FPGA_LATTICE +#define CONFIG_FPGA_COUNT 1 #ifdef CONFIG_QONG_FPGA /* Ethernet */ @@ -86,6 +89,23 @@ #define CONFIG_BMP_16BPP #define CONFIG_DISPLAY_COM57H5M10XRC +/* USB */ +#define CONFIG_CMD_USB +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_MXC +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORT 2 +#define CONFIG_MXC_USB_PORTSC (MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT) +#define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_VFAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#endif /* CONFIG_CMD_USB */ + /* * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the * initial TFTP transfer, should the user wish one, significantly. @@ -105,25 +125,16 @@ #include <config_cmd_default.h> #define CONFIG_CMD_CACHE -#define CONFIG_CMD_PING +#define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_NET #define CONFIG_CMD_MII #define CONFIG_CMD_NAND +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_SETEXPR #define CONFIG_CMD_SPI -#define CONFIG_CMD_DATE -#define BOARD_LATE_INIT -/* - * You can compile in a MAC address and your custom net settings by using - * the following syntax. - * - * #define CONFIG_ETHADDR xx:xx:xx:xx:xx:xx - * #define CONFIG_SERVERIP <server ip> - * #define CONFIG_IPADDR <board ip> - * #define CONFIG_GATEWAYIP <gateway ip> - * #define CONFIG_NETMASK <your netmask> - */ +#define BOARD_LATE_INIT #define CONFIG_BOOTDELAY 5 @@ -145,7 +156,7 @@ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ "addmisc=setenv bootargs ${bootargs}\0" \ "uboot_addr=A0000000\0" \ - "kernel_addr=A00A0000\0" \ + "kernel_addr=A00C0000\0" \ "ramdisk_addr=A0300000\0" \ "u-boot=qong/u-boot.bin\0" \ "kernel_addr_r=80800000\0" \ @@ -247,7 +258,7 @@ extern int qong_nand_rdy(void *chip); #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x60000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x80000) /* Address and size of Redundant Environment Sector */ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) @@ -277,10 +288,14 @@ extern int qong_nand_rdy(void *chip); #define CONFIG_LZO #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_FLASH_CFI_MTD -#define MTDIDS_DEFAULT "nor0=physmap-flash.0" +#define MTDIDS_DEFAULT "nor0=physmap-flash.0," \ + "nand0=gen_nand" #define MTDPARTS_DEFAULT \ - "mtdparts=physmap-flash.0:384k(U-Boot),128k(env1)," \ - "128k(env2),2432k(kernel),13m(ramdisk),-(user)" + "mtdparts=physmap-flash.0:" \ + "512k(U-Boot),128k(env1),128k(env2)," \ + "2304k(kernel),13m(ramdisk),-(user);" \ + "gen_nand:" \ + "128m(nand)" /* additions for new relocation code, must be added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 0764cc8..f847f9c 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -34,6 +34,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EP 1 /* Specifc 405EP support*/ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ @@ -175,7 +177,7 @@ #define CONFIG_SYS_FLASH_BASE 0xFFC00000 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ -#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE) +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE) /* * For booting Linux, the board info and command line data @@ -207,7 +209,7 @@ #ifdef CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ /* the environment is located before u-boot */ -#define CONFIG_ENV_ADDR (TEXT_BASE - CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE - CONFIG_ENV_SECT_SIZE) /* Address and size of Redundant Environment Sector */ #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE) diff --git a/include/configs/quantum.h b/include/configs/quantum.h index e440e93..2440eee 100644 --- a/include/configs/quantum.h +++ b/include/configs/quantum.h @@ -39,6 +39,8 @@ #define CONFIG_RPXLITE 1 /* QUANTUM is the RPXlite clone */ #define CONFIG_RMU 1 /* The QUNATUM is based on our RMU */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -405,14 +407,6 @@ MAMR_RLFA_16X | MAMR_WLFA_16X | MAMR_TLFA_16X) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * BCSRx * * Board Status and Control Registers diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 955f3ff..bc518db 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -49,7 +49,7 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (TEXT_BASE - 0x100000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) /* Address of u-boot image in Flash */ diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 3afe93a..41376da 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -73,7 +73,7 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (TEXT_BASE - 0x100000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) /* Flash board support */ #define CONFIG_SYS_FLASH_BASE (0xA0000000) diff --git a/include/configs/redwood.h b/include/configs/redwood.h index 3c1e882..a7d5dac 100644 --- a/include/configs/redwood.h +++ b/include/configs/redwood.h @@ -33,6 +33,8 @@ #define CONFIG_460SX 1 /* ... PPC460 family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ +#define CONFIG_SYS_TEXT_BASE 0xfffb0000 + /*----------------------------------------------------------------------- * Include common defines/options for all AMCC boards *----------------------------------------------------------------------*/ diff --git a/include/configs/rmu.h b/include/configs/rmu.h index 026826b..5e6bc27 100644 --- a/include/configs/rmu.h +++ b/include/configs/rmu.h @@ -39,6 +39,8 @@ #define CONFIG_RPXLITE 1 /* RMU is the RPXlite clone */ #define CONFIG_RMU 1 +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -169,7 +171,7 @@ #else #define CONFIG_SYS_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ /* @@ -189,7 +191,7 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ #define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR ((TEXT_BASE) + 0x40000) +#define CONFIG_ENV_ADDR ((CONFIG_SYS_TEXT_BASE) + 0x40000) #define CONFIG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */ #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Used size for environment */ @@ -381,14 +383,6 @@ MAMR_RLFA_16X | MAMR_WLFA_16X | MAMR_TLFA_16X) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * BCSRx * * Board Status and Control Registers diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h index 8207844..b82ff37 100644 --- a/include/configs/rsdproto.h +++ b/include/configs/rsdproto.h @@ -39,6 +39,8 @@ #define CONFIG_RSD_PROTO 1 /* on a R&S Protocol Board */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xff000000 + #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ /* @@ -419,12 +421,4 @@ #define CONFIG_SYS_OR5_PRELIM (P2SZ_TO_AM(PHYS_DPRAM_SHARC_SIZE) | \ ORxG_ACS_DIV4) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h index b0198aa..d741716 100644 --- a/include/configs/sacsng.h +++ b/include/configs/sacsng.h @@ -35,6 +35,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ #undef CONFIG_LOGBUFFER /* External logbuffer support */ @@ -85,7 +87,7 @@ #define CONFIG_SYS_SBC_BOOT_LOW 1 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/sacsng/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sacsng/config.mk * The main FLASH is whichever is connected to *CS0. */ #define CONFIG_SYS_FLASH0_BASE 0x40000000 @@ -1062,12 +1064,4 @@ ORxG_EHTR) #endif /* (defined(CONFIG_SYS_FLASH1_BASE) && defined(CONFIG_SYS_FLASH1_SIZE)) */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h index 187002c..3de2a9e 100644 --- a/include/configs/sbc405.h +++ b/include/configs/sbc405.h @@ -36,6 +36,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_SBC405 1 /* ...on a WR SBC405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -274,12 +276,4 @@ #define SPD_EEPROM_ADDRESS 0x50 #define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/sbc8240.h b/include/configs/sbc8240.h index 1cc2920..0934a00 100644 --- a/include/configs/sbc8240.h +++ b/include/configs/sbc8240.h @@ -43,6 +43,8 @@ #define CONFIG_MPC8240 1 #define CONFIG_WRSBC8240 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } @@ -175,7 +177,7 @@ typedef unsigned int led_id_t; #define CONFIG_SYS_EUMB_ADDR 0xFCE00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -353,14 +355,6 @@ typedef unsigned int led_id_t; # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- diff --git a/include/configs/sbc8260.h b/include/configs/sbc8260.h index 3fa80a8..54a1a36 100644 --- a/include/configs/sbc8260.h +++ b/include/configs/sbc8260.h @@ -35,6 +35,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* Enable debug prints */ #undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ @@ -84,7 +86,7 @@ #define CONFIG_SYS_SBC_BOOT_LOW 1 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/sbc8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sbc8260/config.mk * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -1076,13 +1078,4 @@ ORxG_TRLX |\ ORxG_EHTR) #endif /* CONFIG_SYS_LED_BASE */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index b8f4b6e..ee2292c 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -32,21 +32,6 @@ #define __CONFIG_H /* - * Top level Makefile configuration choices - */ -#ifdef CONFIG_MK_PCI -#define CONFIG_PCI -#endif - -#ifdef CONFIG_MK_66 -#define PCI_66M -#endif - -#ifdef CONFIG_MK_33 -#define PCI_33M -#endif - -/* * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ @@ -55,6 +40,8 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */ +#define CONFIG_SYS_TEXT_BASE 0xFF800000 + /* Don't enable PCI2 on sbc834x - it doesn't exist physically. */ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ @@ -64,14 +51,14 @@ * physically empty. The board will automatically (i.e w/o jumpers) * clock down to 33MHz if you insert a 33MHz PCI card. */ -#ifdef PCI_33M +#ifdef CONFIG_PCI_33M #define CONFIG_83XX_CLKIN 33000000 /* in Hz */ #else /* 66M */ #define CONFIG_83XX_CLKIN 66000000 /* in Hz */ #endif #ifndef CONFIG_SYS_CLK_FREQ -#ifdef PCI_33M +#ifdef CONFIG_PCI_33M #define CONFIG_SYS_CLK_FREQ 33000000 #define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1 #else /* 66M */ @@ -172,7 +159,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -612,14 +599,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 8d047de..0ddd20d 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -32,20 +32,19 @@ /* * Top level Makefile configuration choices */ -#ifdef CONFIG_MK_PCI -#define CONFIG_PCI +#ifdef CONFIG_PCI #define CONFIG_PCI1 #endif -#ifdef CONFIG_MK_66 +#ifdef CONFIG_66 #define CONFIG_SYS_CLK_DIV 1 #endif -#ifdef CONFIG_MK_33 +#ifdef CONFIG_33 #define CONFIG_SYS_CLK_DIV 2 #endif -#ifdef CONFIG_MK_PCIE +#ifdef CONFIG_PCIE #define CONFIG_PCIE1 #endif @@ -58,6 +57,10 @@ #define CONFIG_MPC8548 1 /* MPC8548 specific */ #define CONFIG_SBC8548 1 /* SBC8548 board specific */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfffa0000 +#endif + #undef CONFIG_RIO #ifdef CONFIG_PCI @@ -206,7 +209,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -328,12 +331,12 @@ /* * For soldered on flash, (128kB/sector) we use 2 sectors for u-boot and - * one for env+bootpg (TEXT_BASE=0xfffa_0000, 384kB total). For SODIMM + * one for env+bootpg (CONFIG_SYS_TEXT_BASE=0xfffa_0000, 384kB total). For SODIMM * flash (512kB/sector) we use 1 sector for u-boot, and one for env+bootpg - * (TEXT_BASE=0xfff0_0000, 1MB total). This dynamically sets the right + * (CONFIG_SYS_TEXT_BASE=0xfff0_0000, 1MB total). This dynamically sets the right * thing for MONITOR_LEN in both cases. */ -#define CONFIG_SYS_MONITOR_LEN (~TEXT_BASE + 1) +#define CONFIG_SYS_MONITOR_LEN (~CONFIG_SYS_TEXT_BASE + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */ /* Serial Port */ @@ -451,10 +454,10 @@ */ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SIZE 0x2000 -#if TEXT_BASE == 0xfff00000 /* Boot from 64MB SODIMM */ +#if CONFIG_SYS_TEXT_BASE == 0xfff00000 /* Boot from 64MB SODIMM */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x80000) #define CONFIG_ENV_SECT_SIZE 0x80000 /* 512K(one sector) for env */ -#elif TEXT_BASE == 0xfffa0000 /* Boot from 8MB soldered flash */ +#elif CONFIG_SYS_TEXT_BASE == 0xfffa0000 /* Boot from 8MB soldered flash */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x40000) #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ #else @@ -516,14 +519,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -563,11 +558,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=uRamdisk\0" \ diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 6352278..cd9652c 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -34,7 +34,7 @@ /* * Top level Makefile configuration choices */ -#ifdef CONFIG_MK_66 +#ifdef CONFIG_66 #define CONFIG_PCI_66 #endif @@ -46,6 +46,8 @@ #define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ #define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */ +#define CONFIG_SYS_TEXT_BASE 0xfffc0000 + #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_SBC8560 1 /* configuration for SBC8560 board */ @@ -327,7 +329,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if 0 /* XXX This doesn't work and I don't want to fix it */ @@ -422,14 +424,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index a7831c0..9e2aef4 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -43,6 +43,8 @@ #define CONFIG_MP 1 /* support multiple processors */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #ifdef RUN_DIAG #define CONFIG_SYS_DIAG_ADDR 0xff800000 #endif @@ -64,6 +66,7 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #undef CONFIG_SPD_EEPROM /* Do not use SPD EEPROM for DDR setup*/ @@ -229,7 +232,7 @@ #undef CONFIG_SYS_FLASH_CHECKSUM #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ #define CONFIG_FLASH_CFI_DRIVER @@ -476,7 +479,7 @@ /* Map the last 1M of flash where we're running from reset */ #define CONFIG_SYS_DBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT6U_EARLY CONFIG_SYS_DBAT6U_EARLY @@ -540,14 +543,6 @@ #define CONFIG_SYS_CACHELINE_SHIFT 5 /*log base 2 of the above value*/ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 278b60e..3e6abf3 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -62,6 +62,8 @@ #define CONFIG_4xx 1 #define CONFIG_405GP 1 +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r() */ @@ -377,7 +379,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFE00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ #define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KiB for malloc() */ @@ -484,14 +486,6 @@ /* Initial value of the stack pointern in internal SRAM */ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* ################################################################################### */ /* These defines will be used in arch/powerpc/cpu/ppc4xx/cpu_init.c to setup external chip selects */ /* They are currently undefined cause they are initiaized in board/solidcard3/init.S */ diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 988d41f..412deea 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -42,6 +42,10 @@ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_4xx 1 /* ... PPC4xx family */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 +#endif + /* * Include common defines/options for all AMCC eval boards */ @@ -53,7 +57,7 @@ /* * Define this if you want support for video console with radeon 9200 pci card - * Also set TEXT_BASE to 0xFFF80000 in board/amcc/sequoia/config.mk in this case + * Also set CONFIG_SYS_TEXT_BASE to 0xFFF80000 in board/amcc/sequoia/config.mk in this case */ #undef CONFIG_VIDEO diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 624fe04..451b534 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -51,7 +51,7 @@ /* input clock of PLL: SMDK6400 has 12MHz input clock */ #define CONFIG_SYS_CLK_FREQ 12000000 -#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000) +#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) #define CONFIG_ENABLE_MMU #endif diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 595d174..bfd09a0 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -210,7 +210,7 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ #define CONFIG_IDENT_STRING " for SMDKC100" -#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000) +#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) #define CONFIG_ENABLE_MMU #endif diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 88be349..0bbad16 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -45,6 +45,8 @@ #define CONFIG_MPC8544 1 #define CONFIG_SOCRATES 1 +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -159,7 +161,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ #define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ @@ -388,14 +390,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/sorcery.h b/include/configs/sorcery.h index 5db1379..75b8e60 100644 --- a/include/configs/sorcery.h +++ b/include/configs/sorcery.h @@ -31,6 +31,8 @@ #define CONFIG_MPC8220 1 #define CONFIG_SORCERY 1 /* Sorcery board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* Input clock running at 60Mhz, read Hid1 for the CPU multiplier to @@ -38,9 +40,6 @@ #define CONFIG_SYS_MPC8220_CLKIN 60000000 /* ... running at 60MHz */ #define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 8 /* VCO multiplier can't be read from any register */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* * Serial console configuration */ @@ -234,7 +233,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/spc1920.h b/include/configs/spc1920.h index 1fe2a04..4d18747 100644 --- a/include/configs/spc1920.h +++ b/include/configs/spc1920.h @@ -26,6 +26,8 @@ #define CONFIG_SPC1920 1 /* SPC1920 board */ #define CONFIG_MPC885 1 /* MPC885 CPU */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_8xx_CONS_SMC1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -161,7 +163,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for monitor */ #ifdef CONFIG_BZIP2 @@ -422,12 +424,4 @@ #define CONFIG_SYS_BR5_PRELIM ((CONFIG_SYS_SPC1920_PLD_BASE & BR_BA_MSK) | BR_PS_8 | BR_V) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/spear3xx.h b/include/configs/spear3xx.h index 0248aba..37bdebb 100644 --- a/include/configs/spear3xx.h +++ b/include/configs/spear3xx.h @@ -28,13 +28,13 @@ * High Level Configuration Options * (easy to change) */ -#if defined(CONFIG_MK_spear300) +#if defined(CONFIG_spear300) #define CONFIG_SPEAR3XX 1 #define CONFIG_SPEAR300 1 -#elif defined(CONFIG_MK_spear310) +#elif defined(CONFIG_spear310) #define CONFIG_SPEAR3XX 1 #define CONFIG_SPEAR310 1 -#elif defined(CONFIG_MK_spear320) +#elif defined(CONFIG_spear320) #define CONFIG_SPEAR3XX 1 #define CONFIG_SPEAR320 1 #endif diff --git a/include/configs/spieval.h b/include/configs/spieval.h index d377e19..b5ac168 100644 --- a/include/configs/spieval.h +++ b/include/configs/spieval.h @@ -41,9 +41,6 @@ #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -176,7 +173,7 @@ #define CONFIG_TIMESTAMP /* display image timestamps */ -#if (TEXT_BASE == 0xFC000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -283,7 +280,7 @@ /* * Flash configuration */ -#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */ /* use CFI flash driver if no module variant is spezified */ #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ @@ -335,7 +332,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index 891d2bf..479fbab 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -43,6 +43,8 @@ #define CONFIG_STXGP3 1 /* Silicon Tx GPPP board specific*/ #define CONFIG_MPC8560 1 +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #undef CONFIG_PCI /* pci ethernet support */ #define CONFIG_TSEC_ENET /* tsec ethernet support*/ #undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ @@ -97,7 +99,7 @@ #define CONFIG_SYS_OR1_PRELIM 0xffff0ff7 /* 64K is enough */ #define CONFIG_SYS_LBC_LCLDEVS_BASE 0xfc000000 /* Base of localbus devices */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -364,14 +366,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index 911c906..6ea5807 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -43,6 +43,8 @@ #define CONFIG_STXSSA 1 /* Silicon Tx GPPP SSA board specific*/ #define CONFIG_MPC8560 1 +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_PCI /* PCI ethernet support */ #define CONFIG_TSEC_ENET /* tsec ethernet support*/ #undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ @@ -109,7 +111,7 @@ #define CONFIG_SYS_BR1_PRELIM 0xFB001801 /* 32-bit port */ #define CONFIG_SYS_OR1_PRELIM 0xFFFF0FF7 /* 64K is enough */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -396,14 +398,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 5854366..b9739ff 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -38,6 +38,8 @@ #define CONFIG_MPC875 1 /* This is a MPC875 CPU */ #define CONFIG_STXXTC 1 /* ...on a STx XTc board */ +#define CONFIG_SYS_TEXT_BASE 0x40F00000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -430,14 +432,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */ /****************************************************************/ diff --git a/include/configs/svm_sc8xx.h b/include/configs/svm_sc8xx.h index 425f472..219b85b 100644 --- a/include/configs/svm_sc8xx.h +++ b/include/configs/svm_sc8xx.h @@ -31,6 +31,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* Custom configuration */ /* SC823,SC850,SC860SAR, FEL8xx-AT(823/850/860) */ /* SC85T,SC860T, FEL8xx-AT(855T/860T) */ @@ -465,13 +467,4 @@ #define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM #define CONFIG_SYS_DOC_BASE 0x80000000 - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h index 39ca793..d00e64e 100644 --- a/include/configs/t3corp.h +++ b/include/configs/t3corp.h @@ -31,6 +31,10 @@ #define CONFIG_440 1 #define CONFIG_4xx 1 /* ... PPC4xx family */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + #define CONFIG_HOSTNAME t3corp /* diff --git a/include/configs/taihu.h b/include/configs/taihu.h index 7e660ee..6e9dbc5 100644 --- a/include/configs/taihu.h +++ b/include/configs/taihu.h @@ -32,6 +32,8 @@ #define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_TAIHU 1 /* on a taihu board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/taishan.h b/include/configs/taishan.h index faf9e20..12f35ae 100644 --- a/include/configs/taishan.h +++ b/include/configs/taishan.h @@ -34,6 +34,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/tb0229.h b/include/configs/tb0229.h index 9285c9d..011a683 100644 --- a/include/configs/tb0229.h +++ b/include/configs/tb0229.h @@ -142,7 +142,7 @@ #define PHYS_FLASH_1 0xbfc00000 /* Flash Bank #1 */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/tnetv107x_evm.h b/include/configs/tnetv107x_evm.h index 454e9b2..f423a0e 100644 --- a/include/configs/tnetv107x_evm.h +++ b/include/configs/tnetv107x_evm.h @@ -33,7 +33,7 @@ #define CONFIG_TNETV107X #define CONFIG_TNETV107X_EVM #define CONFIG_ARCH_CPU_INIT -#define CONFIG_SYS_UBOOT_BASE TEXT_BASE +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_DISABLE_TCM #define CONFIG_PERIPORT_REMAP #define CONFIG_PERIPORT_BASE 0x2000000 diff --git a/include/configs/uc100.h b/include/configs/uc100.h index 23f4c82..5392fb5 100644 --- a/include/configs/uc100.h +++ b/include/configs/uc100.h @@ -40,6 +40,8 @@ #define CONFIG_UC100 1 /* ...on a UC100 module */ +#define CONFIG_SYS_TEXT_BASE 0x40700000 + #define MPC8XX_FACT 4 /* Multiply by 4 */ #define MPC8XX_XIN 25000000 /* 25.0 MHz in */ #define CONFIG_8xx_GCLK_FREQ (MPC8XX_FACT * MPC8XX_XIN) @@ -499,14 +501,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* takes up to 10 msec */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_FEC_ENET 1 /* use FEC ethernet */ #define FEC_ENET #define CONFIG_MII diff --git a/include/configs/uc101.h b/include/configs/uc101.h index 1972261..483534c 100644 --- a/include/configs/uc101.h +++ b/include/configs/uc101.h @@ -32,6 +32,10 @@ #define CONFIG_UC101 1 /* UC101 board */ #define CONFIG_HOSTNAME uc101 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #include "manroland/common.h" #include "manroland/mpc5200-common.h" diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h index 1a47aad..c027f46 100644 --- a/include/configs/utx8245.h +++ b/include/configs/utx8245.h @@ -49,6 +49,9 @@ #define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_UTX8245 1 + +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define DEBUG 1 #define CONFIG_IDENT_STRING " [UTX5] " @@ -176,7 +179,7 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}" #define CONFIG_SYS_EUMB_ADDR 0xFC000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -425,13 +428,4 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}" # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/v37.h b/include/configs/v37.h index 7f1670e..c34b6e8 100644 --- a/include/configs/v37.h +++ b/include/configs/v37.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_V37 1 /* ...on a Marel V37 board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_LCD #define CONFIG_SHARP_LQ084V1DG21 #undef CONFIG_LCD_LOGO @@ -391,12 +393,4 @@ MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A12 | \ MAMR_GPL_A4DIS | MAMR_RLFA_4X | MAMR_WLFA_3X | MAMR_TLFA_16X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/v38b.h b/include/configs/v38b.h index 600ccfb..96ffc6a 100644 --- a/include/configs/v38b.h +++ b/include/configs/v38b.h @@ -29,6 +29,9 @@ #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_V38B 1 /* ...on V38B board */ + +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ...running at 33.000000MHz */ #define CONFIG_RTC_PCF8563 1 /* has PCF8563 RTC */ @@ -44,9 +47,6 @@ #define CONFIG_SYS_XLB_PIPELINING 1 /* gives better performance */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -233,7 +233,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/vct.h b/include/configs/vct.h index 1b894a6..4894969 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -45,7 +45,7 @@ #define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) #define CONFIG_STACKSIZE (256 << 10) #define CONFIG_SYS_MALLOC_LEN (1 << 20) diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 45976db..283b92c 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -38,6 +38,10 @@ #define CONFIG_MPC8313 1 #define CONFIG_VE8313 1 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfe000000 +#endif + #define CONFIG_PCI 1 #define CONFIG_FSL_ELBC 1 @@ -159,7 +163,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -475,14 +479,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_NETDEV eth0 #define CONFIG_HOSTNAME ve8313 diff --git a/include/configs/virtlab2.h b/include/configs/virtlab2.h index 7046e67..56fb5f7 100644 --- a/include/configs/virtlab2.h +++ b/include/configs/virtlab2.h @@ -37,6 +37,8 @@ #define CONFIG_VIRTLAB2 1 /* ...on a virtlab2 module */ #define CONFIG_TQM8xxL 1 +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -475,15 +477,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* Map peripheral control registers on CS4 */ #define CONFIG_SYS_PERIPHERAL_BASE 0xA0000000 #define CONFIG_SYS_PERIPHERAL_OR_AM 0xFFFF8000 /* 32 kB address mask */ diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 44a6f8b..a2ecbe5 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -29,8 +29,8 @@ #define CONFIG_MX51 /* in a mx51 */ #define CONFIG_L2_OFF -#define CONFIG_MX51_HCLK_FREQ 24000000 -#define CONFIG_MX51_CLK32 32768 +#define CONFIG_SYS_MX5_HCLK 24000000 +#define CONFIG_SYS_MX5_CLK32 32768 #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index f2fb592..2c95c12 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -2,7 +2,7 @@ * esd vme8349 U-Boot configuration file * Copyright (c) 2008, 2009 esd gmbh Hannover Germany * - * (C) Copyright 2006 + * (C) Copyright 2006-2010 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * reinhard.arlt@esd-electronics.de @@ -37,7 +37,7 @@ /* * Top level Makefile configuration choices */ -#ifdef CONFIG_MK_caddy2 +#ifdef CONFIG_CADDY2 #define VME_CADDY2 #endif @@ -50,21 +50,23 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_VME8349 1 /* ESD VME8349 board specific */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_MISC_INIT_R #define CONFIG_PCI /* Don't enable PCI2 on vme834x - it doesn't exist physically. */ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ -#define PCI_66M -#ifdef PCI_66M +#define CONFIG_PCI_66M +#ifdef CONFIG_PCI_66M #define CONFIG_83XX_CLKIN 66000000 /* in Hz */ #else #define CONFIG_83XX_CLKIN 33000000 /* in Hz */ #endif #ifndef CONFIG_SYS_CLK_FREQ -#ifdef PCI_66M +#ifdef CONFIG_PCI_66M #define CONFIG_SYS_CLK_FREQ 66000000 #define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1 #else @@ -149,7 +151,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase TO (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write TO (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -538,14 +540,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/walnut.h b/include/configs/walnut.h index 3be489d..72ac4e3 100644 --- a/include/configs/walnut.h +++ b/include/configs/walnut.h @@ -36,7 +36,9 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_WALNUT 1 /* ...on a WALNUT board */ - /* ...and on a SYCAMORE board */ + /* ...or on a SYCAMORE board */ + +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 /* * Include common defines/options for all AMCC eval boards diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h index 6efe342..b4a9675 100644 --- a/include/configs/xilinx-ppc.h +++ b/include/configs/xilinx-ppc.h @@ -28,7 +28,7 @@ /*Mem Map*/ #define CONFIG_SYS_SDRAM_BASE 0x0 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 * 1024) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index ed0560a..0d450f5 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -42,6 +42,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/yucca.h b/include/configs/yucca.h index 4e64eec..8d5d45f 100644 --- a/include/configs/yucca.h +++ b/include/configs/yucca.h @@ -45,6 +45,8 @@ #define EXTCLK_50 50000000 #define EXTCLK_83 83333333 +#define CONFIG_SYS_TEXT_BASE 0xfffb0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/zeus.h b/include/configs/zeus.h index 06d4526..5ddec84 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -34,6 +34,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EP 1 /* Specifc 405EP support*/ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ @@ -302,14 +304,6 @@ #define CONFIG_SYS_TIME_POST 5000 #define CONFIG_SYS_TIME_FACTORY_RESET 10000 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/fat.h b/include/fat.h index de48afd..afb2116 100644 --- a/include/fat.h +++ b/include/fat.h @@ -30,6 +30,10 @@ #include <asm/byteorder.h> #define CONFIG_SUPPORT_VFAT +/* Maximum Long File Name length supported here is 128 UTF-16 code units */ +#define VFAT_MAXLEN_BYTES 256 /* Maximum LFN buffer in bytes */ +#define VFAT_MAXSEQ 9 /* Up to 9 of 13 2-byte UTF-16 entries */ +#define LINEAR_PREFETCH_SIZE (SECTOR_SIZE*2) /* Prefetch buffer size */ #define SECTOR_SIZE FS_BLOCK_SIZE diff --git a/include/fdt_support.h b/include/fdt_support.h index fd94929..ce6817b 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -48,6 +48,7 @@ void do_fixup_by_compat(void *fdt, const char *compat, void do_fixup_by_compat_u32(void *fdt, const char *compat, const char *prop, u32 val, int create); int fdt_fixup_memory(void *blob, u64 start, u64 size); +int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks); void fdt_fixup_ethernet(void *fdt); int fdt_find_and_setprop(void *fdt, const char *node, const char *prop, const void *val, int len, int create); @@ -87,6 +88,7 @@ u64 fdt_translate_address(void *blob, int node_offset, const u32 *in_addr); int fdt_node_offset_by_compat_reg(void *blob, const char *compat, phys_addr_t compat_off); int fdt_alloc_phandle(void *blob); +int fdt_add_edid(void *blob, const char *compat, unsigned char *buf); #endif /* ifdef CONFIG_OF_LIBFDT */ #endif /* ifndef __FDT_SUPPORT_H */ diff --git a/include/fpga.h b/include/fpga.h index 84d7b9f..ac24f2b 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -61,6 +61,7 @@ typedef enum { /* typedef fpga_type */ fpga_min_type, /* range check value */ fpga_xilinx, /* Xilinx Family) */ fpga_altera, /* unimplemented */ + fpga_lattice, /* Lattice family */ fpga_undefined /* invalid range check value */ } fpga_type; /* end, typedef fpga_type */ diff --git a/include/image.h b/include/image.h index 18a9f0e..49d6280 100644 --- a/include/image.h +++ b/include/image.h @@ -340,14 +340,17 @@ int boot_relocate_fdt (struct lmb *lmb, ulong bootmap_base, char **of_flat_tree, ulong *of_size); #endif -#if defined(CONFIG_PPC) || defined(CONFIG_M68K) +#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH int boot_ramdisk_high (struct lmb *lmb, ulong rd_data, ulong rd_len, ulong *initrd_start, ulong *initrd_end); - +#endif /* CONFIG_SYS_BOOT_RAMDISK_HIGH */ +#ifdef CONFIG_SYS_BOOT_GET_CMDLINE int boot_get_cmdline (struct lmb *lmb, ulong *cmd_start, ulong *cmd_end, ulong bootmap_base); +#endif /* CONFIG_SYS_BOOT_GET_CMDLINE */ +#ifdef CONFIG_SYS_BOOT_GET_KBD int boot_get_kbd (struct lmb *lmb, bd_t **kbd, ulong bootmap_base); -#endif /* CONFIG_PPC || CONFIG_M68K */ +#endif /* CONFIG_SYS_BOOT_GET_KBD */ #endif /* !USE_HOSTCC */ /*******************************************************************/ diff --git a/include/lattice.h b/include/lattice.h new file mode 100755 index 0000000..33d2ac3 --- /dev/null +++ b/include/lattice.h @@ -0,0 +1,319 @@ +/* + * Porting to U-Boot: + * + * (C) Copyright 2010 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * Lattice's ispVME Embedded Tool to load Lattice's FPGA: + * + * Lattice Semiconductor Corp. Copyright 2009 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef _VME_OPCODE_H +#define _VME_OPCODE_H + +#define VME_VERSION_NUMBER "12.1" + +/* Maximum declarations. */ + +#define VMEHEXMAX 60000L /* The hex file is split 60K per file. */ +#define SCANMAX 64000L /* The maximum SDR/SIR burst. */ + +/* + * + * Supported JTAG state transitions. + * + */ + +#define RESET 0x00 +#define IDLE 0x01 +#define IRPAUSE 0x02 +#define DRPAUSE 0x03 +#define SHIFTIR 0x04 +#define SHIFTDR 0x05 +/* 11/15/05 Nguyen changed to support DRCAPTURE*/ +#define DRCAPTURE 0x06 + +/* + * Flow control register bit definitions. A set bit indicates + * that the register currently exhibits the corresponding mode. + */ + +#define INTEL_PRGM 0x0001 /* Intelligent programming is in effect. */ +#define CASCADE 0x0002 /* Currently splitting large SDR. */ +#define REPEATLOOP 0x0008 /* Currently executing a repeat loop. */ +#define SHIFTRIGHT 0x0080 /* The next data stream needs a right shift. */ +#define SHIFTLEFT 0x0100 /* The next data stream needs a left shift. */ +#define VERIFYUES 0x0200 /* Continue if fail is in effect. */ + +/* + * DataType register bit definitions. A set bit indicates + * that the register currently holds the corresponding type of data. + */ + +#define EXPRESS 0x0001 /* Simultaneous program and verify. */ +#define SIR_DATA 0x0002 /* SIR is the active SVF command. */ +#define SDR_DATA 0x0004 /* SDR is the active SVF command. */ +#define COMPRESS 0x0008 /* Data is compressed. */ +#define TDI_DATA 0x0010 /* TDI data is present. */ +#define TDO_DATA 0x0020 /* TDO data is present. */ +#define MASK_DATA 0x0040 /* MASK data is present. */ +#define HEAP_IN 0x0080 /* Data is from the heap. */ +#define LHEAP_IN 0x0200 /* Data is from intel data buffer. */ +#define VARIABLE 0x0400 /* Data is from a declared variable. */ +#define CRC_DATA 0x0800 /* CRC data is pressent. */ +#define CMASK_DATA 0x1000 /* CMASK data is pressent. */ +#define RMASK_DATA 0x2000 /* RMASK data is pressent. */ +#define READ_DATA 0x4000 /* READ data is pressent. */ +#define DMASK_DATA 0x8000 /* DMASK data is pressent. */ + +/* + * + * Pin opcodes. + * + */ + +#define signalENABLE 0x1C /* ispENABLE pin. */ +#define signalTMS 0x1D /* TMS pin. */ +#define signalTCK 0x1E /* TCK pin. */ +#define signalTDI 0x1F /* TDI pin. */ +#define signalTRST 0x20 /* TRST pin. */ + +/* + * + * Supported vendors. + * + */ + +#define VENDOR 0x56 +#define LATTICE 0x01 +#define ALTERA 0x02 +#define XILINX 0x03 + +/* + * Opcode definitions. + * + * Note: opcodes must be unique. + */ + +#define ENDDATA 0x00 /* The end of the current SDR data stream. */ +#define RUNTEST 0x01 /* The duration to stay at the stable state. */ +#define ENDDR 0x02 /* The stable state after SDR. */ +#define ENDIR 0x03 /* The stable state after SIR. */ +#define ENDSTATE 0x04 /* The stable state after RUNTEST. */ +#define TRST 0x05 /* Assert the TRST pin. */ +#define HIR 0x06 /* + * The sum of the IR bits of the + * leading devices. + */ +#define TIR 0x07 /* + * The sum of the IR bits of the trailing + * devices. + */ +#define HDR 0x08 /* The number of leading devices. */ +#define TDR 0x09 /* The number of trailing devices. */ +#define ispEN 0x0A /* Assert the ispEN pin. */ +#define FREQUENCY 0x0B /* + * The maximum clock rate to run the JTAG state + * machine. + */ +#define STATE 0x10 /* Move to the next stable state. */ +#define SIR 0x11 /* The instruction stream follows. */ +#define SDR 0x12 /* The data stream follows. */ +#define TDI 0x13 /* The following data stream feeds into + the device. */ +#define TDO 0x14 /* + * The following data stream is compared against + * the device. + */ +#define MASK 0x15 /* The following data stream is used as mask. */ +#define XSDR 0x16 /* + * The following data stream is for simultaneous + * program and verify. + */ +#define XTDI 0x17 /* The following data stream is for shift in + * only. It must be stored for the next + * XSDR. + */ +#define XTDO 0x18 /* + * There is not data stream. The data stream + * was stored from the previous XTDI. + */ +#define MEM 0x19 /* + * The maximum memory needed to allocate in + * order hold one row of data. + */ +#define WAIT 0x1A /* The duration of delay to observe. */ +#define TCK 0x1B /* The number of TCK pulses. */ +#define SHR 0x23 /* + * Set the flow control register for + * right shift + */ +#define SHL 0x24 /* + * Set the flow control register for left shift. + */ +#define HEAP 0x32 /* The memory size needed to hold one loop. */ +#define REPEAT 0x33 /* The beginning of the loop. */ +#define LEFTPAREN 0x35 /* The beginning of data following the loop. */ +#define VAR 0x55 /* Plac holder for loop data. */ +#define SEC 0x1C /* + * The delay time in seconds that must be + * observed. + */ +#define SMASK 0x1D /* The mask for TDI data. */ +#define MAX_WAIT 0x1E /* The absolute maximum wait time. */ +#define ON 0x1F /* Assert the targeted pin. */ +#define OFF 0x20 /* Dis-assert the targeted pin. */ +#define SETFLOW 0x30 /* Change the flow control register. */ +#define RESETFLOW 0x31 /* Clear the flow control register. */ + +#define CRC 0x47 /* + * The following data stream is used for CRC + * calculation. + */ +#define CMASK 0x48 /* + * The following data stream is used as mask + * for CRC calculation. + */ +#define RMASK 0x49 /* + * The following data stream is used as mask + * for read and save. + */ +#define READ 0x50 /* + * The following data stream is used for read + * and save. + */ +#define ENDLOOP 0x59 /* The end of the repeat loop. */ +#define SECUREHEAP 0x60 /* Used to secure the HEAP opcode. */ +#define VUES 0x61 /* Support continue if fail. */ +#define DMASK 0x62 /* + * The following data stream is used for dynamic + * I/O. + */ +#define COMMENT 0x63 /* Support SVF comments in the VME file. */ +#define HEADER 0x64 /* Support header in VME file. */ +#define FILE_CRC 0x65 /* Support crc-protected VME file. */ +#define LCOUNT 0x66 /* Support intelligent programming. */ +#define LDELAY 0x67 /* Support intelligent programming. */ +#define LSDR 0x68 /* Support intelligent programming. */ +#define LHEAP 0x69 /* + * Memory needed to hold intelligent data + * buffer + */ +#define CONTINUE 0x70 /* Allow continuation. */ +#define LVDS 0x71 /* Support LVDS. */ +#define ENDVME 0x7F /* End of the VME file. */ +#define ENDFILE 0xFF /* End of file. */ + +/* + * + * ispVM Embedded Return Codes. + * + */ + +#define VME_VERIFICATION_FAILURE -1 +#define VME_FILE_READ_FAILURE -2 +#define VME_VERSION_FAILURE -3 +#define VME_INVALID_FILE -4 +#define VME_ARGUMENT_FAILURE -5 +#define VME_CRC_FAILURE -6 + +#define g_ucPinTDI 0x01 +#define g_ucPinTCK 0x02 +#define g_ucPinTMS 0x04 +#define g_ucPinENABLE 0x08 +#define g_ucPinTRST 0x10 + +/* + * + * Type definitions. + * + */ + +/* Support LVDS */ +typedef struct { + unsigned short usPositiveIndex; + unsigned short usNegativeIndex; + unsigned char ucUpdate; +} LVDSPair; + +typedef enum { + min_lattice_iface_type, /* insert all new types after this */ + lattice_jtag_mode, /* jtag/tap */ + max_lattice_iface_type /* insert all new types before this */ +} Lattice_iface; + +typedef enum { + min_lattice_type, + Lattice_XP2, /* Lattice XP2 Family */ + max_lattice_type /* insert all new types before this */ +} Lattice_Family; + +typedef struct { + Lattice_Family family; /* part type */ + Lattice_iface iface; /* interface type */ + size_t size; /* bytes of data part can accept */ + void *iface_fns; /* interface function table */ + void *base; /* base interface address */ + int cookie; /* implementation specific cookie */ + char *desc; /* description string */ +} Lattice_desc; /* end, typedef Altera_desc */ + +/* Lattice Model Type */ +#define CONFIG_SYS_XP2 CONFIG_SYS_FPGA_DEV(0x1) + +/* Board specific implementation specific function types */ +typedef void (*Lattice_jtag_init)(void); +typedef void (*Lattice_jtag_set_tdi)(int v); +typedef void (*Lattice_jtag_set_tms)(int v); +typedef void (*Lattice_jtag_set_tck)(int v); +typedef int (*Lattice_jtag_get_tdo)(void); + +typedef struct { + Lattice_jtag_init jtag_init; + Lattice_jtag_set_tdi jtag_set_tdi; + Lattice_jtag_set_tms jtag_set_tms; + Lattice_jtag_set_tck jtag_set_tck; + Lattice_jtag_get_tdo jtag_get_tdo; +} lattice_board_specific_func; + +void writePort(unsigned char pins, unsigned char value); +unsigned char readPort(void); +void sclock(void); +void ispVMDelay(unsigned short int a_usMicroSecondDelay); +void calibration(void); + +int lattice_load(Lattice_desc *desc, void *buf, size_t bsize); +int lattice_dump(Lattice_desc *desc, void *buf, size_t bsize); +int lattice_info(Lattice_desc *desc); + +void ispVMStart(void); +void ispVMEnd(void); +signed char ispVMCode(void); +void ispVMDelay(unsigned short int a_usMicroSecondDelay); +void ispVMCalculateCRC32(unsigned char a_ucData); +unsigned char GetByte(void); +void writePort(unsigned char pins, unsigned char value); +unsigned char readPort(void); +void sclock(void); +#endif + diff --git a/include/led-display.h b/include/led-display.h new file mode 100644 index 0000000..41c3744 --- /dev/null +++ b/include/led-display.h @@ -0,0 +1,36 @@ +/* + * (C) Copyright 2005-2010 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2010 + * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _led_display_h_ +#define _led_display_h_ + +/* Display Commands */ +#define DISPLAY_CLEAR 0x1 /* Clear the display */ +#define DISPLAY_HOME 0x2 /* Set cursor at home position */ +#define DISPLAY_MARK 0x4 /* Enable the decimal point led, if implemented */ + +void display_set(int cmd); +int display_putc(char c); +#endif diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 16556c4..3b18d7d 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -208,10 +208,6 @@ struct mtd_info { int (*lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); int (*unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); - /* Power Management functions */ - int (*suspend) (struct mtd_info *mtd); - void (*resume) (struct mtd_info *mtd); - /* Bad block management functions */ int (*block_isbad) (struct mtd_info *mtd, loff_t ofs); int (*block_markbad) (struct mtd_info *mtd, loff_t ofs); @@ -259,7 +255,9 @@ extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num); extern struct mtd_info *get_mtd_device_nm(const char *name); extern void put_mtd_device(struct mtd_info *mtd); - +extern void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset, + const uint64_t length, uint64_t *len_incl_bad, + int *truncated); /* XXX U-BOOT XXX */ #if 0 struct mtd_notifier { diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h index 68e174e..5465562 100644 --- a/include/linux/mtd/onenand.h +++ b/include/linux/mtd/onenand.h @@ -154,6 +154,7 @@ struct onenand_chip { /* * OneNAND Flash Manufacturer ID Codes */ +#define ONENAND_MFR_NUMONYX 0x20 #define ONENAND_MFR_SAMSUNG 0xec /** diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h index 2d343c7..859d696 100644 --- a/include/mpc5xxx.h +++ b/include/mpc5xxx.h @@ -160,11 +160,12 @@ #define MPC5XXX_WU_GPIO_DATA_O (MPC5XXX_WU_GPIO + 0x000c) #define MPC5XXX_WU_GPIO_DATA_I (MPC5XXX_WU_GPIO + 0x0020) -/* GPIO pins */ +/* GPIO pins, for Rev.B chip */ #define GPIO_WKUP_7 0x80000000UL #define GPIO_PSC6_0 0x10000000UL #define GPIO_PSC3_9 0x04000000UL #define GPIO_PSC1_4 0x01000000UL +#define GPIO_PSC2_4 0x02000000UL #define MPC5XXX_GPIO_SIMPLE_PSC6_3 0x20000000UL #define MPC5XXX_GPIO_SIMPLE_PSC6_2 0x10000000UL diff --git a/include/nand.h b/include/nand.h index 8bdf419..a452411 100644 --- a/include/nand.h +++ b/include/nand.h @@ -98,13 +98,16 @@ struct nand_read_options { typedef struct nand_read_options nand_read_options_t; struct nand_erase_options { - ulong length; /* number of bytes to erase */ - ulong offset; /* first address in NAND to erase */ + loff_t length; /* number of bytes to erase */ + loff_t offset; /* first address in NAND to erase */ int quiet; /* don't display progress messages */ int jffs2; /* if true: format for jffs2 usage * (write appropriate cleanmarker blocks) */ int scrub; /* if true, really clean NAND by erasing * bad blocks (UNSAFE) */ + + /* Don't include skipped bad blocks in size to be erased */ + int spread; }; typedef struct nand_erase_options nand_erase_options_t; diff --git a/include/netdev.h b/include/netdev.h index 94eedfe..7f66419 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -54,6 +54,8 @@ int designware_initialize(u32 id, ulong base_addr, u32 phy_addr); int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); int e1000_initialize(bd_t *bis); int eepro100_initialize(bd_t *bis); +int enc28j60_initialize(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode); int ep93xx_eth_initialize(u8 dev_num, int base_addr); int ethoc_initialize(u8 dev_num, int base_addr); int eth_3com_initialize (bd_t * bis); @@ -85,9 +87,9 @@ int skge_initialize(bd_t *bis); int smc911x_initialize(u8 dev_num, int base_addr); int smc91111_initialize(u8 dev_num, int base_addr); int tsi108_eth_initialize(bd_t *bis); -int uec_initialize(int index); int uec_standard_init(bd_t *bis); int uli526x_initialize(bd_t *bis); +int xilinx_emaclite_initialize (bd_t *bis, int base_addr); int sh_eth_initialize(bd_t *bis); int dm9000_initialize(bd_t *bis); diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h index f48945a..08691a0 100644 --- a/include/usb/ehci-fsl.h +++ b/include/usb/ehci-fsl.h @@ -35,12 +35,17 @@ #define PORT_PTS_ULPI (2 << 30) #define PORT_PTS_SERIAL (3 << 30) #define PORT_PTS_PTW (1 << 28) +#define PORT_PFSC (1 << 24) /* Defined on Page 39-44 of the mpc5151 ERM */ +#define PORT_PTS_PHCD (1 << 23) +#define PORT_PP (1 << 12) +#define PORT_PR (1 << 8) /* USBMODE Register bits */ #define CM_IDLE (0 << 0) #define CM_RESERVED (1 << 0) #define CM_DEVICE (2 << 0) #define CM_HOST (3 << 0) +#define ES_BE (1 << 2) /* Big Endian Select, default is LE */ #define USBMODE_RESERVED_2 (0 << 2) #define SLOM (1 << 3) #define SDIS (1 << 4) @@ -70,7 +75,78 @@ #define PHY_CLK_VALID (1 << 17) #define FSL_SOC_USB_PORTSC2 0x188 + +/* OTG Status Control Register bits */ +#define FSL_SOC_USB_OTGSC 0x1a4 +#define CTRL_VBUS_DISCHARGE (0x1<<0) +#define CTRL_VBUS_CHARGE (0x1<<1) +#define CTRL_OTG_TERMINATION (0x1<<3) +#define CTRL_DATA_PULSING (0x1<<4) +#define CTRL_ID_PULL_EN (0x1<<5) +#define HA_DATA_PULSE (0x1<<6) +#define HA_BA (0x1<<7) +#define STS_USB_ID (0x1<<8) +#define STS_A_VBUS_VALID (0x1<<9) +#define STS_A_SESSION_VALID (0x1<<10) +#define STS_B_SESSION_VALID (0x1<<11) +#define STS_B_SESSION_END (0x1<<12) +#define STS_1MS_TOGGLE (0x1<<13) +#define STS_DATA_PULSING (0x1<<14) +#define INTSTS_USB_ID (0x1<<16) +#define INTSTS_A_VBUS_VALID (0x1<<17) +#define INTSTS_A_SESSION_VALID (0x1<<18) +#define INTSTS_B_SESSION_VALID (0x1<<19) +#define INTSTS_B_SESSION_END (0x1<<20) +#define INTSTS_1MS (0x1<<21) +#define INTSTS_DATA_PULSING (0x1<<22) +#define INTR_USB_ID_EN (0x1<<24) +#define INTR_A_VBUS_VALID_EN (0x1<<25) +#define INTR_A_SESSION_VALID_EN (0x1<<26) +#define INTR_B_SESSION_VALID_EN (0x1<<27) +#define INTR_B_SESSION_END_EN (0x1<<28) +#define INTR_1MS_TIMER_EN (0x1<<29) +#define INTR_DATA_PULSING_EN (0x1<<30) +#define INTSTS_MASK (0x00ff0000) + +/* USBCMD Bits of interest */ +#define EHCI_FSL_USBCMD_RST (1 << 1) +#define EHCI_FSL_USBCMD_RS (1 << 0) + +#define INTERRUPT_ENABLE_BITS_MASK \ + (INTR_USB_ID_EN | \ + INTR_1MS_TIMER_EN | \ + INTR_A_VBUS_VALID_EN | \ + INTR_A_SESSION_VALID_EN | \ + INTR_B_SESSION_VALID_EN | \ + INTR_B_SESSION_END_EN | \ + INTR_DATA_PULSING_EN) + +#define INTERRUPT_STATUS_BITS_MASK \ + (INTSTS_USB_ID | \ + INTR_1MS_TIMER_EN | \ + INTSTS_A_VBUS_VALID | \ + INTSTS_A_SESSION_VALID | \ + INTSTS_B_SESSION_VALID | \ + INTSTS_B_SESSION_END | \ + INTSTS_DATA_PULSING) + #define FSL_SOC_USB_USBMODE 0x1a8 + +#define USBGENCTRL 0x200 /* NOTE: big endian */ +#define GC_WU_INT_CLR (1 << 5) /* Wakeup int clear */ +#define GC_ULPI_SEL (1 << 4) /* ULPI i/f select (usb0 only)*/ +#define GC_PPP (1 << 3) /* Port Power Polarity */ +#define GC_PFP (1 << 2) /* Power Fault Polarity */ +#define GC_WU_ULPI_EN (1 << 1) /* Wakeup on ULPI event */ +#define GC_WU_IE (1 << 1) /* Wakeup interrupt enable */ + +#define ISIPHYCTRL 0x204 /* NOTE: big endian */ +#define PHYCTRL_PHYE (1 << 4) /* On-chip UTMI PHY enable */ +#define PHYCTRL_BSENH (1 << 3) /* Bit Stuff Enable High */ +#define PHYCTRL_BSEN (1 << 2) /* Bit Stuff Enable */ +#define PHYCTRL_LSFE (1 << 1) /* Line State Filter Enable */ +#define PHYCTRL_PXE (1 << 0) /* PHY oscillator enable */ + #define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ #define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ #define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ @@ -85,65 +161,85 @@ #define MPC83XX_SCCR_USB_DRCM_01 0x00100000 #define MPC83XX_SCCR_USB_DRCM_10 0x00200000 -#if defined(CONFIG_MPC83xx) -#define CONFIG_SYS_MPC8xxx_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR +#if defined(CONFIG_MPC83XX) +#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR #elif defined(CONFIG_MPC85xx) -#define CONFIG_SYS_MPC8xxx_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR +#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR +#elif defined(CONFIG_MPC512X) +#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR #endif /* * USB Registers */ struct usb_ehci { - u8 res1[0x100]; + u32 id; /* 0x000 - Identification register */ + u32 hwgeneral; /* 0x004 - General hardware parameters */ + u32 hwhost; /* 0x008 - Host hardware parameters */ + u32 hwdevice; /* 0x00C - Device hardware parameters */ + u32 hwtxbuf; /* 0x010 - TX buffer hardware parameters */ + u32 hwrxbuf; /* 0x014 - RX buffer hardware parameters */ + u8 res1[0x68]; + u32 gptimer0_ld; /* 0x080 - General Purpose Timer 0 load value */ + u32 gptimer0_ctrl; /* 0x084 - General Purpose Timer 0 control */ + u32 gptimer1_ld; /* 0x088 - General Purpose Timer 1 load value */ + u32 gptimer1_ctrl; /* 0x08C - General Purpose Timer 1 control */ + u32 sbuscfg; /* 0x090 - System Bus Interface Control */ + u8 res2[0x6C]; u16 caplength; /* 0x100 - Capability Register Length */ u16 hciversion; /* 0x102 - Host Interface Version */ u32 hcsparams; /* 0x104 - Host Structural Parameters */ u32 hccparams; /* 0x108 - Host Capability Parameters */ - u8 res2[0x14]; + u8 res3[0x14]; u32 dciversion; /* 0x120 - Device Interface Version */ u32 dciparams; /* 0x124 - Device Controller Params */ - u8 res3[0x18]; + u8 res4[0x18]; u32 usbcmd; /* 0x140 - USB Command */ u32 usbsts; /* 0x144 - USB Status */ u32 usbintr; /* 0x148 - USB Interrupt Enable */ u32 frindex; /* 0x14C - USB Frame Index */ - u8 res4[0x4]; + u8 res5[0x4]; u32 perlistbase; /* 0x154 - Periodic List Base - USB Device Address */ u32 ep_list_addr; /* 0x158 - Next Asynchronous List - - Endpoint Address */ - u8 res5[0x4]; + - End Point Address */ + u8 res6[0x4]; u32 burstsize; /* 0x160 - Programmable Burst Size */ +#define FSL_EHCI_TXPBURST(X) ((X) << 8) +#define FSL_EHCI_RXPBURST(X) (X) u32 txfilltuning; /* 0x164 - Host TT Transmit pre-buffer packet tuning */ - u8 res6[0x8]; + u8 res7[0x8]; u32 ulpi_viewpoint; /* 0x170 - ULPI Reister Access */ - u8 res7[0xc]; + u8 res8[0xc]; u32 config_flag; /* 0x180 - Configured Flag Register */ u32 portsc; /* 0x184 - Port status/control */ - u8 res8[0x20]; + u8 res9[0x1C]; + u32 otgsc; /* 0x1a4 - Oo-The-Go status and control */ u32 usbmode; /* 0x1a8 - USB Device Mode */ - u32 epsetupstat; /* 0x1ac - Endpoint Setup Status */ - u32 epprime; /* 0x1b0 - Endpoint Init Status */ - u32 epflush; /* 0x1b4 - Endpoint De-initlialize */ - u32 epstatus; /* 0x1b8 - Endpoint Status */ - u32 epcomplete; /* 0x1bc - Endpoint Complete */ - u32 epctrl0; /* 0x1c0 - Endpoint Control 0 */ - u32 epctrl1; /* 0x1c4 - Endpoint Control 1 */ - u32 epctrl2; /* 0x1c8 - Endpoint Control 2 */ - u32 epctrl3; /* 0x1cc - Endpoint Control 3 */ - u32 epctrl4; /* 0x1d0 - Endpoint Control 4 */ - u32 epctrl5; /* 0x1d4 - Endpoint Control 5 */ - u8 res9[0x228]; + u32 epsetupstat; /* 0x1ac - End Point Setup Status */ + u32 epprime; /* 0x1b0 - End Point Init Status */ + u32 epflush; /* 0x1b4 - End Point De-initlialize */ + u32 epstatus; /* 0x1b8 - End Point Status */ + u32 epcomplete; /* 0x1bc - End Point Complete */ + u32 epctrl0; /* 0x1c0 - End Point Control 0 */ + u32 epctrl1; /* 0x1c4 - End Point Control 1 */ + u32 epctrl2; /* 0x1c8 - End Point Control 2 */ + u32 epctrl3; /* 0x1cc - End Point Control 3 */ + u32 epctrl4; /* 0x1d0 - End Point Control 4 */ + u32 epctrl5; /* 0x1d4 - End Point Control 5 */ + u8 res10[0x28]; + u32 usbgenctrl; /* 0x200 - USB General Control */ + u32 isiphyctrl; /* 0x204 - On-Chip PHY Control */ + u8 res11[0x1F8]; u32 snoop1; /* 0x400 - Snoop 1 */ u32 snoop2; /* 0x404 - Snoop 2 */ u32 age_cnt_limit; /* 0x408 - Age Count Threshold */ u32 prictrl; /* 0x40c - Priority Control */ u32 sictrl; /* 0x410 - System Interface Control */ - u8 res10[0xEC]; + u8 res12[0xEC]; u32 control; /* 0x500 - Control */ - u8 res11[0xafc]; + u8 res13[0xafc]; }; #endif /* _EHCI_FSL_H */ |