diff options
Diffstat (limited to 'include')
157 files changed, 471 insertions, 344 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index abe38f7..5f8b99e 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -71,7 +71,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ @@ -684,7 +683,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index d2bdbf1..0e0eefb 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -79,7 +79,6 @@ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #if defined(CONFIG_PCI) #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ @@ -104,8 +103,6 @@ #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ #define CONFIG_SYS_PCIE1_IO_PHYS 0xC0010000 -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION #endif diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 4e621a2..41dde82 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -78,7 +78,6 @@ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #ifdef CONFIG_PCI #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ @@ -103,8 +102,6 @@ #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc00000ull -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION #endif diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h index b5e4f31..55e48e2 100644 --- a/include/configs/CPCI2DP.h +++ b/include/configs/CPCI2DP.h @@ -105,10 +105,8 @@ #define PCI_HOST_FORCE 1 /* configure as pci host */ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index 6232059..fb6e0ef 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -123,10 +123,8 @@ #define PCI_HOST_FORCE 1 /* configure as pci host */ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index c7a9e13..abec373 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -172,8 +172,6 @@ /* PCI */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI 1 -#define CONFIG_PCI_PNP 1 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 4 diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index be863ec..3b40cd0 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -94,8 +94,6 @@ /* PCI */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI 1 -#define CONFIG_PCI_PNP 1 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 8 diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index cb2ef75..2c18e98 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -91,8 +91,6 @@ /* PCI */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI 1 -#define CONFIG_PCI_PNP 1 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 #define CONFIG_SYS_PCI_MEM_BUS 0x80000000 diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index 73ddbac..f7fc652 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -157,10 +157,8 @@ #define PCI_HOST_FORCE 1 /* configure as pci host */ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */ -#define CONFIG_PCI_PNP /* pci plug-and-play */ /* resource configuration */ #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */ #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */ diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index c72d36a..6335c55 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -366,12 +366,9 @@ /* enable PCIE clock */ #define CONFIG_SYS_SCCR_PCIEXP1CM 1 -#define CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ #define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES 1 diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 74a4c88..4b0b352 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -54,7 +54,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -#define CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_FSL_ELBC 1 @@ -394,7 +393,6 @@ #define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000 #define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */ /* diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 92b93cc..bd25c0b 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -357,12 +357,9 @@ #define CONFIG_SYS_PCIE2_IO_PHYS 0xD1000000 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000 -#define CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_EEPRO100 #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index fea5472..53f8a66 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_TEXT_BASE 0xFE000000 -#define CONFIG_PCI 1 - /* * System Clock Setup */ @@ -256,7 +254,6 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCI_SKIP_HOST_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #undef CONFIG_EEPRO100 #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index 5881e1f..12a47b2 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -338,7 +338,6 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_83XX_PCI_STREAMING #undef CONFIG_EEPRO100 diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 7b6e8c2..12b1ce5 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -31,7 +31,6 @@ #endif #ifdef CONFIG_PCISLAVE -#define CONFIG_PCI #define CONFIG_83XX_PCICLK 66666666 /* in Hz */ #endif /* CONFIG_PCISLAVE */ @@ -391,7 +390,6 @@ #undef PCI_ONE_PCI1 #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_83XX_PCI_STREAMING #undef CONFIG_EEPRO100 diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 9e061bc..5f7eca0 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -71,7 +71,6 @@ #define CONFIG_SYS_USB_HOST /* use the EHCI USB controller */ #endif -#define CONFIG_PCI #define CONFIG_RTC_DS1337 #define CONFIG_SYS_I2C #define CONFIG_TSEC_ENET /* TSEC Ethernet support */ @@ -400,8 +399,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_PCI2_IO_SIZE 0x01000000 /* 16M */ #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #ifndef CONFIG_PCI_PNP #define PCI_ENET0_IOADDR 0x00000000 #define PCI_ENET0_MEMADDR CONFIG_SYS_PCI2_MEM_BASE diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 0f3e01d..adc3193 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -381,8 +381,6 @@ extern int board_pci_host_broken(void); #define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index c109488..48e06af 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_TEXT_BASE 0xFE000000 -#define CONFIG_PCI 1 - #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG @@ -397,7 +395,6 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 13d6aa2..0f29863 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -44,7 +44,6 @@ #define CONFIG_MPC8536DS 1 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ -#define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ @@ -493,9 +492,6 @@ #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ #if defined(CONFIG_PCI) - -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - /*PCIE video card used*/ #define VIDEO_IO_OFFSET CONFIG_SYS_PCIE3_IO_VIRT diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index d568107..af3e85e 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -34,7 +34,6 @@ #define CONFIG_HAS_FEC 1 /* 8540 has FEC */ #endif -#define CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -256,9 +255,6 @@ #define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ #if defined(CONFIG_PCI) - -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 5abf0f2..134add5 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_TEXT_BASE 0xfff80000 -#define CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -301,7 +300,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_PCI) #define CONFIG_MPC85XX_PCI2 -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 1de22d8..d868ce2 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_TEXT_BASE 0xfff80000 #endif -#define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ @@ -283,8 +282,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 275c26e..fa114b3 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -26,7 +26,6 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_PCI /* enable any pci type devices */ #define CONFIG_PCI1 /* PCI controller 1 */ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #undef CONFIG_PCI2 @@ -404,9 +403,6 @@ extern unsigned long get_clock_freq(void); #endif #if defined(CONFIG_PCI) - -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index b0a343d..908b7ed 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_TEXT_BASE 0xfff80000 -#define CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -297,7 +296,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_PCI) -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_MPC85XX_PCI2 #undef CONFIG_EEPRO100 diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 2938a39..25227e5 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -31,7 +31,6 @@ */ #define CONFIG_SYS_TEXT_BASE 0xfff80000 -#define CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -251,9 +250,6 @@ #define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ #if defined(CONFIG_PCI) - -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index de2b4d8..62f06db 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* PCI controller */ #define CONFIG_PCIE1 1 /* PCIE controller */ #define CONFIG_FSL_PCI_INIT 1 /* use common fsl pci init code */ @@ -315,9 +314,6 @@ extern unsigned long get_clock_freq(void); #endif /* CONFIG_QE */ #if defined(CONFIG_PCI) - -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index a40ce90..a2ec52b 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_PCI 1 /* Disable PCI/PCIE */ #define CONFIG_PCIE1 1 /* PCIE controller */ #define CONFIG_FSL_PCI_INIT 1 /* use common fsl pci init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ @@ -425,9 +424,6 @@ extern unsigned long get_clock_freq(void); #endif /* CONFIG_QE */ #if defined(CONFIG_PCI) - -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 102c261..d4be140 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -33,7 +33,6 @@ #define CONFIG_MP 1 /* support multiple processors */ #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ -#define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ #define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ @@ -470,8 +469,6 @@ #define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index e3c9e5b..2529d8a 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -38,7 +38,6 @@ */ #define CONFIG_SYS_SCRATCH_VA 0xc0000000 -#define CONFIG_PCI 1 /* Enable PCI/PCIE*/ #define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIe 1 connected to ULI bridge */ #define CONFIG_PCIE2 1 /* PCIe 2 connected to slot */ @@ -271,7 +270,6 @@ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_CMD_REGINFO #define CONFIG_ULI526X diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index e0b856f..b35bbd4 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -42,7 +42,6 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCIE1 1 /* PCIE controller 1 (ULI bridge) */ #define CONFIG_PCIE2 1 /* PCIE controller 2 (slot) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ @@ -351,8 +350,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 1a331ee..c45b091 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -140,7 +140,6 @@ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #if defined(CONFIG_PCI) #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ @@ -199,8 +198,6 @@ #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION #endif diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 89ef3e1..6a4937b 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -103,7 +103,6 @@ #endif #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_PCIE3 /* PCIE controller 3 (ULI bridge) */ @@ -493,7 +492,6 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 1ae1471..eba66ec 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -29,7 +29,6 @@ #define CONFIG_MP /* support multiple processors */ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ @@ -230,7 +229,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ #if defined(CONFIG_PCI) -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 814aba4..350756b 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -49,7 +49,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -542,7 +541,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index f923f7c..3dcb6ac 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -153,10 +153,8 @@ #define PCI_HOST_FORCE 1 /* configure as pci host */ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */ -#define CONFIG_PCI_PNP /* pci plug-and-play */ /* resource configuration */ #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */ #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */ diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index c5a5c64..0967577 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -139,10 +139,8 @@ #define PCI_HOST_FORCE 1 /* configure as pci host */ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h index 7e06fc7..d7af4e0 100644 --- a/include/configs/PMC405DE.h +++ b/include/configs/PMC405DE.h @@ -98,10 +98,8 @@ #define PCI_HOST_FORCE 1 /* configure as pci host */ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ -#define CONFIG_PCI_PNP /* do (not) pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index bb5f136..2e7f6e4 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -312,9 +312,7 @@ * PCI stuff *----------------------------------------------------------------------*/ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP /* do (not) pci plug-and-play */ #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 0 /* to avoid problems with PNP */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 2613a0f..c290101 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -559,7 +559,6 @@ unsigned long get_board_ddr_clk(void); * General PCIe * Memory space is mapped 1-1, but I/O space must start from 0. */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -631,7 +630,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION #endif /* CONFIG_PCI */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 030d2d0..5b233bc 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -553,7 +553,6 @@ unsigned long get_board_ddr_clk(void); * General PCIe * Memory space is mapped 1-1, but I/O space must start from 0. */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -649,7 +648,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION #endif /* CONFIG_PCI */ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 36c69b9..ba1c38b 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -60,7 +60,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ @@ -517,8 +516,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION #endif /* CONFIG_PCI */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index fa7d6cd..7731809 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -173,7 +173,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ @@ -633,8 +632,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION #endif /* CONFIG_PCI */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index a5291cf..8702a45 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -550,7 +550,6 @@ unsigned long get_board_ddr_clk(void); * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -600,7 +599,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index a35a6f5..bca6a5b 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -488,7 +488,6 @@ unsigned long get_board_ddr_clk(void); * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -537,7 +536,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata LSZ ADD */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION #endif diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 77323a7..2fac19f 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -81,7 +81,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -250,7 +249,6 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index 1160a97..708eb76 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -76,8 +76,6 @@ * 0x50000000 - 0x50ffffff - PCI IO Space */ #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX) -#define CONFIG_PCI 1 -#define CONFIG_PCI_PNP 1 /* #define CONFIG_PCI_SCAN_SHOW 1 */ #define CONFIG_PCI_MEM_BUS 0x40000000 diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 85cef31..68e5990 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -225,11 +225,9 @@ * General PCI * Addresses are mapped 1-1. */ -#define CONFIG_PCI #if defined(CONFIG_PCI) -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ /* PCI1 host bridge */ diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index e15e837..ce1cf97 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -15,7 +15,6 @@ #define __CONFIG_H #define CONFIG_FSL_ELBC -#define CONFIG_PCI #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ @@ -391,7 +390,6 @@ #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_CMD_PCI #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/a4m072.h b/include/configs/a4m072.h index f7bb29e..b41ebe0 100644 --- a/include/configs/a4m072.h +++ b/include/configs/a4m072.h @@ -42,10 +42,8 @@ * 0x40000000 - 0x4fffffff - PCI Memory * 0x50000000 - 0x50ffffff - PCI IO Space */ -#define CONFIG_PCI #if defined(CONFIG_PCI) -#define CONFIG_PCI_PNP 1 #define CONFIG_PCI_SCAN_SHOW 1 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h index 4b8723f..3626636 100644 --- a/include/configs/advantech_dms-ba16.h +++ b/include/configs/advantech_dms-ba16.h @@ -13,7 +13,6 @@ #include <asm/imx-common/gpio.h> #define CONFIG_BOARD_NAME "Advantech DMS-BA16" -#define CONFIG_DEFAULT_FDT_FILE "imx6q-dms-ba16.dtb" #define CONFIG_MXC_UART_BASE UART4_BASE #define CONSOLE_DEV "ttymxc3" @@ -287,8 +286,6 @@ #undef CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 3fc1779..d38302d 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -43,8 +43,6 @@ #define CONFIG_USB_EHCI_TEGRA /* PCI host support */ -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_CMD_PCI /* PCI networking support */ diff --git a/include/configs/aria.h b/include/configs/aria.h index b08e90c..f385852 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -337,8 +337,6 @@ #define CONFIG_SYS_PCI_IO_PHYS 0x84000000 #define CONFIG_SYS_PCI_IO_SIZE 0x01000000 /* 16M */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h index 6d97755..1b22a37 100644 --- a/include/configs/bamboo.h +++ b/include/configs/bamboo.h @@ -203,9 +203,7 @@ *----------------------------------------------------------------------- */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE*/ diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h index 40b13d1..408c0f5 100644 --- a/include/configs/bayleybay.h +++ b/include/configs/bayleybay.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_ARCH_MISC_INIT -#define CONFIG_PCI_PNP - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/beaver.h b/include/configs/beaver.h index e5fda5c..ab1ab14 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -53,8 +53,6 @@ #define CONFIG_USB_ETHER_ASIX /* PCI host support */ -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_CMD_PCI /* General networking support */ diff --git a/include/configs/boston.h b/include/configs/boston.h index 516fd04..aad87c6 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -15,8 +15,6 @@ /* * PCI */ -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_CMD_PCI /* diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h index 51d4624..c989023 100644 --- a/include/configs/bubinga.h +++ b/include/configs/bubinga.h @@ -134,10 +134,8 @@ #define PCI_HOST_FORCE 1 /* configure as pci host */ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index aac36b1..1d189d2 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -404,9 +404,7 @@ * PCI stuff *----------------------------------------------------------------------*/ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_PCI_CONFIG_HOST_BRIDGE diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 5943b04..462b784 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -56,8 +56,6 @@ #define CONFIG_USB_ETHER_ASIX /* PCI host support */ -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_CMD_PCI /* General networking support */ diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index aebb10a..f3bb279 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -54,8 +54,6 @@ #define CONFIG_USB_ETHER_ASIX /* PCI host support */ -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_CMD_PCI /* General networking support */ diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 21b391b..a8cda40 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -81,9 +81,7 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI #define CONFIG_PCI_MVEBU -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index d1b733d..309aef8 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -29,10 +29,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) -/* Uncomment to enable secure boot support */ -/* #define CONFIG_SECURE_BOOT */ -#define CONFIG_CSF_SIZE 0x4000 - #define CONFIG_CMD_BMODE /* Network */ diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index 652e073..5ef999c 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -19,8 +19,6 @@ #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_ARCH_MISC_INIT -#define CONFIG_PCI_PNP - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 6770bd0..5e1f1b0 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -231,10 +231,8 @@ * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_CMD_PCI diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 5353258..3807d45 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -64,7 +64,6 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ @@ -555,7 +554,6 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION diff --git a/include/configs/cougarcanyon2.h b/include/configs/cougarcanyon2.h index d20ad96..2e9fa07 100644 --- a/include/configs/cougarcanyon2.h +++ b/include/configs/cougarcanyon2.h @@ -14,8 +14,6 @@ #define CONFIG_SMSC_SIO1007 -#define CONFIG_PCI_PNP - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vga\0" \ "stderr=serial,vga\0" diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 64ad736..55aa03b 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -19,8 +19,6 @@ #define CONFIG_SMSC_LPC47M -#define CONFIG_PCI_PNP - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index 8ce23e6..4a11092 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -54,7 +54,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ @@ -386,7 +385,6 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_NET_MULTI #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 446596e..4834828 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -62,9 +62,7 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI #define CONFIG_PCI_MVEBU -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 1f2f6b8..72c38e2 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -82,9 +82,7 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI #define CONFIG_PCI_MVEBU -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index d81efa9..26508c2 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -70,9 +70,7 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI #define CONFIG_PCI_MVEBU -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h index 23d8a0a..75e1d1c 100644 --- a/include/configs/dfi-bt700.h +++ b/include/configs/dfi-bt700.h @@ -21,8 +21,6 @@ #undef CONFIG_SYS_NS16550_PORT_MAPPED #endif -#define CONFIG_PCI_PNP - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index b91e63d..b2120b9 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -50,8 +50,6 @@ * 0x40000000 - 0x4fffffff - PCI Memory * 0x50000000 - 0x50ffffff - PCI IO Space */ -#define CONFIG_PCI 1 -#define CONFIG_PCI_PNP 1 #define CONFIG_PCI_SCAN_SHOW 1 #define CONFIG_PCI_BOOTDELAY 250 diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 4309c56..0be8800 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -51,7 +51,6 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI #define CONFIG_CMD_PCI #define CONFIG_CMD_PCI_ENUM #define CONFIG_PCI_MVEBU diff --git a/include/configs/galileo.h b/include/configs/galileo.h index 034142c..6d25035 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -21,8 +21,6 @@ /* ns16550 UART is memory-mapped in Quark SoC */ #undef CONFIG_SYS_NS16550_PORT_MAPPED -#define CONFIG_PCI_PNP - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h index 2845a80..12bf95f 100644 --- a/include/configs/gdppc440etx.h +++ b/include/configs/gdppc440etx.h @@ -155,9 +155,7 @@ */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup*/ #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to \ CONFIG_SYS_PCI_MEMBASE*/ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 79a814e..2560c88 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -18,19 +18,15 @@ #define BX50V3_BOOTARGS_EXTRA #if defined(CONFIG_TARGET_GE_B450V3) #define CONFIG_BOARD_NAME "General Electric B450v3" -#define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b450v3.dtb" #elif defined(CONFIG_TARGET_GE_B650V3) #define CONFIG_BOARD_NAME "General Electric B650v3" -#define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b650v3.dtb" #elif defined(CONFIG_TARGET_GE_B850V3) #define CONFIG_BOARD_NAME "General Electric B850v3" -#define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b850v3.dtb" #undef BX50V3_BOOTARGS_EXTRA #define BX50V3_BOOTARGS_EXTRA "video=DP-1:1024x768@60 " \ "video=HDMI-A-1:1024x768@60 " #else #define CONFIG_BOARD_NAME "General Electric BA16 Generic" -#define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-ba16.dtb" #endif #define CONFIG_MXC_UART_BASE UART3_BASE @@ -322,8 +318,6 @@ #undef CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index ea3e865..8f6d9bb 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -124,8 +124,6 @@ */ #define CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCI_FIXUP_DEV #define CONFIG_PCIE_IMX diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index c2ffc08..9677aab 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -474,12 +474,9 @@ void fpga_control_clear(unsigned int bus, int pin); /* enable PCIE clock */ #define CONFIG_SYS_SCCR_PCIEXP1CM 1 -#define CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ #define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES 1 diff --git a/include/configs/icon.h b/include/configs/icon.h index c60df49..b15016b 100644 --- a/include/configs/icon.h +++ b/include/configs/icon.h @@ -206,9 +206,7 @@ * PCI stuff */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_PCI_BOOTDELAY 1000 /* enable pci bootdelay variable*/ diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h new file mode 100644 index 0000000..f8a1263 --- /dev/null +++ b/include/configs/imx6qdl_icore.h @@ -0,0 +1,167 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * Configuration settings for the Engicam i.CoreM6 QDL Starter Kits. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __IMX6QLD_ICORE_CONFIG_H +#define __IMX6QLD_ICORE_CONFIG_H + +#include <linux/sizes.h> +#include "mx6_common.h" + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) + +/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE SZ_128K + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Environment */ +#ifndef CONFIG_ENV_IS_NOWHERE +/* Environment in MMC */ +# if defined(CONFIG_ENV_IS_IN_MMC) +# define CONFIG_ENV_OFFSET 0x100000 +/* Environment in NAND */ +# elif defined(CONFIG_ENV_IS_IN_NAND) +# define CONFIG_ENV_OFFSET 0x400000 +# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +# endif +#endif + +/* Default environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=zImage\0" \ + "console=ttymxc3\0" \ + "fdt_high=0xffffffff\0" \ + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdt_addr=0x18000000\0" \ + "boot_fdt=try\0" \ + "mmcdev=0\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadbootscript=" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev};" \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "fi; " \ + "fi; " \ + "fi" + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_SP_OFFSET) + +/* UART */ +#ifdef CONFIG_MXC_UART +# define CONFIG_MXC_UART_BASE UART4_BASE +#endif + +/* MMC */ +#ifdef CONFIG_FSL_USDHC +# define CONFIG_SYS_MMC_ENV_DEV 0 +# define CONFIG_SYS_FSL_USDHC_NUM 1 +# define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#endif + +/* NAND */ +#ifdef CONFIG_NAND_MXS +# define CONFIG_SYS_MAX_NAND_DEVICE 1 +# define CONFIG_SYS_NAND_BASE 0x40000000 +# define CONFIG_SYS_NAND_5_ADDR_CYCLE +# define CONFIG_SYS_NAND_ONFI_DETECTION +# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 + +/* MTD device */ +# define CONFIG_MTD_DEVICE +# define CONFIG_CMD_MTDPARTS +# define CONFIG_MTD_PARTITIONS +# define MTDIDS_DEFAULT "nand0=nand" +# define MTDPARTS_DEFAULT "mtdparts=nand:2m(spl),2m(uboot)," \ + "1m(env),4m(kernel),1m(dtb),-(rootfs)" + +# define CONFIG_APBH_DMA +# define CONFIG_APBH_DMA_BURST +# define CONFIG_APBH_DMA_BURST8 +#endif + +/* Ethernet */ +#ifdef CONFIG_FEC_MXC +# define IMX_FEC_BASE ENET_BASE_ADDR +# define CONFIG_FEC_MXC_PHYADDR 0 +# define CONFIG_FEC_XCV_TYPE RMII +# define CONFIG_ETHPRIME "FEC" + +# define CONFIG_MII +# define CONFIG_PHYLIB +# define CONFIG_PHY_SMSC +#endif + +/* SPL */ +#ifdef CONFIG_SPL +# ifdef CONFIG_NAND_MXS +# define CONFIG_SPL_NAND_SUPPORT +# else +# define CONFIG_SPL_MMC_SUPPORT +# endif + +# include "imx6_spl.h" +# ifdef CONFIG_SPL_BUILD +# undef CONFIG_DM_GPIO +# undef CONFIG_DM_MMC +# endif +#endif + +#endif /* __IMX6QLD_ICORE_CONFIG_H */ diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h index 0d66764..79a716e 100644 --- a/include/configs/inka4x0.h +++ b/include/configs/inka4x0.h @@ -47,8 +47,6 @@ * 0x40000000 - 0x4fffffff - PCI Memory * 0x50000000 - 0x50ffffff - PCI IO Space */ -#define CONFIG_PCI 1 -#define CONFIG_PCI_PNP 1 #define CONFIG_PCI_SCAN_SHOW 1 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index e7d058f..1d1b8b3 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -44,9 +44,7 @@ * PCI definitions */ -#define CONFIG_PCI #define CONFIG_CMD_PCI -#define CONFIG_PCI_PNP #define CONFIG_TULIP #define CONFIG_EEPRO100 diff --git a/include/configs/intip.h b/include/configs/intip.h index 5aa8fae..e61005b 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -288,9 +288,7 @@ * PCI stuff */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_PCI_DISABLE_PCIE diff --git a/include/configs/ipek01.h b/include/configs/ipek01.h index 2de8e2e..3bd938e 100644 --- a/include/configs/ipek01.h +++ b/include/configs/ipek01.h @@ -63,8 +63,6 @@ * 0x40000000 - 0x4fffffff - PCI Memory * 0x50000000 - 0x50ffffff - PCI IO Space */ -#define CONFIG_PCI 1 -#define CONFIG_PCI_PNP 1 #define CONFIG_PCI_SCAN_SHOW 1 #define CONFIG_PCI_MEM_BUS 0x40000000 diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 26c629f..90e282f 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -50,8 +50,6 @@ #define CONFIG_USB_ETHER_ASIX /* PCI host support */ -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_CMD_PCI /* General networking support */ diff --git a/include/configs/jupiter.h b/include/configs/jupiter.h index aaff553..e073528 100644 --- a/include/configs/jupiter.h +++ b/include/configs/jupiter.h @@ -44,10 +44,8 @@ * 0x40000000 - 0x4fffffff - PCI Memory * 0x50000000 - 0x50ffffff - PCI IO Space */ -/*#define CONFIG_PCI */ #if defined(CONFIG_PCI) -#define CONFIG_PCI_PNP 1 #define CONFIG_PCI_SCAN_SHOW 1 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 diff --git a/include/configs/katmai.h b/include/configs/katmai.h index e3fede5..a41c127 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -214,9 +214,7 @@ *----------------------------------------------------------------------- */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCI_CONFIG_HOST_BRIDGE diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index 9741398..2254eca 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -390,9 +390,7 @@ /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------*/ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCI_CONFIG_HOST_BRIDGE diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 6a7f929..f557ee2 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ @@ -353,7 +352,6 @@ int get_scl(void); #define CONFIG_PHY_MARVELL /* there is a marvell phy */ #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 54abf30..0cc1791 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -154,7 +154,6 @@ #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1043a-pcie" @@ -175,7 +174,6 @@ #define CONFIG_SYS_PCIE_MEM_SIZE 0x80000000 /* 128M */ #define CONFIG_NET_MULTI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_PCI diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 0c13dde..15410dd 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -67,7 +67,6 @@ #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1043a-pcie" @@ -88,7 +87,6 @@ #define CONFIG_SYS_PCIE_MEM_SIZE 0x80000000 /* 128M */ #define CONFIG_NET_MULTI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_PCI diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index eb4d037..53f0368 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -501,7 +501,6 @@ unsigned long get_board_ddr_clk(void); #endif /* PCIe */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ @@ -523,7 +522,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PCIE_MEM_SIZE 0x08000000 /* 128M */ #ifdef CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_PCI #endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index dd95a67..4a579b1 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -374,7 +374,6 @@ #endif /* PCIe */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ @@ -396,7 +395,6 @@ #define CONFIG_SYS_PCIE_MEM_SIZE 0x08000000 /* 128M */ #ifdef CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_PCI #endif diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 0fd69bf..64682b1 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -117,7 +117,6 @@ #define CONFIG_SYS_I2C_MXC_I2C4 /* PCIe */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -141,7 +140,6 @@ #ifdef CONFIG_PCI #define CONFIG_NET_MULTI -#define CONFIG_PCI_PNP #define CONFIG_E1000 #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_PCI diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 1d0a1ac..849a6cb 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -310,7 +310,6 @@ #define SCSI_VEND_ID 0x1b4b #define SCSI_DEV_ID 0x9170 #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} -#define CONFIG_PCI #include <asm/fsl_secure_boot.h> diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index c3870e1..838568f 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -347,11 +347,9 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 #define CONFIG_FSL_MEMAC -#define CONFIG_PCI /* Enable PCIE */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #ifdef CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_PCI #endif diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index ee0f5fc..b9cb6d3 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -290,11 +290,9 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 #define CONFIG_FSL_MEMAC -#define CONFIG_PCI /* Enable PCIE */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #ifdef CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_PCI #endif diff --git a/include/configs/luan.h b/include/configs/luan.h index e22d0e8..2ab6f58 100644 --- a/include/configs/luan.h +++ b/include/configs/luan.h @@ -159,9 +159,7 @@ #if defined(CONFIG_CMD_PCI) /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP /* do (not) pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ /* Board-specific PCI */ diff --git a/include/configs/makalu.h b/include/configs/makalu.h index dea340d..7c358bc 100644 --- a/include/configs/makalu.h +++ b/include/configs/makalu.h @@ -255,9 +255,7 @@ /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------*/ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCI_CONFIG_HOST_BRIDGE diff --git a/include/configs/malta.h b/include/configs/malta.h index 775c30a..65cd321 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -15,10 +15,8 @@ #define CONFIG_MEMSIZE_IN_BYTES -#define CONFIG_PCI #define CONFIG_PCI_GT64120 #define CONFIG_PCI_MSC01 -#define CONFIG_PCI_PNP #define CONFIG_PCNET #define CONFIG_PCNET_79C973 #define PCNET_HAS_PROM diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 935c88d..3aa22d2 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -19,7 +19,6 @@ #define CONFIG_SMSC_LPC47M -#define CONFIG_PCI_PNP #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index aa915e2..c36141a 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -47,7 +47,6 @@ #define CONFIG_SYS_MPC512X_CLKIN 66000000 /* in Hz */ #else #define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */ -#define CONFIG_PCI #endif #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ @@ -327,8 +326,6 @@ #define CONFIG_SYS_PCI_IO_PHYS 0x84000000 #define CONFIG_SYS_PCI_IO_SIZE 0x01000000 /* 16M */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index 3075cf0..76667d7 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -327,12 +327,9 @@ /* enable PCIE clock */ #define CONFIG_SYS_SCCR_PCIEXP1CM 1 -#define CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ #define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES 1 diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index 64f35dd..81826ea 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -118,8 +118,6 @@ #define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_DEFAULT_FDT_FILE "imx25-pdk.dtb" - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index ed6ed71..27e7738 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -78,8 +78,6 @@ #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ #define CONFIG_SYS_TEXT_BASE 0x77800000 -#define CONFIG_DEFAULT_FDT_FILE "imx53-ard.dtb" - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "uimage=zImage\0" \ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 411316d..d28654b 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -91,4 +91,13 @@ #define CONFIG_CMD_FUSE #define CONFIG_MXC_OCOTP +/* Secure boot (HAB) support */ +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_CSF_SIZE 0x2000 +#define CONFIG_SYS_FSL_SEC_COMPAT 4 +#define CONFIG_FSL_CAAM +#define CONFIG_CMD_DEKBLOB +#define CONFIG_SYS_FSL_SEC_LE +#endif + #endif diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 789c407..10c229d 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -11,6 +11,7 @@ #ifdef CONFIG_SPL #include "imx6_spl.h" +#undef CONFIG_SPL_EXT_SUPPORT #endif #define CONFIG_MACH_TYPE 3980 @@ -22,6 +23,17 @@ #include "mx6sabre_common.h" +/* Falcon Mode */ +#define CONFIG_CMD_SPL +#define CONFIG_SPL_OS_BOOT +#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 +#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) + +/* Falcon Mode - MMC support: args@1MB kernel@2MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ + #define CONFIG_SYS_FSL_USDHC_NUM 3 #if defined(CONFIG_ENV_IS_IN_MMC) #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ @@ -29,8 +41,6 @@ #define CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index ecaeccf..d423880 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -183,8 +183,6 @@ #define CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 748029c..0645228 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -72,4 +72,13 @@ #define CONFIG_ARMV7_SECURE_BASE 0x00900000 +/* Secure boot (HAB) support */ +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_CSF_SIZE 0x2000 +#define CONFIG_SYS_FSL_SEC_COMPAT 4 +#define CONFIG_FSL_CAAM +#define CONFIG_CMD_DEKBLOB +#define CONFIG_SYS_FSL_SEC_LE +#endif + #endif diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index aea598a..360a5e0 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -22,10 +22,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT -/* Uncomment to enable secure boot support */ -/* #define CONFIG_SECURE_BOOT */ -#define CONFIG_CSF_SIZE 0x4000 - /* Network */ #define CONFIG_FEC_MXC #define CONFIG_MII diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 8ab2486..c22fed7 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -305,8 +305,6 @@ * PCI express */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX #endif diff --git a/include/configs/novena.h b/include/configs/novena.h index ecc7e7e..51b6687 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -110,8 +110,6 @@ /* PCI express */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29) diff --git a/include/configs/o2dnt-common.h b/include/configs/o2dnt-common.h index f927107..c51ea3d 100644 --- a/include/configs/o2dnt-common.h +++ b/include/configs/o2dnt-common.h @@ -49,8 +49,6 @@ * 0x40000000 - 0x4fffffff - PCI Memory * 0x50000000 - 0x50ffffff - PCI IO Space */ -#undef CONFIG_PCI -#define CONFIG_PCI_PNP 1 #define CONFIG_PCI_MEM_BUS 0x40000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 276a693..523af52 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -275,7 +275,6 @@ #define CONFIG_MP #define CONFIG_FSL_ELBC -#define CONFIG_PCI #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ @@ -713,7 +712,6 @@ #endif #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_CMD_PCI #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index f672ffe..ef32181 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -46,7 +46,6 @@ #define CONFIG_MP #define CONFIG_FSL_ELBC -#define CONFIG_PCI #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ @@ -280,7 +279,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_CMD_PCI #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index ffd26db..9cf697f 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -46,8 +46,6 @@ #define CONFIG_USB_ETHER_ASIX /* PCI host support */ -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_CMD_PCI /* General networking support */ diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h index 1f64405..67a1603 100644 --- a/include/configs/p2771-0000.h +++ b/include/configs/p2771-0000.h @@ -29,8 +29,6 @@ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) /* PCI host support */ -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_CMD_PCI #include "tegra-common-post.h" diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h index dce5c25..4fb9966 100644 --- a/include/configs/pcm030.h +++ b/include/configs/pcm030.h @@ -113,8 +113,6 @@ IPB Bus clocking configuration. * 0x40000000 - 0x4fffffff - PCI Memory * 0x50000000 - 0x50ffffff - PCI IO Space * -----------------------------------------------------------------------*/ -#define CONFIG_PCI 1 -#define CONFIG_PCI_PNP 1 #define CONFIG_PCI_SCAN_SHOW 1 #define CONFIG_PCI_MEM_BUS 0x40000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 686d8da..a214c4d 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -58,8 +58,6 @@ #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M #define DFU_DEFAULT_POLL_TIMEOUT 300 -#define CONFIG_DEFAULT_FDT_FILE "imx6ul-pico-hobbit.dtb" - #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 072859e..a7f2a9d 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -24,7 +24,6 @@ #define CONFIG_SYS_RAMBOOT -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ @@ -118,7 +117,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index a2dd79b..4783563 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_ARCH_EARLY_INIT_R -#define CONFIG_PCI_PNP - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 1fc919b..477f035 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -88,10 +88,8 @@ /* * SuperH PCI Bridge Configration */ -#define CONFIG_PCI #define CONFIG_SH4_PCI #define CONFIG_SH7751_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 #define __io #define __mem_pci diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index bc01ae9..d4f200a 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -94,13 +94,11 @@ /* PCI Controller */ #if defined(CONFIG_CMD_PCI) -#define CONFIG_PCI #define CONFIG_SH4_PCI #define CONFIG_SH7780_PCI #define CONFIG_SH7780_PCI_LSR 0x07f00001 #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 #define __io #define __mem_pci diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 31ab765..2daf02d 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -35,7 +35,6 @@ #define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_CMD_PCI -#define CONFIG_PCI_PNP #define CONFIG_CMD_IO #define CONFIG_FS_FAT diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 221ca32..ca1797d 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -330,8 +330,6 @@ #undef PCI_ONE_PCI1 #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index ec9ad45..e9f9d30 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -461,9 +461,6 @@ #endif #if defined(CONFIG_PCI) - -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 248785d..361c96c 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -43,7 +43,6 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_PCI 1 /* Enable PCIE */ #define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ @@ -297,8 +296,6 @@ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index ff2f6c0..ed8a51c 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -271,9 +271,7 @@ * PCI stuff */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 0 /* to avoid problems with PNP */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to */ diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 11a4cf9..a49e839 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -106,7 +106,6 @@ #define CONFIG_R8A66597_ENDIAN 0x0000 /* little */ /* PCI Controller */ -#define CONFIG_PCI #define CONFIG_SH4_PCI #define CONFIG_SH7780_PCI #if defined(CONFIG_SH_32BIT) @@ -118,7 +117,6 @@ #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE #endif -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 0bd7f02..753ccfb 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -25,7 +25,6 @@ #define CONFIG_SYS_TEXT_BASE 0xfff80000 -#define CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -245,7 +244,6 @@ #define CONFIG_SYS_PCI1_IO_SIZE 0x01000000 /* 16M */ #if defined(CONFIG_PCI) -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ diff --git a/include/configs/som-6896.h b/include/configs/som-6896.h index d058603..b4a4fb0 100644 --- a/include/configs/som-6896.h +++ b/include/configs/som-6896.h @@ -20,8 +20,6 @@ #define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI} -#define CONFIG_PCI_PNP - #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO diff --git a/include/configs/som-db5800-som-6867.h b/include/configs/som-db5800-som-6867.h index a13be14..6235518 100644 --- a/include/configs/som-db5800-som-6867.h +++ b/include/configs/som-db5800-som-6867.h @@ -18,7 +18,6 @@ #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_ARCH_MISC_INIT -#define CONFIG_PCI_PNP #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/strider.h b/include/configs/strider.h index 92ad95e..6604cec 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -508,12 +508,9 @@ void fpga_control_clear(unsigned int bus, int pin); /* enable PCIE clock */ #define CONFIG_SYS_SCCR_PCIEXP1CM 1 -#define CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ #define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES 1 diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h index 64e200e..e0c7674 100644 --- a/include/configs/t3corp.h +++ b/include/configs/t3corp.h @@ -359,9 +359,7 @@ * PCI stuff */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_PCI_CONFIG_HOST_BRIDGE diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 61ef25a..0aba18b 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ -#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -214,7 +213,6 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_DOS_PARTITION diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 61bd489..0dc4a28 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -85,8 +85,6 @@ /* PCI */ #define CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index a51ffb5..281593a 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -85,9 +85,7 @@ /* PCIe support */ #ifdef CONFIG_CMD_PCI #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI #define CONFIG_PCI_MVEBU -#define CONFIG_PCI_PNP #define CONFIG_BOARD_LATE_INIT /* for PEX switch test */ #endif #endif diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h index 3cae4fe..265aa4a 100644 --- a/include/configs/tqma6_mba6.h +++ b/include/configs/tqma6_mba6.h @@ -9,12 +9,6 @@ #ifndef __CONFIG_TQMA6_MBA6_H #define __CONFIG_TQMA6_MBA6_H -#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-mba6x.dtb" -#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) -#define CONFIG_DEFAULT_FDT_FILE "imx6q-mba6x.dtb" -#endif - #define CONFIG_DTT_SENSORS { 0, 1 } #define CONFIG_FEC_XCV_TYPE RGMII diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index 3e88391..96f15cd 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_TQMA6_WRU4_H #define __CONFIG_TQMA6_WRU4_H -#define CONFIG_DEFAULT_FDT_FILE "imx6s-wru4.dtb" - /* DTT sensors */ #define CONFIG_DTT_SENSORS { 0, 1 } #define CONFIG_SYS_DTT_BUS_NUM 2 diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index a4ca7c7..cfc8451 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -49,8 +49,6 @@ #define CONFIG_USB_ETHER_ASIX /* PCI host support */ -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_CMD_PCI /* General networking support */ diff --git a/include/configs/v38b.h b/include/configs/v38b.h index 24f951b..229c242 100644 --- a/include/configs/v38b.h +++ b/include/configs/v38b.h @@ -56,7 +56,6 @@ /* * PCI - no support */ -#undef CONFIG_PCI /* * Partitions diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 7304d79..e293f12 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -25,7 +25,6 @@ #define CONFIG_SYS_TEXT_BASE 0xfe000000 #endif -#define CONFIG_PCI 1 #define CONFIG_PCI_INDIRECT_BRIDGE 1 #define CONFIG_FSL_ELBC 1 @@ -269,7 +268,6 @@ #define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000 #define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ #endif diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index c4c66a5..f1bd313 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -37,7 +37,6 @@ #define CONFIG_MISC_INIT_R -#define CONFIG_PCI /* Don't enable PCI2 on vme834x - it doesn't exist physically. */ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ @@ -267,7 +266,6 @@ #ifndef VME_CADDY2 #endif -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/walnut.h b/include/configs/walnut.h index d07b74f..2edc0b0 100644 --- a/include/configs/walnut.h +++ b/include/configs/walnut.h @@ -92,10 +92,8 @@ #define PCI_HOST_FORCE 1 /* configure as pci host */ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 4bcebfc..46a11ef 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -36,8 +36,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0xefff -#define CONFIG_PCI_PNP - #define CONFIG_BIOSEMU #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 3bf42b5..04d151b 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -148,7 +148,6 @@ /*----------------------------------------------------------------------- * PCI configuration */ -#define CONFIG_PCI #define CONFIG_PCI_CONFIG_HOST_BRIDGE /*----------------------------------------------------------------------- diff --git a/include/configs/xpedite1000.h b/include/configs/xpedite1000.h index 1a4bd75..bfe68f0 100644 --- a/include/configs/xpedite1000.h +++ b/include/configs/xpedite1000.h @@ -143,9 +143,7 @@ extern void out32(unsigned int, unsigned long); * PCI */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */ diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index 571ded8..027440a 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -26,8 +26,6 @@ #define CONFIG_SYS_TEXT_BASE 0xfff00000 -#define CONFIG_PCI 1 /* Enable PCI/PCIE */ -#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCIE1 1 /* PCIE controller 1 */ #define CONFIG_PCIE2 1 /* PCIE controller 2 */ diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 273c6d4..d980c15 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -26,8 +26,6 @@ #define CONFIG_SYS_TEXT_BASE 0xfff80000 #endif -#define CONFIG_PCI 1 /* Enable PCI/PCIE */ -#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index 8d595c9..a82eef5 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -26,8 +26,6 @@ #define CONFIG_SYS_TEXT_BASE 0xfff80000 #endif -#define CONFIG_PCI 1 /* Enable PCI/PCIE */ -#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCIE1 1 /* PCIE controller 1 */ #define CONFIG_PCIE2 1 /* PCIE controller 2 */ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 213dfa7..973089b 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -27,8 +27,6 @@ #define CONFIG_SYS_TEXT_BASE 0xfff80000 #endif -#define CONFIG_PCI 1 /* Enable PCI/PCIE */ -#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCIE1 1 /* PCIE controller 1 (PEX8112 or XMC) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index 0707768..a355112 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -199,9 +199,7 @@ *----------------------------------------------------------------------- */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE*/ diff --git a/include/configs/yucca.h b/include/configs/yucca.h index 76717e4..0a3e4b3 100644 --- a/include/configs/yucca.h +++ b/include/configs/yucca.h @@ -181,9 +181,7 @@ *----------------------------------------------------------------------- */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCI_CONFIG_HOST_BRIDGE diff --git a/include/configs/zc5202.h b/include/configs/zc5202.h index 8e75c40..a7988e0 100644 --- a/include/configs/zc5202.h +++ b/include/configs/zc5202.h @@ -13,8 +13,6 @@ #define CONSOLE_DEV "ttymxc1" #define CONFIG_MMCROOT "/dev/mmcblk0p2" -#define CONFIG_DEFAULT_FDT_FILE "imx6q-zc5202.dtb" - #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #include "el6x_common.h" @@ -29,8 +27,6 @@ #define CONFIG_MV88E6352_SWITCH #define CONFIG_CMD_PCI -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX diff --git a/include/configs/zc5601.h b/include/configs/zc5601.h index 6ede668..61c6a60 100644 --- a/include/configs/zc5601.h +++ b/include/configs/zc5601.h @@ -14,8 +14,6 @@ #define CONSOLE_DEV "ttymxc1" #define CONFIG_MMCROOT "/dev/mmcblk0p1" -#define CONFIG_DEFAULT_FDT_FILE "imx6q-zc5601.dtb" - #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #include "el6x_common.h" diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h new file mode 100644 index 0000000..2905033 --- /dev/null +++ b/include/dt-bindings/clock/imx6qdl-clock.h @@ -0,0 +1,274 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __DT_BINDINGS_CLOCK_IMX6QDL_H +#define __DT_BINDINGS_CLOCK_IMX6QDL_H + +#define IMX6QDL_CLK_DUMMY 0 +#define IMX6QDL_CLK_CKIL 1 +#define IMX6QDL_CLK_CKIH 2 +#define IMX6QDL_CLK_OSC 3 +#define IMX6QDL_CLK_PLL2_PFD0_352M 4 +#define IMX6QDL_CLK_PLL2_PFD1_594M 5 +#define IMX6QDL_CLK_PLL2_PFD2_396M 6 +#define IMX6QDL_CLK_PLL3_PFD0_720M 7 +#define IMX6QDL_CLK_PLL3_PFD1_540M 8 +#define IMX6QDL_CLK_PLL3_PFD2_508M 9 +#define IMX6QDL_CLK_PLL3_PFD3_454M 10 +#define IMX6QDL_CLK_PLL2_198M 11 +#define IMX6QDL_CLK_PLL3_120M 12 +#define IMX6QDL_CLK_PLL3_80M 13 +#define IMX6QDL_CLK_PLL3_60M 14 +#define IMX6QDL_CLK_TWD 15 +#define IMX6QDL_CLK_STEP 16 +#define IMX6QDL_CLK_PLL1_SW 17 +#define IMX6QDL_CLK_PERIPH_PRE 18 +#define IMX6QDL_CLK_PERIPH2_PRE 19 +#define IMX6QDL_CLK_PERIPH_CLK2_SEL 20 +#define IMX6QDL_CLK_PERIPH2_CLK2_SEL 21 +#define IMX6QDL_CLK_AXI_SEL 22 +#define IMX6QDL_CLK_ESAI_SEL 23 +#define IMX6QDL_CLK_ASRC_SEL 24 +#define IMX6QDL_CLK_SPDIF_SEL 25 +#define IMX6QDL_CLK_GPU2D_AXI 26 +#define IMX6QDL_CLK_GPU3D_AXI 27 +#define IMX6QDL_CLK_GPU2D_CORE_SEL 28 +#define IMX6QDL_CLK_GPU3D_CORE_SEL 29 +#define IMX6QDL_CLK_GPU3D_SHADER_SEL 30 +#define IMX6QDL_CLK_IPU1_SEL 31 +#define IMX6QDL_CLK_IPU2_SEL 32 +#define IMX6QDL_CLK_LDB_DI0_SEL 33 +#define IMX6QDL_CLK_LDB_DI1_SEL 34 +#define IMX6QDL_CLK_IPU1_DI0_PRE_SEL 35 +#define IMX6QDL_CLK_IPU1_DI1_PRE_SEL 36 +#define IMX6QDL_CLK_IPU2_DI0_PRE_SEL 37 +#define IMX6QDL_CLK_IPU2_DI1_PRE_SEL 38 +#define IMX6QDL_CLK_IPU1_DI0_SEL 39 +#define IMX6QDL_CLK_IPU1_DI1_SEL 40 +#define IMX6QDL_CLK_IPU2_DI0_SEL 41 +#define IMX6QDL_CLK_IPU2_DI1_SEL 42 +#define IMX6QDL_CLK_HSI_TX_SEL 43 +#define IMX6QDL_CLK_PCIE_AXI_SEL 44 +#define IMX6QDL_CLK_SSI1_SEL 45 +#define IMX6QDL_CLK_SSI2_SEL 46 +#define IMX6QDL_CLK_SSI3_SEL 47 +#define IMX6QDL_CLK_USDHC1_SEL 48 +#define IMX6QDL_CLK_USDHC2_SEL 49 +#define IMX6QDL_CLK_USDHC3_SEL 50 +#define IMX6QDL_CLK_USDHC4_SEL 51 +#define IMX6QDL_CLK_ENFC_SEL 52 +#define IMX6QDL_CLK_EIM_SEL 53 +#define IMX6QDL_CLK_EIM_SLOW_SEL 54 +#define IMX6QDL_CLK_VDO_AXI_SEL 55 +#define IMX6QDL_CLK_VPU_AXI_SEL 56 +#define IMX6QDL_CLK_CKO1_SEL 57 +#define IMX6QDL_CLK_PERIPH 58 +#define IMX6QDL_CLK_PERIPH2 59 +#define IMX6QDL_CLK_PERIPH_CLK2 60 +#define IMX6QDL_CLK_PERIPH2_CLK2 61 +#define IMX6QDL_CLK_IPG 62 +#define IMX6QDL_CLK_IPG_PER 63 +#define IMX6QDL_CLK_ESAI_PRED 64 +#define IMX6QDL_CLK_ESAI_PODF 65 +#define IMX6QDL_CLK_ASRC_PRED 66 +#define IMX6QDL_CLK_ASRC_PODF 67 +#define IMX6QDL_CLK_SPDIF_PRED 68 +#define IMX6QDL_CLK_SPDIF_PODF 69 +#define IMX6QDL_CLK_CAN_ROOT 70 +#define IMX6QDL_CLK_ECSPI_ROOT 71 +#define IMX6QDL_CLK_GPU2D_CORE_PODF 72 +#define IMX6QDL_CLK_GPU3D_CORE_PODF 73 +#define IMX6QDL_CLK_GPU3D_SHADER 74 +#define IMX6QDL_CLK_IPU1_PODF 75 +#define IMX6QDL_CLK_IPU2_PODF 76 +#define IMX6QDL_CLK_LDB_DI0_PODF 77 +#define IMX6QDL_CLK_LDB_DI1_PODF 78 +#define IMX6QDL_CLK_IPU1_DI0_PRE 79 +#define IMX6QDL_CLK_IPU1_DI1_PRE 80 +#define IMX6QDL_CLK_IPU2_DI0_PRE 81 +#define IMX6QDL_CLK_IPU2_DI1_PRE 82 +#define IMX6QDL_CLK_HSI_TX_PODF 83 +#define IMX6QDL_CLK_SSI1_PRED 84 +#define IMX6QDL_CLK_SSI1_PODF 85 +#define IMX6QDL_CLK_SSI2_PRED 86 +#define IMX6QDL_CLK_SSI2_PODF 87 +#define IMX6QDL_CLK_SSI3_PRED 88 +#define IMX6QDL_CLK_SSI3_PODF 89 +#define IMX6QDL_CLK_UART_SERIAL_PODF 90 +#define IMX6QDL_CLK_USDHC1_PODF 91 +#define IMX6QDL_CLK_USDHC2_PODF 92 +#define IMX6QDL_CLK_USDHC3_PODF 93 +#define IMX6QDL_CLK_USDHC4_PODF 94 +#define IMX6QDL_CLK_ENFC_PRED 95 +#define IMX6QDL_CLK_ENFC_PODF 96 +#define IMX6QDL_CLK_EIM_PODF 97 +#define IMX6QDL_CLK_EIM_SLOW_PODF 98 +#define IMX6QDL_CLK_VPU_AXI_PODF 99 +#define IMX6QDL_CLK_CKO1_PODF 100 +#define IMX6QDL_CLK_AXI 101 +#define IMX6QDL_CLK_MMDC_CH0_AXI_PODF 102 +#define IMX6QDL_CLK_MMDC_CH1_AXI_PODF 103 +#define IMX6QDL_CLK_ARM 104 +#define IMX6QDL_CLK_AHB 105 +#define IMX6QDL_CLK_APBH_DMA 106 +#define IMX6QDL_CLK_ASRC 107 +#define IMX6QDL_CLK_CAN1_IPG 108 +#define IMX6QDL_CLK_CAN1_SERIAL 109 +#define IMX6QDL_CLK_CAN2_IPG 110 +#define IMX6QDL_CLK_CAN2_SERIAL 111 +#define IMX6QDL_CLK_ECSPI1 112 +#define IMX6QDL_CLK_ECSPI2 113 +#define IMX6QDL_CLK_ECSPI3 114 +#define IMX6QDL_CLK_ECSPI4 115 +#define IMX6Q_CLK_ECSPI5 116 +#define IMX6DL_CLK_I2C4 116 +#define IMX6QDL_CLK_ENET 117 +#define IMX6QDL_CLK_ESAI_EXTAL 118 +#define IMX6QDL_CLK_GPT_IPG 119 +#define IMX6QDL_CLK_GPT_IPG_PER 120 +#define IMX6QDL_CLK_GPU2D_CORE 121 +#define IMX6QDL_CLK_GPU3D_CORE 122 +#define IMX6QDL_CLK_HDMI_IAHB 123 +#define IMX6QDL_CLK_HDMI_ISFR 124 +#define IMX6QDL_CLK_I2C1 125 +#define IMX6QDL_CLK_I2C2 126 +#define IMX6QDL_CLK_I2C3 127 +#define IMX6QDL_CLK_IIM 128 +#define IMX6QDL_CLK_ENFC 129 +#define IMX6QDL_CLK_IPU1 130 +#define IMX6QDL_CLK_IPU1_DI0 131 +#define IMX6QDL_CLK_IPU1_DI1 132 +#define IMX6QDL_CLK_IPU2 133 +#define IMX6QDL_CLK_IPU2_DI0 134 +#define IMX6QDL_CLK_LDB_DI0 135 +#define IMX6QDL_CLK_LDB_DI1 136 +#define IMX6QDL_CLK_IPU2_DI1 137 +#define IMX6QDL_CLK_HSI_TX 138 +#define IMX6QDL_CLK_MLB 139 +#define IMX6QDL_CLK_MMDC_CH0_AXI 140 +#define IMX6QDL_CLK_MMDC_CH1_AXI 141 +#define IMX6QDL_CLK_OCRAM 142 +#define IMX6QDL_CLK_OPENVG_AXI 143 +#define IMX6QDL_CLK_PCIE_AXI 144 +#define IMX6QDL_CLK_PWM1 145 +#define IMX6QDL_CLK_PWM2 146 +#define IMX6QDL_CLK_PWM3 147 +#define IMX6QDL_CLK_PWM4 148 +#define IMX6QDL_CLK_PER1_BCH 149 +#define IMX6QDL_CLK_GPMI_BCH_APB 150 +#define IMX6QDL_CLK_GPMI_BCH 151 +#define IMX6QDL_CLK_GPMI_IO 152 +#define IMX6QDL_CLK_GPMI_APB 153 +#define IMX6QDL_CLK_SATA 154 +#define IMX6QDL_CLK_SDMA 155 +#define IMX6QDL_CLK_SPBA 156 +#define IMX6QDL_CLK_SSI1 157 +#define IMX6QDL_CLK_SSI2 158 +#define IMX6QDL_CLK_SSI3 159 +#define IMX6QDL_CLK_UART_IPG 160 +#define IMX6QDL_CLK_UART_SERIAL 161 +#define IMX6QDL_CLK_USBOH3 162 +#define IMX6QDL_CLK_USDHC1 163 +#define IMX6QDL_CLK_USDHC2 164 +#define IMX6QDL_CLK_USDHC3 165 +#define IMX6QDL_CLK_USDHC4 166 +#define IMX6QDL_CLK_VDO_AXI 167 +#define IMX6QDL_CLK_VPU_AXI 168 +#define IMX6QDL_CLK_CKO1 169 +#define IMX6QDL_CLK_PLL1_SYS 170 +#define IMX6QDL_CLK_PLL2_BUS 171 +#define IMX6QDL_CLK_PLL3_USB_OTG 172 +#define IMX6QDL_CLK_PLL4_AUDIO 173 +#define IMX6QDL_CLK_PLL5_VIDEO 174 +#define IMX6QDL_CLK_PLL8_MLB 175 +#define IMX6QDL_CLK_PLL7_USB_HOST 176 +#define IMX6QDL_CLK_PLL6_ENET 177 +#define IMX6QDL_CLK_SSI1_IPG 178 +#define IMX6QDL_CLK_SSI2_IPG 179 +#define IMX6QDL_CLK_SSI3_IPG 180 +#define IMX6QDL_CLK_ROM 181 +#define IMX6QDL_CLK_USBPHY1 182 +#define IMX6QDL_CLK_USBPHY2 183 +#define IMX6QDL_CLK_LDB_DI0_DIV_3_5 184 +#define IMX6QDL_CLK_LDB_DI1_DIV_3_5 185 +#define IMX6QDL_CLK_SATA_REF 186 +#define IMX6QDL_CLK_SATA_REF_100M 187 +#define IMX6QDL_CLK_PCIE_REF 188 +#define IMX6QDL_CLK_PCIE_REF_125M 189 +#define IMX6QDL_CLK_ENET_REF 190 +#define IMX6QDL_CLK_USBPHY1_GATE 191 +#define IMX6QDL_CLK_USBPHY2_GATE 192 +#define IMX6QDL_CLK_PLL4_POST_DIV 193 +#define IMX6QDL_CLK_PLL5_POST_DIV 194 +#define IMX6QDL_CLK_PLL5_VIDEO_DIV 195 +#define IMX6QDL_CLK_EIM_SLOW 196 +#define IMX6QDL_CLK_SPDIF 197 +#define IMX6QDL_CLK_CKO2_SEL 198 +#define IMX6QDL_CLK_CKO2_PODF 199 +#define IMX6QDL_CLK_CKO2 200 +#define IMX6QDL_CLK_CKO 201 +#define IMX6QDL_CLK_VDOA 202 +#define IMX6QDL_CLK_PLL4_AUDIO_DIV 203 +#define IMX6QDL_CLK_LVDS1_SEL 204 +#define IMX6QDL_CLK_LVDS2_SEL 205 +#define IMX6QDL_CLK_LVDS1_GATE 206 +#define IMX6QDL_CLK_LVDS2_GATE 207 +#define IMX6QDL_CLK_ESAI_IPG 208 +#define IMX6QDL_CLK_ESAI_MEM 209 +#define IMX6QDL_CLK_ASRC_IPG 210 +#define IMX6QDL_CLK_ASRC_MEM 211 +#define IMX6QDL_CLK_LVDS1_IN 212 +#define IMX6QDL_CLK_LVDS2_IN 213 +#define IMX6QDL_CLK_ANACLK1 214 +#define IMX6QDL_CLK_ANACLK2 215 +#define IMX6QDL_PLL1_BYPASS_SRC 216 +#define IMX6QDL_PLL2_BYPASS_SRC 217 +#define IMX6QDL_PLL3_BYPASS_SRC 218 +#define IMX6QDL_PLL4_BYPASS_SRC 219 +#define IMX6QDL_PLL5_BYPASS_SRC 220 +#define IMX6QDL_PLL6_BYPASS_SRC 221 +#define IMX6QDL_PLL7_BYPASS_SRC 222 +#define IMX6QDL_CLK_PLL1 223 +#define IMX6QDL_CLK_PLL2 224 +#define IMX6QDL_CLK_PLL3 225 +#define IMX6QDL_CLK_PLL4 226 +#define IMX6QDL_CLK_PLL5 227 +#define IMX6QDL_CLK_PLL6 228 +#define IMX6QDL_CLK_PLL7 229 +#define IMX6QDL_PLL1_BYPASS 230 +#define IMX6QDL_PLL2_BYPASS 231 +#define IMX6QDL_PLL3_BYPASS 232 +#define IMX6QDL_PLL4_BYPASS 233 +#define IMX6QDL_PLL5_BYPASS 234 +#define IMX6QDL_PLL6_BYPASS 235 +#define IMX6QDL_PLL7_BYPASS 236 +#define IMX6QDL_CLK_GPT_3M 237 +#define IMX6QDL_CLK_VIDEO_27M 238 +#define IMX6QDL_CLK_MIPI_CORE_CFG 239 +#define IMX6QDL_CLK_MIPI_IPG 240 +#define IMX6QDL_CLK_CAAM_MEM 241 +#define IMX6QDL_CLK_CAAM_ACLK 242 +#define IMX6QDL_CLK_CAAM_IPG 243 +#define IMX6QDL_CLK_SPDIF_GCLK 244 +#define IMX6QDL_CLK_UART_SEL 245 +#define IMX6QDL_CLK_IPG_PER_SEL 246 +#define IMX6QDL_CLK_ECSPI_SEL 247 +#define IMX6QDL_CLK_CAN_SEL 248 +#define IMX6QDL_CLK_MMDC_CH1_AXI_CG 249 +#define IMX6QDL_CLK_PRE0 250 +#define IMX6QDL_CLK_PRE1 251 +#define IMX6QDL_CLK_PRE2 252 +#define IMX6QDL_CLK_PRE3 253 +#define IMX6QDL_CLK_PRG0_AXI 254 +#define IMX6QDL_CLK_PRG1_AXI 255 +#define IMX6QDL_CLK_PRG0_APB 256 +#define IMX6QDL_CLK_PRG1_APB 257 +#define IMX6QDL_CLK_PRE_AXI 258 +#define IMX6QDL_CLK_END 259 + +#endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */ |