summaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/configs/ls1021aqds.h41
-rw-r--r--include/configs/ls1021atwr.h12
-rw-r--r--include/fsl_ddr.h6
3 files changed, 58 insertions, 1 deletions
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 8dc04f2..2874ccc 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -19,6 +19,11 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DEEP_SLEEP
+#if defined(CONFIG_DEEP_SLEEP)
+#define CONFIG_SILENT_CONSOLE
+#endif
+
/*
* Size of malloc() pool
*/
@@ -72,7 +77,8 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SPL_PAD_TO 0x1c000
#define CONFIG_SYS_TEXT_BASE 0x82000000
-#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
+#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \
+ CONFIG_SYS_MONITOR_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
#define CONFIG_SPL_BSS_START_ADDR 0x80100000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
@@ -365,11 +371,16 @@ unsigned long get_board_ddr_clk(void);
/*
* Serial Port
*/
+#ifdef CONFIG_LPUART
+#define CONFIG_FSL_LPUART
+#define CONFIG_LPUART_32B_REG
+#else
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+#endif
#define CONFIG_BAUDRATE 115200
@@ -385,6 +396,7 @@ unsigned long get_board_ddr_clk(void);
*/
#define I2C_MUX_PCA_ADDR_PRI 0x77
#define I2C_MUX_CH_DEFAULT 0x8
+#define I2C_MUX_CH_CH7301 0xC
/*
* MMC
@@ -427,6 +439,25 @@ unsigned long get_board_ddr_clk(void);
#endif
/*
+ * Video
+ */
+#define CONFIG_FSL_DCU_FB
+
+#ifdef CONFIG_FSL_DCU_FB
+#define CONFIG_VIDEO
+#define CONFIG_CMD_BMP
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_LOGO
+
+#define CONFIG_FSL_DIU_CH7301
+#define CONFIG_SYS_I2C_DVI_BUS_NUM 0
+#define CONFIG_SYS_I2C_QIXIS_ADDR 0x66
+#define CONFIG_SYS_I2C_DVI_ADDR 0x75
+#endif
+
+/*
* eTSEC
*/
#define CONFIG_TSEC_ENET
@@ -508,11 +539,19 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_QE_FW_ADDR 0x67f40000
+#ifdef CONFIG_LPUART
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \
+ "fdt_high=0xcfffffff\0" \
+ "initrd_high=0xcfffffff\0" \
+ "hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0"
+#else
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \
"fdt_high=0xcfffffff\0" \
"initrd_high=0xcfffffff\0" \
"hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0"
+#endif
/*
* Miscellaneous configurable options
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 66954d0..0a0bb5f 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -186,11 +186,16 @@
/*
* Serial Port
*/
+#ifdef CONFIG_LPUART
+#define CONFIG_FSL_LPUART
+#define CONFIG_LPUART_32B_REG
+#else
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+#endif
#define CONFIG_BAUDRATE 115200
@@ -325,10 +330,17 @@
#define CONFIG_BOOTDELAY 3
+#ifdef CONFIG_LPUART
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \
+ "initrd_high=0xcfffffff\0" \
+ "fdt_high=0xcfffffff\0"
+#else
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \
"initrd_high=0xcfffffff\0" \
"fdt_high=0xcfffffff\0"
+#endif
/*
* Miscellaneous configurable options
diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h
index 675557a..3286c95 100644
--- a/include/fsl_ddr.h
+++ b/include/fsl_ddr.h
@@ -23,9 +23,15 @@
#ifdef CONFIG_SYS_FSL_DDR_LE
#define ddr_in32(a) in_le32(a)
#define ddr_out32(a, v) out_le32(a, v)
+#define ddr_setbits32(a, v) setbits_le32(a, v)
+#define ddr_clrbits32(a, v) clrbits_le32(a, v)
+#define ddr_clrsetbits32(a, clear, set) clrsetbits_le32(a, clear, set)
#else
#define ddr_in32(a) in_be32(a)
#define ddr_out32(a, v) out_be32(a, v)
+#define ddr_setbits32(a, v) setbits_be32(a, v)
+#define ddr_clrbits32(a, v) clrbits_be32(a, v)
+#define ddr_clrsetbits32(a, clear, set) clrsetbits_be32(a, clear, set)
#endif
#define _DDR_ADDR CONFIG_SYS_FSL_DDR_ADDR