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-rw-r--r--include/common.h3
-rw-r--r--include/configs/MPC8572DS.h63
-rw-r--r--include/configs/TQM8260.h7
-rw-r--r--include/configs/fx12mm.h13
-rw-r--r--include/configs/mgsuvd.h3
-rw-r--r--include/usbdcore.h8
6 files changed, 46 insertions, 51 deletions
diff --git a/include/common.h b/include/common.h
index b8a654a..df64bf0 100644
--- a/include/common.h
+++ b/include/common.h
@@ -177,6 +177,9 @@ typedef void (interrupt_handler_t)(void *);
({ typeof (X) __x = (X), __y = (Y); \
(__x > __y) ? __x : __y; })
+#define MIN(x, y) min(x, y)
+#define MAX(x, y) max(x, y)
+
/**
* container_of - cast a member of a structure out to the containing structure
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 244ecc2..c3693b8 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -158,7 +158,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
* Localbus non-cacheable
* 0xe000_0000 0xe80f_ffff Promjet/free 128M non-cacheable
* 0xe800_0000 0xefff_ffff FLASH 128M non-cacheable
- * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable
+ * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable
* 0xffdf_0000 0xffdf_7fff PIXIS 32K non-cacheable TLB0
* 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0
* 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable
@@ -268,50 +268,49 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
CONFIG_SYS_NAND_BASE + 0x80000,\
CONFIG_SYS_NAND_BASE + 0xC0000}
#define CONFIG_SYS_MAX_NAND_DEVICE 4
-#define NAND_MAX_CHIPS 1
+#define NAND_MAX_CHIPS 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND 1
-#define CONFIG_NAND_FSL_ELBC 1
+#define CONFIG_CMD_NAND 1
+#define CONFIG_NAND_FSL_ELBC 1
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
/* NAND flash config */
#define CONFIG_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE_PHYS \
- | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
- | BR_PS_8 /* Port Size = 8 bit */ \
- | BR_MS_FCM /* MSEL = FCM */ \
- | BR_V) /* valid */
-#define CONFIG_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \
- | OR_FCM_PGS /* Large Page*/ \
- | OR_FCM_CSCT \
- | OR_FCM_CST \
- | OR_FCM_CHT \
- | OR_FCM_SCY_1 \
- | OR_FCM_TRLX \
- | OR_FCM_EHTR)
+ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
+ | BR_PS_8 /* Port Size = 8 bit */ \
+ | BR_MS_FCM /* MSEL = FCM */ \
+ | BR_V) /* valid */
+#define CONFIG_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \
+ | OR_FCM_PGS /* Large Page*/ \
+ | OR_FCM_CSCT \
+ | OR_FCM_CST \
+ | OR_FCM_CHT \
+ | OR_FCM_SCY_1 \
+ | OR_FCM_TRLX \
+ | OR_FCM_EHTR)
#define CONFIG_SYS_BR2_PRELIM CONFIG_NAND_BR_PRELIM /* NAND Base Address */
#define CONFIG_SYS_OR2_PRELIM CONFIG_NAND_OR_PRELIM /* NAND Options */
#define CONFIG_SYS_BR4_PRELIM ((CONFIG_SYS_NAND_BASE_PHYS + 0x40000)\
- | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
- | BR_PS_8 /* Port Size = 8 bit */ \
- | BR_MS_FCM /* MSEL = FCM */ \
- | BR_V) /* valid */
-#define CONFIG_SYS_OR4_PRELIM CONFIG_NAND_OR_PRELIM /* NAND Options */
+ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
+ | BR_PS_8 /* Port Size = 8 bit */ \
+ | BR_MS_FCM /* MSEL = FCM */ \
+ | BR_V) /* valid */
+#define CONFIG_SYS_OR4_PRELIM CONFIG_NAND_OR_PRELIM /* NAND Options */
#define CONFIG_SYS_BR5_PRELIM ((CONFIG_SYS_NAND_BASE_PHYS + 0x80000)\
- | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
- | BR_PS_8 /* Port Size = 8 bit */ \
- | BR_MS_FCM /* MSEL = FCM */ \
- | BR_V) /* valid */
-#define CONFIG_SYS_OR5_PRELIM CONFIG_NAND_OR_PRELIM /* NAND Options */
+ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
+ | BR_PS_8 /* Port Size = 8 bit */ \
+ | BR_MS_FCM /* MSEL = FCM */ \
+ | BR_V) /* valid */
+#define CONFIG_SYS_OR5_PRELIM CONFIG_NAND_OR_PRELIM /* NAND Options */
#define CONFIG_SYS_BR6_PRELIM ((CONFIG_SYS_NAND_BASE_PHYS + 0xC0000)\
- | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
- | BR_PS_8 /* Port Size = 8 bit */ \
- | BR_MS_FCM /* MSEL = FCM */ \
- | BR_V) /* valid */
-#define CONFIG_SYS_OR6_PRELIM CONFIG_NAND_OR_PRELIM /* NAND Options */
-
+ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
+ | BR_PS_8 /* Port Size = 8 bit */ \
+ | BR_MS_FCM /* MSEL = FCM */ \
+ | BR_V) /* valid */
+#define CONFIG_SYS_OR6_PRELIM CONFIG_NAND_OR_PRELIM /* NAND Options */
/* Serial Port - controlled on board with jumper J8
diff --git a/include/configs/TQM8260.h b/include/configs/TQM8260.h
index 533c7ad..ac9c94e 100644
--- a/include/configs/TQM8260.h
+++ b/include/configs/TQM8260.h
@@ -300,6 +300,13 @@
#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
+/* use CFI flash driver */
+#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
+#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
+#define CONFIG_SYS_FLASH_EMPTY_INFO 1
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
+
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000)
#define CONFIG_ENV_SIZE 0x08000
diff --git a/include/configs/fx12mm.h b/include/configs/fx12mm.h
index 8481c33..5844567 100644
--- a/include/configs/fx12mm.h
+++ b/include/configs/fx12mm.h
@@ -25,11 +25,10 @@
* MA 02111-1307 USA
*/
-
/*
- Configuration file for the Virtex4FX12 Minimodul by Avnet/Memec,
- see http://www.em.avnet.com
-*/
+ * Configuration file for the Virtex4FX12 Minimodul by Avnet/Memec,
+ * see http://www.em.avnet.com
+ */
#ifndef __CONFIG_FX12_H
#define __CONFIG_FX12_H
@@ -54,7 +53,7 @@
/*Misc*/
#define CONFIG_SYS_PROMPT "FX12MM:/# " /* Monitor Command Prompt */
-#define CONFIG_PREBOOT "echo U-Boot is up and runnining;"
+#define CONFIG_PREBOOT "echo U-Boot is up and running;"
/*Flash*/
#define CONFIG_SYS_FLASH_SIZE (4*1024*1024)
@@ -62,8 +61,6 @@
#define MTDIDS_DEFAULT "nor0=fx12mm-flash"
#define MTDPARTS_DEFAULT "mtdparts=fx12mm-flash:-(user)"
-
#include "configs/xilinx-ppc405.h"
-#endif /* __CONFIG_H */
-
+#endif /* __CONFIG_H */
diff --git a/include/configs/mgsuvd.h b/include/configs/mgsuvd.h
index ff52f84..fca2e55 100644
--- a/include/configs/mgsuvd.h
+++ b/include/configs/mgsuvd.h
@@ -329,9 +329,6 @@
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
-#define OF_CPU "PowerPC,866@0"
-#define OF_SOC "soc@fff00000"
-#define OF_TBCLK (bd->bi_busfreq / 4)
#define OF_STDOUT_PATH "/soc/cpm/serial@a80"
/* enable I2C and select the hardware/software driver */
diff --git a/include/usbdcore.h b/include/usbdcore.h
index cb2be72..206dbbc 100644
--- a/include/usbdcore.h
+++ b/include/usbdcore.h
@@ -126,14 +126,6 @@
})
#endif
-#ifndef MIN
-#define MIN(a,b) ((a) < (b) ? (a) : (b))
-#endif
-#ifndef MAX
-#define MAX(a,b) ((a) > (b) ? (a) : (b))
-#endif
-
-
/*
* Structure member address manipulation macros.
* These are used by client code (code using the urb_link routines), since
generated by cgit v1.1 at 2024-12-12 03:53:00 +0000