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-rw-r--r--include/configs/VCMA9.h5
-rw-r--r--include/configs/aspenite.h1
-rw-r--r--include/configs/dkb.h1
-rw-r--r--include/configs/km/keymile-common.h9
-rw-r--r--include/configs/km/km_arm.h25
-rw-r--r--include/configs/mgcoge3un.h (renamed from include/configs/mgcoge2un.h)49
-rw-r--r--include/configs/mx31pdk.h32
-rw-r--r--include/configs/mx51evk.h3
-rw-r--r--include/configs/mx53evk.h3
-rw-r--r--include/configs/mx53loco.h185
-rw-r--r--include/configs/mx53smd.h191
-rw-r--r--include/configs/openrd.h1
-rw-r--r--include/configs/rd6281a.h1
-rw-r--r--include/configs/smdk2410.h181
-rw-r--r--include/configs/smdkv310.h169
-rw-r--r--include/configs/suen3.h15
-rw-r--r--include/configs/suen8.h15
-rw-r--r--include/configs/u8500_href.h245
-rw-r--r--include/configs/vision2.h1
19 files changed, 987 insertions, 145 deletions
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index ebe9e42..3cd1bc3 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -247,4 +247,9 @@
#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+ GENERATED_GBL_DATA_SIZE)
+
+
#endif /* __CONFIG_H */
diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h
index 1619db5..6fb5769 100644
--- a/include/configs/aspenite.h
+++ b/include/configs/aspenite.h
@@ -53,7 +53,6 @@
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
#include <config_cmd_default.h>
#define CONFIG_CMD_I2C
-#define CONFIG_CMD_AUTOSCRIPT
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
/*
diff --git a/include/configs/dkb.h b/include/configs/dkb.h
index b400d0a..3d27c58 100644
--- a/include/configs/dkb.h
+++ b/include/configs/dkb.h
@@ -46,7 +46,6 @@
*/
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
#include <config_cmd_default.h>
-#define CONFIG_CMD_AUTOSCRIPT
#define CONFIG_CMD_I2C
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index f89a2ea..70c9dad 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -31,15 +31,6 @@
#define CONFIG_BOOTCOUNT_LIMIT
/*
- * By default kwbimage.cfg from board specific folder is used
- * If for some board, different configuration file need to be used,
- * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file
- */
-#ifndef CONFIG_SYS_KWD_CONFIG
-#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg
-#endif /* CONFIG_SYS_KWD_CONFIG */
-
-/*
* Command line configuration.
*/
#include <config_cmd_default.h>
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index aa9f1ae..20ee6ea 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -64,6 +64,9 @@
#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */
#define CONFIG_KM_DEF_ENV_CPU \
+ "addbootcount=" \
+ "setenv bootargs ${bootargs} " \
+ "bootcountaddr=${bootcountaddr}\0" \
"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
"boot=bootm ${actual_kernel_addr} - -\0" \
"cramfsloadfdt=true\0" \
@@ -88,6 +91,7 @@
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
+#define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE
/*
* Serial Port configuration
@@ -132,7 +136,12 @@
#define BOOTFLASH_START 0x0
+/* Kirkwood has two serial IF */
+#if (CONFIG_CONS_INDEX == 2)
+#define CONFIG_KM_CONSOLE_TTY "ttyS1"
+#else
#define CONFIG_KM_CONSOLE_TTY "ttyS0"
+#endif
/*
* Other required minimal configurations
@@ -239,9 +248,25 @@ int get_scl(void);
"sf write ${u-boot_addr_r} 0 ${filesize};" \
"spi off\0"
+/*
+ * Default environment variables
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_KM_DEF_ENV \
+ "newenv=setenv addr 0x100000 && " \
+ "i2c dev 1; mw.b ${addr} 0 4 && " \
+ "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
+ " ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && " \
+ "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
+ " ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0" \
+ "rootpath=/opt/eldk/arm\0" \
+ "EEprom_ivm=" KM_IVM_BUS "\0" \
+ ""
+
#if defined(CONFIG_SYS_NO_FLASH)
#define CONFIG_KM_UBI_PARTITION_NAME "ubi0"
#undef CONFIG_FLASH_CFI_MTD
+#undef CONFIG_CMD_JFFS2
#undef CONFIG_JFFS2_CMDLINE
#endif
diff --git a/include/configs/mgcoge2un.h b/include/configs/mgcoge3un.h
index 6256035..6d56d7d 100644
--- a/include/configs/mgcoge2un.h
+++ b/include/configs/mgcoge3un.h
@@ -31,8 +31,8 @@
/* for linking errors see
* http://lists.denx.de/pipermail/u-boot/2009-July/057350.html */
-#ifndef _CONFIG_MGCOGE2UN_H
-#define _CONFIG_MGCOGE2UN_H
+#ifndef _CONFIG_MGCOGE3UN_H
+#define _CONFIG_MGCOGE3UN_H
/* include common defines/options for all arm based Keymile boards */
#include "km/km_arm.h"
@@ -40,26 +40,39 @@
/*
* Version number information
*/
-#define CONFIG_IDENT_STRING "\nKeymile MGCOGE2UN"
-
-#define CONFIG_HOSTNAME mgcoge2un
+#define CONFIG_IDENT_STRING "\nKeymile MGCOGE3UN"
+#define CONFIG_HOSTNAME mgcoge3un
+#define CONFIG_MGCOGE3UN
#define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/
#define KM_ENV_BUS "pca9547:70:d" /* I2C2 (Mux-Port 5)*/
+/* we use a new RAM type on mgcoge3un board */
+#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
+
/*
- * Default environment variables
+ * mgcoge3un has a fixed link to the marvell switch
+ * with 100MB full duplex and autoneg off, for this
+ * reason we have to change the default settings
*/
-#define CONFIG_EXTRA_ENV_SETTINGS \
- CONFIG_KM_DEF_ENV \
- "newenv=setenv addr 0x100000 && " \
- "i2c dev 1; mw.b ${addr} 0 4 && " \
- "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
- " ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && " \
- "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
- " ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0" \
- "rootpath=/opt/eldk/arm\0" \
- "EEprom_ivm=" KM_IVM_BUS "\0" \
- ""
+#define PORT_SERIAL_CONTROL_VALUE ( \
+ MVGBE_FORCE_LINK_PASS | \
+ MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
+ MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
+ MVGBE_ADV_NO_FLOW_CTRL | \
+ MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
+ MVGBE_FORCE_BP_MODE_NO_JAM | \
+ (1 << 9) /* Reserved bit has to be 1 */ | \
+ MVGBE_DO_NOT_FORCE_LINK_FAIL | \
+ MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
+ MVGBE_DTE_ADV_0 | \
+ MVGBE_MIIPHY_MAC_MODE | \
+ MVGBE_AUTO_NEG_NO_CHANGE | \
+ MVGBE_MAX_RX_PACKET_1552BYTE | \
+ MVGBE_CLR_EXT_LOOPBACK | \
+ MVGBE_SET_FULL_DUPLEX_MODE | \
+ MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
+ MVGBE_SET_GMII_SPEED_TO_10_100 |\
+ MVGBE_SET_MII_SPEED_TO_100)
-#endif /* _CONFIG_MGCOGE2UN_H */
+#endif /* _CONFIG_MGCOGE3UN_H */
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index d019e96..ba1e187 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -33,17 +33,17 @@
#include <asm/arch/imx-regs.h>
/* High Level Configuration Options */
-#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
-#define CONFIG_MX31 1 /* in a mx31 */
+#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
+#define CONFIG_MX31 /* in a mx31 */
#define CONFIG_MX31_HCLK_FREQ 26000000
#define CONFIG_MX31_CLK32 32768
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
#define CONFIG_SKIP_LOWLEVEL_INIT
@@ -58,12 +58,12 @@
* Hardware drivers
*/
-#define CONFIG_MXC_UART 1
-#define CONFIG_SYS_MX31_UART1 1
+#define CONFIG_MXC_UART
+#define CONFIG_SYS_MX31_UART1
#define CONFIG_HW_WATCHDOG
-#define CONFIG_HARD_SPI 1
-#define CONFIG_MXC_SPI 1
+#define CONFIG_HARD_SPI
+#define CONFIG_MXC_SPI
#define CONFIG_DEFAULT_SPI_BUS 1
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
@@ -72,7 +72,7 @@
#define CONFIG_FSL_PMIC_CS 2
#define CONFIG_FSL_PMIC_CLK 1000000
#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
-#define CONFIG_RTC_MC13783 1
+#define CONFIG_RTC_MC13783
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -114,9 +114,9 @@
"nand write 0x81000000 0x0 0x40000\0"
#define CONFIG_NET_MULTI
-#define CONFIG_SMC911X 1
+#define CONFIG_SMC911X
#define CONFIG_SMC911X_BASE 0xB6000000
-#define CONFIG_SMC911X_32_BIT 1
+#define CONFIG_SMC911X_32_BIT
/*
* Miscellaneous configurable options
@@ -141,7 +141,7 @@
#define CONFIG_SYS_HZ 1000
-#define CONFIG_CMDLINE_EDITING 1
+#define CONFIG_CMDLINE_EDITING
/*-----------------------------------------------------------------------
* Stack sizes
@@ -156,7 +156,7 @@
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 CSD0_BASE
#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
-#define CONFIG_BOARD_EARLY_INIT_F 1
+#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
@@ -168,9 +168,9 @@
* FLASH and environment organization
*/
/* No NOR flash present */
-#define CONFIG_SYS_NO_FLASH 1
+#define CONFIG_SYS_NO_FLASH
-#define CONFIG_ENV_IS_IN_NAND 1
+#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET 0x40000
#define CONFIG_ENV_OFFSET_REDUND 0x60000
#define CONFIG_ENV_SIZE (128 * 1024)
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 6a785f8..207b20c 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -226,7 +226,4 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_OF_LIBFDT
-#define CONFIG_SYS_BOOTMAPSZ 0x800000
-
#endif
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index 5749a08..78122a7 100644
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -192,7 +192,4 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_OF_LIBFDT
-#define CONFIG_SYS_BOOTMAPSZ 0x800000
-
#endif /* __CONFIG_H */
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
new file mode 100644
index 0000000..544e3fb
--- /dev/null
+++ b/include/configs/mx53loco.h
@@ -0,0 +1,185 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc.
+ * Jason Liu <r64343@freescale.com>
+ *
+ * Configuration settings for Freescale MX53 low cost board.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MX53
+
+#define CONFIG_SYS_MX5_HCLK 24000000
+#define CONFIG_SYS_MX5_CLK32 32768
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_L2_OFF
+
+#include <asm/arch/imx-regs.h>
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MXC_GPIO
+
+#define CONFIG_MXC_UART
+#define CONFIG_SYS_MX53_UART1
+
+/* MMC Configs */
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CONFIG_SYS_FSL_ESDHC_NUM 2
+
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+/* Eth Configs */
+#define CONFIG_HAS_ETH1
+#define CONFIG_NET_MULTI
+#define CONFIG_MII
+#define CONFIG_DISCOVER_PHY
+
+#define CONFIG_FEC_MXC
+#define IMX_FEC_BASE FEC_BASE_ADDR
+#define CONFIG_FEC_MXC_PHYADDR 0x1F
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
+
+/* Command definition */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_BOOTDELAY 3
+
+#define CONFIG_PRIME "FEC0"
+
+#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
+#define CONFIG_SYS_TEXT_BASE 0x77800000
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "script=boot.scr\0" \
+ "uimage=uImage\0" \
+ "mmcdev=0\0" \
+ "mmcpart=2\0" \
+ "mmcroot=/dev/mmcblk0p3 rw\0" \
+ "mmcrootfstype=ext3 rootwait\0" \
+ "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
+ "root=${mmcroot} " \
+ "rootfstype=${mmcrootfstype}\0" \
+ "loadbootscript=" \
+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+ "bootscript=echo Running bootscript from mmc ...; " \
+ "source\0" \
+ "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "bootm\0" \
+ "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
+ "root=/dev/nfs " \
+ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+ "netboot=echo Booting from net ...; " \
+ "run netargs; " \
+ "dhcp ${uimage}; bootm\0" \
+
+#define CONFIG_BOOTCOMMAND \
+ "if mmc rescan ${mmcdev}; then " \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loaduimage; then " \
+ "run mmcboot; " \
+ "else run netboot; " \
+ "fi; " \
+ "fi; " \
+ "else run netboot; fi"
+
+#define CONFIG_ARP_TIMEOUT 200UL
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_SYS_PROMPT "MX53LOCO U-Boot > "
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+
+#define CONFIG_SYS_MEMTEST_START 0x70000000
+#define CONFIG_SYS_MEMTEST_END 0x70010000
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+
+#define CONFIG_SYS_HZ 1000
+#define CONFIG_CMDLINE_EDITING
+
+/* Stack sizes */
+#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 2
+#define PHYS_SDRAM_1 CSD0_BASE_ADDR
+#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
+#define PHYS_SDRAM_2 CSD1_BASE_ADDR
+#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
+#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
+
+#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
+#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
+#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
+#define CONFIG_ENV_SIZE (8 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+#define CONFIG_OF_LIBFDT
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h
new file mode 100644
index 0000000..65d5e05
--- /dev/null
+++ b/include/configs/mx53smd.h
@@ -0,0 +1,191 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the MX53-SMDFreescale board.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MX53
+
+#define CONFIG_SYS_MX5_HCLK 24000000
+#define CONFIG_SYS_MX5_CLK32 32768
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_L2_OFF
+
+#include <asm/arch/imx-regs.h>
+
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_REVISION_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MXC_GPIO
+
+#define CONFIG_MXC_UART
+#define CONFIG_SYS_MX53_UART1
+
+/* I2C Configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C_MX53_PORT2
+#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C_SLAVE 0xfe
+
+/* MMC Configs */
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CONFIG_SYS_FSL_ESDHC_NUM 1
+
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+/* Eth Configs */
+#define CONFIG_HAS_ETH1
+#define CONFIG_NET_MULTI
+#define CONFIG_MII
+#define CONFIG_DISCOVER_PHY
+
+#define CONFIG_FEC_MXC
+#define IMX_FEC_BASE FEC_BASE_ADDR
+#define CONFIG_FEC_MXC_PHYADDR 0x1F
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
+
+/* Command definition */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_BOOTDELAY 3
+
+#define CONFIG_PRIME "FEC0"
+
+#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
+#define CONFIG_SYS_TEXT_BASE 0x77800000
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "script=boot.scr\0" \
+ "uimage=uImage\0" \
+ "mmcdev=0\0" \
+ "mmcpart=2\0" \
+ "mmcroot=/dev/mmcblk0p3 rw\0" \
+ "mmcrootfstype=ext3 rootwait\0" \
+ "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
+ "root=${mmcroot} " \
+ "rootfstype=${mmcrootfstype}\0" \
+ "loadbootscript=" \
+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+ "bootscript=echo Running bootscript from mmc ...; " \
+ "source\0" \
+ "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "bootm\0" \
+ "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
+ "root=/dev/nfs " \
+ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+ "netboot=echo Booting from net ...; " \
+ "run netargs; " \
+ "dhcp ${uimage}; bootm\0" \
+
+#define CONFIG_BOOTCOMMAND \
+ "if mmc rescan ${mmcdev}; then " \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loaduimage; then " \
+ "run mmcboot; " \
+ "else run netboot; " \
+ "fi; " \
+ "fi; " \
+ "else run netboot; fi"
+#define CONFIG_ARP_TIMEOUT 200UL
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_SYS_PROMPT "MX53SMD U-Boot > "
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+
+#define CONFIG_SYS_MEMTEST_START 0x70000000
+#define CONFIG_SYS_MEMTEST_END 0x10000
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+
+#define CONFIG_SYS_HZ 1000
+#define CONFIG_CMDLINE_EDITING
+
+/* Stack sizes */
+#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 2
+#define PHYS_SDRAM_1 CSD0_BASE_ADDR
+#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
+#define PHYS_SDRAM_2 CSD1_BASE_ADDR
+#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
+#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
+
+#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
+#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
+#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
+#define CONFIG_ENV_SIZE (8 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+#define CONFIG_OF_LIBFDT
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/openrd.h b/include/configs/openrd.h
index 3256cb3..53bafe1 100644
--- a/include/configs/openrd.h
+++ b/include/configs/openrd.h
@@ -62,7 +62,6 @@
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
#define CONFIG_SYS_MVFS
#include <config_cmd_default.h>
-#define CONFIG_CMD_AUTOSCRIPT
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ENV
#define CONFIG_CMD_MII
diff --git a/include/configs/rd6281a.h b/include/configs/rd6281a.h
index 60f9579..5b7fdd8 100644
--- a/include/configs/rd6281a.h
+++ b/include/configs/rd6281a.h
@@ -44,7 +44,6 @@
*/
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
#include <config_cmd_default.h>
-#define CONFIG_CMD_AUTOSCRIPT
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ENV
#define CONFIG_CMD_FAT
diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
index 62fe97e..a4a675b 100644
--- a/include/configs/smdk2410.h
+++ b/include/configs/smdk2410.h
@@ -33,22 +33,23 @@
* High Level Configuration Options
* (easy to change)
*/
-#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
-#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */
-#define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */
-#define CONFIG_SMDK2410 1 /* on a SAMSUNG SMDK2410 Board */
+#define CONFIG_ARM920T /* This is an ARM920T Core */
+#define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */
+#define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
+#define CONFIG_SMDK2410 /* on a SAMSUNG SMDK2410 Board */
-/* input clock of PLL */
-#define CONFIG_SYS_CLK_FREQ 12000000/* the SMDK2410 has 12MHz input clock */
+#define CONFIG_SYS_TEXT_BASE 0x0
+#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
-#define USE_920T_MMU 1
-#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* input clock of PLL (the SMDK2410 has 12MHz input clock) */
+#define CONFIG_SYS_CLK_FREQ 12000000
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
/*
* Hardware drivers
@@ -62,19 +63,24 @@
* select serial console configuration
*/
#define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
+
+/************************************************************
+ * USB support (currently only works with D-cache off)
+ ************************************************************/
+#define CONFIG_USB_OHCI
+#define CONFIG_USB_KEYBOARD
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
/************************************************************
* RTC
************************************************************/
-#define CONFIG_RTC_S3C24X0 1
+#define CONFIG_RTC_S3C24X0
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200
-
/*
* BOOTP options
*/
@@ -83,52 +89,71 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
+#define CONFIG_CMD_BSP
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ELF
-
-
-#define CONFIG_BOOTDELAY 3
-/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
-/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5b */
-#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_USB
+
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_CMDLINE_EDITING
+
+/* autoboot */
+#define CONFIG_BOOTDELAY 5
+#define CONFIG_BOOT_RETRY_TIME -1
+#define CONFIG_RESET_TO_RETRY
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 10.0.0.110
#define CONFIG_SERVERIP 10.0.0.1
-/*#define CONFIG_BOOTFILE "elinos-lart" */
-/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
-#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "SMDK2410 # " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "SMDK2410 # "
+#define CONFIG_SYS_CBSIZE 256
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+/* may be activated as soon as s3c24x0 has print_cpuinfo support */
+/*#define CONFIG_DISPLAY_CPUINFO*/ /* Display cpu info */
-#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
+#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
-#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */
+#define CONFIG_SYS_LOAD_ADDR 0x30800000
-#define CONFIG_SYS_HZ 1000
+#define CONFIG_SYS_HZ 1000
/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+/* support additional compression methods */
+#define CONFIG_BZIP2
+#define CONFIG_LZO
+#define CONFIG_LZMA
+
/*-----------------------------------------------------------------------
* Stack sizes
*
@@ -143,40 +168,72 @@
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #0 */
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
-#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
-#if 0
-#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
-#endif
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_LEGACY
+#define CONFIG_SYS_FLASH_LEGACY_512Kx16
+#define CONFIG_FLASH_SHOW_PROGRESS 45
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#ifdef CONFIG_AMD_LV800
-#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
-#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
-#endif
-#ifdef CONFIG_AMD_LV400
-#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
-#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
-#endif
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
+#define CONFIG_SYS_MAX_FLASH_SECT (19)
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000)
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SIZE 0x10000
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
+/*
+ * Size of malloc() pool
+ * BZIP2 / LZO / LZMA need a lot of RAM
+ */
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-#endif /* __CONFIG_H */
+#define CONFIG_SYS_MONITOR_LEN (448 * 1024)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+
+/*
+ * NAND configuration
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_S3C2410
+#define CONFIG_SYS_S3C2410_NAND_HWECC
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CONFIG_SYS_NAND_BASE 0x4E000000
+#endif
+
+/*
+ * File system
+ */
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_YAFFS2
+#define CONFIG_RBTREE
+
+/* additions for new relocation code, must be added to all boards */
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+ GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
new file mode 100644
index 0000000..a7f5850
--- /dev/null
+++ b/include/configs/smdkv310.h
@@ -0,0 +1,169 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG SMDKV310 (S5PC210) board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* High Level Configuration Options */
+#define CONFIG_ARMV7 1 /*This is an ARM V7 CPU core */
+#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
+#define CONFIG_S5P 1 /* S5P Family */
+#define CONFIG_S5PC210 1 /* which is in a S5PC210 SoC */
+#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
+
+#include <asm/arch/cpu.h> /* get chip and board defs */
+
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+/* Keep L2 Cache Disabled */
+#define CONFIG_L2_OFF 1
+
+#define CONFIG_SYS_SDRAM_BASE 0x40000000
+#define CONFIG_SYS_TEXT_BASE 0x43E00000
+
+/* input clock of PLL: SMDKV310 has 24MHz input clock */
+#define CONFIG_SYS_CLK_FREQ 24000000
+
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_EDITING
+
+/* Handling Sleep Mode*/
+#define S5P_CHECK_SLEEP 0x00000BAD
+#define S5P_CHECK_DIDLE 0xBAD00000
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
+
+/* select serial console configuration */
+#define CONFIG_SERIAL_MULTI 1
+#define CONFIG_SERIAL1 1 /* use SERIAL 1 */
+#define CONFIG_BAUDRATE 115200
+#define S5PC210_DEFAULT_UART_OFFSET 0x010000
+
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC 1
+#define CONFIG_MMC 1
+#define CONFIG_S5P_MMC 1
+
+/* PWM */
+#define CONFIG_PWM 1
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* Command definition*/
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_FAT
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_MMC_U_BOOT
+
+#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_SYS_PROMPT "SMDKV310 # "
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
+#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
+
+#define CONFIG_SYS_HZ 1000
+
+/* valid baudrates */
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/* Stack sizes */
+#define CONFIG_STACKSIZE (256 << 10) /* 256KB */
+
+/* SMDKV310 has 4 bank of DRAM */
+#define CONFIG_NR_DRAM_BANKS 4
+#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
+#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH 1
+#undef CONFIG_CMD_IMLS
+#define CONFIG_IDENT_STRING " for SMDKC210/V310"
+
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+#define CONFIG_CLK_1000_400_200
+
+/* MIU (Memory Interleaving Unit) */
+#define CONFIG_MIU_2BIT_INTERLEAVED
+
+#define CONFIG_ENV_IS_IN_MMC 1
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
+#define RESERVE_BLOCK_SIZE (512)
+#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
+#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
+#define CONFIG_DOS_PARTITION 1
+
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
+
+/* U-boot copy size from boot Media to DRAM.*/
+#define COPY_BL2_SIZE 0x80000
+#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
+#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
+
+/* Ethernet Controllor Driver */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC911X
+#define CONFIG_SMC911X_BASE 0x5000000
+#define CONFIG_SMC911X_16_BIT
+#define CONFIG_ENV_SROM_BANK 1
+#endif /*CONFIG_CMD_NET*/
+#endif /* __CONFIG_H */
diff --git a/include/configs/suen3.h b/include/configs/suen3.h
index aa4d778..0f1b11e 100644
--- a/include/configs/suen3.h
+++ b/include/configs/suen3.h
@@ -46,19 +46,4 @@
#define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
#define KM_ENV_BUS "pca9544a:70:d" /* I2C2 (Mux-Port 5)*/
-/*
- * Default environment variables
- */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- CONFIG_KM_DEF_ENV \
- "newenv=setenv addr 0x100000 && " \
- "i2c dev 1; mw.b ${addr} 0 4 && " \
- "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
- " ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && " \
- "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
- " ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0" \
- "rootpath=/opt/eldk/arm\0" \
- "EEprom_ivm=" KM_IVM_BUS "\0" \
- ""
-
#endif /* _CONFIG_SUEN3_H */
diff --git a/include/configs/suen8.h b/include/configs/suen8.h
index b680dfb..78cee75 100644
--- a/include/configs/suen8.h
+++ b/include/configs/suen8.h
@@ -47,19 +47,4 @@
#define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
#define KM_ENV_BUS "pca9544a:70:d" /* I2C2 (Mux-Port 5)*/
-/*
- * Default environment variables
- */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- CONFIG_KM_DEF_ENV \
- "newenv=setenv addr 0x100000 && " \
- "i2c dev 1; mw.b ${addr} 0 4 && " \
- "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
- " ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && " \
- "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
- " ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0" \
- "rootpath=/opt/eldk/arm\0" \
- "EEprom_ivm=" KM_IVM_BUS "\0" \
- ""
-
#endif /* _CONFIG_SUEN8_H */
diff --git a/include/configs/u8500_href.h b/include/configs/u8500_href.h
new file mode 100644
index 0000000..636922c
--- /dev/null
+++ b/include/configs/u8500_href.h
@@ -0,0 +1,245 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2009
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_U8500
+#define CONFIG_L2_OFF
+
+#define CONFIG_SYS_MEMTEST_START 0x00000000
+#define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF
+#define CONFIG_SYS_HZ 1000 /* must be 1000 */
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define BOARD_LATE_INIT
+
+/*
+ * Size of malloc() pool
+ */
+#ifdef CONFIG_BOOT_SRAM
+#define CONFIG_ENV_SIZE (32*1024)
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 64*1024)
+#else
+#define CONFIG_ENV_SIZE (128*1024)
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024)
+#endif
+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */
+
+/*
+ * PL011 Configuration
+ */
+#define CONFIG_PL011_SERIAL
+#define CONFIG_PL011_SERIAL_RLCR
+#define CONFIG_PL011_SERIAL_FLUSH_ON_INIT
+
+/*
+ * U8500 UART registers base for 3 serial devices
+ */
+#define CFG_UART0_BASE 0x80120000
+#define CFG_UART1_BASE 0x80121000
+#define CFG_UART2_BASE 0x80007000
+#define CFG_SERIAL0 CFG_UART0_BASE
+#define CFG_SERIAL1 CFG_UART1_BASE
+#define CFG_SERIAL2 CFG_UART2_BASE
+#define CONFIG_PL011_CLOCK 38400000
+#define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \
+ (void *)CFG_SERIAL2 }
+#define CONFIG_CONS_INDEX 2
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Devices and file systems
+ */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_DOS_PARTITION
+
+/*
+ * Commands
+ */
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_CONSOLE
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_EMMC
+#define CONFIG_CMD_SOURCE
+#define CONFIG_CMD_I2C
+
+#ifndef CONFIG_BOOTDELAY
+#define CONFIG_BOOTDELAY 1
+#endif
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+
+#undef CONFIG_BOOTARGS
+#define CONFIG_BOOTCOMMAND "run emmcboot"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "verify=n\0" \
+ "loadaddr=0x00100000\0" \
+ "console=ttyAMA2,115200n8\0" \
+ "memargs256=mem=96M@0 mem_modem=32M@96M mem=30M@128M " \
+ "pmem=22M@158M pmem_hwb=44M@180M mem_mali=32@224M\0" \
+ "memargs512=mem=96M@0 mem_modem=32M@96M mem=44M@128M " \
+ "pmem=22M@172M mem=30M@194M mem_mali=32M@224M " \
+ "pmem_hwb=54M@256M mem=202M@310M\0" \
+ "commonargs=setenv bootargs cachepolicy=writealloc noinitrd " \
+ "init=init " \
+ "board_id=${board_id} " \
+ "logo.${logo} " \
+ "startup_graphics=${startup_graphics}\0" \
+ "emmcargs=setenv bootargs ${bootargs} " \
+ "root=/dev/mmcblk0p2 " \
+ "rootdelay=1\0" \
+ "addcons=setenv bootargs ${bootargs} " \
+ "console=${console}\0" \
+ "emmcboot=echo Booting from eMMC ...; " \
+ "run commonargs emmcargs addcons memargs;" \
+ "mmc read 0 ${loadaddr} 0xA0000 0x4000;" \
+ "bootm ${loadaddr}\0" \
+ "flash=mmc init 1;fatload mmc 1 ${loadaddr} flash.scr;" \
+ "source ${loadaddr}\0" \
+ "loaduimage=mmc init 1;fatload mmc 1 ${loadaddr} uImage\0" \
+ "usbtty=cdc_acm\0" \
+ "stdout=serial,usbtty\0" \
+ "stdin=serial,usbtty\0" \
+ "stderr=serial,usbtty\0"
+
+/*
+ * Miscellaneous configurable options
+ */
+
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "U8500 $ " /* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
+ + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
+
+#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
+#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE
+
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_CMDLINE_EDITING
+
+#define CONFIG_SETUP_MEMORY_TAGS 2
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+
+/*
+ * I2C
+ */
+#define CONFIG_U8500_I2C
+#undef CONFIG_HARD_I2C /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C_SLAVE 0 /* slave addr of controller */
+#define CONFIG_SYS_U8500_I2C0_BASE 0x80004000
+#define CONFIG_SYS_U8500_I2C1_BASE 0x80122000
+#define CONFIG_SYS_U8500_I2C2_BASE 0x80128000
+#define CONFIG_SYS_U8500_I2C3_BASE 0x80110000
+#define CONFIG_SYS_U8500_I2C_BUS_MAX 4
+
+#define CONFIG_SYS_I2C_GPIOE_ADDR 0x42 /* GPIO expander chip addr */
+#define CONFIG_TC35892_GPIO
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */
+#define PHYS_SDRAM_SIZE_1 0x20000000 /* 512 MB */
+
+/*
+ * additions for new relocation code
+ */
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_SIZE 0x100000
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
+ CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
+
+/* landing address before relocation */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0x0
+#endif
+
+/*
+ * MMC related configs
+ * NB Only externa SD slot is currently supported
+ */
+#define MMC_BLOCK_SIZE 512
+#define CONFIG_ARM_PL180_MMCI
+#define CONFIG_ARM_PL180_MMCI_BASE 0x80126000 /* MMC base for 8500 */
+#define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000
+#define CONFIG_MMC_DEV_NUM 1
+
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_SAVEENV /* CMD_ENV is obsolete but used in env_emmc.c */
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_OFFSET 0x13F80000
+#define CONFIG_SYS_MMC_ENV_DEV 0 /* SLOT2: eMMC */
+
+/*
+ * FLASH and environment organization
+ */
+#define CONFIG_SYS_NO_FLASH
+
+/*
+ * base register values for U8500
+ */
+#define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock
+ management unit */
+#define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/vision2.h b/include/configs/vision2.h
index dc3a028..66795b5 100644
--- a/include/configs/vision2.h
+++ b/include/configs/vision2.h
@@ -27,6 +27,7 @@
#define CONFIG_MX51 /* in a mx51 */
#define CONFIG_L2_OFF
+#define CONFIG_SYS_TEXT_BASE 0x97800000
#include <asm/arch/imx-regs.h>
generated by cgit v1.1 at 2024-11-25 13:03:52 +0000