diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-ppc/global_data.h | 3 | ||||
| -rw-r--r-- | include/asm-ppc/immap_85xx.h | 4 | ||||
| -rw-r--r-- | include/common.h | 14 | ||||
| -rw-r--r-- | include/configs/ads5121.h | 8 | ||||
| -rw-r--r-- | include/configs/imx31_litekit.h | 10 | ||||
| -rw-r--r-- | include/configs/lwmon5.h | 12 | ||||
| -rw-r--r-- | include/configs/mcc200.h | 6 | ||||
| -rw-r--r-- | include/configs/mx31ads.h | 39 | ||||
| -rw-r--r-- | include/configs/pdnb3.h | 2 | ||||
| -rw-r--r-- | include/configs/qemu-mips.h | 74 | ||||
| -rw-r--r-- | include/configs/sbc8349.h | 4 | ||||
| -rw-r--r-- | include/environment.h | 11 | ||||
| -rw-r--r-- | include/image.h | 26 | ||||
| -rw-r--r-- | include/ppc440.h | 7 | ||||
| -rw-r--r-- | include/sha1.h | 11 | ||||
| -rw-r--r-- | include/u-boot/md5.h | 8 |
16 files changed, 160 insertions, 79 deletions
diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h index 9ccf7d6..202c844 100644 --- a/include/asm-ppc/global_data.h +++ b/include/asm-ppc/global_data.h @@ -155,6 +155,9 @@ typedef struct global_data { #if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5) unsigned long kbd_status; #endif +#if defined(CONFIG_WD_MAX_RATE) + unsigned long long wdt_last; /* trace watch-dog triggering rate */ +#endif void **jt; /* jump table */ } gd_t; diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 01cb2d7..dc6e278 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1570,7 +1570,9 @@ typedef struct ccsr_gur { #define MPC85xx_PORDEVSR_RIO_CTLS 0x00000008 #define MPC85xx_PORDEVSR_RIO_DEV_ID 0x00000007 uint pordbgmsr; /* 0xe0010 - POR debug mode status register */ - char res1[12]; + uint pordevsr2; /* 0xe0014 - POR I/O device status regsiter 2 */ +#define MPC85xx_PORDEVSR2_SEC_CFG 0x00000020 + char res1[8]; uint gpporcr; /* 0xe0020 - General-purpose POR configuration register */ char res2[12]; uint gpiocr; /* 0xe0030 - GPIO control register */ diff --git a/include/common.h b/include/common.h index 8630780..f12e3bd 100644 --- a/include/common.h +++ b/include/common.h @@ -604,8 +604,9 @@ int sprintf(char * buf, const char *fmt, ...); int vsprintf(char *buf, const char *fmt, va_list args); /* lib_generic/crc32.c */ -ulong crc32 (ulong, const unsigned char *, uint); -ulong crc32_no_comp (ulong, const unsigned char *, uint); +uint32_t crc32 (uint32_t, const unsigned char *, uint); +uint32_t crc32_wd (uint32_t, const unsigned char *, uint, uint); +uint32_t crc32_no_comp (uint32_t, const unsigned char *, uint); /* common/console.c */ int console_init_f(void); /* Before relocation; uses the serial stuff */ @@ -661,7 +662,7 @@ int pcmcia_init (void); /* * Board-specific Platform code can reimplement show_boot_progress () if needed */ -void inline show_boot_progress (int val); +void __attribute__((weak)) show_boot_progress (int val); #ifdef CONFIG_INIT_CRITICAL #error CONFIG_INIT_CRITICAL is deprecated! @@ -670,6 +671,9 @@ void inline show_boot_progress (int val); #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) +#define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) + /* Multicore arch functions */ #ifdef CONFIG_MP int cpu_status(int nr); @@ -677,4 +681,8 @@ int cpu_reset(int nr); int cpu_release(int nr, int argc, char *argv[]); #endif +#ifdef CONFIG_POST +#define CONFIG_HAS_POST +#endif + #endif /* __COMMON_H_ */ diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index c147424..81e7c1e 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 DENX Software Engineering + * (C) Copyright 2007, 2008 DENX Software Engineering * * See file CREDITS for list of people who contributed to this * project. @@ -413,7 +413,7 @@ "addtty=setenv bootargs ${bootargs} " \ "console=${consdev},${baudrate}\0" \ "flash_nfs=run nfsargs addip addtty;" \ - "bootm ${kernel_addr} - ${fdt_addr}\0" \ + "bootm ${kernel_addr} - ${fdt_addr}\0" \ "flash_self=run ramargs addip addtty;" \ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ @@ -422,10 +422,10 @@ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ "net_self=tftp ${kernel_addr_r} ${bootfile};" \ "tftp ${ramdisk_addr_r} ${ramdiskfile};" \ - "tftp ${fdt_addr_r} ${fdtfile};" \ + "tftp ${fdt_addr_r} ${fdtfile};" \ "run ramargs addip addtty;" \ "bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}\0"\ - "load=tftp ${u-boot_addr_r} ${u-boot}\0" \ + "load=tftp ${u-boot_addr_r} ${u-boot}\0" \ "update=protect off ${u-boot_addr} +${filesize};" \ "era ${u-boot_addr} +${filesize};" \ "cp.b ${u-boot_addr_r} ${u-boot_addr} ${filesize}\0" \ diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index 605eb40..5e97cfa 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -28,6 +28,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#include <asm/arch/mx31-regs.h> + /* High Level Configuration Options */ #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ #define CONFIG_MX31 1 /* in a mx31 */ @@ -91,7 +93,7 @@ #define CONFIG_DRIVER_SMC911X 1 -#define CONFIG_DRIVER_SMC911X_BASE 0xb4020000 +#define CONFIG_DRIVER_SMC911X_BASE (CS4_BASE + 0x00020000) #define CONFIG_DRIVER_SMC911X_32_BIT 1 /* @@ -127,18 +129,18 @@ * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) /*----------------------------------------------------------------------- * FLASH and environment organization */ -#define CFG_FLASH_BASE 0xa0000000 +#define CFG_FLASH_BASE CS0_BASE #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ #define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */ -#define CFG_ENV_ADDR 0xa01f0000 +#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x001f0000) #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_SECT_SIZE (64 * 1024) #define CFG_ENV_SIZE (64 * 1024) diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 36adf66..690584a 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -75,8 +75,8 @@ /* * On LWMON5 we use D-cache as init-ram and stack pointer. We also move * the POST_WORD from OCM to a 440EPx register that preserves it's - * content during reset (GPT0_COM6). This way we reserve the OCM (16k) - * for logbuffer only. + * content during reset (GPT0_COMP6). This way we reserve the OCM (16k) + * for logbuffer only. (GPT0_COMP1-COMP5 are reserved for logbuffer header.) */ #define CFG_INIT_RAM_DCACHE 1 /* d-cache as init ram */ #define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */ @@ -91,9 +91,9 @@ /* Additional registers for watchdog timer post test */ -#define CFG_DSPIC_TEST_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5) -#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP4) -#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5) +#define CFG_DSPIC_TEST_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK1) +#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK2) +#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK1) #define CFG_WATCHDOG_MAGIC 0x12480000 #define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000 #define CFG_DSPIC_TEST_MASK 0x00000001 @@ -242,6 +242,7 @@ #define CFG_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */ #define CONFIG_LOGBUFFER +/* Reserve GPT0_COMP1-COMP5 for logbuffer header */ #define CONFIG_ALT_LH_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP1) #define CONFIG_ALT_LB_ADDR (CFG_OCM_BASE) #define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ @@ -452,6 +453,7 @@ #define CONFIG_HW_WATCHDOG 1 /* Use external HW-Watchdog */ #define CONFIG_WD_PERIOD 40000 /* in usec */ +#define CONFIG_WD_MAX_RATE 66600 /* in ticks */ /* * For booting Linux, the board info and command line data diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index a394b4b..a9c86f9 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2006 + * (C) Copyright 2006-2008 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -155,8 +155,8 @@ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ ":${hostname}:${netdev}:off panic=1\0" \ "addcons=setenv bootargs ${bootargs} " \ - "console=${console},${baudrate} " \ - "ubootver=${ubootver} board=${board}\0" \ + "console=${console},${baudrate} " \ + "ubootver=${ubootver} board=${board}\0" \ "flash_nfs=run nfsargs addip addcons;" \ "bootm ${kernel_addr}\0" \ "flash_self=run ramargs addip addcons;" \ diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index 78e2545..5286e1f 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -51,7 +51,7 @@ * Size of malloc() pool */ #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024) -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* * Hardware drivers @@ -60,6 +60,12 @@ #define CONFIG_MX31_UART 1 #define CFG_MX31_UART1 1 +#define CONFIG_HARD_SPI 1 +#define CONFIG_MXC_SPI 1 +#define CONFIG_MXC_SPI_IFACE 1 /* Default SPI interface number */ + +#define CONFIG_RTC_MC13783 1 + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 @@ -73,20 +79,33 @@ #include <config_cmd_default.h> #define CONFIG_CMD_PING +#define CONFIG_CMD_SPI +#define CONFIG_CMD_DATE #define CONFIG_BOOTDELAY 3 #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_IPADDR 192.168.23.168 #define CONFIG_SERVERIP 192.168.23.2 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ - "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ - "bootcmd=run bootcmd_net\0" \ - "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0" \ - "prg_uboot=tftpboot 0x80000000 u-boot-mx31ads.bin; protect off 0xa0000000 0xa001ffff; erase 0xa0000000 0xa001ffff; cp.b 0x80000000 0xa0000000 $(filesize)\0" - +#define CONFIG_LOADADDR (CSD0_BASE + 0x800000) /* loadaddr env var */ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "uboot_addr=0xa0000000\0" \ + "uboot=mx31ads/u-boot.bin\0" \ + "kernel=mx31ads/uImage\0" \ + "nfsroot=/opt/eldk/arm\0" \ + "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ + "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "bootcmd=run bootcmd_net\0" \ + "bootcmd_net=run bootargs_base bootargs_nfs; " \ + "tftpboot ${loadaddr} ${kernel}; bootm\0" \ + "prg_uboot=tftpboot ${loadaddr} ${uboot}; " \ + "protect off ${uboot_addr} 0xa003ffff; " \ + "erase ${uboot_addr} 0xa003ffff; " \ + "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \ + "setenv filesize; saveenv\0" #define CONFIG_DRIVER_CS8900 1 #define CS8900_BASE 0xb4020300 @@ -120,7 +139,7 @@ #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ -#define CFG_LOAD_ADDR CSD0_BASE /* default load address */ +#define CFG_LOAD_ADDR CONFIG_LOADADDR #define CFG_HZ 32000 diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index ed41b2f..ac72f98 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -173,7 +173,7 @@ "upd=run load update\0" \ "ipaddr=10.0.0.233\0" \ "serverip=10.0.0.152\0" \ - "netmask=255.255.0.0\0" \ + "netmask=255.255.0.0\0" \ "ethaddr=c6:6f:13:36:f3:81\0" \ "eth1addr=c6:6f:13:36:f3:82\0" \ "mtdparts=IXP4XX-Flash.0:504k@0(uboot),4k@504k(env)," \ diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index e164019..d6bcc8e 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -22,31 +22,31 @@ */ /* - * This file contains the configuration parameters for the dbau1x00 board. + * This file contains the configuration parameters for qemu-mips target. */ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MIPS32 1 /* MIPS32 CPU core */ -#define CONFIG_QEMU_MIPS 1 +#define CONFIG_MIPS32 1 /* MIPS32 CPU core */ +#define CONFIG_QEMU_MIPS 1 #define CONFIG_MISC_INIT_R /*IP address is default used by Qemu*/ -#define CONFIG_IPADDR 10.0.2.15 /* Our IP address */ -#define CONFIG_SERVERIP 10.0.2.2 /* Server IP address*/ +#define CONFIG_IPADDR 10.0.2.15 /* Our IP address */ +#define CONFIG_SERVERIP 10.0.2.2 /* Server IP address */ -#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */ +#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */ #define CONFIG_BAUDRATE 115200 /* valid baudrates */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_TIMESTAMP /* Print image info with timestamp */ -#undef CONFIG_BOOTARGS +#define CONFIG_TIMESTAMP /* Print image info with timestamp */ +#undef CONFIG_BOOTARGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CONFIG_EXTRA_ENV_SETTINGS \ "addmisc=setenv bootargs ${bootargs} " \ "console=ttyS0,${baudrate} " \ "panic=1\0" \ @@ -56,7 +56,6 @@ #define CONFIG_BOOTCOMMAND "bootp;bootelf" - /* * BOOTP options */ @@ -65,7 +64,6 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ @@ -74,27 +72,24 @@ #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_LOADB +#undef CONFIG_CMD_LOADS #define CONFIG_CMD_DHCP #define CONFIG_DRIVER_NE2000 #define CONFIG_DRIVER_NE2000_BASE (0xb4000300) -#define CFG_NO_FLASH #define CFG_NS16550 #define CFG_NS16550_SERIAL -#define CFG_NS16550_REG_SIZE 1 -#define CFG_NS16550_CLK 115200 -#define CFG_NS16550_COM1 (0xb40003f8) +#define CFG_NS16550_REG_SIZE 1 +#define CFG_NS16550_CLK 115200 +#define CFG_NS16550_COM1 (0xb40003f8) #define CONFIG_CONS_INDEX 1 #define CONFIG_CMD_IDE #define CONFIG_DOS_PARTITION -#define CFG_IDE_MAXBUS 2 +#define CFG_IDE_MAXBUS 2 #define CFG_ATA_IDE0_OFFSET (0x1f0) #define CFG_ATA_IDE1_OFFSET (0x170) #define CFG_ATA_DATA_OFFSET (0) @@ -106,18 +101,18 @@ /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ +#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "qemu-mips # " /* Monitor Command Prompt */ +#define CFG_PROMPT "qemu-mips # " /* Monitor Command Prompt */ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CFG_HUSH_PARSER #define CFG_PROMPT_HUSH_PS2 "> " -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args*/ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ #define CFG_MALLOC_LEN 128*1024 @@ -125,11 +120,11 @@ #define CFG_MHZ 132 -#define CFG_HZ (CFG_MHZ * 1000000) +#define CFG_HZ (CFG_MHZ * 1000000) -#define CFG_SDRAM_BASE 0x80000000 /* Cached addr */ +#define CFG_SDRAM_BASE 0x80000000 /* Cached addr */ -#define CFG_LOAD_ADDR 0x81000000 /* default load address */ +#define CFG_LOAD_ADDR 0x81000000 /* default load address */ #define CFG_MEMTEST_START 0x80100000 #define CFG_MEMTEST_END 0x80800000 @@ -139,21 +134,30 @@ */ /* The following #defines are needed to get flash environment right */ -#define CFG_MONITOR_BASE TEXT_BASE -#define CFG_MONITOR_LEN (192 << 10) +#define CFG_MONITOR_BASE TEXT_BASE +#define CFG_MONITOR_LEN (192 << 10) #define CFG_INIT_SP_OFFSET 0x400000 /* We boot from this flash, selected with dip switch */ #define CFG_FLASH_BASE 0xbfc00000 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 128 +#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */ +#define CFG_FLASH_CFI_DRIVER 1 +#define CFG_FLASH_USE_BUFFER_WRITE 1 + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x40000) + +/* Address and size of Primary Environment Sector */ +#define CFG_ENV_SIZE 0x8000 -#define CFG_ENV_IS_NOWHERE 1 +#define CONFIG_ENV_OVERWRITE 1 -/* Address and size of Primary Environment Sector */ -#define CFG_ENV_SIZE 0x10000 #undef CONFIG_NET_MULTI -#define MEM_SIZE 128 +#define MEM_SIZE 128 #undef CONFIG_MEMSIZE_IN_BYTES @@ -164,4 +168,4 @@ #define CFG_ICACHE_SIZE 16384 #define CFG_CACHELINE_SIZE 32 -#endif /* __CONFIG_H */ +#endif /* __CONFIG_H */ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index d00c22f..133cbcf 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -671,7 +671,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ - "hostname=sbc8349\0" \ + "hostname=sbc8349\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ @@ -690,7 +690,7 @@ "era fff00000 fff3ffff; cp.b 100000 fff00000 ${filesize}\0" \ "upd=run load update\0" \ "fdtaddr=400000\0" \ - "fdtfile=sbc8349.dtb\0" \ + "fdtfile=sbc8349.dtb\0" \ "" #define CONFIG_NFSBOOTCOMMAND \ diff --git a/include/environment.h b/include/environment.h index af605ab..c4f7c33 100644 --- a/include/environment.h +++ b/include/environment.h @@ -84,18 +84,23 @@ # endif #endif /* CFG_ENV_IS_IN_NAND */ +#ifdef USE_HOSTCC +# include <stdint.h> +#else +# include <linux/types.h> +#endif #ifdef CFG_REDUNDAND_ENVIRONMENT -# define ENV_HEADER_SIZE (sizeof(unsigned long) + 1) +# define ENV_HEADER_SIZE (sizeof(uint32_t) + 1) #else -# define ENV_HEADER_SIZE (sizeof(unsigned long)) +# define ENV_HEADER_SIZE (sizeof(uint32_t)) #endif #define ENV_SIZE (CFG_ENV_SIZE - ENV_HEADER_SIZE) typedef struct environment_s { - unsigned long crc; /* CRC32 over data bytes */ + uint32_t crc; /* CRC32 over data bytes */ #ifdef CFG_REDUNDAND_ENVIRONMENT unsigned char flags; /* active/obsolete flags */ #endif diff --git a/include/image.h b/include/image.h index 60fdb2b..664e51e 100644 --- a/include/image.h +++ b/include/image.h @@ -227,9 +227,23 @@ typedef struct bootm_headers { /* * Some systems (for example LWMON) have very short watchdog periods; * we must make sure to split long operations like memmove() or - * crc32() into reasonable chunks. + * checksum calculations into reasonable chunks. */ +#ifndef CHUNKSZ #define CHUNKSZ (64 * 1024) +#endif + +#ifndef CHUNKSZ_CRC32 +#define CHUNKSZ_CRC32 (64 * 1024) +#endif + +#ifndef CHUNKSZ_MD5 +#define CHUNKSZ_MD5 (64 * 1024) +#endif + +#ifndef CHUNKSZ_SHA1 +#define CHUNKSZ_SHA1 (64 * 1024) +#endif #define uimage_to_cpu(x) ntohl(x) #define cpu_to_uimage(x) htonl(x) @@ -363,9 +377,7 @@ static inline void image_set_name (image_header_t *hdr, const char *name) int image_check_hcrc (image_header_t *hdr); int image_check_dcrc (image_header_t *hdr); #ifndef USE_HOSTCC -int image_check_dcrc_wd (image_header_t *hdr, ulong chunksize); -int getenv_verify (void); -int getenv_autostart (void); +int getenv_yesno (char *var); ulong getenv_bootm_low(void); ulong getenv_bootm_size(void); void memmove_wd (void *to, void *from, size_t len, ulong chunksz); @@ -392,8 +404,7 @@ ulong image_multi_count (image_header_t *hdr); void image_multi_getimg (image_header_t *hdr, ulong idx, ulong *data, ulong *len); -inline void image_print_contents (image_header_t *hdr); -inline void image_print_contents_noindent (image_header_t *hdr); +void image_print_contents (image_header_t *hdr); #ifndef USE_HOSTCC static inline int image_check_target_arch (image_header_t *hdr) @@ -469,8 +480,7 @@ inline int fit_parse_conf (const char *spec, ulong addr_curr, inline int fit_parse_subimage (const char *spec, ulong addr_curr, ulong *addr, const char **image_name); -inline void fit_print_contents (const void *fit); -inline void fit_print_contents_noindent (const void *fit); +void fit_print_contents (const void *fit); void fit_image_print (const void *fit, int noffset, const char *p); void fit_image_print_hash (const void *fit, int noffset, const char *p); diff --git a/include/ppc440.h b/include/ppc440.h index bb39ad6..2f6ed97 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -1437,6 +1437,13 @@ #define GPT0_COMP2 0x00000088 #define GPT0_COMP1 0x00000084 +#define GPT0_MASK6 0x000000D8 +#define GPT0_MASK5 0x000000D4 +#define GPT0_MASK4 0x000000D0 +#define GPT0_MASK3 0x000000CC +#define GPT0_MASK2 0x000000C8 +#define GPT0_MASK1 0x000000C4 + #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) #define SDR0_USB2D0CR 0x0320 #define SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK 0x00000004 /* USB 2.0 Device/EBC Master Selection */ diff --git a/include/sha1.h b/include/sha1.h index 15ea13c..734d1fb 100644 --- a/include/sha1.h +++ b/include/sha1.h @@ -80,6 +80,17 @@ void sha1_csum( unsigned char *input, int ilen, unsigned char output[20] ); /** + * \brief Output = SHA-1( input buffer ), with watchdog triggering + * + * \param input buffer holding the data + * \param ilen length of the input data + * \param output SHA-1 checksum result + * \param chunk_sz watchdog triggering period (in bytes of input processed) + */ +void sha1_csum_wd (unsigned char *input, int ilen, + unsigned char output[20], unsigned int chunk_sz); + +/** * \brief Output = SHA-1( file contents ) * * \param path input file name diff --git a/include/u-boot/md5.h b/include/u-boot/md5.h index 046d1ee..8b44a7f 100644 --- a/include/u-boot/md5.h +++ b/include/u-boot/md5.h @@ -20,4 +20,12 @@ struct MD5Context { */ void md5 (unsigned char *input, int len, unsigned char output[16]); +/* + * Calculate and store in 'output' the MD5 digest of 'len' bytes at 'input'. + * 'output' must have enough space to hold 16 bytes. If 'chunk' Trigger the + * watchdog every 'chunk_sz' bytes of input processed. + */ +void md5_wd (unsigned char *input, int len, unsigned char output[16], + unsigned int chunk_sz); + #endif /* _MD5_H */ |