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-rw-r--r--include/asm-arm/system.h84
-rw-r--r--include/configs/B2.h1
-rw-r--r--include/configs/assabet.h2
-rw-r--r--include/configs/cerf250.h3
-rw-r--r--include/configs/cradle.h3
-rw-r--r--include/configs/csb226.h4
-rw-r--r--include/configs/delta.h3
-rw-r--r--include/configs/dnp1110.h2
-rw-r--r--include/configs/evb4510.h1
-rw-r--r--include/configs/gcplus.h2
-rw-r--r--include/configs/innokom.h4
-rw-r--r--include/configs/integratorap.h4
-rw-r--r--include/configs/lart.h2
-rw-r--r--include/configs/logodl.h4
-rw-r--r--include/configs/lubbock.h3
-rw-r--r--include/configs/omap3_zoom1.h17
-rw-r--r--include/configs/pleb2.h3
-rw-r--r--include/configs/pxa255_idp.h3
-rw-r--r--include/configs/shannon.h2
-rw-r--r--include/configs/trizepsiv.h3
-rw-r--r--include/configs/wepep250.h2
-rw-r--r--include/configs/xaeniax.h3
-rw-r--r--include/configs/xm250.h3
-rw-r--r--include/configs/xsengine.h3
-rw-r--r--include/configs/zylonite.h3
-rw-r--r--include/s3c6400.h11
26 files changed, 153 insertions, 22 deletions
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
new file mode 100644
index 0000000..2b28a26
--- /dev/null
+++ b/include/asm-arm/system.h
@@ -0,0 +1,84 @@
+#ifndef __ASM_ARM_SYSTEM_H
+#define __ASM_ARM_SYSTEM_H
+
+#ifdef __KERNEL__
+
+#define CPU_ARCH_UNKNOWN 0
+#define CPU_ARCH_ARMv3 1
+#define CPU_ARCH_ARMv4 2
+#define CPU_ARCH_ARMv4T 3
+#define CPU_ARCH_ARMv5 4
+#define CPU_ARCH_ARMv5T 5
+#define CPU_ARCH_ARMv5TE 6
+#define CPU_ARCH_ARMv5TEJ 7
+#define CPU_ARCH_ARMv6 8
+#define CPU_ARCH_ARMv7 9
+
+/*
+ * CR1 bits (CP#15 CR1)
+ */
+#define CR_M (1 << 0) /* MMU enable */
+#define CR_A (1 << 1) /* Alignment abort enable */
+#define CR_C (1 << 2) /* Dcache enable */
+#define CR_W (1 << 3) /* Write buffer enable */
+#define CR_P (1 << 4) /* 32-bit exception handler */
+#define CR_D (1 << 5) /* 32-bit data address range */
+#define CR_L (1 << 6) /* Implementation defined */
+#define CR_B (1 << 7) /* Big endian */
+#define CR_S (1 << 8) /* System MMU protection */
+#define CR_R (1 << 9) /* ROM MMU protection */
+#define CR_F (1 << 10) /* Implementation defined */
+#define CR_Z (1 << 11) /* Implementation defined */
+#define CR_I (1 << 12) /* Icache enable */
+#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
+#define CR_RR (1 << 14) /* Round Robin cache replacement */
+#define CR_L4 (1 << 15) /* LDR pc can set T bit */
+#define CR_DT (1 << 16)
+#define CR_IT (1 << 18)
+#define CR_ST (1 << 19)
+#define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */
+#define CR_U (1 << 22) /* Unaligned access operation */
+#define CR_XP (1 << 23) /* Extended page tables */
+#define CR_VE (1 << 24) /* Vectored interrupts */
+#define CR_EE (1 << 25) /* Exception (Big) Endian */
+#define CR_TRE (1 << 28) /* TEX remap enable */
+#define CR_AFE (1 << 29) /* Access flag enable */
+#define CR_TE (1 << 30) /* Thumb exception enable */
+
+/*
+ * This is used to ensure the compiler did actually allocate the register we
+ * asked it for some inline assembly sequences. Apparently we can't trust
+ * the compiler from one version to another so a bit of paranoia won't hurt.
+ * This string is meant to be concatenated with the inline asm string and
+ * will cause compilation to stop on mismatch.
+ * (for details, see gcc PR 15089)
+ */
+#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t"
+
+#ifndef __ASSEMBLY__
+
+#define isb() __asm__ __volatile__ ("" : : : "memory")
+
+#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
+
+static inline unsigned int get_cr(void)
+{
+ unsigned int val;
+ asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc");
+ return val;
+}
+
+static inline void set_cr(unsigned int val)
+{
+ asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR"
+ : : "r" (val) : "cc");
+ isb();
+}
+
+#endif /* __ASSEMBLY__ */
+
+#define arch_align_stack(x) (x)
+
+#endif /* __KERNEL__ */
+
+#endif
diff --git a/include/configs/B2.h b/include/configs/B2.h
index 01b65c5..35fad5c 100644
--- a/include/configs/B2.h
+++ b/include/configs/B2.h
@@ -38,6 +38,7 @@
#define CONFIG_B2 1 /* on an B2 Board */
#define CONFIG_ARM_THUMB 1 /* this is an ARM7TDMI */
#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
+#define CONFIG_SYS_NO_CP15_CACHE
#define CONFIG_S3C44B0_CLOCK_SPEED 75 /* we have a 75Mhz S3C44B0*/
diff --git a/include/configs/assabet.h b/include/configs/assabet.h
index a6c442b..8c5b84c 100644
--- a/include/configs/assabet.h
+++ b/include/configs/assabet.h
@@ -37,6 +37,8 @@
#define CONFIG_ASSABET 1 /* on an Intel Assabet Board */
#undef CONFIG_USE_IRQ
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h
index 751e03c..82d1401 100644
--- a/include/configs/cerf250.h
+++ b/include/configs/cerf250.h
@@ -41,6 +41,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/cradle.h b/include/configs/cradle.h
index 850d93b..75c5f9b 100644
--- a/include/configs/cradle.h
+++ b/include/configs/cradle.h
@@ -37,6 +37,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/csb226.h b/include/configs/csb226.h
index d9f85f0..ed18450 100644
--- a/include/configs/csb226.h
+++ b/include/configs/csb226.h
@@ -42,6 +42,10 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/* for timer/console/ethernet */
+
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Hardware drivers
*/
diff --git a/include/configs/delta.h b/include/configs/delta.h
index f5508b7..bacbd90 100644
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -39,6 +39,9 @@
#undef CONFIG_SKIP_RELOCATE_UBOOT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h
index 8f615bd..b6cfc672 100644
--- a/include/configs/dnp1110.h
+++ b/include/configs/dnp1110.h
@@ -42,6 +42,8 @@
#define CONFIG_DNP1110 1 /* on an DNP/1110 Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
/*
* Size of malloc() pool
diff --git a/include/configs/evb4510.h b/include/configs/evb4510.h
index ffc9408..0f415d9 100644
--- a/include/configs/evb4510.h
+++ b/include/configs/evb4510.h
@@ -43,6 +43,7 @@
#define CONFIG_ARM_THUMB 1 /* this is an ARM7TDMI */
#define CONFIG_S3C4510B 1 /* it's a S3C4510B chip */
#define CONFIG_EVB4510 1 /* on an EVB4510 Board */
+#define CONFIG_SYS_NO_CP15_CACHE
#define CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ (4*1024)
diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h
index 77d4578..b2fbca2 100644
--- a/include/configs/gcplus.h
+++ b/include/configs/gcplus.h
@@ -49,6 +49,8 @@
#define CONFIG_GCPLUS 1 /* on an ADS GCPlus Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
diff --git a/include/configs/innokom.h b/include/configs/innokom.h
index 895998a..69654c7 100644
--- a/include/configs/innokom.h
+++ b/include/configs/innokom.h
@@ -39,6 +39,10 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/* for timer/console/ethernet */
+
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Hardware drivers
*/
diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index 9231e64..38c0249 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -142,7 +142,7 @@
* PCI definitions
*/
-/*#define CONFIG_PCI /--* include pci support */
+#ifdef CONFIG_PCI /* pci support */
#undef CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
#define DEBUG
@@ -150,7 +150,6 @@
#define CONFIG_EEPRO100
#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
-
#define INTEGRATOR_BOOT_ROM_BASE 0x20000000
#define INTEGRATOR_HDR0_SDRAM_BASE 0x80000000
@@ -278,6 +277,7 @@
#define INTEGRATOR_SC_PCIENABLE \
(INTEGRATOR_SC_BASE + INTEGRATOR_SC_PCIENABLE_OFFSET)
+#endif /* CONFIG_PCI */
/*-----------------------------------------------------------------------
* There are various dependencies on the core module (CM) fitted
* Users should refer to their CM user guide
diff --git a/include/configs/lart.h b/include/configs/lart.h
index e34ec22..5d6d460 100644
--- a/include/configs/lart.h
+++ b/include/configs/lart.h
@@ -35,6 +35,8 @@
#define CONFIG_LART 1 /* on an LART Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
/*
* Size of malloc() pool
diff --git a/include/configs/logodl.h b/include/configs/logodl.h
index 9afa800..889a9a3 100644
--- a/include/configs/logodl.h
+++ b/include/configs/logodl.h
@@ -39,6 +39,10 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/* for timer/console/ethernet */
+
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Hardware drivers
*/
diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h
index a4b430b..2cf9c02 100644
--- a/include/configs/lubbock.h
+++ b/include/configs/lubbock.h
@@ -46,6 +46,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index c60778c..8e984b4 100644
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -303,21 +303,4 @@ extern unsigned int boot_flash_sec;
extern unsigned int boot_flash_type;
#endif
-
-#define WRITE_NAND_COMMAND(d, adr)\
- writel(d, &nand_cs_base->nand_cmd)
-#define WRITE_NAND_ADDRESS(d, adr)\
- writel(d, &nand_cs_base->nand_adr)
-#define WRITE_NAND(d, adr) writew(d, &nand_cs_base->nand_dat)
-#define READ_NAND(adr) readl(&nand_cs_base->nand_dat)
-
-/* Other NAND Access APIs */
-#define NAND_WP_OFF() do {readl(&gpmc_cfg_base->config) |= GPMC_CONFIG_WP; } \
- while (0)
-#define NAND_WP_ON() do {readl(&gpmc_cfg_base->config) &= ~GPMC_CONFIG_WP; } \
- while (0)
-#define NAND_DISABLE_CE(nand)
-#define NAND_ENABLE_CE(nand)
-#define NAND_WAIT_READY(nand) udelay(10)
-
#endif /* __CONFIG_H */
diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h
index ab9ea4f..ed873fa 100644
--- a/include/configs/pleb2.h
+++ b/include/configs/pleb2.h
@@ -42,6 +42,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h
index 5e2e7cf..7485f72 100644
--- a/include/configs/pxa255_idp.h
+++ b/include/configs/pxa255_idp.h
@@ -68,6 +68,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/shannon.h b/include/configs/shannon.h
index c8b0b16..13cc5ff 100644
--- a/include/configs/shannon.h
+++ b/include/configs/shannon.h
@@ -44,6 +44,8 @@
#define CONFIG_SHANNON 1 /* on an SHANNON/TuxScreen Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
/*
* Size of malloc() pool
diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h
index c2744b5..4917318 100644
--- a/include/configs/trizepsiv.h
+++ b/include/configs/trizepsiv.h
@@ -47,6 +47,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
#define RTC
/*
diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h
index e74303d..197ac0b 100644
--- a/include/configs/wepep250.h
+++ b/include/configs/wepep250.h
@@ -27,6 +27,8 @@
#define CONFIG_WEPEP250 1 /* config for wepep250 board */
#undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
/*
* Select serial console configuration
diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h
index 086ca69..1632d29 100644
--- a/include/configs/xaeniax.h
+++ b/include/configs/xaeniax.h
@@ -49,6 +49,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* select serial console configuration
*/
diff --git a/include/configs/xm250.h b/include/configs/xm250.h
index 922eb2c..c8bdf31 100644
--- a/include/configs/xm250.h
+++ b/include/configs/xm250.h
@@ -36,6 +36,9 @@
#define CONFIG_XM250 1 /* on a MicroSys XM250 Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool; this lives below the uppermost 128 KiB which are
* used for the RAM copy of the uboot code
diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h
index cad414c..7e2abbf 100644
--- a/include/configs/xsengine.h
+++ b/include/configs/xsengine.h
@@ -35,6 +35,9 @@
#define CONFIG_DOS_PARTITION 1
#define BOARD_LATE_INIT 1
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */
diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
index 064740d..217636a 100644
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -47,6 +47,9 @@
#undef CONFIG_SKIP_RELOCATE_UBOOT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/s3c6400.h b/include/s3c6400.h
index fd3e99b..87f3760 100644
--- a/include/s3c6400.h
+++ b/include/s3c6400.h
@@ -215,9 +215,9 @@
#define GPACONSLP_OFFSET 0x0C
#define GPAPUDSLP_OFFSET 0x10
#define GPBCON_OFFSET 0x20
-#define GPBDAT_OFFSET 0x04
-#define GPBPUD_OFFSET 0x08
-#define GPBCONSLP_OFFSET 0x0C
+#define GPBDAT_OFFSET 0x24
+#define GPBPUD_OFFSET 0x28
+#define GPBCONSLP_OFFSET 0x2C
#define GPBPUDSLP_OFFSET 0x30
#define GPCCON_OFFSET 0x40
#define GPCDAT_OFFSET 0x44
@@ -380,6 +380,11 @@
*/
#define ELFIN_MEM_SYS_CFG 0x7e00f120
+#define S3C64XX_MEM_SYS_CFG_16BIT (1 << 12)
+
+#define S3C64XX_MEM_SYS_CFG_NAND 0x0008
+#define S3C64XX_MEM_SYS_CFG_ONENAND S3C64XX_MEM_SYS_CFG_16BIT
+
#define GPACON (ELFIN_GPIO_BASE + GPACON_OFFSET)
#define GPADAT (ELFIN_GPIO_BASE + GPADAT_OFFSET)
#define GPAPUD (ELFIN_GPIO_BASE + GPAPUD_OFFSET)
generated by cgit v1.1 at 2024-11-28 16:14:09 +0000