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-rw-r--r--include/asm-mips/au1x00.h5
-rw-r--r--include/configs/TQM5200.h31
-rw-r--r--include/configs/TQM85xx.h7
-rw-r--r--include/configs/cmc_pu2.h11
-rw-r--r--include/configs/gth2.h195
-rw-r--r--include/configs/ppmc7xx.h419
-rw-r--r--include/configs/spieval.h28
-rw-r--r--include/configs/trab.h6
-rw-r--r--include/configs/voiceblue.h56
-rw-r--r--include/ns16550.h22
-rw-r--r--include/serial.h2
11 files changed, 691 insertions, 91 deletions
diff --git a/include/asm-mips/au1x00.h b/include/asm-mips/au1x00.h
index 4e19dc4..a4e9947 100644
--- a/include/asm-mips/au1x00.h
+++ b/include/asm-mips/au1x00.h
@@ -119,6 +119,11 @@ static __inline__ int au_ffs(int x)
return __ilog2(x & -x) + 1;
}
+#define gpio_set(Value) outl(Value, SYS_OUTPUTSET)
+#define gpio_clear(Value) outl(Value, SYS_OUTPUTCLR)
+#define gpio_read() inl(SYS_PINSTATERD)
+#define gpio_tristate(Value) outl(Value, SYS_TRIOUTCLR)
+
#endif /* !ASSEMBLY */
#ifdef CONFIG_PM
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 6020998..6b8759f 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -37,7 +37,6 @@
#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
#define CONFIG_STK52XX 1 /* ... on a STK52XX base board */
-#define CONFIG_STK52XX_REV100 1 /* define for revision 100 baseboards */
#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
@@ -83,7 +82,7 @@
#define CONFIG_PCI_IO_SIZE 0x01000000
#define CONFIG_NET_MULTI 1
-#define CONFIG_EEPRO100
+#define CONFIG_EEPRO100 1
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#define CONFIG_NS8382X 1
#endif /* CONFIG_STK52XX */
@@ -192,16 +191,6 @@
#undef CONFIG_BOOTARGS
-#if defined (CONFIG_TQM5200_AA)
-# define CONFIG_U_BOOT_SUFFIX "-AA\0"
-#elif defined (CONFIG_TQM5200_AB)
-# define CONFIG_U_BOOT_SUFFIX "-AB\0"
-#elif defined (CONFIG_TQM5200_AC)
-# define CONFIG_U_BOOT_SUFFIX "-AC\0"
-#else
-# define CONFIG_U_BOOT_SUFFIX "\0"
-#endif
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"rootpath=/opt/eldk/ppc_6xx\0" \
@@ -218,7 +207,7 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"bootfile=/tftpboot/tqm5200/uImage\0" \
"load=tftp 200000 ${u-boot}\0" \
- "u-boot=/tftpboot/tqm5200/u-boot.bin" CONFIG_U_BOOT_SUFFIX \
+ "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
"update=protect off FC000000 FC05FFFF;" \
"erase FC000000 FC05FFFF;" \
"cp.b 200000 FC000000 ${filesize};" \
@@ -284,13 +273,6 @@
#endif
/* List of I2C addresses to be verified by POST */
-#if defined (CONFIG_TQM5200_AA) || defined (CONFIG_TQM5200_AB)
-#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
- CFG_I2C_SLAVE }
-#elif defined (CONFIG_TQM5200_AC)
-#define I2C_ADDR_LIST { CFG_I2C_SLAVE }
-#endif
-
#if defined (CONFIG_MINIFAP)
#undef I2C_ADDR_LIST
#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
@@ -493,13 +475,9 @@
* SRAM - Do not map below 2 GB in address space, because this area is used
* for SDRAM autosizing.
*/
-#if defined CONFIG_TQM5200_AB || defined (CONFIG_CS_AUTOCONF)
+#if defined (CONFIG_CS_AUTOCONF)
#define CFG_CS2_START 0xE5000000
-#ifdef CONFIG_TQM5200_AB
-#define CFG_CS2_SIZE 0x80000 /* 512 kByte */
-#else /* CONFIG_CS_AUTOCONF */
#define CFG_CS2_SIZE 0x100000 /* 1 MByte */
-#endif
#define CFG_CS2_CFG 0x0004D930
#endif
@@ -507,8 +485,7 @@
* Grafic controller - Do not map below 2 GB in address space, because this
* area is used for SDRAM autosizing.
*/
-#if defined (CONFIG_TQM5200_AB) || defined (CONFIG_TQM5200_AC) || \
- defined (CONFIG_CS_AUTOCONF)
+#if defined (CONFIG_CS_AUTOCONF)
#define SM501_FB_BASE 0xE0000000
#define CFG_CS1_START (SM501_FB_BASE)
#define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index 18197f2..da6946b 100644
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -177,6 +177,13 @@
#define CFG_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
+/* PS/2 Keyboard */
+#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
+#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
+#define CONFIG_PS2SERIAL 2 /* .. on DUART2 */
+#define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
+#define CONFIG_BOARD_EARLY_INIT_R 1
+
/* Use the HUSH parser */
#define CFG_HUSH_PARSER
#ifdef CFG_HUSH_PARSER
diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h
index 46280f7..572a70f 100644
--- a/include/configs/cmc_pu2.h
+++ b/include/configs/cmc_pu2.h
@@ -108,7 +108,7 @@
/* still about 20 kB free with this defined */
#define CFG_LONGHELP
-#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTDELAY 1
#ifdef CONFIG_HARD_I2C
#define CONFIG_COMMANDS \
@@ -206,15 +206,6 @@ struct bd_info_ext {
#error CONFIG_USE_IRQ not supported
#endif
-#define CFG_DEVICE_NULLDEV 1 /* enble null device */
-#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
-
-#define CONFIG_AUTOBOOT_KEYED
-#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n"
-#define CONFIG_AUTOBOOT_STOP_STR "R" /* default password */
-
-#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"net_nfs=tftp ${loadaddr} ${bootfile};run nfsargs addip addcons " \
"addmtd;bootm\0" \
diff --git a/include/configs/gth2.h b/include/configs/gth2.h
new file mode 100644
index 0000000..77d2d56
--- /dev/null
+++ b/include/configs/gth2.h
@@ -0,0 +1,195 @@
+/*
+ * (C) Copyright 2005
+ * Thomas.Lange@corelatus.se
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This file contains the configuration parameters for the gth2 board.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
+#define CONFIG_GTH2 1
+#define CONFIG_AU1X00 1 /* alchemy series cpu */
+
+#define CONFIG_AU1000 1
+
+#define CONFIG_MISC_INIT_R 1
+
+#define CONFIG_ETHADDR DE:AD:BE:EF:01:02 /* Ethernet address */
+
+#define CONFIG_BOOTDELAY 1 /* autoboot after 1 seconds */
+
+#define CONFIG_ENV_OVERWRITE 1 /* Allow change of ethernet address */
+
+#define CONFIG_BOOT_RETRY_TIME 5 /* Retry boot in 5 secs */
+
+#define CONFIG_RESET_TO_RETRY 1 /* If timeout waiting for command, perform a reset */
+
+#define CONFIG_BAUDRATE 115200
+
+/* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 115200 }
+
+/* Only interrupt boot if space is pressed */
+/* If a long serial cable is connected but */
+/* other end is dead, garbage will be read */
+#define CONFIG_AUTOBOOT_KEYED 1
+#define CONFIG_AUTOBOOT_PROMPT "Press space to abort autoboot in %d second\n"
+#define CONFIG_AUTOBOOT_DELAY_STR "d"
+#define CONFIG_AUTOBOOT_STOP_STR " "
+
+#define CONFIG_TIMESTAMP /* Print image info with timestamp */
+#define CONFIG_BOOTARGS "panic=1"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "addmisc=setenv bootargs $(bootargs) " \
+ "ethaddr=$(ethaddr) \0" \
+ "netboot=bootp;run addmisc;bootm\0" \
+ ""
+
+/* Boot from Compact flash partition 2 as default */
+#define CONFIG_BOOTCOMMAND "ide reset;disk 0x81000000 0:2;run addmisc;bootm"
+
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DHCP ) & \
+ ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \
+ CFG_CMD_MII | CFG_CMD_LOADS | CFG_CMD_LOADB | CFG_CMD_ELF | \
+ CFG_CMD_BDI | CFG_CMD_BEDBUG | CFG_CMD_NFS | CFG_CMD_AUTOSCRIPT ))
+
+#include <cmd_confdefs.h>
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "GTH2 # " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args*/
+
+#define CFG_MALLOC_LEN 128*1024
+
+#define CFG_BOOTPARAMS_LEN 128*1024
+
+#define CFG_MHZ 500
+
+#define CFG_HZ (CFG_MHZ * 1000000) /* FIXME causes overflow in net.c */
+
+#define CFG_SDRAM_BASE 0x80000000 /* Cached addr */
+
+#define CFG_LOAD_ADDR 0x81000000 /* default load address */
+
+#define CFG_MEMTEST_START 0x80100000
+#define CFG_MEMTEST_END 0x83000000
+
+#define CONFIG_HW_WATCHDOG 1
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
+
+#define PHYS_FLASH 0xbfc00000 /* Flash Bank #1 */
+
+/* The following #defines are needed to get flash environment right */
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MONITOR_LEN (192 << 10)
+
+#define CFG_INIT_SP_OFFSET 0x400000
+
+/* We boot from this flash, selected with dip switch */
+#define CFG_FLASH_BASE PHYS_FLASH
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (2 * CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */
+
+#define CFG_ENV_IS_NOWHERE 1
+
+/* Address and size of Primary Environment Sector */
+#define CFG_ENV_ADDR 0xB0030000
+#define CFG_ENV_SIZE 0x10000
+
+#define CONFIG_FLASH_16BIT
+
+#define CONFIG_NR_DRAM_BANKS 2
+
+#define CONFIG_NET_MULTI
+
+#define CONFIG_MEMSIZE_IN_BYTES
+
+/*---ATA PCMCIA ------------------------------------*/
+#define CFG_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
+
+#define CFG_PCMCIA_MEM_ADDR 0x20000000
+#define CFG_PCMCIA_IO_BASE 0x28000000
+#define CFG_PCMCIA_ATTR_BASE 0x30000000
+
+#define CONFIG_PCMCIA_SLOT_A
+
+#define CONFIG_ATAPI 1
+#define CONFIG_MAC_PARTITION 1
+
+/* We run CF in "true ide" mode or a harddrive via pcmcia */
+#define CONFIG_IDE_PCMCIA 1
+
+/* We only support one slot for now */
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+#undef CONFIG_IDE_RESET /* reset for ide not supported */
+
+#define CFG_ATA_IDE0_OFFSET 0
+
+#define CFG_ATA_BASE_ADDR CFG_PCMCIA_IO_BASE
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET 0
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET 0
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET 0x0200
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_DCACHE_SIZE 16384
+#define CFG_ICACHE_SIZE 16384
+#define CFG_CACHELINE_SIZE 32
+
+#define GPIO_CACONFIG (1<<0)
+#define GPIO_DPACONFIG (1<<6)
+#define GPIO_ERESET (1<<11)
+#define GPIO_EEDQ (1<<17)
+#define GPIO_WDI (1<<18)
+#define GPIO_RJ1LY (1<<22)
+#define GPIO_RJ1LG (1<<23)
+#define GPIO_LEDCLK (1<<29)
+#define GPIO_LEDD (1<<30)
+#define GPIO_CPU_LED (1<<31)
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/ppmc7xx.h b/include/configs/ppmc7xx.h
new file mode 100644
index 0000000..ea15524
--- /dev/null
+++ b/include/configs/ppmc7xx.h
@@ -0,0 +1,419 @@
+/*
+ * ppmc7xx.h
+ * ---------
+ *
+ * Wind River PPMC 7xx/74xx board configuration file.
+ *
+ * By Richard Danter (richard.danter@windriver.com)
+ * Copyright (C) 2005 Wind River Systems
+ */
+
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_PPMC7XX
+
+
+/*===================================================================
+ *
+ * User configurable settings - Modify to your preference
+ *
+ *===================================================================
+ */
+
+/*
+ * Debug
+ *
+ * DEBUG - Define this is you want extra debug info
+ * GTREGREAD - Required to build with debug
+ * do_bdinfo - Required to build with debug
+ */
+
+#undef DEBUG
+#define GTREGREAD(x) 0xFFFFFFFF
+#define do_bdinfo(a,b,c,d)
+
+
+/*
+ * CPU type
+ *
+ * CONFIG_7xx - We have a 750 or 755 CPU
+ * CONFIG_74xx - We have a 7400 CPU
+ * CONFIG_ALTIVEC - We have altivec enabled CPU (only 7400)
+ * CONFIG_BUS_CLK - System bus clock in Hz
+ */
+
+#define CONFIG_7xx
+#undef CONFIG_74xx
+#undef CONFIG_ALTIVEC
+#define CONFIG_BUS_CLK 66000000
+
+
+/*
+ * Monitor configuration
+ *
+ * CONFIG_COMMANDS - List of command sets to include in shell
+ *
+ * The following command sets have been tested and known to work:
+ *
+ * CFG_CMD_CACHE - Cache control commands
+ * CFG_CMD_MEMORY - Memory display, change and test commands
+ * CFG_CMD_FLASH - Erase and program flash
+ * CFG_CMD_ENV - Environment commands
+ * CFG_CMD_RUN - Run commands stored in env vars
+ * CFG_CMD_ELF - Load ELF files
+ * CFG_CMD_NET - Networking/file download commands
+ * CFG_CMD_PING - ICMP Echo Request command
+ * CFG_CMD_PCI - PCI Bus scanning command
+ */
+
+#define CONFIG_COMMANDS ( (CFG_CMD_DFL & ~(CFG_CMD_KGDB)) | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_ENV | \
+ CFG_CMD_RUN | \
+ CFG_CMD_ELF | \
+ CFG_CMD_NET | \
+ CFG_CMD_PING | \
+ CFG_CMD_PCI)
+
+
+/*
+ * Serial configuration
+ *
+ * CONFIG_CONS_INDEX - Serial console port number (COM1)
+ * CONFIG_BAUDRATE - Serial speed
+ */
+
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 9600
+
+
+/*
+ * PCI config
+ *
+ * CONFIG_PCI - Enable PCI bus
+ * CONFIG_PCI_PNP - Enable Plug & Play support
+ * CONFIG_PCI_SCAN_SHOW - Enable display of devices at startup
+ */
+
+#define CONFIG_PCI
+#define CONFIG_PCI_PNP
+#undef CONFIG_PCI_SCAN_SHOW
+
+
+/*
+ * Network config
+ *
+ * CONFIG_NET_MULTI - Support for multiple network interfaces
+ * CONFIG_EEPRO100 - Intel 8255x Ethernet Controller
+ * CONFIG_EEPRO100_SROM_WRITE - Enable writing to network card ROM
+ */
+
+#define CONFIG_NET_MULTI
+#define CONFIG_EEPRO100
+#define CONFIG_EEPRO100_SROM_WRITE
+
+
+/*
+ * Enable extra init functions
+ *
+ * CONFIG_MISC_INIT_F - Call pre-relocation init functions
+ * CONFIG_MISC_INIT_R - Call post relocation init functions
+ */
+
+#undef CONFIG_MISC_INIT_F
+#define CONFIG_MISC_INIT_R
+
+
+/*
+ * Boot config
+ *
+ * CONFIG_BOOTCOMMAND - Command(s) to execute to auto-boot
+ * CONFIG_BOOTDELAY - How long to wait before auto-boot (in sec)
+ */
+
+#define CONFIG_BOOTCOMMAND \
+ "bootp;" \
+ "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \
+ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
+ "bootm"
+#define CONFIG_BOOTDELAY 5
+
+
+/*===================================================================
+ *
+ * Board configuration settings - You should not need to modify these
+ *
+ *===================================================================
+ */
+
+
+#include <cmd_confdefs.h>
+
+
+/*
+ * Memory map
+ *
+ * This board runs in a standard CHRP (Map-B) configuration.
+ *
+ * Type Start End Size Width Chip Sel
+ * ----------- ----------- ----------- ------- ------- --------
+ * SDRAM 0x00000000 0x04000000 64MB 64b SDRAMCS0
+ * User LED's 0x78000000 RCS3
+ * UART 0x7C000000 RCS2
+ * Mailbox 0xFF000000 RCS1
+ * Flash 0xFFC00000 0xFFFFFFFF 4MB 64b RCS0
+ *
+ * Flash sectors are laid out as follows.
+ *
+ * Sector Start End Size Comments
+ * ------- ----------- ----------- ------- -----------
+ * 0 0xFFC00000 0xFFC3FFFF 256KB
+ * 1 0xFFC40000 0xFFC7FFFF 256KB
+ * 2 0xFFC80000 0xFFCBFFFF 256KB
+ * 3 0xFFCC0000 0xFFCFFFFF 256KB
+ * 4 0xFFD00000 0xFFD3FFFF 256KB
+ * 5 0xFFD40000 0xFFD7FFFF 256KB
+ * 6 0xFFD80000 0xFFDBFFFF 256KB
+ * 7 0xFFDC0000 0xFFDFFFFF 256KB
+ * 8 0xFFE00000 0xFFE3FFFF 256KB
+ * 9 0xFFE40000 0xFFE7FFFF 256KB
+ * 10 0xFFE80000 0xFFEBFFFF 256KB
+ * 11 0xFFEC0000 0xFFEFFFFF 256KB
+ * 12 0xFFF00000 0xFFF3FFFF 256KB U-Boot code here
+ * 13 0xFFF40000 0xFFF7FFFF 256KB
+ * 14 0xFFF80000 0xFFFBFFFF 256KB
+ * 15 0xFFFC0000 0xFFFDFFFF 128KB
+ * 16 0xFFFE0000 0xFFFE7FFF 32KB U-Boot env vars here
+ * 17 0xFFFE8000 0xFFFEFFFF 32KB U-Boot backup copy of env vars here
+ * 18 0xFFFF0000 0xFFFFFFFF 64KB
+ */
+
+
+/*
+ * SDRAM config - see memory map details above.
+ *
+ * CFG_SDRAM_BASE - Start address of SDRAM, this _must_ be zero!
+ * CFG_SDRAM_SIZE - Total size of contiguous SDRAM bank(s)
+ */
+
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_SIZE 0x04000000
+
+
+/*
+ * Flash config - see memory map details above.
+ *
+ * CFG_FLASH_BASE - Start address of flash memory
+ * CFG_FLASH_SIZE - Total size of contiguous flash mem
+ * CFG_FLASH_ERASE_TOUT - Erase timeout in ms
+ * CFG_FLASH_WRITE_TOUT - Write timeout in ms
+ * CFG_MAX_FLASH_BANKS - Number of banks of flash on board
+ * CFG_MAX_FLASH_SECT - Number of sectors in a bank
+ */
+
+#define CFG_FLASH_BASE 0xFFC00000
+#define CFG_FLASH_SIZE 0x00400000
+#define CFG_FLASH_ERASE_TOUT 250000
+#define CFG_FLASH_WRITE_TOUT 5000
+#define CFG_MAX_FLASH_BANKS 1
+#define CFG_MAX_FLASH_SECT 19
+
+
+/*
+ * Monitor config - see memory map details above
+ *
+ * CFG_MONITOR_BASE - Base address of monitor code
+ * CFG_MALLOC_LEN - Size of malloc pool (128KB)
+ */
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_LEN 0x20000
+
+
+/*
+ * Command shell settings
+ *
+ * CFG_BARGSIZE - Boot Argument buffer size
+ * CFG_BOOTMAPSZ - Size of app's mapped RAM at boot (Linux=8MB)
+ * CFG_CBSIZE - Console Buffer (input) size
+ * CFG_LOAD_ADDR - Default load address
+ * CFG_LONGHELP - Provide more detailed help
+ * CFG_MAXARGS - Number of args accepted by monitor commands
+ * CFG_MEMTEST_START - Start address of test to run on RAM
+ * CFG_MEMTEST_END - End address of RAM test
+ * CFG_PBSIZE - Print Buffer (output) size
+ * CFG_PROMPT - Prompt string
+ */
+
+#define CFG_BARGSIZE 1024
+#define CFG_BOOTMAPSZ 0x800000
+#define CFG_CBSIZE 1024
+#define CFG_LOAD_ADDR 0x100000
+#define CFG_LONGHELP
+#define CFG_MAXARGS 16
+#define CFG_MEMTEST_START 0x00040000
+#define CFG_MEMTEST_END 0x00040100
+#define CFG_PBSIZE 1024
+#define CFG_PROMPT "=> "
+
+
+/*
+ * Environment config - see memory map details above
+ *
+ * CFG_ENV_IS_IN_FLASH - The env variables are stored in flash
+ * CFG_ENV_ADDR - Address of the sector containing env vars
+ * CFG_ENV_SIZE - Ammount of RAM for env vars (used to save RAM, 4KB)
+ * CFG_ENV_SECT_SIZE - Size of sector containing env vars (32KB)
+ */
+
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_ADDR 0xFFFE0000
+#define CFG_ENV_SIZE 0x1000
+#define CFG_ENV_ADDR_REDUND 0xFFFE8000
+#define CFG_ENV_SIZE_REDUND 0x1000
+#define CFG_ENV_SECT_SIZE 0x8000
+
+
+/*
+ * Initial RAM config
+ *
+ * Since the main system RAM is initialised very early, we place the INIT_RAM
+ * in the main system RAM just above the exception vectors. The contents are
+ * copied to top of RAM by the init code.
+ *
+ * CFG_INIT_RAM_ADDR - Address of Init RAM, above exception vect
+ * CFG_INIT_RAM_END - Size of Init RAM
+ * CFG_GBL_DATA_SIZE - Ammount of RAM to reserve for global data
+ * CFG_GBL_DATA_OFFSET - Start of global data, top of stack
+ */
+
+#define CFG_INIT_RAM_ADDR (CFG_SDRAM_BASE + 0x4000)
+#define CFG_INIT_RAM_END 0x4000
+#define CFG_GBL_DATA_SIZE 128
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+
+
+/*
+ * Initial BAT config
+ *
+ * BAT0 - System SDRAM
+ * BAT1 - LED's and Serial Port
+ * BAT2 - PCI Memory
+ * BAT3 - PCI I/O including Flash Memory
+ */
+
+#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_64M | BATU_VS | BATU_VP)
+#define CFG_DBAT0L CFG_IBAT0L
+#define CFG_DBAT0U CFG_IBAT0U
+
+#define CFG_IBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_DBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_IBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_DBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_IBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_DBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+
+/*
+ * Cache config
+ *
+ * CFG_CACHELINE_SIZE - Size of a cache line (CPU specific)
+ * CFG_L2 - L2 cache enabled if defined
+ * L2_INIT - L2 cache init flags
+ * L2_ENABLE - L2 cache enable flags
+ */
+
+#define CFG_CACHELINE_SIZE 32
+#undef CFG_L2
+#define L2_INIT 0
+#define L2_ENABLE 0
+
+
+/*
+ * Clocks config
+ *
+ * CFG_BUS_HZ - Bus clock frequency in Hz
+ * CFG_BUS_CLK - As above (?)
+ * CFG_HZ - Decrementer freq in Hz
+ */
+
+#define CFG_BUS_HZ CONFIG_BUS_CLK
+#define CFG_BUS_CLK CONFIG_BUS_CLK
+#define CFG_HZ 1000
+
+
+/*
+ * Serial port config
+ *
+ * CFG_BAUDRATE_TABLE - List of valid baud rates
+ * CFG_NS16550 - Include the NS16550 driver
+ * CFG_NS16550_SERIAL - Include the serial (wrapper) driver
+ * CFG_NS16550_CLK - Frequency of reference clock
+ * CFG_NS16550_REG_SIZE - 64-bit accesses to 8-bit port
+ * CFG_NS16550_COM1 - Base address of 1st serial port
+ */
+
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_CLK 3686400
+#define CFG_NS16550_REG_SIZE -8
+#define CFG_NS16550_COM1 0x7C000000
+
+
+/*
+ * PCI Config - Address Map B (CHRP)
+ */
+
+#define CFG_PCI_MEMORY_BUS 0x00000000
+#define CFG_PCI_MEMORY_PHYS 0x00000000
+#define CFG_PCI_MEMORY_SIZE 0x40000000
+#define CFG_PCI_MEM_BUS 0x80000000
+#define CFG_PCI_MEM_PHYS 0x80000000
+#define CFG_PCI_MEM_SIZE 0x7D000000
+#define CFG_ISA_MEM_BUS 0x00000000
+#define CFG_ISA_MEM_PHYS 0xFD000000
+#define CFG_ISA_MEM_SIZE 0x01000000
+#define CFG_PCI_IO_BUS 0x00800000
+#define CFG_PCI_IO_PHYS 0xFE800000
+#define CFG_PCI_IO_SIZE 0x00400000
+#define CFG_ISA_IO_BUS 0x00000000
+#define CFG_ISA_IO_PHYS 0xFE000000
+#define CFG_ISA_IO_SIZE 0x00800000
+#define CFG_ISA_IO_BASE_ADDRESS CFG_ISA_IO_PHYS
+#define CFG_ISA_IO CFG_ISA_IO_PHYS
+#define CFG_60X_PCI_IO_OFFSET CFG_ISA_IO_PHYS
+
+
+/*
+ * Extra init functions
+ *
+ * CFG_BOARD_ASM_INIT - Call assembly init code
+ */
+
+#define CFG_BOARD_ASM_INIT
+
+
+/*
+ * Boot flags
+ *
+ * BOOTFLAG_COLD - Indicates a power-on boot
+ * BOOTFLAG_WARM - Indicates a software reset
+ */
+
+#define BOOTFLAG_COLD 0x01
+#define BOOTFLAG_WARM 0x02
+
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/spieval.h b/include/configs/spieval.h
index 96cb6e4..9ebb51e 100644
--- a/include/configs/spieval.h
+++ b/include/configs/spieval.h
@@ -191,16 +191,6 @@
#undef CONFIG_BOOTARGS
-#if defined (CONFIG_TQM5200_AA)
-# define CONFIG_U_BOOT_SUFFIX "-AA\0"
-#elif defined (CONFIG_TQM5200_AB)
-# define CONFIG_U_BOOT_SUFFIX "-AB\0"
-#elif defined (CONFIG_TQM5200_AC)
-# define CONFIG_U_BOOT_SUFFIX "-AC\0"
-#else
-# define CONFIG_U_BOOT_SUFFIX "\0"
-#endif
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"rootpath=/opt/eldk/ppc_6xx\0" \
@@ -217,7 +207,7 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"bootfile=/tftpboot/tqm5200/uImage\0" \
"load=tftp 200000 ${u-boot}\0" \
- "u-boot=/tftpboot/tqm5200/u-boot.bin" CONFIG_U_BOOT_SUFFIX \
+ "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
"update=protect off FC000000 FC05FFFF;" \
"erase FC000000 FC05FFFF;" \
"cp.b 200000 FC000000 ${filesize};" \
@@ -283,13 +273,6 @@
#endif
/* List of I2C addresses to be verified by POST */
-#if defined (CONFIG_TQM5200_AA) || defined (CONFIG_TQM5200_AB)
-#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
- CFG_I2C_SLAVE }
-#elif defined (CONFIG_TQM5200_AC)
-#define I2C_ADDR_LIST { CFG_I2C_SLAVE }
-#endif
-
#if defined (CONFIG_MINIFAP)
#undef I2C_ADDR_LIST
#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
@@ -478,13 +461,9 @@
* SRAM - Do not map below 2 GB in address space, because this area is used
* for SDRAM autosizing.
*/
-#if defined CONFIG_TQM5200_AB || defined (CONFIG_CS_AUTOCONF)
+#if defined (CONFIG_CS_AUTOCONF)
#define CFG_CS2_START 0xE5000000
-#ifdef CONFIG_TQM5200_AB
-#define CFG_CS2_SIZE 0x80000 /* 512 kByte */
-#else /* CONFIG_CS_AUTOCONF */
#define CFG_CS2_SIZE 0x100000 /* 1 MByte */
-#endif
#define CFG_CS2_CFG 0x0004D930
#endif
@@ -492,8 +471,7 @@
* Grafic controller - Do not map below 2 GB in address space, because this
* area is used for SDRAM autosizing.
*/
-#if defined (CONFIG_TQM5200_AB) || defined (CONFIG_TQM5200_AC) || \
- defined (CONFIG_CS_AUTOCONF)
+#if defined (CONFIG_CS_AUTOCONF)
#define SM501_FB_BASE 0xE0000000
#define CFG_CS1_START (SM501_FB_BASE)
#define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
diff --git a/include/configs/trab.h b/include/configs/trab.h
index b6d4bcf..935aca2d 100644
--- a/include/configs/trab.h
+++ b/include/configs/trab.h
@@ -165,7 +165,6 @@
CFG_CMD_DATE | \
CFG_CMD_DHCP | \
CFG_CMD_FAT | \
- CFG_CMD_JFFS2 | \
CFG_CMD_NFS | \
CFG_CMD_SNTP | \
CFG_CMD_USB )
@@ -179,7 +178,6 @@
CFG_CMD_DATE | \
CFG_CMD_DHCP | \
CFG_CMD_FAT | \
- CFG_CMD_JFFS2 | \
CFG_CMD_NFS | \
CFG_CMD_SNTP | \
CFG_CMD_USB )
@@ -389,10 +387,10 @@
#define MTDIDS_DEFAULT "nor0=0"
/* production flash layout */
-#define MTDPARTS_DEFAULT "mtdparts=0:32k(Firmware1)ro," \
+#define MTDPARTS_DEFAULT "mtdparts=0:16k(Firmware1)ro," \
"16k(Env1)," \
"16k(Env2)," \
- "320k(Firmware2)ro," \
+ "336k(Firmware2)ro," \
"896k(Kernel)," \
"5376k(Root-FS)," \
"1408k(JFFS2)," \
diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h
index c5ee78f..4e97b01 100644
--- a/include/configs/voiceblue.h
+++ b/include/configs/voiceblue.h
@@ -47,6 +47,8 @@
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
+#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
+
/*
* Physical Memory Map
*/
@@ -94,7 +96,6 @@
#define CONFIG_ENV_OVERWRITE
-#define CFG_JFFS_CUSTOM_PART /* see board/voiceblue/jffs2parts.c */
#endif
/*
@@ -104,9 +105,11 @@
#ifdef VOICEBLUE_SMALL_FLASH
#define CFG_MALLOC_LEN (SZ_64K - CFG_GBL_DATA_SIZE)
#define CONFIG_STACKSIZE SZ_8K
+#define PHYS_SDRAM_1_RESERVED 0
#else
#define CFG_MALLOC_LEN SZ_4M
#define CONFIG_STACKSIZE SZ_1M
+#define PHYS_SDRAM_1_RESERVED (CFG_MONITOR_LEN + CFG_MALLOC_LEN + CONFIG_STACKSIZE)
#endif
/*
@@ -174,6 +177,7 @@
#define CONFIG_BOOTCOMMAND "run nboot"
#define CONFIG_PREBOOT "run setup"
#define CONFIG_EXTRA_ENV_SETTINGS \
+ "silent=1\0" \
"ospart=0\0" \
"swapos=no\0" \
"setpart=" \
@@ -185,15 +189,37 @@
"fi\0" \
"setup=setenv bootargs console=ttyS0,$baudrate " \
"mtdparts=$mtdparts\0" \
- "nfsargs=run setpart; setenv bootargs $bootargs " \
- "root=/dev/nfs ip=dhcp\0" \
+ "nfsargs=setenv bootargs $bootargs " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
+ "nfsroot=$rootpath root=/dev/nfs\0" \
"flashargs=run setpart; setenv bootargs $bootargs " \
"root=/dev/mtdblock$partition ro " \
"rootfstype=jffs2\0" \
- "nboot=run nfsargs; bootp; tftp; bootm\0" \
- "fboot=run flashargs; fsload /boot/uImage; bootm\0"
+ "initrdargs=setenv bootargs $bootargs " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
+ "fboot=run flashargs; fsload /boot/uImage; bootm\0" \
+ "iboot=bootp; run initrdargs; tftp; bootm\0" \
+ "nboot=bootp; run nfsargs; tftp; bootm\0"
#endif
+#ifndef VOICEBLUE_SMALL_FLASH
+#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
+
+#if 1 /* feel free to disable for development */
+#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
+#define CONFIG_AUTOBOOT_PROMPT "\nVoiceBlue Enterprise - booting...\n"
+#define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */
+#endif
+
+/*
+ * JFFS2 partitions (mtdparts command line support)
+ */
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT "nor0=omapflash.0"
+#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:128k(uboot),64k(env),64k(r_env),16256k(data1),-(data2)"
+
+#endif /* VOICEBLUE_SMALL_FLASH */
+
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
@@ -213,7 +239,7 @@
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_MEMTEST_START PHYS_SDRAM_1
-#define CFG_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE
+#define CFG_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - PHYS_SDRAM_1_RESERVED
#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
@@ -247,22 +273,4 @@
#define VOICEBLUE_LED_REG 0x04030000
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition */
-#undef CONFIG_JFFS2_CMDLINE
-#define CONFIG_JFFS2_DEV "nor0"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00040000
-
-/* mtdparts command line support */
-/* Note: fake mtd_id used, no linux mtd map file */
-/*
-#define CONFIG_JFFS2_CMDLINE
-#define MTDIDS_DEFAULT "nor0=voiceblue-0"
-#define MTDPARTS_DEFAULT "mtdparts=voiceblue-0:128k(uboot),64k(env),64k(renv),-(jffs2)"
-*/
-
#endif /* __CONFIG_H */
diff --git a/include/ns16550.h b/include/ns16550.h
index d987a8b..996d915 100644
--- a/include/ns16550.h
+++ b/include/ns16550.h
@@ -7,6 +7,9 @@
* added prototypes for ns16550.c
* reduced no of com ports to 2
* modifications (c) Rob Taylor, Flying Pig Systems. 2000.
+ *
+ * added support for port on 64-bit bus
+ * by Richard Danter (richard.danter@windriver.com), (C) 2005 Wind River Systems
*/
#if (CFG_NS16550_REG_SIZE == 1)
@@ -82,6 +85,25 @@ struct NS16550 {
int pad10:24;
#endif
} __attribute__ ((packed));
+#elif (CFG_NS16550_REG_SIZE == -8)
+struct NS16550 {
+ unsigned char rbr; /* 0 */
+ unsigned char pad0[7];
+ unsigned char ier; /* 1 */
+ unsigned char pad1[7];
+ unsigned char fcr; /* 2 */
+ unsigned char pad2[7];
+ unsigned char lcr; /* 3 */
+ unsigned char pad3[7];
+ unsigned char mcr; /* 4 */
+ unsigned char pad4[7];
+ unsigned char lsr; /* 5 */
+ unsigned char pad5[7];
+ unsigned char msr; /* 6 */
+ unsigned char pad6[7];
+ unsigned char scr; /* 7 */
+ unsigned char pad7[7];
+} __attribute__ ((packed));
#else
#error "Please define NS16550 registers size."
#endif
diff --git a/include/serial.h b/include/serial.h
index c8abb72..8c7b1c2 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -23,7 +23,7 @@ extern struct serial_device serial_scc_device;
extern struct serial_device * default_serial_console (void);
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \
- || defined(CONFIG_405EP)
+ || defined(CONFIG_405EP) || defined(CONFIG_MPC5xxx)
extern struct serial_device serial0_device;
extern struct serial_device serial1_device;
#endif