diff options
Diffstat (limited to 'include')
| -rwxr-xr-x | include/asm-microblaze/asm.h | 98 | ||||
| -rw-r--r-- | include/asm-microblaze/microblaze_intc.h | 3 | ||||
| -rw-r--r-- | include/cmd_confdefs.h | 2 | ||||
| -rw-r--r-- | include/common.h | 4 | ||||
| -rw-r--r-- | include/configs/ml401.h | 61 | ||||
| -rw-r--r-- | include/configs/xupv2p.h | 14 | ||||
| -rw-r--r-- | include/linux/stat.h | 3 |
7 files changed, 168 insertions, 17 deletions
diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h new file mode 100755 index 0000000..f10f89c --- /dev/null +++ b/include/asm-microblaze/asm.h @@ -0,0 +1,98 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK <monstr@monstr.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* FSL macros */ +#define NGET(val, fslnum) \ + __asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val)); + +#define GET(val, fslnum) \ + __asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val)); + +#define NCGET(val, fslnum) \ + __asm__ __volatile__ ("ncget %0, rfsl" #fslnum :"=r" (val)); + +#define CGET(val, fslnum) \ + __asm__ __volatile__ ("cget %0, rfsl" #fslnum :"=r" (val)); + +#define NPUT(val, fslnum) \ + __asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val)); + +#define PUT(val, fslnum) \ + __asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val)); + +#define NCPUT(val, fslnum) \ + __asm__ __volatile__ ("ncput %0, rfsl" #fslnum ::"r" (val)); + +#define CPUT(val, fslnum) \ + __asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val)); + +/* CPU dependent */ +/* machine status register */ +#define MFS(val, reg) \ + __asm__ __volatile__ ("mfs %0," #reg :"=r" (val)); + +#define MTS(val, reg) \ + __asm__ __volatile__ ("mts " #reg ", %0"::"r" (val)); + +/* get return address from interrupt */ +#define R14(val) \ + __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val)); + +#define NOP __asm__ __volatile__ ("nop"); + +/* use machine status registe USE_MSR_REG */ +#ifdef XILINX_USE_MSR_INSTR +#define MSRSET(val) \ + __asm__ __volatile__ ("msrset r0," #val ); + +#define MSRCLR(val) \ + __asm__ __volatile__ ("msrclr r0," #val ); + +#else +#define MSRSET(val) \ +{ \ + register unsigned tmp; \ + __asm__ __volatile__ (" \ + mfs %0, rmsr; \ + ori %0, %0, "#val"; \ + mts rmsr, %0; \ + nop;" \ + : "=r" (tmp) \ + : "d" (val) \ + : "memory"); \ +} + +#define MSRCLR(val) \ +{ \ + register unsigned tmp; \ + __asm__ __volatile__ (" \ + mfs %0, rmsr; \ + andi %0, %0, ~"#val"; \ + mts rmsr, %0; \ + nop;" \ + : "=r" (tmp) \ + : "d" (val) \ + : "memory"); \ +} +#endif diff --git a/include/asm-microblaze/microblaze_intc.h b/include/asm-microblaze/microblaze_intc.h index 6635aea..4c385aa 100644 --- a/include/asm-microblaze/microblaze_intc.h +++ b/include/asm-microblaze/microblaze_intc.h @@ -38,3 +38,6 @@ struct irq_action { void *arg; int count; /* number of interrupt */ }; + +void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, + void *arg); diff --git a/include/cmd_confdefs.h b/include/cmd_confdefs.h index cf36583..b3ccdce 100644 --- a/include/cmd_confdefs.h +++ b/include/cmd_confdefs.h @@ -94,6 +94,7 @@ #define CFG_CMD_EXT2 0x1000000000000000ULL /* EXT2 Support */ #define CFG_CMD_SNTP 0x2000000000000000ULL /* SNTP support */ #define CFG_CMD_DISPLAY 0x4000000000000000ULL /* Display support */ +#define CFG_CMD_MFSL 0x8000000000000000ULL /* FSL support for Microblaze */ #define CFG_CMD_ALL 0xFFFFFFFFFFFFFFFFULL /* ALL commands */ @@ -125,6 +126,7 @@ CFG_CMD_IRQ | \ CFG_CMD_JFFS2 | \ CFG_CMD_KGDB | \ + CFG_CMD_MFSL | \ CFG_CMD_MII | \ CFG_CMD_MMC | \ CFG_CMD_NAND | \ diff --git a/include/common.h b/include/common.h index b162dbd..40fbba5 100644 --- a/include/common.h +++ b/include/common.h @@ -402,6 +402,10 @@ void ppcDcbi(unsigned long value); void ppcSync(void); void ppcDcbz(unsigned long value); #endif +#if defined (CONFIG_MICROBLAZE) +unsigned short in16(unsigned int); +void out16(unsigned int, unsigned short value); +#endif #if defined (CONFIG_MPC83XX) void ppcDWload(unsigned int *addr, unsigned int *ret); diff --git a/include/configs/ml401.h b/include/configs/ml401.h index cb159e7..4cfe802 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -28,6 +28,7 @@ #include "../board/xilinx/ml401/xparameters.h" #define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ +#define MICROBLAZE_V5 1 #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ @@ -36,11 +37,11 @@ #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } /* setting reset address */ -#define CFG_RESET_ADDRESS TEXT_BASE +//#define CFG_RESET_ADDRESS TEXT_BASE /* ethernet */ #define CONFIG_EMACLITE 1 -#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES +#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID /* gpio */ #define CFG_GPIO_0 1 @@ -58,6 +59,10 @@ #define FREQUENCE XILINX_CLOCK_FREQ #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +/* FSL */ +#define CFG_FSL_2 +#define FSL_INTR_2 1 + /* * memory layout - Example * TEXT_BASE = 0x1200_0000; @@ -93,7 +98,8 @@ /* global pointer */ #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ -#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* start of global data */ +/* start of global data */ +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* monitor code */ #define SIZE 0x40000 @@ -117,6 +123,7 @@ #define CFG_FLASH_EMPTY_INFO 1 /* ?empty sector */ #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ + #define CFG_FLASH_PROTECTION /* hardware flash protection */ #ifdef RAMENV #define CFG_ENV_IS_NOWHERE 1 @@ -135,6 +142,7 @@ #define CFG_ENV_IS_NOWHERE 1 #define CFG_ENV_SIZE 0x1000 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) + #define CFG_FLASH_PROTECTION /* hardware flash protection */ #endif /* !FLASH */ #ifdef FLASH @@ -152,8 +160,13 @@ CFG_CMD_IMI |\ CFG_CMD_NET |\ CFG_CMD_CACHE |\ + CFG_CMD_FAT |\ + CFG_CMD_EXT2 |\ + CFG_CMD_JFFS2 |\ + CFG_CMD_ECHO |\ CFG_CMD_IMLS |\ CFG_CMD_FLASH |\ + CFG_CMD_MFSL |\ CFG_CMD_PING \ ) #else /* !RAMENV */ @@ -174,6 +187,11 @@ CFG_CMD_FLASH |\ CFG_CMD_PING |\ CFG_CMD_ENV |\ + CFG_CMD_FAT |\ + CFG_CMD_EXT2 |\ + CFG_CMD_JFFS2 |\ + CFG_CMD_ECHO |\ + CFG_CMD_MFSL |\ CFG_CMD_SAVES \ ) @@ -189,16 +207,30 @@ CFG_CMD_BDI |\ CFG_CMD_RUN |\ CFG_CMD_LOADS |\ + CFG_CMD_FAT |\ + CFG_CMD_EXT2 |\ CFG_CMD_LOADB |\ CFG_CMD_IMI |\ CFG_CMD_NET |\ CFG_CMD_CACHE |\ + CFG_CMD_MFSL |\ CFG_CMD_PING \ ) #endif /* !FLASH */ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> +#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) +/* JFFS2 partitions */ +#define CONFIG_JFFS2_CMDLINE /* mtdparts command line support */ +#define MTDIDS_DEFAULT "nor0=ml401-0" + +/* default mtd partition table */ +#define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\ + "256k(env),3m(kernel),1m(romfs),"\ + "1m(cramfs),-(jffs2)" +#endif + /* Miscellaneous configurable options */ #define CFG_PROMPT "U-Boot-mONStR> " #define CFG_CBSIZE 512 /* size of console buffer */ @@ -207,7 +239,7 @@ #define CFG_LONGHELP #define CFG_LOAD_ADDR 0x12000000 /* default load address */ -#define CONFIG_BOOTDELAY 30 +#define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME "ml401" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" @@ -221,10 +253,19 @@ #define CFG_HZ 1000 /* system ace */ -/*#define CONFIG_SYSTEMACE -#define DEBUG_SYSTEMACE -#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR -#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH -#define CONFIG_DOS_PARTITION -*/ +#define CONFIG_SYSTEMACE +/* #define DEBUG_SYSTEMACE */ +#define SYSTEMACE_CONFIG_FPGA +#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR +#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH +#define CONFIG_DOS_PARTITION + +#define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" + +#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ + "nor0=ml401-0\0"\ + "mtdparts=mtdparts=ml401-0:"\ + "256k(u-boot),256k(env),3m(kernel),"\ + "1m(romfs),1m(cramfs),-(jffs2)\0" + #endif /* __CONFIG_H */ diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index a2f4810..b4c720d 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -132,6 +132,8 @@ CFG_CMD_LOADS |\ CFG_CMD_LOADB |\ CFG_CMD_MISC |\ + CFG_CMD_FAT |\ + CFG_CMD_EXT2 |\ CFG_CMD_PING \ ) @@ -163,12 +165,12 @@ "base 0;" \ "echo" - /* system ace */ -/*#define CONFIG_SYSTEMACE -#define DEBUG_SYSTEMACE -#define CFG_SYSTEMACE_BASE 0xCF000000 -#define CFG_SYSTEMACE_WIDTH 16 -#define CONFIG_DOS_PARTITION*/ +#define CONFIG_SYSTEMACE +/* #define DEBUG_SYSTEMACE */ +#define SYSTEMACE_CONFIG_FPGA +#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR +#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH +#define CONFIG_DOS_PARTITION #endif /* __CONFIG_H */ diff --git a/include/linux/stat.h b/include/linux/stat.h index 43fd53f..37f2924 100644 --- a/include/linux/stat.h +++ b/include/linux/stat.h @@ -67,7 +67,8 @@ struct stat { #endif /* __PPC__ */ -#if defined (__ARM__) || defined (__I386__) || defined (__M68K__) || defined (__bfin__) +#if defined (__ARM__) || defined (__I386__) || defined (__M68K__) || defined (__bfin__) ||\ + defined (__microblaze__) struct stat { unsigned short st_dev; |