diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/DU440.h | 2 | ||||
-rw-r--r-- | include/configs/P3G4.h | 2 | ||||
-rw-r--r-- | include/configs/RBC823.h | 6 | ||||
-rw-r--r-- | include/configs/alpr.h | 2 | ||||
-rw-r--r-- | include/configs/devkit8000.h | 4 | ||||
-rw-r--r-- | include/configs/p3mx.h | 2 | ||||
-rw-r--r-- | include/configs/p3p440.h | 2 | ||||
-rw-r--r-- | include/configs/pcs440ep.h | 2 | ||||
-rw-r--r-- | include/configs/pdnb3.h | 4 | ||||
-rw-r--r-- | include/configs/uc100.h | 2 | ||||
-rw-r--r-- | include/configs/zeus.h | 4 | ||||
-rw-r--r-- | include/ddr_spd.h | 34 |
12 files changed, 33 insertions, 33 deletions
diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 0827113..5ffa6e4 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -223,7 +223,7 @@ "flash_self=run ramargs addip addtty optargs;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${img};run nfsargs addip addtty optargs;" \ - "bootm\0" \ + "bootm\0" \ "rootpath=/tftpboot/du440/target_root_du440\0" \ "img=/tftpboot/du440/uImage\0" \ "kernel_addr=FFC00000\0" \ diff --git a/include/configs/P3G4.h b/include/configs/P3G4.h index 6328ba9..354e9d2 100644 --- a/include/configs/P3G4.h +++ b/include/configs/P3G4.h @@ -85,7 +85,7 @@ "flash_self=run ramargs addip addtty;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ + "bootm\0" \ "rootpath=/opt/eldk/ppc_74xx\0" \ "bootfile=/tftpboot/p3g4/uImage\0" \ "kernel_addr=ff000000\0" \ diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index 3970dc3..7b10d28 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -262,8 +262,8 @@ */ #define SCCR_MASK SCCR_EBDF11 #define CONFIG_SYS_SCCR (SCCR_RTDIV | SCCR_RTSEL | SCCR_CRQEN | \ - SCCR_PRQEN | SCCR_EBDF00 | \ - SCCR_COM01 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \ + SCCR_PRQEN | SCCR_EBDF00 | \ + SCCR_COM01 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \ SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD001 | \ SCCR_DFALCD00) @@ -344,7 +344,7 @@ #define CONFIG_SYS_OR1_PRELIM (CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_MSYS) #define CONFIG_SYS_BR1_PRELIM ((FLASH_BASE1_PRELIM & BR_BA_MSK) | BR_MS_UPMB | \ - BR_PS_8 | BR_V) + BR_PS_8 | BR_V) /* * BR4 and OR4 (SDRAM) diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 86b874c..f0a8962 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -148,7 +148,7 @@ "flash_self=run ramargs addip addtty;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ + "bootm\0" \ "net_nfs_fdt=tftp 200000 ${bootfile};" \ "tftp ${fdt_addr} ${fdt_file};" \ "run nfsargs addip addtty;" \ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index baa2635..c1e996e 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -278,8 +278,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* SRAM config */ #define CONFIG_SYS_SRAM_START 0x40200000 diff --git a/include/configs/p3mx.h b/include/configs/p3mx.h index d94e9c6..8157f47 100644 --- a/include/configs/p3mx.h +++ b/include/configs/p3mx.h @@ -194,7 +194,7 @@ "flash_self=run ramargs addip addtty;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ + "bootm\0" \ "rootpath=/opt/eldk/ppc_6xx\0" \ "u-boot=p3mx/u-boot/u-boot.bin\0" \ "load=tftp 100000 ${u-boot}\0" \ diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 5e5adbc..f6cb813 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -129,7 +129,7 @@ "flash_self=run ramargs addip addtty;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ + "bootm\0" \ "rootpath=/opt/eldk/ppc_4xx\0" \ "bootfile=/tftpboot/p3p440/uImage\0" \ "kernel_addr=ff800000\0" \ diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index e397615..7cf22ba 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -157,7 +157,7 @@ "flash_self=run ramargs addip addtty;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ + "bootm\0" \ "rootpath=/opt/eldk/ppc_4xx\0" \ "bootfile=/tftpboot/pcs440ep/uImage\0" \ "kernel_addr=FFF00000\0" \ diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index c664010..d3e9017 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -131,7 +131,7 @@ "flash_self=run ramargs addip addtty;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ + "bootm\0" \ "rootpath=/opt/buildroot\0" \ "bootfile=/tftpboot/netbox/uImage\0" \ "kernel_addr=50080000\0" \ @@ -280,7 +280,7 @@ #define I2C_TRISTATE GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_I2C_SDA) #define I2C_READ ((*IXP425_GPIO_GPINR & PB_SDA) != 0) #define I2C_SDA(bit) if (bit) GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_I2C_SDA); \ - else GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_I2C_SDA) + else GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_I2C_SDA) #define I2C_SCL(bit) if (bit) GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_I2C_SCL); \ else GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_I2C_SCL) #define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */ diff --git a/include/configs/uc100.h b/include/configs/uc100.h index 8bf7353..faae7ff 100644 --- a/include/configs/uc100.h +++ b/include/configs/uc100.h @@ -65,7 +65,7 @@ "flash_self=run ramargs addip addtty;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ + "bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/uc100/uImage\0" \ "kernel_addr=40000000\0" \ diff --git a/include/configs/zeus.h b/include/configs/zeus.h index 8d0db5c..237fcb1 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -322,7 +322,7 @@ " ramdisk_size=${ramdisk_size}\0" \ "addip=setenv bootargs ${bootargs} " \ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ + ":${hostname}:${netdev}:off panic=1\0" \ "addtty=setenv bootargs ${bootargs} console=ttyS0," \ "${baudrate}\0" \ "net_nfs=tftp ${kernel_mem_addr} ${file_kernel};" \ @@ -352,7 +352,7 @@ "file_fs=/zeus/rootfs_ba.img\0" \ "tftp_fs=tftp 100000 ${file_fs}\0" \ "update_fs=protect off ff300000 ff87ffff;era ff300000 ff87ffff;"\ - "cp.b 100000 ff300000 580000\0" \ + "cp.b 100000 ff300000 580000\0" \ "upd_fs=run tftp_fs;run update_fs\0" \ "bootcmd=chkreset;run ramargs addip addtty addmisc;" \ "bootm ${kernel_fl_addr} ${ramdisk_fl_addr}\0" \ diff --git a/include/ddr_spd.h b/include/ddr_spd.h index 9e74d87..f5809e5 100644 --- a/include/ddr_spd.h +++ b/include/ddr_spd.h @@ -39,7 +39,7 @@ typedef struct ddr1_spd_eeprom_s { unsigned char dev_attr; /* 22 SDRAM Device Attributes */ unsigned char clk_cycle2; /* 23 Min SDRAM Cycle time @ CL=X-0.5 */ unsigned char clk_access2; /* 24 SDRAM Access from - Clk @ CL=X-0.5 (tAC) */ + Clk @ CL=X-0.5 (tAC) */ unsigned char clk_cycle3; /* 25 Min SDRAM Cycle time @ CL=X-1 */ unsigned char clk_access3; /* 26 Max Access from Clk @ CL=X-1 (tAC) */ unsigned char trp; /* 27 Min Row Precharge Time (tRP)*/ @@ -112,9 +112,9 @@ typedef struct ddr2_spd_eeprom_s { unsigned char ca_setup; /* 32 Addr+Cmd Setup Time Before Clk (tIS) */ unsigned char ca_hold; /* 33 Addr+Cmd Hold Time After Clk (tIH) */ unsigned char data_setup; /* 34 Data Input Setup Time - Before Strobe (tDS) */ + Before Strobe (tDS) */ unsigned char data_hold; /* 35 Data Input Hold Time - After Strobe (tDH) */ + After Strobe (tDH) */ unsigned char twr; /* 36 Write Recovery time tWR */ unsigned char twtr; /* 37 Int write to read delay tWTR */ unsigned char trtp; /* 38 Int read to precharge delay tRTP */ @@ -128,40 +128,40 @@ typedef struct ddr2_spd_eeprom_s { unsigned char pll_relock; /* 46 PLL Relock time */ unsigned char Tcasemax; /* 47 Tcasemax */ unsigned char psiTAdram; /* 48 Thermal Resistance of DRAM Package from - Top (Case) to Ambient (Psi T-A DRAM) */ + Top (Case) to Ambient (Psi T-A DRAM) */ unsigned char dt0_mode; /* 49 DRAM Case Temperature Rise from Ambient - due to Activate-Precharge/Mode Bits + due to Activate-Precharge/Mode Bits (DT0/Mode Bits) */ unsigned char dt2n_dt2q; /* 50 DRAM Case Temperature Rise from Ambient - due to Precharge/Quiet Standby + due to Precharge/Quiet Standby (DT2N/DT2Q) */ unsigned char dt2p; /* 51 DRAM Case Temperature Rise from Ambient - due to Precharge Power-Down (DT2P) */ + due to Precharge Power-Down (DT2P) */ unsigned char dt3n; /* 52 DRAM Case Temperature Rise from Ambient - due to Active Standby (DT3N) */ + due to Active Standby (DT3N) */ unsigned char dt3pfast; /* 53 DRAM Case Temperature Rise from Ambient - due to Active Power-Down with + due to Active Power-Down with Fast PDN Exit (DT3Pfast) */ unsigned char dt3pslow; /* 54 DRAM Case Temperature Rise from Ambient - due to Active Power-Down with Slow + due to Active Power-Down with Slow PDN Exit (DT3Pslow) */ unsigned char dt4r_dt4r4w; /* 55 DRAM Case Temperature Rise from Ambient - due to Page Open Burst Read/DT4R4W + due to Page Open Burst Read/DT4R4W Mode Bit (DT4R/DT4R4W Mode Bit) */ unsigned char dt5b; /* 56 DRAM Case Temperature Rise from Ambient - due to Burst Refresh (DT5B) */ + due to Burst Refresh (DT5B) */ unsigned char dt7; /* 57 DRAM Case Temperature Rise from Ambient - due to Bank Interleave Reads with + due to Bank Interleave Reads with Auto-Precharge (DT7) */ unsigned char psiTApll; /* 58 Thermal Resistance of PLL Package form - Top (Case) to Ambient (Psi T-A PLL) */ + Top (Case) to Ambient (Psi T-A PLL) */ unsigned char psiTAreg; /* 59 Thermal Reisitance of Register Package - from Top (Case) to Ambient + from Top (Case) to Ambient (Psi T-A Register) */ unsigned char dtpllactive; /* 60 PLL Case Temperature Rise from Ambient - due to PLL Active (DT PLL Active) */ + due to PLL Active (DT PLL Active) */ unsigned char dtregact; /* 61 Register Case Temperature Rise from - Ambient due to Register Active/Mode Bit + Ambient due to Register Active/Mode Bit (DT Register Active/Mode Bit) */ unsigned char spd_rev; /* 62 SPD Data Revision Code */ unsigned char cksum; /* 63 Checksum for bytes 0-62 */ |