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-rw-r--r--include/common.h11
-rw-r--r--include/config_cmd_all.h1
-rw-r--r--include/configs/at91sam9x5ek.h39
-rw-r--r--include/configs/cm_t35.h8
-rw-r--r--include/configs/coreboot.h1
-rw-r--r--include/configs/eb_cpu5282.h8
-rw-r--r--include/configs/exynos5250-dt.h321
-rw-r--r--include/configs/h2200.h25
-rw-r--r--include/configs/igep00x0.h4
-rw-r--r--include/configs/km/keymile-common.h3
-rw-r--r--include/configs/lsxl.h2
-rw-r--r--include/configs/mv-common.h2
-rw-r--r--include/configs/sh7752evb.h153
-rw-r--r--include/configs/smdk5250.h278
-rw-r--r--include/configs/socfpga_cyclone5.h2
-rw-r--r--include/configs/trats.h45
-rw-r--r--include/configs/wireless_space.h194
-rw-r--r--include/env_callback.h8
-rw-r--r--include/fdtdec.h9
-rw-r--r--include/flash.h1
-rw-r--r--include/i2c.h26
-rw-r--r--include/netdev.h21
-rw-r--r--include/sound.h4
-rw-r--r--include/twl4030.h44
-rw-r--r--include/usb.h1
25 files changed, 907 insertions, 304 deletions
diff --git a/include/common.h b/include/common.h
index d0bf1e8..4ad17ea 100644
--- a/include/common.h
+++ b/include/common.h
@@ -300,7 +300,7 @@ int abortboot(int bootdelay);
extern char console_buffer[];
/* arch/$(ARCH)/lib/board.c */
-void board_init_f (ulong) __attribute__ ((noreturn));
+void board_init_f(ulong);
void board_init_r (gd_t *, ulong) __attribute__ ((noreturn));
int checkboard (void);
int checkflash (void);
@@ -311,6 +311,15 @@ int mac_read_from_eeprom(void);
extern u8 _binary_dt_dtb_start[]; /* embedded device tree blob */
int set_cpu_clk_info(void);
+/**
+ * Show the DRAM size in a board-specific way
+ *
+ * This is used by boards to display DRAM information in their own way.
+ *
+ * @param size Size of DRAM (which should be displayed along with other info)
+ */
+void board_show_dram(ulong size);
+
/* common/flash.c */
void flash_perror (int);
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index e82f642..2a82e19 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -56,6 +56,7 @@
#define CONFIG_CMD_LICENSE /* console license display */
#define CONFIG_CMD_LOADB /* loadb */
#define CONFIG_CMD_LOADS /* loads */
+#define CONFIG_CMD_MEMINFO /* meminfo */
#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */
#define CONFIG_CMD_MFSL /* FSL support for Microblaze */
#define CONFIG_CMD_MII /* MII support */
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 1317582..6fac5ac 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -90,6 +90,14 @@
#define CONFIG_CMD_NAND
#define CONFIG_CMD_SF
#define CONFIG_CMD_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_USB
+
+/*
+ * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
+ * NB: in this case, USB 1.1 devices won't be recognized.
+ */
+
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
@@ -142,9 +150,12 @@
/* MMC */
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
-#define CONFIG_CMD_FAT
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI
+#endif
+
+/* FAT */
+#ifdef CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
#endif
@@ -154,6 +165,22 @@
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_MACB_SEARCH_PHY
+/* USB */
+#ifdef CONFIG_CMD_USB
+#ifdef CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
+#else
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
+#endif
+#define CONFIG_USB_ATMEL
+#define CONFIG_USB_STORAGE
+#endif
+
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
@@ -178,6 +205,16 @@
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x100000 0x300000; " \
"bootm 0x22000000"
+#elif defined(CONFIG_SYS_USE_DATAFLASH)
+/* bootstrap + u-boot + env + linux in data flash */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_OFFSET 0x4200
+#define CONFIG_ENV_SIZE 0x4200
+#define CONFIG_ENV_SECT_SIZE 0x210
+#define CONFIG_ENV_SPI_MAX_HZ 30000000
+#define CONFIG_BOOTCOMMAND "sf probe 0; " \
+ "sf read 0x22000000 0x84000 0x294000; " \
+ "bootm 0x22000000"
#else /* CONFIG_SYS_USE_MMC */
/* bootstrap + u-boot + env + linux in mmc */
#define CONFIG_ENV_IS_IN_MMC
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 433b447..7d07215 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -114,9 +114,15 @@
#define CONFIG_DOS_PARTITION
/* USB */
-#define CONFIG_MUSB_UDC
#define CONFIG_USB_OMAP3
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_MUSB_UDC
#define CONFIG_TWL4030_USB
+#define CONFIG_CMD_USB
/* USB device configuration */
#define CONFIG_USB_DEVICE
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index adeace0..d8aabd4 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -159,6 +159,7 @@
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_IO
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_ITEST
#define CONFIG_CMD_LOADB
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index 5a0d321..459f568 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -168,14 +168,6 @@
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0
#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0
-/* If M5282 port is fully implemented the monitor base will be behind
- * the vector table. */
-#if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
-#else
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
-#endif
-
#define CONFIG_SYS_MONITOR_LEN 0x20000
#define CONFIG_SYS_MALLOC_LEN (256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
new file mode 100644
index 0000000..cabd2f2
--- /dev/null
+++ b/include/configs/exynos5250-dt.h
@@ -0,0 +1,321 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG EXYNOS5250 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* High Level Configuration Options */
+#define CONFIG_SAMSUNG /* in a SAMSUNG core */
+#define CONFIG_S5P /* S5P Family */
+#define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */
+#define CONFIG_SMDK5250 /* which is in a SMDK5250 */
+
+#include <asm/arch/cpu.h> /* get chip and board defs */
+
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+/* Enable fdt support for Exynos5250 */
+#define CONFIG_ARCH_DEVICE_TREE exynos5250
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_SEPARATE
+
+/* Keep L2 Cache Disabled */
+#define CONFIG_SYS_DCACHE_OFF
+
+#define CONFIG_SYS_SDRAM_BASE 0x40000000
+#define CONFIG_SYS_TEXT_BASE 0x43E00000
+
+/* input clock of PLL: SMDK5250 has 24MHz input clock */
+#define CONFIG_SYS_CLK_FREQ 24000000
+
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_EDITING
+
+/* MACH_TYPE_SMDK5250 macro will be removed once added to mach-types */
+#define MACH_TYPE_SMDK5250 3774
+#define CONFIG_MACH_TYPE MACH_TYPE_SMDK5250
+
+/* Power Down Modes */
+#define S5P_CHECK_SLEEP 0x00000BAD
+#define S5P_CHECK_DIDLE 0xBAD00000
+#define S5P_CHECK_LPA 0xABAD0000
+
+/* Offset for inform registers */
+#define INFORM0_OFFSET 0x800
+#define INFORM1_OFFSET 0x804
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
+
+/* select serial console configuration */
+#define CONFIG_SERIAL3 /* use SERIAL 3 */
+#define CONFIG_BAUDRATE 115200
+#define EXYNOS5_DEFAULT_UART_OFFSET 0x010000
+
+/* Console configuration */
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define EXYNOS_DEVICE_SETTINGS \
+ "stdin=serial\0" \
+ "stdout=serial,lcd\0" \
+ "stderr=serial,lcd\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ EXYNOS_DEVICE_SETTINGS
+
+#define TZPC_BASE_OFFSET 0x10000
+
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_SDHCI
+#define CONFIG_S5P_SDHCI
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+/* PWM */
+#define CONFIG_PWM
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* Command definition*/
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NET
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+/* USB */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_EXYNOS
+#define CONFIG_USB_STORAGE
+
+/* MMC SPL */
+#define CONFIG_SPL
+#define COPY_BL2_FNPTR_ADDR 0x02020030
+
+/* specific .lds file */
+#define CONFIG_SPL_LDSCRIPT "board/samsung/smdk5250/smdk5250-uboot-spl.lds"
+#define CONFIG_SPL_TEXT_BASE 0x02023400
+#define CONFIG_SPL_MAX_SIZE (14 * 1024)
+
+#define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000"
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+#define CONFIG_SYS_PROMPT "SMDK5250 # "
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
+
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_RD_LVL
+
+#define CONFIG_NR_DRAM_BANKS 8
+#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
+#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE
+#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE
+
+#define CONFIG_SYS_MONITOR_BASE 0x00000000
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_IDENT_STRING " for SMDK5250"
+
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+#define CONFIG_SECURE_BL1_ONLY
+
+/* Secure FW size configuration */
+#ifdef CONFIG_SECURE_BL1_ONLY
+#define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */
+#else
+#define CONFIG_SEC_FW_SIZE 0
+#endif
+
+/* Configuration of BL1, BL2, ENV Blocks on mmc */
+#define CONFIG_RES_BLOCK_SIZE (512)
+#define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
+#define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */
+#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
+
+#define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE)
+#define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE)
+#define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE)
+
+/* U-boot copy size from boot Media to DRAM.*/
+#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512)
+#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512)
+
+#define OM_STAT (0x1f << 1)
+#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058
+#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
+
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_IRAM_STACK 0x02050000
+
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
+
+/* I2C */
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_HARD_I2C
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C_SPEED 100000 /* 100 Kbps */
+#define CONFIG_DRIVER_S3C24X0_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_MAX_I2C_NUM 8
+#define CONFIG_SYS_I2C_SLAVE 0x0
+#define CONFIG_I2C_EDID
+
+/* PMIC */
+#define CONFIG_PMIC
+#define CONFIG_PMIC_I2C
+#define CONFIG_PMIC_MAX77686
+
+/* SPI */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_SPI_FLASH
+
+#ifdef CONFIG_SPI_FLASH
+#define CONFIG_EXYNOS_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#define CONFIG_SF_DEFAULT_SPEED 50000000
+#define EXYNOS5_SPI_NUM_CONTROLLERS 5
+#endif
+
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_MODE SPI_MODE_0
+#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
+#define CONFIG_ENV_SPI_BUS 1
+#define CONFIG_ENV_SPI_MAX_HZ 50000000
+#endif
+
+/* PMIC */
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_MAX77686
+
+/* SPI */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_SPI_FLASH
+
+#ifdef CONFIG_SPI_FLASH
+#define CONFIG_EXYNOS_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#define CONFIG_SF_DEFAULT_SPEED 50000000
+#define EXYNOS5_SPI_NUM_CONTROLLERS 5
+#endif
+
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_MODE SPI_MODE_0
+#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
+#define CONFIG_ENV_SPI_BUS 1
+#define CONFIG_ENV_SPI_MAX_HZ 50000000
+#endif
+
+/* Ethernet Controllor Driver */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_SMC911X
+#define CONFIG_SMC911X_BASE 0x5000000
+#define CONFIG_SMC911X_16_BIT
+#define CONFIG_ENV_SROM_BANK 1
+#endif /*CONFIG_CMD_NET*/
+
+/* Enable PXE Support */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_CMD_PXE
+#define CONFIG_MENU
+#endif
+
+/* Sound */
+#define CONFIG_CMD_SOUND
+#ifdef CONFIG_CMD_SOUND
+#define CONFIG_SOUND
+#define CONFIG_I2S
+#define CONFIG_SOUND_WM8994
+#endif
+
+/* Enable devicetree support */
+#define CONFIG_OF_LIBFDT
+
+/* SHA hashing */
+#define CONFIG_CMD_HASH
+#define CONFIG_HASH_VERIFY
+#define CONFIG_SHA1
+#define CONFIG_SHA256
+
+/* Display */
+#define CONFIG_LCD
+#ifdef CONFIG_LCD
+#define CONFIG_EXYNOS_FB
+#define CONFIG_EXYNOS_DP
+#define LCD_XRES 2560
+#define LCD_YRES 1600
+#define LCD_BPP LCD_COLOR16
+#endif
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/h2200.h b/include/configs/h2200.h
index ef14dd3..516a26e 100644
--- a/include/configs/h2200.h
+++ b/include/configs/h2200.h
@@ -154,4 +154,29 @@
#define CONFIG_BOOTARGS "root=/dev/ram0 ro console=ttyS0,115200n8"
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_USB_DEV_PULLUP_GPIO 33
+/* USB VBUS GPIO 3 */
+
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+
+#define CONFIG_BOOTDELAY 2
+#define CONFIG_BOOTCOMMAND \
+ "setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
+ "if bootp ; then setenv downloaded 1 ; fi ; done ; " \
+ "source :script ; " \
+ "bootm ; "
+
+#define CONFIG_USB_GADGET_PXA2XX
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_SUBSET
+
+#define CONFIG_USBNET_DEV_ADDR "de:ad:be:ef:00:01"
+#define CONFIG_USBNET_HOST_ADDR "de:ad:be:ef:00:02"
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0"
+
#endif /* __CONFIG_H */
diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h
index 43dd06e..f8131b1 100644
--- a/include/configs/igep00x0.h
+++ b/include/configs/igep00x0.h
@@ -67,6 +67,9 @@
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
+/* define to avoid U-Boot to hang while waiting for TEMT */
+#define CONFIG_SYS_NS16550_BROKEN_TEMT
+
/* select serial console configuration */
#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
@@ -312,6 +315,7 @@
#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
+#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_I2C_SUPPORT
diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index 05480d4..f64748e 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -253,9 +253,6 @@
"load=tftpboot ${load_addr_r} ${u-boot}\0" \
"mtdids=" MTDIDS_DEFAULT "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
- "stderr=serial\0" \
- "stdin=serial\0" \
- "stdout=serial\0" \
""
#endif /* CONFIG_KM_DEF_ENV */
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
index 8097f28..59f151a 100644
--- a/include/configs/lsxl.h
+++ b/include/configs/lsxl.h
@@ -146,7 +146,7 @@
"config_nc_dhcp=setenv autoload_old ${autoload}; " \
"setenv autoload no " \
"&& bootp " \
- "&& setenv ncip ${serverip} " \
+ "&& setenv ncip " \
"&& setenv autoload ${autoload_old}; " \
"setenv autoload_old\0" \
"standard_env=setenv ipaddr; setenv netmask; setenv serverip; " \
diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h
index 7086d1d..405a842 100644
--- a/include/configs/mv-common.h
+++ b/include/configs/mv-common.h
@@ -92,7 +92,7 @@
/*
* Size of malloc() pool
*/
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* 1MiB for malloc() */
+#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 * 4) /* 4MiB for malloc() */
/*
* Other required minimal configurations
diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h
new file mode 100644
index 0000000..bf6bd4d
--- /dev/null
+++ b/include/configs/sh7752evb.h
@@ -0,0 +1,153 @@
+/*
+ * Configuation settings for the sh7752evb board
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __SH7752EVB_H
+#define __SH7752EVB_H
+
+#undef DEBUG
+#define CONFIG_SH 1
+#define CONFIG_SH4A 1
+#define CONFIG_SH_32BIT 1
+#define CONFIG_CPU_SH7752 1
+#define CONFIG_SH7752EVB 1
+
+#define CONFIG_SYS_TEXT_BASE 0x5ff80000
+#define CONFIG_SYS_LDSCRIPT "board/renesas/sh7752evb/u-boot.lds"
+
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_DFL
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_MD5SUM
+#define CONFIG_MD5
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_EXT2
+#define CONFIG_DOS_PARTITION
+#define CONFIG_MAC_PARTITION
+
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
+
+#define CONFIG_VERSION_VARIABLE
+#undef CONFIG_SHOW_BOOT_PROGRESS
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_AUTO_COMPLETE
+
+/* MEMORY */
+#define SH7752EVB_SDRAM_BASE (0x40000000)
+#define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT "=> "
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_PBSIZE 256
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE 512
+#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
+
+/* SCIF */
+#define CONFIG_SCIF_CONSOLE 1
+#define CONFIG_CONS_SCIF2 1
+#undef CONFIG_SYS_CONSOLE_INFO_QUIET
+#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
+
+#define CONFIG_SYS_MEMTEST_START (SH7752EVB_SDRAM_BASE)
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
+ 480 * 1024 * 1024)
+#undef CONFIG_SYS_ALT_MEMTEST
+#undef CONFIG_SYS_MEMTEST_SCRATCH
+#undef CONFIG_SYS_LOADS_BAUD_CHANGE
+
+#define CONFIG_SYS_SDRAM_BASE (SH7752EVB_SDRAM_BASE)
+#define CONFIG_SYS_SDRAM_SIZE (SH7752EVB_SDRAM_SIZE)
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
+ 128 * 1024 * 1024)
+
+#define CONFIG_SYS_MONITOR_BASE 0x00000000
+#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
+#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
+
+/* FLASH */
+#define CONFIG_SYS_NO_FLASH
+
+/* Ether */
+#define CONFIG_SH_ETHER 1
+#define CONFIG_SH_ETHER_USE_PORT 0
+#define CONFIG_SH_ETHER_PHY_ADDR 18
+#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
+#define CONFIG_SH_ETHER_USE_GETHER 1
+#define CONFIG_PHYLIB
+#define CONFIG_BITBANGMII
+#define CONFIG_BITBANGMII_MULTI
+#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
+#define CONFIG_PHY_VITESSE
+
+#define SH7752EVB_ETHERNET_MAC_BASE_SPI 0x00090000
+#define SH7752EVB_SPI_SECTOR_SIZE (64 * 1024)
+#define SH7752EVB_ETHERNET_MAC_BASE SH7752EVB_ETHERNET_MAC_BASE_SPI
+#define SH7752EVB_ETHERNET_MAC_SIZE 17
+#define SH7752EVB_ETHERNET_NUM_CH 2
+#define CONFIG_BOARD_LATE_INIT
+
+/* SPI */
+#define CONFIG_SH_SPI 1
+#define CONFIG_SH_SPI_BASE 0xfe002000
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO 1
+#define CONFIG_SPI_FLASH_MACRONIX 1
+
+/* MMCIF */
+#define CONFIG_MMC 1
+#define CONFIG_GENERIC_MMC 1
+#define CONFIG_SH_MMCIF 1
+#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
+#define CONFIG_SH_MMCIF_CLK 48000000
+
+/* ENV setting */
+#define CONFIG_ENV_IS_EMBEDDED
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SECT_SIZE (64 * 1024)
+#define CONFIG_ENV_ADDR (0x00080000)
+#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
+#define CONFIG_ENV_OVERWRITE 1
+#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netboot=bootp; bootm\0"
+
+/* Board Clock */
+#define CONFIG_SYS_CLK_FREQ 48000000
+#define CONFIG_SYS_TMU_CLK_DIV 4
+#define CONFIG_SYS_HZ 1000
+#endif /* __SH7752EVB_H */
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index 75c25c0..81f83a8 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -1,7 +1,7 @@
/*
- * Copyright (C) 2011 Samsung Electronics
+ * Copyright (C) 2012 Samsung Electronics
*
- * Configuration settings for the SAMSUNG SMDK5250 (EXYNOS5250) board.
+ * Configuration settings for the SAMSUNG SMDK5250 board.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -22,274 +22,12 @@
* MA 02111-1307 USA
*/
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __CONFIG_SMDK_H
+#define __CONFIG_SMDK_H
-/* High Level Configuration Options */
-#define CONFIG_SAMSUNG /* in a SAMSUNG core */
-#define CONFIG_S5P /* S5P Family */
-#define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */
-#define CONFIG_SMDK5250 /* which is in a SMDK5250 */
+#include <configs/exynos5250-dt.h>
-#include <asm/arch/cpu.h> /* get chip and board defs */
+#undef CONFIG_DEFAULT_DEVICE_TREE
+#define CONFIG_DEFAULT_DEVICE_TREE exynos5250-smdk5250
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
-
-/* Keep L2 Cache Disabled */
-#define CONFIG_SYS_DCACHE_OFF
-
-#define CONFIG_SYS_SDRAM_BASE 0x40000000
-#define CONFIG_SYS_TEXT_BASE 0x43E00000
-
-/* input clock of PLL: SMDK5250 has 24MHz input clock */
-#define CONFIG_SYS_CLK_FREQ 24000000
-
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-#define CONFIG_CMDLINE_EDITING
-
-/* MACH_TYPE_SMDK5250 macro will be removed once added to mach-types */
-#define MACH_TYPE_SMDK5250 3774
-#define CONFIG_MACH_TYPE MACH_TYPE_SMDK5250
-
-/* Power Down Modes */
-#define S5P_CHECK_SLEEP 0x00000BAD
-#define S5P_CHECK_DIDLE 0xBAD00000
-#define S5P_CHECK_LPA 0xABAD0000
-
-/* Offset for inform registers */
-#define INFORM0_OFFSET 0x800
-#define INFORM1_OFFSET 0x804
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
-
-/* select serial console configuration */
-#define CONFIG_SERIAL3 /* use SERIAL 3 */
-#define CONFIG_BAUDRATE 115200
-#define EXYNOS5_DEFAULT_UART_OFFSET 0x010000
-
-#define TZPC_BASE_OFFSET 0x10000
-
-/* SD/MMC configuration */
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC
-#define CONFIG_SDHCI
-#define CONFIG_S5P_SDHCI
-
-#define CONFIG_BOARD_EARLY_INIT_F
-
-/* PWM */
-#define CONFIG_PWM
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Command definition*/
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_NET
-
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_ZERO_BOOTDELAY_CHECK
-
-/* USB */
-#define CONFIG_CMD_USB
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_EXYNOS
-#define CONFIG_USB_STORAGE
-
-/* MMC SPL */
-#define CONFIG_SPL
-#define COPY_BL2_FNPTR_ADDR 0x02020030
-
-/* specific .lds file */
-#define CONFIG_SPL_LDSCRIPT "board/samsung/smdk5250/smdk5250-uboot-spl.lds"
-#define CONFIG_SPL_TEXT_BASE 0x02023400
-#define CONFIG_SPL_MAX_SIZE (14 * 1024)
-
-#define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000"
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-#define CONFIG_SYS_PROMPT "SMDK5250 # "
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-
-#define CONFIG_SYS_HZ 1000
-
-#define CONFIG_RD_LVL
-
-#define CONFIG_NR_DRAM_BANKS 8
-#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
-#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
-#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
-#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE
-
-#define CONFIG_SYS_MONITOR_BASE 0x00000000
-
-/* FLASH and environment organization */
-#define CONFIG_SYS_NO_FLASH
-#undef CONFIG_CMD_IMLS
-#define CONFIG_IDENT_STRING " for SMDK5250"
-
-#define CONFIG_SYS_MMC_ENV_DEV 0
-
-#define CONFIG_SECURE_BL1_ONLY
-
-/* Secure FW size configuration */
-#ifdef CONFIG_SECURE_BL1_ONLY
-#define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */
-#else
-#define CONFIG_SEC_FW_SIZE 0
-#endif
-
-/* Configuration of BL1, BL2, ENV Blocks on mmc */
-#define CONFIG_RES_BLOCK_SIZE (512)
-#define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
-#define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */
-#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
-
-#define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE)
-#define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE)
-#define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE)
-
-/* U-boot copy size from boot Media to DRAM.*/
-#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512)
-#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512)
-
-#define OM_STAT (0x1f << 1)
-#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058
-#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
-
-#define CONFIG_DOS_PARTITION
-
-#define CONFIG_IRAM_STACK 0x02050000
-
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
-
-/* I2C */
-#define CONFIG_SYS_I2C_INIT_BOARD
-#define CONFIG_HARD_I2C
-#define CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_SPEED 100000 /* 100 Kbps */
-#define CONFIG_DRIVER_S3C24X0_I2C
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_MAX_I2C_NUM 8
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_I2C_EDID
-
-/* PMIC */
-#define CONFIG_PMIC
-#define CONFIG_PMIC_I2C
-#define CONFIG_PMIC_MAX77686
-
-/* SPI */
-#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_SPI_FLASH
-
-#ifdef CONFIG_SPI_FLASH
-#define CONFIG_EXYNOS_SPI
-#define CONFIG_CMD_SF
-#define CONFIG_CMD_SPI
-#define CONFIG_SPI_FLASH_WINBOND
-#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED 50000000
-#define EXYNOS5_SPI_NUM_CONTROLLERS 5
-#endif
-
-#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SPI_MODE SPI_MODE_0
-#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
-#define CONFIG_ENV_SPI_BUS 1
-#define CONFIG_ENV_SPI_MAX_HZ 50000000
-#endif
-
-/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_MAX77686
-
-/* SPI */
-#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_SPI_FLASH
-
-#ifdef CONFIG_SPI_FLASH
-#define CONFIG_EXYNOS_SPI
-#define CONFIG_CMD_SF
-#define CONFIG_CMD_SPI
-#define CONFIG_SPI_FLASH_WINBOND
-#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED 50000000
-#define EXYNOS5_SPI_NUM_CONTROLLERS 5
-#endif
-
-#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SPI_MODE SPI_MODE_0
-#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
-#define CONFIG_ENV_SPI_BUS 1
-#define CONFIG_ENV_SPI_MAX_HZ 50000000
-#endif
-
-/* Ethernet Controllor Driver */
-#ifdef CONFIG_CMD_NET
-#define CONFIG_SMC911X
-#define CONFIG_SMC911X_BASE 0x5000000
-#define CONFIG_SMC911X_16_BIT
-#define CONFIG_ENV_SROM_BANK 1
-#endif /*CONFIG_CMD_NET*/
-
-/* Enable PXE Support */
-#ifdef CONFIG_CMD_NET
-#define CONFIG_CMD_PXE
-#define CONFIG_MENU
-#endif
-
-/* Sound */
-#define CONFIG_CMD_SOUND
-#ifdef CONFIG_CMD_SOUND
-#define CONFIG_SOUND
-#define CONFIG_I2S
-#define CONFIG_SOUND_WM8994
-#endif
-
-/* Enable devicetree support */
-#define CONFIG_OF_LIBFDT
-
-/* SHA hashing */
-#define CONFIG_CMD_HASH
-#define CONFIG_HASH_VERIFY
-#define CONFIG_SHA1
-#define CONFIG_SHA256
-
-#endif /* __CONFIG_H */
+#endif /* __CONFIG_SMDK_H */
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index 42077bd..5633d2a 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -65,7 +65,7 @@
#define CONFIG_SYS_BOOTMAPSZ ((256*1024*1024) - (4*1024))
#define CONFIG_SPL_RAM_DEVICE
-#define CONFIG_SPL_STACK (&__stack_start)
+#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SYS_SPL_MALLOC_START ((unsigned long) (&__malloc_start))
#define CONFIG_SYS_SPL_MALLOC_SIZE (&__malloc_end - &__malloc_start)
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 6efee5c..63745ac 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -99,6 +99,7 @@
#define CONFIG_CMD_MMC
#define CONFIG_CMD_DFU
#define CONFIG_CMD_GPT
+#define CONFIG_CMD_SETEXPR
/* FAT */
#define CONFIG_CMD_FAT
@@ -144,9 +145,8 @@
"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
#define CONFIG_DFU_ALT \
- "dfu_alt_info=" \
"u-boot mmc 80 400;" \
- "uImage fat 0 2\0" \
+ "uImage ext4 0 2\0" \
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_CONSOLE_INFO_QUIET
@@ -165,20 +165,20 @@
"mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
"lpj=lpj=3981312\0" \
"nfsboot=" \
- "set bootargs root=/dev/nfs rw " \
+ "setenv bootargs root=/dev/nfs rw " \
"nfsroot=${nfsroot},nolock,tcp " \
"ip=${ipaddr}:${serverip}:${gatewayip}:" \
"${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
"; run bootk\0" \
"ramfsboot=" \
- "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \
+ "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
"${console} ${meminfo} " \
"initrd=0x43000000,8M ramdisk=8192\0" \
"mmcboot=" \
- "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
+ "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
"run loaduimage; bootm 0x40007FC0\0" \
- "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
+ "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
"boottrace=setenv opts initcall_debug; run bootcmd\0" \
"mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
"verify=n\0" \
@@ -187,13 +187,31 @@
"meminfo=crashkernel=32M@0x50000000\0" \
"nfsroot=/nfsroot/arm\0" \
"bootblock=" CONFIG_BOOTBLOCK "\0" \
- "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
+ "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
"mmcdev=0\0" \
"mmcbootpart=2\0" \
- "mmcrootpart=3\0" \
+ "mmcrootpart=5\0" \
"opts=always_resume=1\0" \
"partitions=" PARTS_DEFAULT \
- CONFIG_DFU_ALT \
+ "dfu_alt_info=" CONFIG_DFU_ALT \
+ "spladdr=0x40000100\0" \
+ "splsize=0x200\0" \
+ "splfile=falcon.bin\0" \
+ "spl_export=" \
+ "setexpr spl_imgsize ${splsize} + 8 ;" \
+ "setexpr spl_imgaddr ${spladdr} - 8 ;" \
+ "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
+ "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
+ "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
+ "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
+ "spl export atags 0x40007FC0;" \
+ "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
+ "mw.l ${spl_addr_tmp} ${splsize};" \
+ "ext4write mmc ${mmcdev}:${mmcbootpart}" \
+ " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
+ "setenv spl_imgsize;" \
+ "setenv spl_imgaddr;" \
+ "setenv spl_addr_tmp;\0"
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
@@ -234,6 +252,14 @@
#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+
+/* EXT4 */
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+/* Falcon mode definitions */
+#define CONFIG_CMD_SPL
+#define CONFIG_SYS_SPL_ARGS_ADDR PHYS_SDRAM_1 + 0x100
/* GPT */
#define CONFIG_EFI_PARTITION
@@ -242,7 +268,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_CACHELINE_SIZE 32
-
#define CONFIG_SOFT_I2C
#define CONFIG_SOFT_I2C_READ_REPEATED_START
#define CONFIG_SYS_I2C_INIT_BOARD
diff --git a/include/configs/wireless_space.h b/include/configs/wireless_space.h
new file mode 100644
index 0000000..eb20492
--- /dev/null
+++ b/include/configs/wireless_space.h
@@ -0,0 +1,194 @@
+/*
+ * Copyright (C) 2011 Albert ARIBAUD <albert.u.boot@aribaud.net>
+ *
+ * Based on the netspace_v2 code which is
+ * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _CONFIG_WIRELESS_SPACE_H
+#define _CONFIG_WIRELESS_SPACE_H
+
+/*
+ * Machine number definition
+ */
+#define MACH_TYPE_WIRELESS_SPACE 2500 /* is missing in mach-types.h */
+#define CONFIG_MACH_TYPE MACH_TYPE_WIRELESS_SPACE
+#define CONFIG_IDENT_STRING " Wireless Space"
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
+#define CONFIG_KIRKWOOD /* SoC Family Name */
+/* SoC name */
+#define CONFIG_KW88F6281
+#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
+
+/*
+ * Commands configuration
+ */
+#define CONFIG_SYS_NO_FLASH /* no NOR or SPI flash */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_USB
+
+/*
+ * Core clock definition
+ */
+#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
+
+/*
+ * SDRAM configuration
+ */
+#define CONFIG_NR_DRAM_BANKS 1
+
+/*
+ * Different SDRAM configuration and size for some of the boards derived
+ * from the Network Space v2
+ */
+
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
+#include "mv-common.h"
+
+/* Remove or override few declarations from mv-common.h */
+#undef CONFIG_RBTREE
+#undef CONFIG_SYS_IDE_MAXBUS
+#undef CONFIG_SYS_IDE_MAXDEVICE
+#define CONFIG_SYS_IDE_MAXBUS 1
+#define CONFIG_SYS_IDE_MAXDEVICE 1
+#undef CONFIG_SYS_PROMPT
+#define CONFIG_SYS_PROMPT "ws> "
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_MISC_INIT_R /* misc_init_r() initializes MAC address */
+#define CONFIG_MVGBE_PORTS {1, 0} /* enable only egiga0... */
+#define PORT_SERIAL_CONTROL_VALUE 0x00A4260E /* ... tied to the switch... */
+#define CONFIG_PHY_BASE_ADR 0xa /* ... through a 'fake' PHY */
+#define CONFIG_MII
+#undef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+#define CONFIG_NETCONSOLE
+#define CONFIG_MV88E61XX_SWITCH
+#define CONFIG_MV88E61XX_MULTICHIP_ADRMODE
+#define CONFIG_MV88E61XX_CMD
+#define CONFIG_CMD_TFTPPUT
+#endif /* CONFIG_CMD_NET */
+
+/*
+ * SATA Driver configuration
+ */
+#ifdef CONFIG_MVSATA_IDE
+#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
+#endif /* CONFIG_MVSATA_IDE */
+
+/*
+ * Enable GPI0 support
+ */
+#define CONFIG_KIRKWOOD_GPIO
+
+/*
+ * Enable I2C support
+ */
+#ifdef CONFIG_CMD_I2C
+/* I2C EEPROM HT24LC04 (512B - 32 pages of 16 Bytes) */
+#define CONFIG_CMD_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-byte page size */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit device address */
+#endif /* CONFIG_CMD_I2C */
+
+/*
+ * Partition support
+ */
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+
+/*
+ * File systems support
+ */
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
+/*
+ * Use the HUSH parser
+ */
+#define CONFIG_SYS_HUSH_PARSER
+
+/*
+ * Console configuration
+ */
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
+/*
+ * Enable device tree support
+ */
+#define CONFIG_OF_LIBFDT
+
+/*
+ * Environment variables configurations
+ */
+
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128KB */
+#define CONFIG_ENV_SIZE 0x20000 /* 128KB */
+#define CONFIG_ENV_OFFSET 0x80000 /* env starts here */
+
+/*
+ * Board-specific command to make using buttons etc easier
+ */
+
+#define CONFIG_WIRELESS_SPACE_CMD
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_PREBOOT
+
+#define CONFIG_BOOTARGS "console=ttyS0,115200"
+
+#define CONFIG_BOOTCOMMAND \
+ "if run usbload || run diskload; then bootm; fi"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0" \
+ "bootfile=uImage\0" \
+ "loadaddr=0x800000\0" \
+ "autoload=no\0" \
+ "netconsole=" \
+ "set stdin $stdin,nc; " \
+ "set stdout $stdout,nc; " \
+ "set stderr $stderr,nc;\0" \
+ "diskload=ide reset && " \
+ "ext2load ide 0:1 $loadaddr /boot/$bootfile\0" \
+ "usbload=usb start && " \
+ "fatload usb 0:1 $loadaddr /boot/$bootfile\0" \
+ "preboot=" \
+ "dhcp && run netconsole\0"
+
+#endif /* _CONFIG_WIRELESS_SPACE_H */
diff --git a/include/env_callback.h b/include/env_callback.h
index 47fdc6f..c583120 100644
--- a/include/env_callback.h
+++ b/include/env_callback.h
@@ -68,8 +68,16 @@ void env_callback_init(ENTRY *var_entry);
* when associated through the ".callbacks" environment variable, the callback
* will be executed any time the variable is inserted, overwritten, or deleted.
*/
+#ifdef CONFIG_SPL_BUILD
+#define U_BOOT_ENV_CALLBACK(name, callback) \
+ static inline void _u_boot_env_noop_##name(void) \
+ { \
+ (void)callback; \
+ }
+#else
#define U_BOOT_ENV_CALLBACK(name, callback) \
ll_entry_declare(struct env_clbk_tbl, name, env_clbk, env_clbk) = \
{#name, callback}
+#endif
#endif /* __ENV_CALLBACK_H__ */
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 70d0e97..f77d195 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -70,6 +70,15 @@ enum fdt_compat_id {
COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */
COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */
COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */
+ COMPAT_SMSC_LAN9215, /* SMSC 10/100 Ethernet LAN9215 */
+ COMPAT_SAMSUNG_EXYNOS5_SROMC, /* Exynos5 SROMC */
+ COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller */
+ COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
+ COMPAT_WOLFSON_WM8994_CODEC, /* Wolfson WM8994 Sound Codec */
+ COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
+ COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
+ COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */
+ COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
COMPAT_COUNT,
};
diff --git a/include/flash.h b/include/flash.h
index 7db599e..c7acc97 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -44,6 +44,7 @@ typedef struct {
ulong buffer_write_tout; /* maximum buffer write timeout */
ushort vendor; /* the primary vendor id */
ushort cmd_reset; /* vendor specific reset command */
+ uchar cmd_erase_sector; /* vendor specific erase sect. command */
ushort interface; /* used for x8/x16 adjustments */
ushort legacy_unlock; /* support Intel legacy (un)locking */
ushort manufacturer_id; /* manufacturer id */
diff --git a/include/i2c.h b/include/i2c.h
index 16f099d..c60d075 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -262,4 +262,30 @@ extern int get_multi_scl_pin(void);
extern int get_multi_sda_pin(void);
extern int multi_i2c_init(void);
#endif
+
+/**
+ * Get FDT values for i2c bus.
+ *
+ * @param blob Device tree blbo
+ * @return the number of I2C bus
+ */
+void board_i2c_init(const void *blob);
+
+/**
+ * Find the I2C bus number by given a FDT I2C node.
+ *
+ * @param blob Device tree blbo
+ * @param node FDT I2C node to find
+ * @return the number of I2C bus (zero based), or -1 on error
+ */
+int i2c_get_bus_num_fdt(int node);
+
+/**
+ * Reset the I2C bus represented by the given a FDT I2C node.
+ *
+ * @param blob Device tree blbo
+ * @param node FDT I2C node to find
+ * @return 0 if port was reset, -1 if not found
+ */
+int i2c_reset_port_fdt(const void *blob, int node);
#endif /* _I2C_H_ */
diff --git a/include/netdev.h b/include/netdev.h
index b8d303d..7f158d4 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -163,10 +163,9 @@ static inline int pci_eth_init(bd_t *bis)
* the stuct and enums here are used to specify switch configuration params
*/
#if defined(CONFIG_MV88E61XX_SWITCH)
-enum mv88e61xx_cfg_vlan {
- MV88E61XX_VLANCFG_DEFAULT,
- MV88E61XX_VLANCFG_ROUTER
-};
+
+/* constants for any 88E61xx switch */
+#define MV88E61XX_MAX_PORTS_NUM 6
enum mv88e61xx_cfg_mdip {
MV88E61XX_MDIP_NOCHANGE,
@@ -192,7 +191,7 @@ enum mv88e61xx_cfg_prtstt {
struct mv88e61xx_config {
char *name;
- enum mv88e61xx_cfg_vlan vlancfg;
+ u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
enum mv88e61xx_cfg_rgmiid rgmii_delay;
enum mv88e61xx_cfg_prtstt portstate;
enum mv88e61xx_cfg_ledinit led_init;
@@ -201,6 +200,18 @@ struct mv88e61xx_config {
u8 cpuport;
};
+/*
+ * Common mappings for Internal VLANs
+ * These mappings consider that all ports are useable; the driver
+ * will mask inexistent/unused ports.
+ */
+
+/* Switch mode : routes any port to any port */
+#define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
+
+/* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
+#define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
+
int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
#endif /* CONFIG_MV88E61XX_SWITCH */
diff --git a/include/sound.h b/include/sound.h
index ea0b115..d73839d 100644
--- a/include/sound.h
+++ b/include/sound.h
@@ -46,10 +46,10 @@ struct sound_codec_info {
/*
* Initialises audio sub system
- *
+ * @param blob Pointer of device tree node or NULL if none.
* @return int value 0 for success, -1 for error
*/
-int sound_init(void);
+int sound_init(const void *blob);
/*
* plays the pcm data buffer in pcm_data.h through i2s1 to make the
diff --git a/include/twl4030.h b/include/twl4030.h
index 0c17f59..5aa1841 100644
--- a/include/twl4030.h
+++ b/include/twl4030.h
@@ -580,6 +580,50 @@
#define TWL4030_USB_PHY_CLK_CTRL 0xFE
#define TWL4030_USB_PHY_CLK_CTRL_STS 0xFF
+/* GPIO */
+#define TWL4030_GPIO_GPIODATAIN1 0x00
+#define TWL4030_GPIO_GPIODATAIN2 0x01
+#define TWL4030_GPIO_GPIODATAIN3 0x02
+#define TWL4030_GPIO_GPIODATADIR1 0x03
+#define TWL4030_GPIO_GPIODATADIR2 0x04
+#define TWL4030_GPIO_GPIODATADIR3 0x05
+#define TWL4030_GPIO_GPIODATAOUT1 0x06
+#define TWL4030_GPIO_GPIODATAOUT2 0x07
+#define TWL4030_GPIO_GPIODATAOUT3 0x08
+#define TWL4030_GPIO_CLEARGPIODATAOUT1 0x09
+#define TWL4030_GPIO_CLEARGPIODATAOUT2 0x0A
+#define TWL4030_GPIO_CLEARGPIODATAOUT3 0x0B
+#define TWL4030_GPIO_SETGPIODATAOUT1 0x0C
+#define TWL4030_GPIO_SETGPIODATAOUT2 0x0D
+#define TWL4030_GPIO_SETGPIODATAOUT3 0x0E
+#define TWL4030_GPIO_GPIO_DEBEN1 0x0F
+#define TWL4030_GPIO_GPIO_DEBEN2 0x10
+#define TWL4030_GPIO_GPIO_DEBEN3 0x11
+#define TWL4030_GPIO_GPIO_CTRL 0x12
+#define TWL4030_GPIO_GPIOPUPDCTR1 0x13
+#define TWL4030_GPIO_GPIOPUPDCTR2 0x14
+#define TWL4030_GPIO_GPIOPUPDCTR3 0x15
+#define TWL4030_GPIO_GPIOPUPDCTR4 0x16
+#define TWL4030_GPIO_GPIOPUPDCTR5 0x17
+#define TWL4030_GPIO_GPIO_ISR1A 0x19
+#define TWL4030_GPIO_GPIO_ISR2A 0x1A
+#define TWL4030_GPIO_GPIO_ISR3A 0x1B
+#define TWL4030_GPIO_GPIO_IMR1A 0x1C
+#define TWL4030_GPIO_GPIO_IMR2A 0x1D
+#define TWL4030_GPIO_GPIO_IMR3A 0x1E
+#define TWL4030_GPIO_GPIO_ISR1B 0x1F
+#define TWL4030_GPIO_GPIO_ISR2B 0x20
+#define TWL4030_GPIO_GPIO_ISR3B 0x21
+#define TWL4030_GPIO_GPIO_IMR1B 0x22
+#define TWL4030_GPIO_GPIO_IMR2B 0x23
+#define TWL4030_GPIO_GPIO_IMR3B 0x24
+#define TWL4030_GPIO_GPIO_EDR1 0x28
+#define TWL4030_GPIO_GPIO_EDR2 0x29
+#define TWL4030_GPIO_GPIO_EDR3 0x2A
+#define TWL4030_GPIO_GPIO_EDR4 0x2B
+#define TWL4030_GPIO_GPIO_EDR5 0x2C
+#define TWL4030_GPIO_GPIO_SIH_CTRL 0x2D
+
/*
* Convience functions to read and write from TWL4030
*
diff --git a/include/usb.h b/include/usb.h
index 8d8a2c9..d79c865 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -392,5 +392,6 @@ int hub_port_reset(struct usb_device *dev, int port,
struct usb_device *usb_alloc_new_device(void *controller);
int usb_new_device(struct usb_device *dev);
+void usb_free_device(void);
#endif /*_USB_H_ */