diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/socfpga_common.h | 9 | ||||
-rw-r--r-- | include/configs/socfpga_sr1500.h | 2 | ||||
-rw-r--r-- | include/configs/socfpga_vining_fpga.h | 231 | ||||
-rw-r--r-- | include/configs/tplink_wdr4300.h | 2 |
4 files changed, 235 insertions, 9 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f657766..1f8b7b3 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -324,9 +324,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SPL_RAM_DEVICE #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE (64 * 1024) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT @@ -349,9 +346,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" #define CONFIG_SPL_LIBDISK_SUPPORT #else -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3 -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /* offset 2560 sect (1M+256k) */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 /* offset 512 sect (256k) */ +#define CONFIG_SPL_LIBDISK_SUPPORT #endif #endif diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index efa9e42..c097f47 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -22,7 +22,7 @@ /* Booting Linux */ #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTFILE "uImage" -#define CONFIG_BOOTARGS "console=ttyS0" __stringify(CONFIG_BAUDRATE) +#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h new file mode 100644 index 0000000..1ccde1a --- /dev/null +++ b/include/configs/socfpga_vining_fpga.h @@ -0,0 +1,231 @@ +/* + * Copyright (C) 2015 Marek Vasut <marex@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __CONFIG_SAMTEC_VINING_FPGA_H__ +#define __CONFIG_SAMTEC_VINING_FPGA_H__ + +#include <asm/arch/base_addr_ac5.h> + +/* U-Boot Commands */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_DOS_PARTITION +#define CONFIG_FAT_WRITE +#define CONFIG_HW_WATCHDOG + +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_LED + +/* Memory configurations */ +#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */ + +/* Booting Linux */ +#define CONFIG_BOOTDELAY 5 +#define CONFIG_BOOTFILE "openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb" +#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) +#define CONFIG_BOOTCOMMAND "run selboot" +#define CONFIG_LOADADDR 0x01000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* I2C EEPROM */ +#ifdef CONFIG_CMD_EEPROM +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_BUS 0 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70 +#endif + +/* + * Status LEDs: + * 0 ... Top Green + * 1 ... Top Red + * 2 ... Bottom Green + * 3 ... Bottom Red + */ +#define CONFIG_STATUS_LED +#define CONFIG_GPIO_LED +#define CONFIG_BOARD_SPECIFIC_LED +#define STATUS_LED_BIT 48 +#define STATUS_LED_STATE STATUS_LED_OFF +#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) +#define STATUS_LED_BIT1 53 +#define STATUS_LED_STATE1 STATUS_LED_OFF +#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) +#define STATUS_LED_BIT2 54 +#define STATUS_LED_STATE2 STATUS_LED_OFF +#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2) +#define STATUS_LED_BIT3 65 +#define STATUS_LED_STATE3 STATUS_LED_OFF +#define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 2) + +/* Ethernet on SoC (EMAC) */ +#if defined(CONFIG_CMD_NET) +#define CONFIG_BOOTP_SEND_HOSTNAME +/* PHY */ +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 +#endif + +/* Extra Environment */ +#define CONFIG_HOSTNAME socfpga_vining_fpga + +/* + * Active LOW GPIO buttons: + * A: GPIO 77 ... the button between USB B and ethernet + * B: GPIO 78 ... the button between USB A ports + * + * The logic: + * if button B is not pressed, boot normal Linux system immediatelly + * if button B is pressed, wait $bootdelay and boot recovery system + */ +#define CONFIG_PREBOOT \ + "setenv hostname vining-${unit_serial} ; " \ + "setenv PS1 \"${unit_ident} (${unit_serial}) => \" ; " \ + "if gpio input 78 ; then " \ + "setenv bootdelay 10 ; " \ + "setenv boottype rcvr ; " \ + "else " \ + "setenv bootdelay 5 ; " \ + "setenv boottype norm ; " \ + "fi" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=n\0" \ + "consdev=ttyS0\0" \ + "baudrate=115200\0" \ + "bootscript=boot.scr\0" \ + "ubimtdnr=5\0" \ + "ubimtd=rootfs\0" \ + "ubipart=ubi0:rootfs\0" \ + "ubisfcs=1\0" /* Default is flash at CS#1 */ \ + "netdev=eth0\0" \ + "hostname=vining_fpga\0" \ + "kernel_addr_r=0x10000000\0" \ + "mtdparts_0=ff705000.spi.0:" \ + "1m(u-boot)," \ + "64k(env1)," \ + "64k(env2)," \ + "256k(samtec1)," \ + "256k(samtec2)," \ + "-(rcvrfs)\0" /* Recovery */ \ + "mtdparts_1=ff705000.spi.1:" \ + "32m(rootfs)," \ + "-(userfs)\0" \ + "update_filename=u-boot-with-spl-dtb.sfp\0" \ + "update_qspi_offset=0x0\0" \ + "update_qspi=" /* Update the QSPI firmware */ \ + "if sf probe ; then " \ + "if tftp ${update_filename} ; then " \ + "sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \ + "fi ; " \ + "fi\0" \ + "fpga_filename=output_file.rbf\0" \ + "load_fpga=" /* Load FPGA bitstream */ \ + "if tftp ${fpga_filename} ; then " \ + "fpga load 0 $loadaddr $filesize ; " \ + "bridge enable ; " \ + "fi\0" \ + "addcons=" \ + "setenv bootargs ${bootargs} " \ + "console=${consdev},${baudrate}\0" \ + "addip=" \ + "setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:" \ + "${netmask}:${hostname}:${netdev}:off\0" \ + "addmisc=" \ + "setenv bootargs ${bootargs} ${miscargs}\0" \ + "addmtd=" \ + "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \ + "setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \ + "addargs=run addcons addmtd addmisc\0" \ + "ubiload=" \ + "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \ + "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ + "netload=" \ + "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ + "miscargs=nohlt panic=1\0" \ + "ubiargs=" \ + "setenv bootargs ubi.mtd=${ubimtdnr} " \ + "root=${ubipart} rootfstype=ubifs\0" \ + "nfsargs=" \ + "setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ + "ubi_sfsel=" \ + "if test \"${boottype}\" = \"rcvr\" ; then " \ + "setenv ubisfcs 0 ; " \ + "setenv ubimtd rcvrfs ; " \ + "setenv ubimtdnr 5 ; " \ + "setenv mtdparts mtdparts=${mtdparts_0} ; " \ + "setenv mtdids nor0=ff705000.spi.0 ; " \ + "setenv ubipart ubi0:rootfs ; " \ + "else " \ + "setenv ubisfcs 1 ; " \ + "setenv ubimtd rootfs ; " \ + "setenv ubimtdnr 6 ; " \ + "setenv mtdparts mtdparts=${mtdparts_1} ; " \ + "setenv mtdids nor0=ff705000.spi.1 ; " \ + "setenv ubipart ubi0:rootfs ; " \ + "fi ; " \ + "sf probe 0:${ubisfcs}\0" \ + "ubi_ubi=" \ + "run ubi_sfsel ubiload ubiargs addargs ; " \ + "bootm ${kernel_addr_r}\0" \ + "ubi_nfs=" \ + "run ubiload nfsargs addip addargs ; " \ + "bootm ${kernel_addr_r}\0" \ + "net_ubi=" \ + "run netload ubiargs addargs ; " \ + "bootm ${kernel_addr_r}\0" \ + "net_nfs=" \ + "run netload nfsargs addip addargs ; " \ + "bootm ${kernel_addr_r}\0" \ + "selboot=" /* Select from where to boot. */ \ + "if test \"${bootmode}\" = \"qspi\" ; then " \ + "led all off ; " \ + "if test \"${boottype}\" = \"rcvr\" ; then " \ + "echo \"Booting recovery system\" ; " \ + "led 3 on ; " /* Bottom RED */ \ + "fi ; " \ + "led 1 on ; " /* Top RED */ \ + "run ubi_ubi ; " \ + "else echo \"Unsupported boot mode: \"${bootmode} ; " \ + "fi\0" \ + +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_MTD_UBI_FASTMAP +#define CONFIG_RBTREE +#define CONFIG_LZO +#define MTDPARTS_DEFAULT \ + "mtdparts=ff705000.spi.0:" \ + "1m(u-boot)," \ + "64k(env1)," \ + "64k(env2)," \ + "256k(samtec1)," \ + "256k(samtec2)," \ + "-(rcvrfs);" /* Recovery */ \ + +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_OFFSET 0x100000 +#define CONFIG_ENV_OFFSET_REDUND \ + (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) + +#define CONFIG_MISC_INIT_R +#define CONFIG_BOARD_LATE_INIT + +/* Enable DFU to SF and RAM */ +#define CONFIG_DFU_RAM +#define CONFIG_DFU_SF + +/* Support changing the prompt string */ +#define CONFIG_CMDLINE_PS_SUPPORT + +/* The rest of the configuration is shared */ +#include <configs/socfpga_common.h> + +#endif /* __CONFIG_SAMTEC_VINING_FPGA_H__ */ diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 6273711..abe1da2 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -78,8 +78,6 @@ #define CONFIG_SYS_MEMTEST_END 0x83f00000 #define CONFIG_CMD_MEMTEST -#define CONFIG_USE_PRIVATE_LIBGCC - #define CONFIG_CMD_MII #define CONFIG_PHY_GIGE |