diff options
Diffstat (limited to 'include')
110 files changed, 2691 insertions, 405 deletions
diff --git a/include/_exports.h b/include/_exports.h index 279017e..74a882a 100644 --- a/include/_exports.h +++ b/include/_exports.h @@ -73,3 +73,16 @@ const char *, char **, unsigned int) EXPORT_FUNC(ustrtoull, unsigned long long, ustrtoull, const char *, char **, unsigned int) + EXPORT_FUNC(strcpy, char *, strcpy, char *dest, const char *src) + EXPORT_FUNC(mdelay, void, mdelay, unsigned long msec) +#ifdef CONFIG_PHY_AQUANTIA + EXPORT_FUNC(mdio_get_current_dev, struct mii_dev *, + mdio_get_current_dev, void) + EXPORT_FUNC(phy_find_by_mask, struct phy_device *, phy_find_by_mask, + struct mii_dev *bus, unsigned phy_mask, + phy_interface_t interface) + EXPORT_FUNC(mdio_phydev_for_ethname, struct phy_device *, + mdio_phydev_for_ethname, const char *ethname) + EXPORT_FUNC(miiphy_set_current_dev, int, miiphy_set_current_dev, + const char *devname) +#endif diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index db0550b..7ef3e25 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -116,5 +116,6 @@ typedef struct global_data { #define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */ #define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */ #define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */ +#define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */ #endif /* __ASM_GENERIC_GBL_DATA_H */ diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index de91e57..0af599f 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -322,6 +322,19 @@ struct gpio_dev_priv { const char *gpio_get_bank_info(struct udevice *dev, int *offset_count); /** + * dm_gpio_lookup_name() - Look up a named GPIO and return its description + * + * The name of a GPIO is typically its bank name followed by a number from 0. + * For example A0 is the first GPIO in bank A. Each bank is a separate driver + * model device. + * + * @name: Name to look up + * @desc: Returns description, on success + * @return 0 if OK, -ve on error + */ +int dm_gpio_lookup_name(const char *name, struct gpio_desc *desc); + +/** * gpio_lookup_name - Look up a GPIO name and return its details * * This is used to convert a named GPIO into a device, offset and GPIO @@ -421,6 +434,18 @@ int gpio_request_list_by_name(struct udevice *dev, const char *list_name, int flags); /** + * dm_gpio_request() - manually request a GPIO + * + * Note: This function should only be used for testing / debugging. Instead. + * use gpio_request_by_name() to pull GPIOs from the device tree. + * + * @desc: GPIO description of GPIO to request (see dm_gpio_lookup_name()) + * @label: Label to attach to the GPIO while claimed + * @return 0 if OK, -ve on error + */ +int dm_gpio_request(struct gpio_desc *desc, const char *label); + +/** * gpio_get_list_count() - Returns the number of GPIOs in a list * * Counts the GPIOs in a list. See gpio_request_by_name() for additional diff --git a/include/clk.h b/include/clk.h index df4570c..254ad2b 100644 --- a/include/clk.h +++ b/include/clk.h @@ -1,6 +1,86 @@ +/* + * Copyright (c) 2015 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + #ifndef _CLK_H_ #define _CLK_H_ int soc_clk_dump(void); +struct clk_ops { + /** + * get_rate() - Get current clock rate + * + * @dev: Device to check (UCLASS_CLK) + * @return clock rate in Hz, or -ve error code + */ + ulong (*get_rate)(struct udevice *dev); + + /** + * set_rate() - Set current clock rate + * + * @dev: Device to adjust + * @rate: New clock rate in Hz + * @return new rate, or -ve error code + */ + ulong (*set_rate)(struct udevice *dev, ulong rate); + + /** + * clk_set_periph_rate() - Set clock rate for a peripheral + * + * @dev: Device to adjust (UCLASS_CLK) + * @rate: New clock rate in Hz + * @return new clock rate in Hz, or -ve error code + */ + ulong (*get_periph_rate)(struct udevice *dev, int periph); + + /** + * clk_set_periph_rate() - Set current clock rate for a peripheral + * + * @dev: Device to update (UCLASS_CLK) + * @periph: Peripheral ID to cupdate + * @return new clock rate in Hz, or -ve error code + */ + ulong (*set_periph_rate)(struct udevice *dev, int periph, ulong rate); +}; + +#define clk_get_ops(dev) ((struct clk_ops *)(dev)->driver->ops) + +/** + * clk_get_rate() - Get current clock rate + * + * @dev: Device to check (UCLASS_CLK) + * @return clock rate in Hz, or -ve error code + */ +ulong clk_get_rate(struct udevice *dev); + +/** + * set_rate() - Set current clock rate + * + * @dev: Device to adjust + * @rate: New clock rate in Hz + * @return new rate, or -ve error code + */ +ulong clk_set_rate(struct udevice *dev, ulong rate); + +/** + * clk_get_periph_rate() - Get current clock rate for a peripheral + * + * @dev: Device to check (UCLASS_CLK) + * @return clock rate in Hz, -ve error code + */ +ulong clk_get_periph_rate(struct udevice *dev, int periph); + +/** + * clk_set_periph_rate() - Set current clock rate for a peripheral + * + * @dev: Device to update (UCLASS_CLK) + * @periph: Peripheral ID to cupdate + * @return new clock rate in Hz, or -ve error code + */ +ulong clk_set_periph_rate(struct udevice *dev, int periph, ulong rate); + #endif /* _CLK_H_ */ diff --git a/include/command.h b/include/command.h index bd3fc04..6c04cd9 100644 --- a/include/command.h +++ b/include/command.h @@ -104,6 +104,8 @@ static inline int bootm_maybe_autostart(cmd_tbl_t *cmdtp, const char *cmd) extern int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); +extern int do_booti(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); + extern int common_diskboot(cmd_tbl_t *cmdtp, const char *intf, int argc, char *const argv[]); diff --git a/include/common.h b/include/common.h index 8f4b2ec..4566bd1 100644 --- a/include/common.h +++ b/include/common.h @@ -1010,6 +1010,17 @@ int cpu_release(int nr, int argc, char * const argv[]); #define DEFINE_CACHE_ALIGN_BUFFER(type, name, size) \ DEFINE_ALIGN_BUFFER(type, name, size, ARCH_DMA_MINALIGN) +/* + * check_member() - Check the offset of a structure member + * + * @structure: Name of structure (e.g. global_data) + * @member: Name of member (e.g. baudrate) + * @offset: Expected offset in bytes + */ +#define check_member(structure, member, offset) _Static_assert( \ + offsetof(struct structure, member) == offset, \ + "`struct " #structure "` offset for `" #member "` is not " #offset) + /* Pull in stuff for the build system */ #ifdef DO_DEPS_ONLY # include <environment.h> diff --git a/include/config_fsl_secboot.h b/include/config_fsl_secboot.h index 050b157..fc6788a 100644 --- a/include/config_fsl_secboot.h +++ b/include/config_fsl_secboot.h @@ -55,6 +55,22 @@ /* For secure boot flow, default environment used will be used */ #if defined(CONFIG_SYS_RAMBOOT) +#ifdef CONFIG_BOOTSCRIPT_COPY_RAM +#define CONFIG_BS_COPY_ENV \ + "setenv bs_hdr_ram " __stringify(CONFIG_BS_HDR_ADDR_RAM)";" \ + "setenv bs_hdr_flash " __stringify(CONFIG_BS_HDR_ADDR_FLASH)";" \ + "setenv bs_hdr_size " __stringify(CONFIG_BS_HDR_SIZE)";" \ + "setenv bs_ram " __stringify(CONFIG_BS_ADDR_RAM)";" \ + "setenv bs_flash " __stringify(CONFIG_BS_ADDR_FLASH)";" \ + "setenv bs_size " __stringify(CONFIG_BS_SIZE)";" + +#if defined(CONFIG_RAMBOOT_NAND) +#define CONFIG_BS_COPY_CMD \ + "nand read $bs_hdr_ram $bs_hdr_flash $bs_hdr_size ;" \ + "nand read $bs_ram $bs_flash $bs_size ;" +#endif /* CONFIG_RAMBOOT_NAND */ +#endif /* CONFIG_BOOTSCRIPT_COPY_RAM */ + #if defined(CONFIG_RAMBOOT_SPIFLASH) #undef CONFIG_ENV_IS_IN_SPI_FLASH #elif defined(CONFIG_RAMBOOT_NAND) @@ -68,6 +84,17 @@ #define CONFIG_ENV_IS_NOWHERE +#ifndef CONFIG_BS_COPY_ENV +#define CONFIG_BS_COPY_ENV +#endif + +#ifndef CONFIG_BS_COPY_CMD +#define CONFIG_BS_COPY_CMD +#endif + +#define CONFIG_SECBOOT_CMD CONFIG_BS_COPY_ENV \ + CONFIG_BS_COPY_CMD \ + CONFIG_SECBOOT /* * We don't want boot delay for secure boot flow * before autoboot starts @@ -75,7 +102,7 @@ #undef CONFIG_BOOTDELAY #define CONFIG_BOOTDELAY 0 #undef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND CONFIG_SECBOOT +#define CONFIG_BOOTCOMMAND CONFIG_SECBOOT_CMD /* * CONFIG_ZERO_BOOTDELAY_CHECK should not be defined for diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index f99663a..bde71fb 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -11,12 +11,6 @@ #ifndef __T1024RDB_H #define __T1024RDB_H -#if defined(CONFIG_T1023RDB) -#ifdef CONFIG_SPL -#define CONFIG_SYS_NO_FLASH -#endif -#endif - /* High Level Configuration Options */ #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_DISPLAY_BOARDINFO @@ -320,7 +314,7 @@ unsigned long get_board_ddr_clk(void); #if defined(CONFIG_T1024RDB) #define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80 #elif defined(CONFIG_T1023RDB) -#define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ +#define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(0) | \ CSOR_NAND_TRHZ_80 | CSOR_NOR_ADM_SHFT_MODE_EN) #endif #define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ @@ -395,7 +389,9 @@ unsigned long get_board_ddr_clk(void); | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) #elif defined(CONFIG_T1023RDB) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_RAL_3 /* RAL 3Bytes */ \ +#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ + | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ + | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL 3Bytes */ \ | CSOR_NAND_PGS_2K /* Page Size = 2K */ \ | CSOR_NAND_SPRZ_128 /* Spare size = 128 */ \ @@ -557,9 +553,8 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 -#define I2C_MUX_PCA_ADDR 0x77 -#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ - +#define I2C_PCA6408_BUS_NUM 1 +#define I2C_PCA6408_ADDR 0x20 /* I2C bus multiplexer */ #define I2C_MUX_CH_DEFAULT 0x8 @@ -757,8 +752,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_DPAA_FMAN +#ifdef CONFIG_T1024RDB #define CONFIG_QE #define CONFIG_U_QE +#endif /* Default address of microcode for the Linux FMan driver */ #if defined(CONFIG_SPIFLASH) /* diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 16d2e0e..e88cad6 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -29,6 +29,14 @@ #ifdef CONFIG_T1042RDB #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg #endif +#ifdef CONFIG_T1040D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1040d4_rcw.cfg +#endif +#ifdef CONFIG_T1042D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg +#endif #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT @@ -220,7 +228,9 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD +#ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_FSL_DDR3 +#endif #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -278,8 +288,23 @@ #define CPLD_LBMAP_DFLTBANK 0x40 /* BANK OR | BANK0 */ #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 -#ifdef CONFIG_T1042RDB_PI + +#if defined(CONFIG_T1042RDB_PI) #define CPLD_DIU_SEL_DFP 0x80 +#elif defined(CONFIG_T1042D4RDB) +#define CPLD_DIU_SEL_DFP 0xc0 +#endif + +#if defined(CONFIG_T1040D4RDB) +#define CPLD_INT_MASK_ALL 0xFF +#define CPLD_INT_MASK_THERM 0x80 +#define CPLD_INT_MASK_DVI_DFP 0x40 +#define CPLD_INT_MASK_QSGMII1 0x20 +#define CPLD_INT_MASK_QSGMII2 0x10 +#define CPLD_INT_MASK_SGMI1 0x08 +#define CPLD_INT_MASK_SGMI2 0x04 +#define CPLD_INT_MASK_TDMR1 0x02 +#define CPLD_INT_MASK_TDMR2 0x01 #endif #define CONFIG_SYS_CPLD_BASE 0xffdf0000 @@ -447,7 +472,7 @@ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#ifdef CONFIG_T1042RDB_PI +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T1042D4RDB) /* Video */ #define CONFIG_FSL_DIU_FB @@ -492,11 +517,11 @@ /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #define I2C_MUX_CH_DEFAULT 0x8 #endif -#ifdef CONFIG_T1042RDB_PI +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) /* LDI/DVI Encoder for display */ #define CONFIG_SYS_I2C_LDI_ADDR 0x38 #define CONFIG_SYS_I2C_DVI_ADDR 0x75 @@ -664,7 +689,7 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #define CONFIG_QE #define CONFIG_U_QE #endif @@ -693,7 +718,7 @@ #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #if defined(CONFIG_SPIFLASH) #define CONFIG_SYS_QE_FW_ADDR 0x130000 #elif defined(CONFIG_SDCARD) @@ -718,17 +743,32 @@ #ifdef CONFIG_FMAN_ENET #if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) -#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 +#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 +#elif defined(CONFIG_T1040D4RDB) || defined(CONFIG_T1042D4RDB) +#define CONFIG_SYS_SGMII1_PHY_ADDR 0x02 +#define CONFIG_SYS_SGMII2_PHY_ADDR 0x03 +#define CONFIG_SYS_SGMII3_PHY_ADDR 0x01 +#endif + +#ifdef CONFIG_T104XD4RDB +#define CONFIG_SYS_RGMII1_PHY_ADDR 0x04 +#define CONFIG_SYS_RGMII2_PHY_ADDR 0x05 +#else +#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 +#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 #endif -#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 -#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 /* Enable VSC9953 L2 Switch driver on T1040 SoC */ -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1040D4RDB) #define CONFIG_VSC9953 #define CONFIG_VSC9953_CMD +#ifdef CONFIG_T1040RDB #define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR 0x04 #define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 0x08 +#else +#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR 0x08 +#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 0x0c +#endif #endif #define CONFIG_MII /* MII PHY management */ @@ -836,6 +876,10 @@ #define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb" #elif defined(CONFIG_T1042RDB) #define FDTFILE "t1042rdb/t1042rdb.dtb" +#elif defined(CONFIG_T1040D4RDB) +#define FDTFILE "t1042rdb/t1040d4rdb.dtb" +#elif defined(CONFIG_T1042D4RDB) +#define FDTFILE "t1042rdb/t1042d4rdb.dtb" #endif #ifdef CONFIG_FSL_DIU_FB diff --git a/include/configs/adp-ag101.h b/include/configs/adp-ag101.h index 4d52ba1..141fc99 100644 --- a/include/configs/adp-ag101.h +++ b/include/configs/adp-ag101.h @@ -9,7 +9,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include <asm/arch/ag101.h> +#include <asm/arch-ag101/ag101.h> /* * CPU and Board Configuration Options diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index 06860b5..4296c6b 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -9,7 +9,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include <asm/arch/ag101.h> +#include <asm/arch-ag101/ag101.h> /* * CPU and Board Configuration Options diff --git a/include/configs/adp-ag102.h b/include/configs/adp-ag102.h index 026696c..0c7573a 100644 --- a/include/configs/adp-ag102.h +++ b/include/configs/adp-ag102.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include <asm/arch/ag102.h> +#include <asm/arch-ag102/ag102.h> /* * CPU and Board Configuration Options diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 035c156..633391b 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -287,7 +287,7 @@ #define CONFIG_MUSB_PIO_ONLY #define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_MUSB_HOST @@ -298,10 +298,11 @@ #ifndef CONFIG_SPL_USBETH_SUPPORT /* Fastboot */ +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 /* To support eMMC booting */ #define CONFIG_STORAGE_EMMC @@ -344,7 +345,7 @@ /* USB Device Firmware Update support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_CMD_DFU #define DFU_ALT_INFO_MMC \ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index b90a60d..e9808a7 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -42,6 +42,8 @@ #define CONFIG_MISC_INIT_R +#define CONFIG_OF_LIBFDT + #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 33e534a..d148169 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -80,7 +80,7 @@ #endif /* Now bring in the rest of the common code. */ -#include <configs/ti_armv7_common.h> +#include <configs/ti_armv7_omap.h> /* Always 64 KiB env size */ #define CONFIG_ENV_SIZE (64 << 10) @@ -110,6 +110,7 @@ #define CONFIG_CMD_USB #define CONFIG_USB_HOST #define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 @@ -127,7 +128,7 @@ #define CONFIG_USB_DWC3_GADGET #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" #define CONFIG_G_DNL_VENDOR_NUM 0x0403 @@ -137,7 +138,7 @@ #ifndef CONFIG_SPL_BUILD /* USB Device Firmware Update support */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_RAM #define CONFIG_CMD_DFU diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index 741fb05..fa32fa4 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -444,7 +444,7 @@ DEFAULT_LINUX_BOOT_ENV \ #define CONFIG_MUSB_PIO_ONLY #define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_MUSB_HOST @@ -455,10 +455,11 @@ DEFAULT_LINUX_BOOT_ENV \ #ifndef CONFIG_SPL_USBETH_SUPPORT /* Fastboot */ +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 /* To support eMMC booting */ #define CONFIG_STORAGE_EMMC @@ -472,7 +473,7 @@ DEFAULT_LINUX_BOOT_ENV \ #ifdef CONFIG_MUSB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE /* USB TI's IDs */ #define CONFIG_G_DNL_VENDOR_NUM 0x0451 @@ -494,7 +495,7 @@ DEFAULT_LINUX_BOOT_ENV \ /* USB Device Firmware Update support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_CMD_DFU #define DFU_ALT_INFO_MMC \ diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index 8f0f7f0..b7c5716 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -108,6 +108,7 @@ * for example. */ #define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION /* version string, parser, etc */ #define CONFIG_VERSION_VARIABLE @@ -133,4 +134,23 @@ #define CONFIG_FAT_WRITE +/* Fastboot and USB OTG */ +#define CONFIG_USB_FUNCTION_FASTBOOT +#define CONFIG_CMD_FASTBOOT +#define CONFIG_FASTBOOT_FLASH +#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - SZ_1M) +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 0 +#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USBID_ADDR 0x34052c46 +#define CONFIG_G_DNL_VENDOR_NUM 0x18d1 /* google */ +#define CONFIG_G_DNL_PRODUCT_NUM 0x0d02 /* nexus one */ +#define CONFIG_G_DNL_MANUFACTURER "Broadcom Corporation" + #endif /* __BCM28155_AP_H */ diff --git a/include/configs/beagle_x15.h b/include/configs/beagle_x15.h index 17fdded..d38b7b5 100644 --- a/include/configs/beagle_x15.h +++ b/include/configs/beagle_x15.h @@ -68,6 +68,7 @@ /* USB xHCI HOST */ #define CONFIG_CMD_USB #define CONFIG_USB_HOST +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index f2f8e2e..ab8d293 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -257,16 +257,16 @@ #define CONFIG_G_DNL_PRODUCT_NUM CONFIG_TRDX_PID_COLIBRI_VF50 /* USB DFU */ -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_CMD_DFU -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_NAND #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) /* USB Storage */ #define CONFIG_USB_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE /* Enable SPI support */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 88750e0..9aaa0f5 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -16,6 +16,14 @@ #include "../board/freescale/common/ics307_clk.h" #ifdef CONFIG_RAMBOOT_PBL +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#ifdef CONFIG_NAND +#define CONFIG_RAMBOOT_NAND +#endif +#define CONFIG_BOOTSCRIPT_COPY_RAM +#else #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg @@ -29,6 +37,7 @@ #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5040ds.cfg #endif #endif +#endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE /* Set 1M boot space */ diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index a429107..739c2bf 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -11,6 +11,7 @@ * High Level Configuration Options (easy to change) */ #define CONFIG_ARMADA_XP /* SOC Family Name */ +#define CONFIG_ARMADA_38X #define CONFIG_DB_88F6820_GP /* Board target name for DDR training */ #define CONFIG_SYS_L2_PL310 @@ -108,6 +109,68 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" +/* SPL */ +/* + * Select the boot device here + * + * Currently supported are: + * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash + * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) + */ +#define SPL_BOOT_SPI_NOR_FLASH 1 +#define SPL_BOOT_SDIO_MMC_CARD 2 +#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH + +/* Defines for SPL */ +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_SIZE (140 << 10) +#define CONFIG_SPL_TEXT_BASE 0x40000030 +#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) + +#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) +#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) + +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ + CONFIG_SPL_BSS_MAX_SIZE) +#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10) + +#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) +#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT + +#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH +/* SPL related SPI defines */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS +#endif + +#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD +/* SPL related MMC defines */ +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 +#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512) +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS ((512 << 10) / 512) /* 512KiB */ +#ifdef CONFIG_SPL_BUILD +#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ +#endif +#endif + +/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ +#define CONFIG_SYS_MVEBU_DDR_A38X +#define CONFIG_DDR3 + /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index c33a588..41e6fdc 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -27,6 +27,7 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_I2C +#define CONFIG_CMD_IDE #define CONFIG_CMD_PING #define CONFIG_CMD_SF #define CONFIG_CMD_SPI @@ -60,6 +61,34 @@ #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ #define CONFIG_SYS_ALT_MEMTEST +/* SATA support */ +#ifdef CONFIG_CMD_IDE +#define __io +#define CONFIG_IDE_PREINIT +#define CONFIG_MVSATA_IDE + +/* Needs byte-swapping for ATA data register */ +#define CONFIG_IDE_SWAP_IO + +#define CONFIG_SYS_ATA_REG_OFFSET 0x0100 /* Offset for register access */ +#define CONFIG_SYS_ATA_DATA_OFFSET 0x0100 /* Offset for data I/O */ +#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 + +/* Each 8-bit ATA register is aligned to a 4-bytes address */ +#define CONFIG_SYS_ATA_STRIDE 4 + +/* CONFIG_CMD_IDE requires some #defines for ATA registers */ +#define CONFIG_SYS_IDE_MAXBUS 2 +#define CONFIG_SYS_IDE_MAXDEVICE CONFIG_SYS_IDE_MAXBUS + +/* ATA registers base is at SATA controller base */ +#define CONFIG_SYS_ATA_BASE_ADDR MVEBU_AXP_SATA_BASE +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x2000 +#define CONFIG_SYS_ATA_IDE1_OFFSET 0x4000 + +#define CONFIG_DOS_PARTITION +#endif /* CONFIG_CMD_IDE */ + /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros @@ -109,7 +138,7 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR +#define CONFIG_SYS_MVEBU_DDR_AXP #define CONFIG_SPD_EEPROM 0x4e #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index d84427d..7499447 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -89,10 +89,11 @@ DFU_ALT_INFO_RAM /* Fastboot */ +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x2F000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x2F000000 #define CONFIG_FASTBOOT_FLASH #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 #endif @@ -175,6 +176,7 @@ #define CONFIG_CMD_USB #define CONFIG_USB_HOST #define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 @@ -189,7 +191,7 @@ #define CONFIG_USB_DWC3_GADGET #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" #define CONFIG_G_DNL_VENDOR_NUM 0x0451 @@ -197,7 +199,7 @@ #define CONFIG_USB_GADGET_DUALSPEED /* USB Device Firmware Update support */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_RAM #define CONFIG_CMD_DFU diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 08e2009..ec1f882 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -28,13 +28,13 @@ #define CONFIG_CMD_GPT /* USB Composite download gadget - g_dnl */ -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* TIZEN THOR downloader support */ #define CONFIG_CMD_THOR_DOWNLOAD -#define CONFIG_THOR_FUNCTION +#define CONFIG_USB_FUNCTION_THOR -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M #define DFU_DEFAULT_POLL_TIMEOUT 300 @@ -57,7 +57,7 @@ #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE /* Common environment variables */ #define CONFIG_EXTRA_ENV_ITB \ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 5476248..e04dec7 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -182,6 +182,7 @@ /* USB */ #define CONFIG_CMD_USB #define CONFIG_USB_STORAGE +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index df1ff43..7c90812 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -200,8 +200,8 @@ /* USB Mass Storage Gadget */ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 /* Netchip IDs */ diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index a28ceb7..4f4ebf5 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -15,19 +15,17 @@ #define CONFIG_K2E_EVM /* U-Boot general configuration */ -#define CONFIG_SYS_PROMPT "K2E EVM # " - #define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ "addr_mon=0x0c140000\0" \ "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \ "root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \ - "name_fdt=uImage-k2e-evm.dtb\0" \ - "name_mon=skern-k2e-evm.bin\0" \ + "name_fdt=k2e-evm.dtb\0" \ + "name_mon=skern-k2e.bin\0" \ "name_ubi=k2e-evm-ubifs.ubi\0" \ "name_uboot=u-boot-spi-k2e-evm.gph\0" \ "name_fs=arago-console-image-k2e-evm.cpio.gz\0" -#include <configs/ks2_evm.h> +#include <configs/ti_armv7_keystone2.h> /* SPL SPI Loader Configuration */ #define CONFIG_SPL_TEXT_BASE 0x0c100000 diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h index eae7721..6c6dcb1 100644 --- a/include/configs/k2hk_evm.h +++ b/include/configs/k2hk_evm.h @@ -15,19 +15,17 @@ #define CONFIG_K2HK_EVM /* U-Boot general configuration */ -#define CONFIG_SYS_PROMPT "K2HK EVM # " - #define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ "addr_mon=0x0c5f0000\0" \ "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \ "root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \ - "name_fdt=uImage-k2hk-evm.dtb\0" \ - "name_mon=skern-k2hk-evm.bin\0" \ + "name_fdt=k2hk-evm.dtb\0" \ + "name_mon=skern-k2hk.bin\0" \ "name_ubi=k2hk-evm-ubifs.ubi\0" \ "name_uboot=u-boot-spi-k2hk-evm.gph\0" \ "name_fs=arago-console-image-k2hk-evm.cpio.gz\0" -#include <configs/ks2_evm.h> +#include <configs/ti_armv7_keystone2.h> /* SPL SPI Loader Configuration */ #define CONFIG_SPL_TEXT_BASE 0x0c200000 diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h index 57da057..9bacfa4 100644 --- a/include/configs/k2l_evm.h +++ b/include/configs/k2l_evm.h @@ -15,19 +15,17 @@ #define CONFIG_K2L_EVM /* U-Boot general configuration */ -#define CONFIG_SYS_PROMPT "K2L EVM # " - #define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ "addr_mon=0x0c140000\0" \ "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \ "root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,4096\0" \ - "name_fdt=uImage-k2l-evm.dtb\0" \ - "name_mon=skern-k2l-evm.bin\0" \ + "name_fdt=k2l-evm.dtb\0" \ + "name_mon=skern-k2l.bin\0" \ "name_ubi=k2l-evm-ubifs.ubi\0" \ "name_uboot=u-boot-spi-k2l-evm.gph\0" \ "name_fs=arago-console-image-k2l-evm.cpio.gz\0" -#include <configs/ks2_evm.h> +#include <configs/ti_armv7_keystone2.h> /* SPL SPI Loader Configuration */ #define CONFIG_SPL_TEXT_BASE 0x0c100000 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 8a5a707..13f9338 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -9,6 +9,8 @@ #define CONFIG_LS102XA +#define CONFIG_ARMV7_PSCI + #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_DISPLAY_CPUINFO @@ -430,19 +432,31 @@ unsigned long get_board_ddr_clk(void); /* * USB */ -#define CONFIG_HAS_FSL_DR_USB +/* EHCI Support - disbaled by default */ +/*#define CONFIG_HAS_FSL_DR_USB*/ #ifdef CONFIG_HAS_FSL_DR_USB #define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#endif + +/*XHCI Support - enabled by default*/ +#define CONFIG_HAS_FSL_XHCI_USB -#ifdef CONFIG_USB_EHCI +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_XHCI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) #define CONFIG_CMD_USB #define CONFIG_USB_STORAGE -#define CONFIG_USB_EHCI_FSL -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_CMD_EXT2 #endif -#endif /* * Video diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 233b3d0..cf2aaa3 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -9,6 +9,8 @@ #define CONFIG_LS102XA +#define CONFIG_ARMV7_PSCI + #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_DISPLAY_CPUINFO @@ -26,6 +28,44 @@ #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE /* + * USB + */ + +/* + * EHCI Support - disbaled by default as + * there is no signal coming out of soc on + * this board for this controller. However, + * the silicon still has this controller, + * and anyone can use this controller by + * taking signals out on their board. + */ + +/*#define CONFIG_HAS_FSL_DR_USB*/ + +#ifdef CONFIG_HAS_FSL_DR_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#endif + +/* XHCI Support - enabled by default */ +#define CONFIG_HAS_FSL_XHCI_USB + +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_XHCI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 +#endif + +/* * Generic Timer Definitions */ #define GENERIC_TIMER_CLK 12500000 diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 72ba3b3..5afee55 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -19,6 +19,7 @@ #define CONFIG_ARM_ERRATA_828024 #define CONFIG_ARM_ERRATA_826974 +#include <asm/arch-fsl-lsch3/ls2085a_stream_id.h> #include <asm/arch-fsl-lsch3/config.h> #if (defined(CONFIG_SYS_FSL_SRDS_1) || defined(CONFIG_SYS_FSL_SRDS_2)) #define CONFIG_SYS_HAS_SERDES @@ -163,21 +164,30 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_NAND_BASE_PHYS 0x30000000 /* Debug Server firmware */ -#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_FSL_DEBUG_SERVER /* 2 sec timeout */ #define CONFIG_SYS_DEBUG_SERVER_TIMEOUT (2 * 1000 * 1000) /* MC firmware */ #define CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) /* TODO Actual DPL max length needs to be confirmed with the MC FW team */ #define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 +#define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000 +#define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000 -/* Carve out a DDR region which will not be used by u-boot/Linux */ +/* + * Carve out a DDR region which will not be used by u-boot/Linux + * + * It will be used by MC and Debug Server. The MC region must be + * 512MB aligned, so the min size to hide is 512MB. + */ #if defined(CONFIG_FSL_MC_ENET) || defined(CONFIG_FSL_DEBUG_SERVER) +#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) +#define CONFIG_SYS_MEM_TOP_HIDE_MIN (512UL * 1024 * 1024) #define CONFIG_SYS_MEM_TOP_HIDE get_dram_size_to_hide() #endif @@ -186,7 +196,8 @@ unsigned long long get_qixis_addr(void); #define CONFIG_PCIE2 /* PCIE controler 2 */ #define CONFIG_PCIE3 /* PCIE controler 3 */ #define CONFIG_PCIE4 /* PCIE controler 4 */ -#define FSL_PCIE_COMPAT "fsl,20851a-pcie" +#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ +#define FSL_PCIE_COMPAT "fsl,ls2085a-pcie" #define CONFIG_SYS_PCI_64BIT @@ -236,13 +247,13 @@ unsigned long long get_qixis_addr(void); "initrd_high=0xffffffffffffffff\0" \ "kernel_start=0x581200000\0" \ "kernel_load=0xa0000000\0" \ - "kernel_size=0x1000000\0" \ + "kernel_size=0x2800000\0" \ "console=ttyAMA0,38400n8\0" #define CONFIG_BOOTARGS "console=ttyS1,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0600,115200 " \ - "default_hugepagesz=2m hugepagesz=2m " \ - "hugepages=16" + "ramdisk_size=0x2000000 default_hugepagesz=2m" \ + " hugepagesz=2m hugepages=16" #define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ "$kernel_size && bootm $kernel_load" #define CONFIG_BOOTDELAY 10 @@ -289,4 +300,7 @@ unsigned long get_dram_size_to_hide(void); #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ + + #endif /* __LS2_COMMON_H */ diff --git a/include/configs/ls2085aqds.h b/include/configs/ls2085aqds.h index e488ac8..a6ef356 100644 --- a/include/configs/ls2085aqds.h +++ b/include/configs/ls2085aqds.h @@ -9,9 +9,6 @@ #include "ls2085a_common.h" -#define CONFIG_IDENT_STRING " LS2085A-QDS" -#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-QDS" - #define CONFIG_DISPLAY_BOARDINFO #ifndef __ASSEMBLY__ @@ -263,6 +260,8 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_LS_MC_DPC_ADDR 0x580800000ULL #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR +#define CONFIG_SYS_LS_MC_AIOP_IMG_ADDR 0x580900000ULL /* * I2C @@ -273,6 +272,15 @@ unsigned long get_board_ddr_clk(void); /* I2C bus multiplexer */ #define I2C_MUX_CH_DEFAULT 0x8 +/* SPI */ +#ifdef CONFIG_FSL_DSPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_EON +#endif + /* * MMC */ @@ -287,6 +295,7 @@ unsigned long get_board_ddr_clk(void); #define RTC #define CONFIG_RTC_DS3231 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_CMD_DATE /* EEPROM */ #define CONFIG_ID_EEPROM @@ -332,7 +341,7 @@ unsigned long get_board_ddr_clk(void); "initrd_high=0xffffffffffffffff\0" \ "kernel_start=0x581100000\0" \ "kernel_load=0xa0000000\0" \ - "kernel_size=0x1000000\0" + "kernel_size=0x28000000\0" #ifdef CONFIG_FSL_MC_ENET #define CONFIG_FSL_MEMAC diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h index 600261e..41eb55b 100644 --- a/include/configs/ls2085ardb.h +++ b/include/configs/ls2085ardb.h @@ -8,8 +8,6 @@ #define __LS2_RDB_H #include "ls2085a_common.h" -#define CONFIG_IDENT_STRING " LS2085A-RDB" -#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-RDB" #undef CONFIG_CONS_INDEX #define CONFIG_CONS_INDEX 2 @@ -30,8 +28,8 @@ unsigned long get_board_sys_clk(void); #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 -#define SPD_EEPROM_ADDRESS3 0x54 -#define SPD_EEPROM_ADDRESS4 0x53 /* Board error */ +#define SPD_EEPROM_ADDRESS3 0x53 +#define SPD_EEPROM_ADDRESS4 0x54 #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 @@ -235,22 +233,33 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_LS_MC_DPC_ADDR 0x580800000ULL #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR +#define CONFIG_SYS_LS_MC_AIOP_IMG_ADDR 0x580900000ULL /* * I2C */ -#define I2C_MUX_PCA_ADDR 0x77 -#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ +#define I2C_MUX_PCA_ADDR 0x75 +#define I2C_MUX_PCA_ADDR_PRI 0x75 /* Primary Mux*/ /* I2C bus multiplexer */ #define I2C_MUX_CH_DEFAULT 0x8 +/* SPI */ +#ifdef CONFIG_FSL_DSPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_BAR +#endif + /* * RTC configuration */ #define RTC #define CONFIG_RTC_DS3231 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_CMD_DATE /* EEPROM */ #define CONFIG_ID_EEPROM @@ -284,6 +293,8 @@ unsigned long get_board_sys_clk(void); #define CONFIG_DOS_PARTITION #endif +#define CONFIG_MISC_INIT_R + /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -296,6 +307,30 @@ unsigned long get_board_sys_clk(void); "initrd_high=0xffffffffffffffff\0" \ "kernel_start=0x581100000\0" \ "kernel_load=0xa0000000\0" \ - "kernel_size=0x1000000\0" + "kernel_size=0x2800000\0" + +/* MAC/PHY configuration */ +#ifdef CONFIG_FSL_MC_ENET +#define CONFIG_PHYLIB_10G +#define CONFIG_PHY_CORTINA +#define CONFIG_PHYLIB +#define CONFIG_SYS_CORTINA_FW_IN_NOR +#define CONFIG_CORTINA_FW_ADDR 0x581000000 +#define CONFIG_CORTINA_FW_LENGTH 0x40000 + +#define CORTINA_PHY_ADDR1 0x10 +#define CORTINA_PHY_ADDR2 0x11 +#define CORTINA_PHY_ADDR3 0x12 +#define CORTINA_PHY_ADDR4 0x13 +#define AQ_PHY_ADDR1 0x00 +#define AQ_PHY_ADDR2 0x01 +#define AQ_PHY_ADDR3 0x02 +#define AQ_PHY_ADDR4 0x03 + +#define CONFIG_MII +#define CONFIG_ETHPRIME "DPNI1" +#define CONFIG_PHY_GIGE +#define CONFIG_PHY_AQUANTIA +#endif #endif /* __LS2_RDB_H */ diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 4826044..0fb117f 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -108,7 +108,7 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR +#define CONFIG_SYS_MVEBU_DDR_AXP #define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index af36ac5..4781e79 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -60,9 +60,6 @@ #define CONFIG_FIT_SIGNATURE #define CONFIG_RSA -/* Avoid a warning in the Realtek Ethernet driver */ -#define CONFIG_SYS_CACHELINE_SIZE 16 - #define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_OFFSET 0x007fe000 diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index b654fff..b90de14 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -95,7 +95,7 @@ #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ /* ====> Include platform Common Definitions */ #include <asm/arch/config.h> diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 6722c9d..6a57841 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -231,8 +231,8 @@ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 2e81ad4..dd4cb0f 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -332,8 +332,8 @@ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 /* Netchip IDs */ @@ -341,9 +341,10 @@ #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 #define CONFIG_G_DNL_MANUFACTURER "Boundary" +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 #endif /* __CONFIG_H */ diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index efc583f..6e3ce4d 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -109,7 +109,7 @@ /* USB */ #define CONFIG_MUSB_UDC -#define CONFIG_MUSB_HDC +#define CONFIG_MUSB_HCD #define CONFIG_USB_OMAP3 #define CONFIG_TWL4030_USB diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index cf17f3d..8d5c736 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -60,10 +60,10 @@ #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601 #define CONFIG_G_DNL_MANUFACTURER "Samsung" -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* DFU */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_CMD_DFU #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M @@ -72,13 +72,13 @@ /* THOR */ #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D -#define CONFIG_THOR_FUNCTION +#define CONFIG_USB_FUNCTION_THOR #define CONFIG_CMD_THOR_DOWNLOAD /* UMS */ #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE /* FIXME: MUST BE REMOVED AFTER TMU IS TURNED ON */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index e574742..804e307 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -68,14 +68,15 @@ #define CONFIG_USB_ETHER_RNDIS #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_VBUS_DRAW 0 -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_G_DNL_VENDOR_NUM 0x0451 #define CONFIG_G_DNL_PRODUCT_NUM 0xd022 #define CONFIG_G_DNL_MANUFACTURER "TI" +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 /* USB EHCI */ #define CONFIG_CMD_USB diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 76bf3b6..a1a90ec 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -105,7 +105,7 @@ "defaultdisplay=dvi\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext3 rootwait\0" \ + "mmcrootfstype=ext4 rootwait\0" \ "nandroot=ubi0:rootfs ubi.mtd=4\0" \ "nandrootfstype=ubifs\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ diff --git a/include/configs/p2571.h b/include/configs/p2571.h new file mode 100644 index 0000000..77faf5f --- /dev/null +++ b/include/configs/p2571.h @@ -0,0 +1,75 @@ +/* + * (C) Copyright 2013-2015 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _P2571_H +#define _P2571_H + +#include <linux/sizes.h> + +/* enable PMIC */ +#define CONFIG_MAX77620_POWER + +#include "tegra210-common.h" + +/* High-level configuration options */ +#define V_PROMPT "Tegra210 (P2571) # " +#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2571" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +/* I2C */ +#define CONFIG_SYS_I2C_TEGRA +#define CONFIG_CMD_I2C + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC + +/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) + +/* SPI */ +#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ +#define CONFIG_TEGRA114_SPI_CTRLS 6 +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 24000000 +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_SIZE (4 << 20) + +/* USB2.0 Host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB + +/* USB networking support */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX + +/* General networking support */ +#define CONFIG_CMD_DHCP + +/* + * TODO(twarren@nvidia.com) - add tegra-common-usb-gadget.h back + * breaks 64-bit build in ci_udc.c + */ +#include "tegra-common-post.h" + +#define COUNTER_FREQUENCY 38400000 + +#endif /* _P2571_H */ diff --git a/include/configs/pepper.h b/include/configs/pepper.h index 16149f6..0bdcf22 100644 --- a/include/configs/pepper.h +++ b/include/configs/pepper.h @@ -41,7 +41,7 @@ "optargs=\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext3 rootwait\0" \ + "mmcrootfstype=ext4 rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ "${optargs} " \ "root=${mmcroot} " \ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 7994ecf..235bba5 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -68,15 +68,15 @@ #define CONFIG_CMD_GPT /* USB Composite download gadget - g_dnl */ -#define CONFIG_USBDOWNLOAD_GADGET -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M #define DFU_DEFAULT_POLL_TIMEOUT 300 /* TIZEN THOR downloader support */ #define CONFIG_CMD_THOR_DOWNLOAD -#define CONFIG_THOR_FUNCTION +#define CONFIG_USB_FUNCTION_THOR /* USB Samsung's IDs */ #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 @@ -275,7 +275,7 @@ #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_OF_LIBFDT diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index e5fd147..f7bef70 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -133,7 +133,7 @@ #define CONFIG_I2C #define CONFIG_CMD_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED OMAP_I2C_STANDARD +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 #define CONFIG_SYS_I2C_OMAP24XX @@ -249,7 +249,7 @@ #endif /* CONFIG_MUSB_GADGET */ #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* USB DRACO ID as default */ #define CONFIG_USBD_HS @@ -258,7 +258,7 @@ #define CONFIG_G_DNL_MANUFACTURER "Siemens AG" /* USB Device Firmware Update support */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_NAND #define CONFIG_CMD_DFU #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 << 20) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 4c3366a..e8473b8 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -243,10 +243,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_USB_GADGET_VBUS_DRAW 2 /* USB Composite download gadget - g_dnl */ -#define CONFIG_USBDOWNLOAD_GADGET -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USB_FUNCTION_MASS_STORAGE -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 1b4fd21..1ac3db6 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -15,6 +15,7 @@ #define CONFIG_OF_LIBFDT #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R #define CONFIG_SYS_FLASH_BASE 0x08000000 @@ -61,6 +62,8 @@ #define CONFIG_STM32_HSE_HZ 8000000 +#define CONFIG_SYS_CLK_FREQ 180000000 /* 180 MHz */ + #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define CONFIG_CMDLINE_TAG @@ -80,7 +83,7 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTARGS \ - "console=ttystm0,115200 earlyprintk consoleblank=0 ignore_loglevel" + "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" #define CONFIG_BOOTCOMMAND \ "run bootcmd_romfs" diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 9576bc1..5adcc39 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -330,11 +330,6 @@ extern int soft_i2c_gpio_scl; #define CONFIG_MUSB_PIO_ONLY #endif -#if defined CONFIG_USB_EHCI || defined CONFIG_USB_MUSB_SUNXI -#define CONFIG_CMD_USB -#define CONFIG_USB_STORAGE -#endif - #ifdef CONFIG_USB_KEYBOARD #define CONFIG_CONSOLE_MUX #define CONFIG_PREBOOT diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 5bc1209..14985f8 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -133,10 +133,10 @@ #define CONFIG_CI_UDC #define CONFIG_USBD_HS #define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 0 -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_G_DNL_VENDOR_NUM 0x0525 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 #define CONFIG_G_DNL_MANUFACTURER "TBS" diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 483222f..e67ff7b 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -62,11 +62,19 @@ #define CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS #endif +#ifdef CONFIG_ARM64 +#define FDT_HIGH "ffffffffffffffff" +#define INITRD_HIGH "ffffffffffffffff" +#else +#define FDT_HIGH "ffffffff" +#define INITRD_HIGH "ffffffff" +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ - "fdt_high=ffffffff\0" \ - "initrd_high=ffffffff\0" \ + "fdt_high=" FDT_HIGH "\0" \ + "initrd_high=" INITRD_HIGH "\0" \ BOOTENV \ BOARD_EXTRA_ENV_SETTINGS \ CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS diff --git a/include/configs/tegra-common-usb-gadget.h b/include/configs/tegra-common-usb-gadget.h index 287460c..d70a4e7 100644 --- a/include/configs/tegra-common-usb-gadget.h +++ b/include/configs/tegra-common-usb-gadget.h @@ -18,12 +18,12 @@ #define CONFIG_G_DNL_VENDOR_NUM 0x0955 #define CONFIG_G_DNL_PRODUCT_NUM 0x701A #define CONFIG_G_DNL_MANUFACTURER "NVIDIA" -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* USB mass storage protocol */ -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE /* DFU protocol */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 * 1024 * 1024) #define CONFIG_CMD_DFU #ifdef CONFIG_MMC diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 7b4c0d7..ffe167e 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -18,8 +18,11 @@ #include <asm/arch/tegra.h> /* get chip and board defs */ +/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */ +#ifndef CONFIG_ARM64 #define CONFIG_SYS_TIMER_RATE 1000000 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE +#endif /* * Display CPU and Board information @@ -43,7 +46,9 @@ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ #endif +#ifndef CONFIG_ARM64 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ +#endif /* * NS16550 Configuration @@ -101,9 +106,11 @@ #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) +#ifndef CONFIG_ARM64 #ifndef CONFIG_SPL_BUILD #define CONFIG_USE_ARCH_MEMCPY #endif +#endif /*----------------------------------------------------------------------- * Physical Memory Map diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 1aee5c8..af7698d 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -26,7 +26,7 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_SYS_TEXT_BASE 0x8010E000 +#define CONFIG_SYS_TEXT_BASE 0x80110000 /* * Memory layout for where various images get loaded by boot scripts: diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h new file mode 100644 index 0000000..0348d47 --- /dev/null +++ b/include/configs/tegra210-common.h @@ -0,0 +1,76 @@ +/* + * (C) Copyright 2013-2015 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _TEGRA210_COMMON_H_ +#define _TEGRA210_COMMON_H_ + +#include "tegra-common.h" + +/* Cortex-A57 uses a cache line size of 64 bytes */ +#define CONFIG_SYS_CACHELINE_SIZE 64 + +/* + * NS16550 Configuration + */ +#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ + +/* + * Miscellaneous configurable options + */ +#define CONFIG_STACKBASE 0x82800000 /* 40MB */ + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_SYS_TEXT_BASE 0x8010E000 + +/* Generic Interrupt Controller */ +#define CONFIG_GICV2 + +/* + * Memory layout for where various images get loaded by boot scripts: + * + * scriptaddr can be pretty much anywhere that doesn't conflict with something + * else. Put it above BOOTMAPSZ to eliminate conflicts. + * + * pxefile_addr_r can be pretty much anywhere that doesn't conflict with + * something else. Put it above BOOTMAPSZ to eliminate conflicts. + * + * kernel_addr_r must be within the first 128M of RAM in order for the + * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will + * decompress itself to 0x8000 after the start of RAM, kernel_addr_r + * should not overlap that area, or the kernel will have to copy itself + * somewhere else before decompression. Similarly, the address of any other + * data passed to the kernel shouldn't overlap the start of RAM. Pushing + * this up to 16M allows for a sizable kernel to be decompressed below the + * compressed load address. + * + * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for + * the compressed kernel to be up to 16M too. + * + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * for the FDT/DTB to be up to 1M, which is hopefully plenty. + */ +#define CONFIG_LOADADDR 0x81000000 +#define MEM_LAYOUT_ENV_SETTINGS \ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "fdt_addr_r=0x82000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +/* Defines for SPL */ +#define CONFIG_SPL_TEXT_BASE 0x80108000 +#define CONFIG_SYS_SPL_MALLOC_START 0x80090000 +#define CONFIG_SPL_STACK 0x800ffffc + +/* For USB EHCI controller */ +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 + +#endif /* _TEGRA210_COMMON_H_ */ diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 4d2ae28..9697431 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -94,6 +94,6 @@ #endif /* Now bring in the rest of the common code. */ -#include <configs/ti_armv7_common.h> +#include <configs/ti_armv7_omap.h> #endif /* __CONFIG_TI_AM335X_COMMON_H__ */ diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 0aea7d1..6dc5ebd 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -18,8 +18,6 @@ #define __CONFIG_TI_ARMV7_COMMON_H__ /* Common define for many platforms. */ -#define CONFIG_OMAP -#define CONFIG_OMAP_COMMON #define CONFIG_SYS_GENERIC_BOARD /* @@ -76,8 +74,11 @@ #define CONFIG_NR_DRAM_BANKS 1 #endif #define CONFIG_SYS_SDRAM_BASE 0x80000000 + +#ifndef CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ GENERATED_GBL_DATA_SIZE) +#endif /* Timer information. */ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ @@ -86,39 +87,20 @@ #define CONFIG_I2C #define CONFIG_CMD_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_OMAP24XX /* MMC/SD IP block */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_CMD_MMC /* McSPI IP block */ #define CONFIG_SPI -#define CONFIG_OMAP3_SPI #define CONFIG_CMD_SPI /* GPIO block */ -#define CONFIG_OMAP_GPIO #define CONFIG_CMD_GPIO /* - * GPMC NAND block. We support 1 device and the physical address to - * access CS0 at is 0x8000000. - */ -#ifdef CONFIG_NAND -#define CONFIG_NAND_OMAP_GPMC -#ifndef CONFIG_SYS_NAND_BASE -#define CONFIG_SYS_NAND_BASE 0x8000000 -#endif -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_CMD_NAND -#endif - -/* * The following are general good-enough settings for U-Boot. We set a * large malloc pool as we generally have a lot of DDR, and we opt for * function over binary size in the main portion of U-Boot as this is @@ -161,7 +143,7 @@ * mtdparts, both for ease of use in U-Boot and for passing information * on to the Linux kernel. */ -#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND) +#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND) || defined(CONFIG_NAND_DAVINCI) #define CONFIG_MTD_DEVICE /* Required for mtdparts */ #define CONFIG_CMD_MTDPARTS #endif @@ -252,15 +234,14 @@ #define CONFIG_SPL_EXT_SUPPORT #endif -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ -#endif +#define CONFIG_SYS_THUMB_BUILD /* General parts of the framework, required. */ #define CONFIG_SPL_I2C_SUPPORT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_BOARD_INIT diff --git a/include/configs/ks2_evm.h b/include/configs/ti_armv7_keystone2.h index e05d56c..2b6a229 100644 --- a/include/configs/ks2_evm.h +++ b/include/configs/ti_armv7_keystone2.h @@ -14,10 +14,7 @@ /* U-Boot Build Configuration */ #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */ -#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */ -#define CONFIG_SYS_CONSOLE_INFO_QUIET #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_SYS_THUMB_BUILD /* SoC Configuration */ #define CONFIG_ARCH_CPU_INIT @@ -28,11 +25,9 @@ /* Memory Configuration */ #define CONFIG_NR_DRAM_BANKS 2 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000 #define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */ #define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */ -#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4 MiB */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \ GENERATED_GBL_DATA_SIZE) @@ -49,15 +44,10 @@ #define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \ CONFIG_SYS_SPL_MALLOC_SIZE + \ CONFIG_SPL_STACK_SIZE - 4) -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO -#define CONFIG_SPL_FRAMEWORK /* UART Configuration */ #define CONFIG_SYS_NS16550 @@ -68,13 +58,10 @@ #define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE #define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6) #define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 /* SPI Configuration */ -#define CONFIG_SPI #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_DAVINCI_SPI -#define CONFIG_CMD_SPI #define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_CLK1_6) #define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED @@ -148,7 +135,6 @@ #define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE /* I2C Configuration */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_DAVINCI #define CONFIG_SYS_DAVINCI_I2C_SPEED 100000 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */ @@ -185,7 +171,6 @@ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x100000 #define CONFIG_MTD_PARTITIONS -#define CONFIG_MTD_DEVICE #define CONFIG_RBTREE #define CONFIG_LZO #define MTDIDS_DEFAULT "nand0=davinci_nand.0" @@ -195,10 +180,9 @@ /* USB Configuration */ #define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI_KEYSTONE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 -#define CONFIG_USB_STORAGE -#define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION #define CONFIG_FS_FAT #define CONFIG_SYS_CACHELINE_SIZE 64 @@ -208,65 +192,46 @@ #define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE /* U-Boot command configuration */ -#define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP -#define CONFIG_CMD_I2C #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#define CONFIG_CMD_MTDPARTS #define CONFIG_CMD_NAND #define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS #define CONFIG_CMD_SF #define CONFIG_CMD_EEPROM #define CONFIG_CMD_USB -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FS_GENERIC /* U-Boot general configuration */ -#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_MISC_INIT_R -#define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_PBSIZE 2048 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_LONGHELP #define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC -#define CONFIG_CMDLINE_EDITING -#define CONFIG_VERSION_VARIABLE #define CONFIG_TIMESTAMP /* EDMA3 */ #define CONFIG_TI_EDMA3 -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTFILE "uImage" #define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ "boot=ubi\0" \ "tftp_root=/\0" \ "nfs_root=/export\0" \ "mem_lpae=1\0" \ "mem_reserve=512M\0" \ - "addr_fdt=0x87000000\0" \ - "addr_kern=0x88000000\0" \ - "addr_uboot=0x87000000\0" \ - "addr_fs=0x82000000\0" \ "addr_ubi=0x82000000\0" \ "addr_secdb_key=0xc000000\0" \ - "fdt_high=0xffffffff\0" \ - "name_kern=uImage-keystone-evm.bin\0" \ + "name_kern=zImage\0" \ "run_mon=mon_install ${addr_mon}\0" \ - "run_kern=bootm ${addr_kern} - ${addr_fdt}\0" \ + "run_kern=bootz ${loadaddr} - ${fdtaddr}\0" \ "init_net=run args_all args_net\0" \ "init_ubi=run args_all args_ubi; " \ "ubi part ubifs; ubifsmount ubi:boot;" \ "ubifsload ${addr_secdb_key} securedb.key.bin;\0" \ - "get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \ - "get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0" \ - "get_kern_net=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \ - "get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0" \ + "get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \ + "get_fdt_ubi=ubifsload ${fdtaddr} ${name_fdt}\0" \ + "get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \ + "get_kern_ubi=ubifsload ${loadaddr} ${name_kern}\0" \ "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \ "get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0" \ "get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0" \ @@ -279,10 +244,10 @@ "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \ "${nfs_options} ip=dhcp\0" \ "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \ - "get_fdt_ramfs=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \ - "get_kern_ramfs=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \ + "get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \ + "get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \ "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \ - "get_fs_ramfs=dhcp ${addr_fs} ${tftp_root}/${name_fs}\0" \ + "get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0" \ "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \ "burn_ubi=nand erase.part ubifs; " \ "nand write ${addr_ubi} ubifs ${filesize}\0" \ @@ -301,15 +266,26 @@ #define CONFIG_BOOTARGS \ /* Linux interfacing */ -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP -#define CONFIG_SYS_BARGSIZE 1024 -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x08000000) -#define CONFIG_LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100) -#define CONFIG_SUPPORT_RAW_INITRD +/* Now for the remaining common defines */ +#include <configs/ti_armv7_common.h> + +/* We wont be loading up OS from SPL for now.. */ +#undef CONFIG_SPL_OS_BOOT + +/* We do not have MMC support.. yet.. */ +#undef CONFIG_SPL_LIBDISK_SUPPORT +#undef CONFIG_SPL_MMC_SUPPORT +#undef CONFIG_SPL_FAT_SUPPORT +#undef CONFIG_SPL_EXT_SUPPORT +#undef CONFIG_MMC +#undef CONFIG_GENERIC_MMC +#undef CONFIG_CMD_MMC + +/* And no support for GPIO, yet.. */ +#undef CONFIG_SPL_GPIO_SUPPORT +#undef CONFIG_CMD_GPIO /* we may include files below only after all above definitions */ #include <asm/arch/hardware.h> diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h new file mode 100644 index 0000000..7548170 --- /dev/null +++ b/include/configs/ti_armv7_omap.h @@ -0,0 +1,49 @@ +/* + * ti_armv7_omap.h + * + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + * + * The various ARMv7 SoCs from TI all share a number of IP blocks when + * implementing a given feature. This is meant to isolate the features + * that are based on OMAP architecture. + */ +#ifndef __CONFIG_TI_ARMV7_OMAP_H__ +#define __CONFIG_TI_ARMV7_OMAP_H__ + +/* Common defines for all OMAP architecture based SoCs */ +#define CONFIG_OMAP +#define CONFIG_OMAP_COMMON + +/* I2C IP block */ +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_OMAP24XX + +/* MMC/SD IP block */ +#define CONFIG_OMAP_HSMMC + +/* SPI IP Block */ +#define CONFIG_OMAP3_SPI + +/* GPIO block */ +#define CONFIG_OMAP_GPIO + +/* + * GPMC NAND block. We support 1 device and the physical address to + * access CS0 at is 0x8000000. + */ +#ifdef CONFIG_NAND +#define CONFIG_NAND_OMAP_GPMC +#ifndef CONFIG_SYS_NAND_BASE +#define CONFIG_SYS_NAND_BASE 0x8000000 +#endif +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_CMD_NAND +#endif + +/* Now for the remaining common defines */ +#include <configs/ti_armv7_common.h> + +#endif /* __CONFIG_TI_ARMV7_OMAP_H__ */ diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 429b109..be231a5 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -84,6 +84,6 @@ #endif /* Now bring in the rest of the common code. */ -#include <configs/ti_armv7_common.h> +#include <configs/ti_armv7_omap.h> #endif /* __CONFIG_TI_OMAP3_COMMON_H__ */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index e966134..b299aed 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -52,7 +52,7 @@ #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS #endif -#include <configs/ti_armv7_common.h> +#include <configs/ti_armv7_omap.h> /* * Hardware drivers @@ -171,6 +171,7 @@ /* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */ #undef CONFIG_SYS_I2C #undef CONFIG_SYS_I2C_OMAP24XX +#undef CONFIG_SPL_I2C_SUPPORT #endif #endif /* __CONFIG_TI_OMAP4_COMMON_H */ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index f3e5a75..fe04692 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -40,14 +40,12 @@ #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS #endif -#ifndef CONFIG_SPL_BUILD #define CONFIG_PALMAS_POWER -#endif #include <asm/arch/cpu.h> #include <asm/arch/omap.h> -#include <configs/ti_armv7_common.h> +#include <configs/ti_armv7_omap.h> /* * Hardware drivers @@ -135,7 +133,7 @@ "if test ${dofastboot} -eq 1; then " \ "echo Boot fastboot requested, resetting dofastboot ...;" \ "setenv dofastboot 0; saveenv;" \ - "echo Booting into fastboot ...; fastboot;" \ + "echo Booting into fastboot ...; fastboot 0;" \ "fi;" \ "run findfdt; " \ "run mmcboot;" \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 5c7a342..908be26 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -9,15 +9,18 @@ #ifndef __CONFIG_UNIPHIER_COMMON_H__ #define __CONFIG_UNIPHIER_COMMON_H__ -#if defined(CONFIG_MACH_PH1_PRO4) +#if defined(CONFIG_MACH_PH1_SLD3) #define CONFIG_DDR_NUM_CH0 2 -#define CONFIG_DDR_NUM_CH1 2 +#define CONFIG_DDR_NUM_CH1 1 +#define CONFIG_DDR_NUM_CH2 1 /* Physical start address of SDRAM */ #define CONFIG_SDRAM0_BASE 0x80000000 #define CONFIG_SDRAM0_SIZE 0x20000000 -#define CONFIG_SDRAM1_BASE 0xa0000000 +#define CONFIG_SDRAM1_BASE 0xc0000000 #define CONFIG_SDRAM1_SIZE 0x20000000 +#define CONFIG_SDRAM2_BASE 0xc0000000 +#define CONFIG_SDRAM2_SIZE 0x10000000 #endif #if defined(CONFIG_MACH_PH1_LD4) @@ -31,6 +34,17 @@ #define CONFIG_SDRAM1_SIZE 0x10000000 #endif +#if defined(CONFIG_MACH_PH1_PRO4) +#define CONFIG_DDR_NUM_CH0 2 +#define CONFIG_DDR_NUM_CH1 2 + +/* Physical start address of SDRAM */ +#define CONFIG_SDRAM0_BASE 0x80000000 +#define CONFIG_SDRAM0_SIZE 0x20000000 +#define CONFIG_SDRAM1_BASE 0xa0000000 +#define CONFIG_SDRAM1_SIZE 0x20000000 +#endif + #if defined(CONFIG_MACH_PH1_SLD8) #define CONFIG_DDR_NUM_CH0 1 #define CONFIG_DDR_NUM_CH1 1 @@ -177,8 +191,13 @@ #define CONFIG_NAND_DENALI_ECC_SIZE 1024 +#ifdef CONFIG_MACH_PH1_SLD3 +#define CONFIG_SYS_NAND_REGS_BASE 0xf8100000 +#define CONFIG_SYS_NAND_DATA_BASE 0xf8000000 +#else #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 +#endif #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) @@ -209,7 +228,6 @@ #define CONFIG_LOADADDR 0x84000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_BOOTFILE "fit.itb" #define CONFIG_CMDLINE_EDITING /* add command line history */ @@ -222,25 +240,61 @@ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ "tftpboot; bootm;" -#define CONFIG_BOOTARGS " user_debug=0x1f init=/sbin/init" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "image_offset=0x00080000\0" \ - "image_size=0x00f00000\0" \ - "verify=n\0" \ - "nandupdate=nand erase 0 0x100000 &&" \ - "tftpboot u-boot-spl.bin &&" \ - "nand write $loadaddr 0 0x10000 &&" \ - "tftpboot u-boot-dtb.img &&" \ - "nand write $loadaddr 0x10000 0xf0000\0" \ - "norboot=run add_default_bootargs &&" \ - "bootm $image_offset\0" \ - "nandboot=run add_default_bootargs &&" \ - "nand read $loadaddr $image_offset $image_size &&" \ - "bootm\0" \ - "add_default_bootargs=setenv bootargs $bootargs" \ - " console=ttyS0,$baudrate\0" \ +#define CONFIG_BOOTARGS " earlyprintk loglevel=8" + +#ifdef CONFIG_FIT +#define CONFIG_BOOTFILE "fitImage" +#define LINUXBOOT_ENV_SETTINGS \ + "fit_addr=0x00100000\0" \ + "fit_addr_r=0x84100000\0" \ + "fit_size=0x00f00000\0" \ + "norboot=run add_default_bootargs &&" \ + "bootm $fit_addr\0" \ + "nandboot=run add_default_bootargs &&" \ + "nand read $fit_addr_r $fit_addr $fit_size &&" \ + "bootm $fit_addr_r\0" \ + "tftpboot=run add_default_bootargs &&" \ + "tftpboot $fit_addr_r $bootfile &&" \ + "bootm $fit_addr_r\0" +#else +#define CONFIG_BOOTFILE "uImage" +#define LINUXBOOT_ENV_SETTINGS \ + "fdt_addr=0x00100000\0" \ + "fdt_addr_r=0x84100000\0" \ + "fdt_size=0x00008000\0" \ + "fdt_file=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "kernel_addr=0x00200000\0" \ + "kernel_addr_r=0x84200000\0" \ + "kernel_size=0x00800000\0" \ + "ramdisk_addr=0x00a00000\0" \ + "ramdisk_addr_r=0x84a00000\0" \ + "ramdisk_size=0x00600000\0" \ + "ramdisk_file=rootfs.cpio.uboot\0" \ + "norboot=run add_default_bootargs &&" \ + "bootm $kernel_addr $ramdisk_addr $fdt_addr\0" \ + "nandboot=run add_default_bootargs &&" \ + "nand read $kernel_addr_r $kernel_addr $kernel_size &&" \ + "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ + "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ + "bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ + "tftpboot=run add_default_bootargs &&" \ + "tftpboot $kernel_addr_r $bootfile &&" \ + "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ + "tftpboot $fdt_addr_r $fdt_file &&" \ + "bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "verify=n\0" \ + "nandupdate=nand erase 0 0x00100000 &&" \ + "tftpboot u-boot-spl.bin &&" \ + "nand write $loadaddr 0 0x00010000 &&" \ + "tftpboot u-boot-dtb.img &&" \ + "nand write $loadaddr 0x00010000 0x000f0000\0" \ + "add_default_bootargs=setenv bootargs $bootargs" \ + " console=ttyS0,$baudrate\0" \ + LINUXBOOT_ENV_SETTINGS /* Open Firmware flat tree */ #define CONFIG_OF_LIBFDT @@ -259,7 +313,8 @@ #define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE) #endif -#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8) +#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \ + defined(CONFIG_MACH_PH1_SLD8) #define CONFIG_SPL_TEXT_BASE 0x00040000 #endif #if defined(CONFIG_MACH_PH1_PRO4) diff --git a/include/configs/warp.h b/include/configs/warp.h index d5c3215..fa102bb 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -80,8 +80,8 @@ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 @@ -89,7 +89,7 @@ #define CONFIG_G_DNL_MANUFACTURER "FSL" #define CONFIG_CMD_DFU -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index ad82ed6..68853b6 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -40,7 +40,6 @@ #define CONFIG_IDENT_STRING " Xilinx ZynqMP" -#define CONFIG_SYS_TEXT_BASE 0x8000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) /* Flat Device Tree Definitions */ @@ -53,16 +52,20 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x400000) /* Serial setup */ -#define CONFIG_ZYNQ_SERIAL_UART0 -#define CONFIG_ZYNQ_SERIAL +#if defined(CONFIG_ZYNQMP_DCC) +# define CONFIG_ARM_DCC +# define CONFIG_CPU_ARMV8 +#else +# if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1) +# define CONFIG_ZYNQ_SERIAL +# endif +#endif #define CONFIG_CONS_INDEX 0 #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_ZYNQ_SDHCI0 - /* Command line configuration */ #define CONFIG_CMD_ENV #define CONFIG_CMD_EXT2 @@ -73,6 +76,16 @@ #define CONFIG_CMD_ELF #define CONFIG_MP +#define CONFIG_CMD_MII + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_MAY_FAIL +#define CONFIG_BOOTP_SERVERIP + /* SPI */ #ifdef CONFIG_ZYNQ_SPI # define CONFIG_SPI_FLASH_SST @@ -127,8 +140,16 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MAXARGS 64 -#define CONFIG_ZYNQ_I2C0 -#define CONFIG_SYS_I2C_ZYNQ +/* Ethernet driver */ +#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) || \ + defined(CONFIG_ZYNQ_GEM2) || defined(CONFIG_ZYNQ_GEM3) +# define CONFIG_NET_MULTI +# define CONFIG_ZYNQ_GEM +# define CONFIG_MII +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_PHYLIB +# define CONFIG_PHY_MARVELL +#endif /* I2C */ #if defined(CONFIG_SYS_I2C_ZYNQ) @@ -138,8 +159,6 @@ # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 #endif -#define CONFIG_ZYNQMP_EEPROM - /* EEPROM */ #ifdef CONFIG_ZYNQMP_EEPROM # define CONFIG_CMD_EEPROM @@ -150,6 +169,17 @@ # define CONFIG_SYS_EEPROM_SIZE (64 * 1024) #endif +#ifdef CONFIG_AHCI +#define CONFIG_LIBATA +#define CONFIG_SCSI_AHCI +#define CONFIG_SCSI_AHCI_PLAT +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) +#define CONFIG_CMD_SCSI +#endif + #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h new file mode 100644 index 0000000..c872f7c --- /dev/null +++ b/include/configs/xilinx_zynqmp_ep.h @@ -0,0 +1,27 @@ +/* + * Configuration for Xilinx ZynqMP emulation + * platforms. See zynqmp-common.h for ZynqMP + * common configs + * + * (C) Copyright 2014 - 2015 Xilinx, Inc. + * Michal Simek <michal.simek@xilinx.com> + * Siva Durga Prasad Paladugu <sivadur@xilinx.com> + * + * Based on Configuration for Versatile Express + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_EP_H +#define __CONFIG_ZYNQMP_EP_H + +#define CONFIG_ZYNQ_SERIAL_UART0 +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_I2C0 +#define CONFIG_SYS_I2C_ZYNQ +#define CONFIG_ZYNQ_EEPROM +#define CONFIG_AHCI + +#include <configs/xilinx_zynqmp.h> + +#endif /* __CONFIG_ZYNQMP_EP_H */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 5526214..98bebd0 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -110,10 +110,10 @@ # define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ # define CONFIG_USB_GADGET # define CONFIG_USB_GADGET_DUALSPEED -# define CONFIG_USBDOWNLOAD_GADGET +# define CONFIG_USB_GADGET_DOWNLOAD # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 # define DFU_DEFAULT_POLL_TIMEOUT 300 -# define CONFIG_DFU_FUNCTION +# define CONFIG_USB_FUNCTION_DFU # define CONFIG_DFU_RAM # define CONFIG_USB_GADGET_VBUS_DRAW 2 # define CONFIG_G_DNL_VENDOR_NUM 0x03FD @@ -123,7 +123,7 @@ # define CONFIG_USB_CABLE_CHECK # define CONFIG_CMD_DFU # define CONFIG_CMD_THOR_DOWNLOAD -# define CONFIG_THOR_FUNCTION +# define CONFIG_USB_FUNCTION_THOR # define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ "set dfu_alt_info " \ diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 16b9047..7a1b872 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -21,6 +21,9 @@ # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI +#elif defined(CONFIG_ZC770_XM011) +# define CONFIG_ZYNQ_SERIAL_UART1 + #elif defined(CONFIG_ZC770_XM012) # define CONFIG_ZYNQ_SERIAL_UART1 # undef CONFIG_SYS_NO_FLASH diff --git a/include/debug_uart.h b/include/debug_uart.h index f56797b..a75e377 100644 --- a/include/debug_uart.h +++ b/include/debug_uart.h @@ -10,8 +10,6 @@ #ifndef _DEBUG_UART_H #define _DEBUG_UART_H -#include <linux/linkage.h> - /* * The debug UART is intended for use very early in U-Boot to debug problems * when an ICE or other debug mechanism is not available. @@ -64,46 +62,46 @@ void debug_uart_init(void); * * @ch: Character to output */ -asmlinkage void printch(int ch); +void printch(int ch); /** * printascii() - Output an ASCII string to the debug UART * * @str: String to output */ -asmlinkage void printascii(const char *str); +void printascii(const char *str); /** * printhex2() - Output a 2-digit hex value * * @value: Value to output */ -asmlinkage void printhex2(uint value); +void printhex2(uint value); /** * printhex4() - Output a 4-digit hex value * * @value: Value to output */ -asmlinkage void printhex4(uint value); +void printhex4(uint value); /** * printhex8() - Output a 8-digit hex value * * @value: Value to output */ -asmlinkage void printhex8(uint value); +void printhex8(uint value); /* * Now define some functions - this should be inserted into the serial driver */ #define DEBUG_UART_FUNCS \ - asmlinkage void printch(int ch) \ + void printch(int ch) \ { \ _debug_uart_putc(ch); \ } \ \ - asmlinkage void printascii(const char *str) \ + void printascii(const char *str) \ { \ while (*str) \ _debug_uart_putc(*str++); \ @@ -121,17 +119,17 @@ asmlinkage void printhex8(uint value); printhex1(value >> (4 * digits)); \ } \ \ - asmlinkage void printhex2(uint value) \ + void printhex2(uint value) \ { \ printhex(value, 2); \ } \ \ - asmlinkage void printhex4(uint value) \ + void printhex4(uint value) \ { \ printhex(value, 4); \ } \ \ - asmlinkage void printhex8(uint value) \ + void printhex8(uint value) \ { \ printhex(value, 8); \ } diff --git a/include/dm/device-internal.h b/include/dm/device-internal.h index 687462b..402304f 100644 --- a/include/dm/device-internal.h +++ b/include/dm/device-internal.h @@ -107,6 +107,32 @@ int device_unbind(struct udevice *dev); static inline int device_unbind(struct udevice *dev) { return 0; } #endif +/** + * device_remove_children() - Stop all device's children + * @dev: The device whose children are to be removed + * @return 0 on success, -ve on error + */ +#ifdef CONFIG_DM_DEVICE_REMOVE +int device_remove_children(struct udevice *dev); +#else +static inline int device_remove_children(struct udevice *dev) { return 0; } +#endif + +/** + * device_unbind_children() - Unbind all device's children from the device + * + * On error, the function continues to unbind all children, and reports the + * first error. + * + * @dev: The device that is to be stripped of its children + * @return 0 on success, -ve on error + */ +#ifdef CONFIG_DM_DEVICE_REMOVE +int device_unbind_children(struct udevice *dev); +#else +static inline int device_unbind_children(struct udevice *dev) { return 0; } +#endif + #ifdef CONFIG_DM_DEVICE_REMOVE void device_free(struct udevice *dev); #else diff --git a/include/dm/device.h b/include/dm/device.h index 18296bb..9fa0048 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -386,10 +386,24 @@ int device_find_child_by_of_offset(struct udevice *parent, int of_offset, * @devp: Returns pointer to device if found, otherwise this is set to NULL * @return 0 if OK, -ve on error */ -int device_get_child_by_of_offset(struct udevice *parent, int seq, +int device_get_child_by_of_offset(struct udevice *parent, int of_offset, struct udevice **devp); /** + * device_get_global_by_of_offset() - Get a device based on FDT offset + * + * Locates a device by its device tree offset, searching globally throughout + * the all driver model devices. + * + * The device is probed to activate it ready for use. + * + * @of_offset: Device tree offset to find + * @devp: Returns pointer to device if found, otherwise this is set to NULL + * @return 0 if OK, -ve on error + */ +int device_get_global_by_of_offset(int of_offset, struct udevice **devp); + +/** * device_find_first_child() - Find the first child of a device * * @parent: Parent device to search diff --git a/include/dm/platdata.h b/include/dm/platdata.h index fbc8a6b..6f4f001 100644 --- a/include/dm/platdata.h +++ b/include/dm/platdata.h @@ -16,6 +16,10 @@ /** * struct driver_info - Information required to instantiate a device * + * NOTE: Avoid using this except in extreme circumstances, where device tree + * is not feasible (e.g. serial driver in SPL where <8KB of SRAM is + * available). U-Boot's driver model uses device tree for configuration. + * * @name: Driver name * @platdata: Driver-specific platform data */ @@ -24,6 +28,11 @@ struct driver_info { const void *platdata; }; +/** + * NOTE: Avoid using these except in extreme circumstances, where device tree + * is not feasible (e.g. serial driver in SPL where <8KB of SRAM is + * available). U-Boot's driver model uses device tree for configuration. + */ #define U_BOOT_DEVICE(__name) \ ll_entry_declare(struct driver_info, __name, driver_info) diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index c7310d7..bc057d7 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -25,27 +25,33 @@ enum uclass_id { UCLASS_SIMPLE_BUS, /* bus with child devices */ /* U-Boot uclasses start here - in alphabetical order */ + UCLASS_CLK, /* Clock source, e.g. used by peripherals */ UCLASS_CPU, /* CPU, typically part of an SoC */ UCLASS_CROS_EC, /* Chrome OS EC */ UCLASS_DISPLAY_PORT, /* Display port video */ + UCLASS_RAM, /* RAM controller */ UCLASS_ETH, /* Ethernet device */ UCLASS_GPIO, /* Bank of general-purpose I/O pins */ UCLASS_I2C, /* I2C bus */ UCLASS_I2C_EEPROM, /* I2C EEPROM device */ UCLASS_I2C_GENERIC, /* Generic I2C device */ + UCLASS_LED, /* Light-emitting diode (LED) */ UCLASS_LPC, /* x86 'low pin count' interface */ UCLASS_MASS_STORAGE, /* Mass storage device */ + UCLASS_MMC, /* SD / MMC card or chip */ UCLASS_MOD_EXP, /* RSA Mod Exp device */ UCLASS_PCH, /* x86 platform controller hub */ UCLASS_PCI, /* PCI bus */ UCLASS_PCI_GENERIC, /* Generic PCI bus device */ UCLASS_PMIC, /* PMIC I/O device */ UCLASS_REGULATOR, /* Regulator device */ + UCLASS_RESET, /* Reset device */ UCLASS_RTC, /* Real time clock device */ UCLASS_SERIAL, /* Serial UART */ UCLASS_SPI, /* SPI bus */ UCLASS_SPI_FLASH, /* SPI flash */ UCLASS_SPI_GENERIC, /* Generic SPI flash target */ + UCLASS_SYSCON, /* System configuration device */ UCLASS_THERMAL, /* Thermal sensor */ UCLASS_USB, /* USB bus */ UCLASS_USB_DEV_GENERIC, /* USB generic device */ diff --git a/include/dm/util.h b/include/dm/util.h index 0cec17b..7dbed67 100644 --- a/include/dm/util.h +++ b/include/dm/util.h @@ -33,4 +33,10 @@ struct list_head; */ int list_count_items(struct list_head *head); +/* Dump out a tree of all devices */ +void dm_dump_all(void); + +/* Dump out a list of uclasses and their devices */ +void dm_dump_uclass(void); + #endif diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h new file mode 100644 index 0000000..d134741 --- /dev/null +++ b/include/dt-bindings/clock/tegra210-car.h @@ -0,0 +1,342 @@ +/* + * This header provides Tegra210-specific constants for binding + * nvidia,tegra210-car. + */ + +#ifndef _DT_BINDINGS_CLOCK_TEGRA210_CAR_H +#define _DT_BINDINGS_CLOCK_TEGRA210_CAR_H + +/* 0 */ +/* 1 */ +/* 2 */ +#define TEGRA210_CLK_ISPB 3 +#define TEGRA210_CLK_RTC 4 +#define TEGRA210_CLK_TIMER 5 +#define TEGRA210_CLK_UARTA 6 +/* 7 (register bit affects uartb and vfir) */ +/* 8 */ +#define TEGRA210_CLK_SDMMC2 9 +/* 10 (register bit affects spdif_in and spdif_out) */ +#define TEGRA210_CLK_I2S1 11 +#define TEGRA210_CLK_I2C1 12 +/* 13 */ +#define TEGRA210_CLK_SDMMC1 14 +#define TEGRA210_CLK_SDMMC4 15 +/* 16 */ +#define TEGRA210_CLK_PWM 17 +#define TEGRA210_CLK_I2S2 18 +/* 20 (register bit affects vi and vi_sensor) */ +/* 21 */ +#define TEGRA210_CLK_USBD 22 +#define TEGRA210_CLK_ISP 23 +/* 26 */ +/* 25 */ +#define TEGRA210_CLK_DISP2 26 +#define TEGRA210_CLK_DISP1 27 +#define TEGRA210_CLK_HOST1X 28 +#define TEGRA210_CLK_VCP 29 +#define TEGRA210_CLK_I2S0 30 +/* 31 */ + +#define TEGRA210_CLK_MC 32 +/* 33 */ +#define TEGRA210_CLK_APBDMA 34 +/* 35 */ +#define TEGRA210_CLK_KBC 36 +/* 37 */ +/* 38 */ +/* 39 (register bit affects fuse and fuse_burn) */ +#define TEGRA210_CLK_KFUSE 40 +#define TEGRA210_CLK_SBC1 41 +#define TEGRA210_CLK_NOR 42 +/* 43 */ +#define TEGRA210_CLK_SBC2 44 +/* 45 */ +#define TEGRA210_CLK_SBC3 46 +#define TEGRA210_CLK_I2C5 47 +#define TEGRA210_CLK_DSIA 48 +/* 49 */ +#define TEGRA210_CLK_MIPI 50 +#define TEGRA210_CLK_HDMI 51 +#define TEGRA210_CLK_CSI 52 +/* 53 */ +#define TEGRA210_CLK_I2C2 54 +#define TEGRA210_CLK_UARTC 55 +#define TEGRA210_CLK_MIPI_CAL 56 +#define TEGRA210_CLK_EMC 57 +#define TEGRA210_CLK_USB2 58 +#define TEGRA210_CLK_USB3 59 +/* 60 */ +#define TEGRA210_CLK_VDE 61 +#define TEGRA210_CLK_BSEA 62 +#define TEGRA210_CLK_BSEV 63 + +/* 64 */ +#define TEGRA210_CLK_UARTD 65 +/* 66 */ +#define TEGRA210_CLK_I2C3 67 +#define TEGRA210_CLK_SBC4 68 +#define TEGRA210_CLK_SDMMC3 69 +#define TEGRA210_CLK_PCIE 70 +#define TEGRA210_CLK_OWR 71 +#define TEGRA210_CLK_AFI 72 +#define TEGRA210_CLK_CSITE 73 +/* 74 */ +/* 75 */ +#define TEGRA210_CLK_LA 76 +#define TEGRA210_CLK_TRACE 77 +#define TEGRA210_CLK_SOC_THERM 78 +#define TEGRA210_CLK_DTV 79 +/* 80 */ +#define TEGRA210_CLK_I2CSLOW 81 +#define TEGRA210_CLK_DSIB 82 +#define TEGRA210_CLK_TSEC 83 +/* 84 */ +/* 85 */ +/* 86 */ +/* 87 */ +/* 88 */ +#define TEGRA210_CLK_XUSB_HOST 89 +/* 90 */ +#define TEGRA210_CLK_MSENC 91 +#define TEGRA210_CLK_CSUS 92 +/* 93 */ +/* 94 */ +/* 95 (bit affects xusb_dev and xusb_dev_src) */ + +/* 96 */ +/* 97 */ +/* 98 */ +#define TEGRA210_CLK_MSELECT 99 +#define TEGRA210_CLK_TSENSOR 100 +#define TEGRA210_CLK_I2S3 101 +#define TEGRA210_CLK_I2S4 102 +#define TEGRA210_CLK_I2C4 103 +#define TEGRA210_CLK_SBC5 104 +#define TEGRA210_CLK_SBC6 105 +#define TEGRA210_CLK_D_AUDIO 106 +#define TEGRA210_CLK_APBIF 107 +#define TEGRA210_CLK_DAM0 108 +#define TEGRA210_CLK_DAM1 109 +#define TEGRA210_CLK_DAM2 110 +#define TEGRA210_CLK_HDA2CODEC_2X 111 +/* 112 */ +#define TEGRA210_CLK_AUDIO0_2X 113 +#define TEGRA210_CLK_AUDIO1_2X 114 +#define TEGRA210_CLK_AUDIO2_2X 115 +#define TEGRA210_CLK_AUDIO3_2X 116 +#define TEGRA210_CLK_AUDIO4_2X 117 +#define TEGRA210_CLK_SPDIF_2X 118 +#define TEGRA210_CLK_ACTMON 119 +#define TEGRA210_CLK_EXTERN1 120 +#define TEGRA210_CLK_EXTERN2 121 +#define TEGRA210_CLK_EXTERN3 122 +#define TEGRA210_CLK_SATA_OOB 123 +#define TEGRA210_CLK_SATA 124 +#define TEGRA210_CLK_HDA 125 +/* 126 */ +#define TEGRA210_CLK_SE 127 + +#define TEGRA210_CLK_HDA2HDMI 128 +#define TEGRA210_CLK_SATA_COLD 129 +/* 130 */ +/* 131 */ +/* 132 */ +/* 133 */ +/* 134 */ +/* 135 */ +/* 136 */ +/* 137 */ +/* 138 */ +/* 139 */ +/* 140 */ +/* 141 */ +/* 142 */ +/* 143 (bit affects xusb_falcon_src, xusb_fs_src, */ +/* xusb_host_src and xusb_ss_src) */ +#define TEGRA210_CLK_CILAB 144 +#define TEGRA210_CLK_CILCD 145 +#define TEGRA210_CLK_CILE 146 +#define TEGRA210_CLK_DSIALP 147 +#define TEGRA210_CLK_DSIBLP 148 +#define TEGRA210_CLK_ENTROPY 149 +#define TEGRA210_CLK_DDS 150 +/* 151 */ +#define TEGRA210_CLK_DP2 152 +#define TEGRA210_CLK_AMX 153 +#define TEGRA210_CLK_ADX 154 +/* 155 (bit affects dfll_ref and dfll_soc) */ +#define TEGRA210_CLK_XUSB_SS 156 +/* 157 */ +/* 158 */ +/* 159 */ + +/* 160 */ +/* 161 */ +/* 162 */ +/* 163 */ +/* 164 */ +/* 165 */ +#define TEGRA210_CLK_I2C6 166 +/* 167 */ +/* 168 */ +/* 169 */ +/* 170 */ +#define TEGRA210_CLK_VIM2_CLK 171 +/* 172 */ +/* 173 */ +/* 174 */ +/* 175 */ +#define TEGRA210_CLK_HDMI_AUDIO 176 +#define TEGRA210_CLK_CLK72MHZ 177 +#define TEGRA210_CLK_VIC03 178 +/* 179 */ +#define TEGRA210_CLK_ADX1 180 +#define TEGRA210_CLK_DPAUX 181 +#define TEGRA210_CLK_SOR0 182 +/* 183 */ +#define TEGRA210_CLK_GPU 184 +#define TEGRA210_CLK_AMX1 185 +/* 186 */ +/* 187 */ +/* 188 */ +/* 189 */ +/* 190 */ +/* 191 */ +#define TEGRA210_CLK_UARTB 192 +#define TEGRA210_CLK_VFIR 193 +#define TEGRA210_CLK_SPDIF_IN 194 +#define TEGRA210_CLK_SPDIF_OUT 195 +#define TEGRA210_CLK_VI 196 +#define TEGRA210_CLK_VI_SENSOR 197 +#define TEGRA210_CLK_FUSE 198 +#define TEGRA210_CLK_FUSE_BURN 199 +#define TEGRA210_CLK_CLK_32K 200 +#define TEGRA210_CLK_CLK_M 201 +#define TEGRA210_CLK_CLK_M_DIV2 202 +#define TEGRA210_CLK_CLK_M_DIV4 203 +#define TEGRA210_CLK_PLL_REF 204 +#define TEGRA210_CLK_PLL_C 205 +#define TEGRA210_CLK_PLL_C_OUT1 206 +#define TEGRA210_CLK_PLL_C2 207 +#define TEGRA210_CLK_PLL_C3 208 +#define TEGRA210_CLK_PLL_M 209 +#define TEGRA210_CLK_PLL_M_OUT1 210 +#define TEGRA210_CLK_PLL_P 211 +#define TEGRA210_CLK_PLL_P_OUT1 212 +#define TEGRA210_CLK_PLL_P_OUT2 213 +#define TEGRA210_CLK_PLL_P_OUT3 214 +#define TEGRA210_CLK_PLL_P_OUT4 215 +#define TEGRA210_CLK_PLL_A 216 +#define TEGRA210_CLK_PLL_A_OUT0 217 +#define TEGRA210_CLK_PLL_D 218 +#define TEGRA210_CLK_PLL_D_OUT0 219 +#define TEGRA210_CLK_PLL_D2 220 +#define TEGRA210_CLK_PLL_D2_OUT0 221 +#define TEGRA210_CLK_PLL_U 222 +#define TEGRA210_CLK_PLL_U_480M 223 + +#define TEGRA210_CLK_PLL_U_60M 224 +#define TEGRA210_CLK_PLL_U_48M 225 +#define TEGRA210_CLK_PLL_U_12M 226 +/* 227 */ +/* 228 */ +#define TEGRA210_CLK_PLL_RE_VCO 229 +#define TEGRA210_CLK_PLL_RE_OUT 230 +#define TEGRA210_CLK_PLL_E 231 +#define TEGRA210_CLK_SPDIF_IN_SYNC 232 +#define TEGRA210_CLK_I2S0_SYNC 233 +#define TEGRA210_CLK_I2S1_SYNC 234 +#define TEGRA210_CLK_I2S2_SYNC 235 +#define TEGRA210_CLK_I2S3_SYNC 236 +#define TEGRA210_CLK_I2S4_SYNC 237 +#define TEGRA210_CLK_VIMCLK_SYNC 238 +#define TEGRA210_CLK_AUDIO0 239 +#define TEGRA210_CLK_AUDIO1 240 +#define TEGRA210_CLK_AUDIO2 241 +#define TEGRA210_CLK_AUDIO3 242 +#define TEGRA210_CLK_AUDIO4 243 +#define TEGRA210_CLK_SPDIF 244 +#define TEGRA210_CLK_CLK_OUT_1 245 +#define TEGRA210_CLK_CLK_OUT_2 246 +#define TEGRA210_CLK_CLK_OUT_3 247 +#define TEGRA210_CLK_BLINK 248 +/* 249 */ +/* 250 */ +/* 251 */ +#define TEGRA210_CLK_XUSB_HOST_SRC 252 +#define TEGRA210_CLK_XUSB_FALCON_SRC 253 +#define TEGRA210_CLK_XUSB_FS_SRC 254 +#define TEGRA210_CLK_XUSB_SS_SRC 255 + +#define TEGRA210_CLK_XUSB_DEV_SRC 256 +#define TEGRA210_CLK_XUSB_DEV 257 +#define TEGRA210_CLK_XUSB_HS_SRC 258 +#define TEGRA210_CLK_SCLK 259 +#define TEGRA210_CLK_HCLK 260 +#define TEGRA210_CLK_PCLK 261 +/* 262 */ +/* 263 */ +#define TEGRA210_CLK_DFLL_REF 264 +#define TEGRA210_CLK_DFLL_SOC 265 +#define TEGRA210_CLK_VI_SENSOR2 266 +#define TEGRA210_CLK_PLL_P_OUT5 267 +#define TEGRA210_CLK_CML0 268 +#define TEGRA210_CLK_CML1 269 +#define TEGRA210_CLK_PLL_C4 270 +#define TEGRA210_CLK_PLL_DP 271 +#define TEGRA210_CLK_PLL_E_MUX 272 +#define TEGRA210_CLK_PLLD_DSI 273 +/* 274 */ +/* 275 */ +/* 276 */ +/* 277 */ +/* 278 */ +/* 279 */ +/* 280 */ +/* 281 */ +/* 282 */ +/* 283 */ +/* 284 */ +/* 285 */ +/* 286 */ +/* 287 */ + +/* 288 */ +/* 289 */ +/* 290 */ +/* 291 */ +/* 292 */ +/* 293 */ +/* 294 */ +/* 295 */ +/* 296 */ +/* 297 */ +/* 298 */ +/* 299 */ +#define TEGRA210_CLK_AUDIO0_MUX 300 +#define TEGRA210_CLK_AUDIO1_MUX 301 +#define TEGRA210_CLK_AUDIO2_MUX 302 +#define TEGRA210_CLK_AUDIO3_MUX 303 +#define TEGRA210_CLK_AUDIO4_MUX 304 +#define TEGRA210_CLK_SPDIF_MUX 305 +#define TEGRA210_CLK_CLK_OUT_1_MUX 306 +#define TEGRA210_CLK_CLK_OUT_2_MUX 307 +#define TEGRA210_CLK_CLK_OUT_3_MUX 308 +/* 309 */ +/* 310 */ +#define TEGRA210_CLK_SOR0_LVDS 311 +#define TEGRA210_CLK_XUSB_SS_DIV2 312 + +#define TEGRA210_CLK_PLL_M_UD 313 +#define TEGRA210_CLK_PLL_C_UD 314 + +#define TEGRA210_CLK_PLL_X 227 +#define TEGRA210_CLK_PLL_X_OUT0 228 + +#define TEGRA210_CLK_CCLK_G 262 +#define TEGRA210_CLK_CCLK_LP 263 + +#define TEGRA210_CLK_CLK_MAX 315 + +#endif /* _DT_BINDINGS_CLOCK_TEGRA210_CAR_H */ diff --git a/include/dwmmc.h b/include/dwmmc.h index 86a5491..7a7555a 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -129,8 +129,24 @@ /* quirks */ #define DWMCI_QUIRK_DISABLE_SMU (1 << 0) +/** + * struct dwmci_host - Information about a designware MMC host + * + * @name: Device name + * @ioaddr: Base I/O address of controller + * @quirks: Quick flags - see DWMCI_QUIRK_... + * @caps: Capabilities - see MMC_MODE_... + * @bus_hz: Bus speed in Hz, if @get_mmc_clk() is NULL + * @div: Arbitrary clock divider value for use by controller + * @dev_index: Arbitrary device index for use by controller + * @dev_id: Arbitrary device ID for use by controller + * @buswidth: Bus width in bits (8 or 4) + * @fifoth_val: Value for FIFOTH register (or 0 to leave unset) + * @mmc: Pointer to generic MMC structure for this device + * @priv: Private pointer for use by controller + */ struct dwmci_host { - char *name; + const char *name; void *ioaddr; unsigned int quirks; unsigned int caps; diff --git a/include/exports.h b/include/exports.h index 1a01e43..a3e0469 100644 --- a/include/exports.h +++ b/include/exports.h @@ -2,6 +2,10 @@ #define __EXPORTS_H__ #ifndef __ASSEMBLY__ +#ifdef CONFIG_PHY_AQUANTIA +#include <miiphy.h> +#include <phy.h> +#endif struct spi_slave; @@ -34,6 +38,13 @@ unsigned long long ustrtoull(const char *cp, char **endp, unsigned int base); int i2c_write (uchar, uint, int , uchar* , int); int i2c_read (uchar, uint, int , uchar* , int); #endif +#ifdef CONFIG_PHY_AQUANTIA +struct mii_dev *mdio_get_current_dev(void); +struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, + phy_interface_t interface); +struct phy_device *mdio_phydev_for_ethname(const char *ethname); +int miiphy_set_current_dev(const char *devname); +#endif void app_startup(char * const *); @@ -46,7 +57,7 @@ struct jt_funcs { }; -#define XF_VERSION 7 +#define XF_VERSION 8 #if defined(CONFIG_X86) extern gd_t *global_data; diff --git a/include/fdt_support.h b/include/fdt_support.h index 0edc4fa..296add0 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -67,8 +67,34 @@ void do_fixup_by_compat(void *fdt, const char *compat, const char *prop, const void *val, int len, int create); void do_fixup_by_compat_u32(void *fdt, const char *compat, const char *prop, u32 val, int create); +/** + * Setup the memory node in the DT. Creates one if none was existing before. + * Calls fdt_fixup_memory_banks() to populate a single reg pair covering the + * whole memory. + * + * @param blob FDT blob to update + * @param start Begin of DRAM mapping in physical memory + * @param size Size of the single memory bank + * @return 0 if ok, or -1 or -FDT_ERR_... on error + */ int fdt_fixup_memory(void *blob, u64 start, u64 size); + +/** + * Fill the DT memory node with multiple memory banks. + * Creates the node if none was existing before. + * If banks is 0, it will not touch the existing reg property. This allows + * boards to not mess with the existing DT setup, which may have been + * filled in properly before. + * + * @param blob FDT blob to update + * @param start Array of size <banks> to hold the start addresses. + * @param size Array of size <banks> to hold the size of each region. + * @param banks Number of memory banks to create. If 0, the reg + * property will be left untouched. + * @return 0 if ok, or -1 or -FDT_ERR_... on error + */ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks); + void fdt_fixup_ethernet(void *fdt); int fdt_find_and_setprop(void *fdt, const char *node, const char *prop, const void *val, int len, int create); diff --git a/include/fdtdec.h b/include/fdtdec.h index 2323603..4b3f8d1 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -137,6 +137,7 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA124_SOR, /* Tegra 124 Serial Output Resource */ COMPAT_NVIDIA_TEGRA124_PMC, /* Tegra 124 power mgmt controller */ COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */ + COMPAT_NVIDIA_TEGRA210_SDMMC, /* Tegra210 SDMMC controller */ COMPAT_NVIDIA_TEGRA124_SDMMC, /* Tegra124 SDMMC controller */ COMPAT_NVIDIA_TEGRA30_SDMMC, /* Tegra30 SDMMC controller */ COMPAT_NVIDIA_TEGRA20_SDMMC, /* Tegra20 SDMMC controller */ @@ -145,6 +146,8 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA20_PCIE, /* Tegra 20 PCIe controller */ COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL, /* Tegra124 XUSB pad controller */ + COMPAT_NVIDIA_TEGRA210_XUSB_PADCTL, + /* Tegra210 XUSB pad controller */ COMPAT_SMSC_LAN9215, /* SMSC 10/100 Ethernet LAN9215 */ COMPAT_SAMSUNG_EXYNOS5_SROMC, /* Exynos5 SROMC */ COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller */ diff --git a/include/fsl-mc/fsl_dpio.h b/include/fsl-mc/fsl_dpio.h index e84b419..e779909 100644 --- a/include/fsl-mc/fsl_dpio.h +++ b/include/fsl-mc/fsl_dpio.h @@ -8,8 +8,8 @@ #define _FSL_DPIO_H /* DPIO Version */ -#define DPIO_VER_MAJOR 2 -#define DPIO_VER_MINOR 1 +#define DPIO_VER_MAJOR 3 +#define DPIO_VER_MINOR 0 /* Command IDs */ #define DPIO_CMDID_CLOSE 0x800 @@ -31,8 +31,8 @@ do { \ MC_RSP_OP(cmd, 0, 32, 16, uint16_t, attr->qbman_portal_id);\ MC_RSP_OP(cmd, 0, 48, 8, uint8_t, attr->num_priorities);\ MC_RSP_OP(cmd, 0, 56, 4, enum dpio_channel_mode, attr->channel_mode);\ - MC_RSP_OP(cmd, 1, 0, 64, uint64_t, attr->qbman_portal_ce_paddr);\ - MC_RSP_OP(cmd, 2, 0, 64, uint64_t, attr->qbman_portal_ci_paddr);\ + MC_RSP_OP(cmd, 1, 0, 64, uint64_t, attr->qbman_portal_ce_offset);\ + MC_RSP_OP(cmd, 2, 0, 64, uint64_t, attr->qbman_portal_ci_offset);\ MC_RSP_OP(cmd, 3, 0, 16, uint16_t, attr->version.major);\ MC_RSP_OP(cmd, 3, 16, 16, uint16_t, attr->version.minor);\ } while (0) @@ -42,6 +42,7 @@ do { \ */ struct fsl_mc_io; + /** * dpio_open() - Open a control session for the specified object * @mc_io: Pointer to MC portal's I/O object @@ -61,18 +62,9 @@ struct fsl_mc_io; int dpio_open(struct fsl_mc_io *mc_io, int dpio_id, uint16_t *token); /** - * dpio_open() - Open a control session for the specified object + * dpio_close() - Close the control session of the object * @mc_io: Pointer to MC portal's I/O object - * @dpio_id: DPIO unique ID - * @token: Returned token; use in subsequent API calls - * - * This function can be used to open a control session for an - * already created object; an object may have been declared in - * the DPL or by calling the dpio_create() function. - * This function returns a unique authentication token, - * associated with the specific object ID and the specific MC - * portal; this token must be used in all subsequent commands for - * this specific object. + * @token: Token of DPIO object * * Return: '0' on Success; Error code otherwise. */ @@ -121,10 +113,8 @@ int dpio_reset(struct fsl_mc_io *mc_io, uint16_t token); * struct dpio_attr - Structure representing DPIO attributes * @id: DPIO object ID * @version: DPIO version - * @qbman_portal_ce_paddr: Physical address of the software portal - * cache-enabled area - * @qbman_portal_ci_paddr: Physical address of the software portal - * cache-inhibited area + * @qbman_portal_ce_offset: offset of the software portal cache-enabled area + * @qbman_portal_ci_offset: offset of the software portal cache-inhibited area * @qbman_portal_id: Software portal ID * @channel_mode: Notification channel mode * @num_priorities: Number of priorities for the notification channel (1-8); @@ -141,8 +131,8 @@ struct dpio_attr { uint16_t major; uint16_t minor; } version; - uint64_t qbman_portal_ce_paddr; - uint64_t qbman_portal_ci_paddr; + uint64_t qbman_portal_ce_offset; + uint64_t qbman_portal_ci_offset; uint16_t qbman_portal_id; enum dpio_channel_mode channel_mode; uint8_t num_priorities; diff --git a/include/fsl-mc/fsl_dpmng.h b/include/fsl-mc/fsl_dpmng.h index 986e7c8..6feb292 100644 --- a/include/fsl-mc/fsl_dpmng.h +++ b/include/fsl-mc/fsl_dpmng.h @@ -14,7 +14,7 @@ struct fsl_mc_io; /** * Management Complex firmware version information */ -#define MC_VER_MAJOR 6 +#define MC_VER_MAJOR 7 #define MC_VER_MINOR 0 /** diff --git a/include/fsl-mc/fsl_dpni.h b/include/fsl-mc/fsl_dpni.h index 67c087d..26b67f0 100644 --- a/include/fsl-mc/fsl_dpni.h +++ b/include/fsl-mc/fsl_dpni.h @@ -7,7 +7,7 @@ #define _FSL_DPNI_H /* DPNI Version */ -#define DPNI_VER_MAJOR 4 +#define DPNI_VER_MAJOR 5 #define DPNI_VER_MINOR 0 /* Command IDs */ @@ -78,7 +78,7 @@ do { \ MC_RSP_OP(cmd, 0, 32, 8, uint8_t, attr->max_tcs); \ MC_RSP_OP(cmd, 0, 40, 8, uint8_t, attr->max_senders); \ MC_RSP_OP(cmd, 0, 48, 8, enum net_prot, attr->start_hdr); \ - MC_RSP_OP(cmd, 1, 0, 64, uint64_t, attr->options); \ + MC_RSP_OP(cmd, 1, 0, 32, uint32_t, attr->options); \ MC_RSP_OP(cmd, 2, 0, 8, uint8_t, attr->max_unicast_filters); \ MC_RSP_OP(cmd, 2, 8, 8, uint8_t, attr->max_multicast_filters);\ MC_RSP_OP(cmd, 2, 16, 8, uint8_t, attr->max_vlan_filters); \ @@ -98,7 +98,9 @@ do { \ MC_RSP_OP(cmd, 4, 16, 16, uint16_t, \ attr->ipr_cfg.min_frag_size_ipv4); \ MC_RSP_OP(cmd, 4, 32, 16, uint16_t, \ - attr->ipr_cfg.min_frag_size_ipv6); \ + attr->ipr_cfg.min_frag_size_ipv6);\ + MC_RSP_OP(cmd, 4, 48, 8, uint8_t, attr->max_policers); \ + MC_RSP_OP(cmd, 4, 56, 8, uint8_t, attr->max_congestion_ctrl); \ MC_RSP_OP(cmd, 5, 0, 16, uint16_t, \ attr->ipr_cfg.max_open_frames_ipv4); \ MC_RSP_OP(cmd, 5, 16, 16, uint16_t, \ @@ -208,7 +210,7 @@ do { \ /* cmd, param, offset, width, type, arg_name */ #define DPNI_CMD_SET_LINK_CFG(cmd, cfg) \ do { \ - MC_CMD_OP(cmd, 1, 0, 64, uint64_t, cfg->rate);\ + MC_CMD_OP(cmd, 1, 0, 32, uint32_t, cfg->rate);\ MC_CMD_OP(cmd, 2, 0, 64, uint64_t, cfg->options);\ } while (0) @@ -216,7 +218,7 @@ do { \ #define DPNI_RSP_GET_LINK_STATE(cmd, state) \ do { \ MC_RSP_OP(cmd, 0, 32, 1, int, state->up);\ - MC_RSP_OP(cmd, 1, 0, 64, uint64_t, state->rate);\ + MC_RSP_OP(cmd, 1, 0, 32, uint32_t, state->rate);\ MC_RSP_OP(cmd, 2, 0, 64, uint64_t, state->options);\ } while (0) @@ -326,6 +328,13 @@ do { \ MC_CMD_OP(cmd, 1, 0, 64, uint64_t, cfg->user_ctx); \ MC_CMD_OP(cmd, 2, 16, 8, uint8_t, tc_id); \ MC_CMD_OP(cmd, 2, 32, 32, uint32_t, cfg->options); \ + MC_CMD_OP(cmd, 3, 0, 4, enum dpni_flc_type, cfg->flc_cfg.flc_type); \ + MC_CMD_OP(cmd, 3, 4, 4, enum dpni_stash_size, \ + cfg->flc_cfg.frame_data_size);\ + MC_CMD_OP(cmd, 3, 8, 4, enum dpni_stash_size, \ + cfg->flc_cfg.flow_context_size);\ + MC_CMD_OP(cmd, 3, 32, 32, uint32_t, cfg->flc_cfg.options);\ + MC_CMD_OP(cmd, 4, 0, 64, uint64_t, cfg->flc_cfg.flow_context);\ } while (0) /* cmd, param, offset, width, type, arg_name */ @@ -343,6 +352,13 @@ do { \ MC_RSP_OP(cmd, 0, 40, 2, enum dpni_dest, attr->dest_cfg.dest_type); \ MC_RSP_OP(cmd, 1, 0, 64, uint64_t, attr->user_ctx); \ MC_RSP_OP(cmd, 2, 32, 32, uint32_t, attr->fqid); \ + MC_RSP_OP(cmd, 3, 0, 4, enum dpni_flc_type, attr->flc_cfg.flc_type); \ + MC_RSP_OP(cmd, 3, 4, 4, enum dpni_stash_size, \ + attr->flc_cfg.frame_data_size);\ + MC_RSP_OP(cmd, 3, 8, 4, enum dpni_stash_size, \ + attr->flc_cfg.flow_context_size);\ + MC_RSP_OP(cmd, 3, 32, 32, uint32_t, attr->flc_cfg.options);\ + MC_RSP_OP(cmd, 4, 0, 64, uint64_t, attr->flc_cfg.flow_context);\ } while (0) enum net_prot { @@ -399,7 +415,8 @@ enum net_prot { NET_PROT_DUMMY_LAST }; -/* Data Path Network Interface API +/** + * Data Path Network Interface API * Contains initialization APIs and runtime control APIs for DPNI */ @@ -545,6 +562,8 @@ int dpni_reset(struct fsl_mc_io *mc_io, uint16_t token); * @max_qos_entries: if 'max_tcs > 1', declares the maximum entries in QoS table * @max_qos_key_size: Maximum key size for the QoS look-up * @max_dist_key_size: Maximum key size for the distribution look-up + * @max_policers: Maximum number of policers; + * @max_congestion_ctrl: Maximum number of congestion control groups (CGs); * @ipr_cfg: IP reassembly configuration */ struct dpni_attr { @@ -559,7 +578,7 @@ struct dpni_attr { uint16_t minor; } version; enum net_prot start_hdr; - uint64_t options; + uint32_t options; uint8_t max_senders; uint8_t max_tcs; uint8_t max_dist_per_tc[DPNI_MAX_TC]; @@ -569,8 +588,11 @@ struct dpni_attr { uint8_t max_qos_entries; uint8_t max_qos_key_size; uint8_t max_dist_key_size; + uint8_t max_policers; + uint8_t max_congestion_ctrl; struct dpni_ipr_cfg ipr_cfg; }; + /** * dpni_get_attributes() - Retrieve DPNI attributes. * @mc_io: Pointer to MC portal's I/O objec @@ -634,6 +656,7 @@ struct dpni_buffer_layout { int dpni_get_rx_buffer_layout(struct fsl_mc_io *mc_io, uint16_t token, struct dpni_buffer_layout *layout); + /** * dpni_set_rx_buffer_layout() - Set Rx buffer layout configuration. * @mc_io: Pointer to MC portal's I/O object @@ -661,19 +684,19 @@ int dpni_get_tx_buffer_layout(struct fsl_mc_io *mc_io, struct dpni_buffer_layout *layout); /** - * @brief Set Tx buffer layout configuration. - * - * @param[in] mc_io Pointer to MC portal's I/O object - * @param[in] token Token of DPNI object - * @param[in] layout Buffer layout configuration + * dpni_set_tx_buffer_layout() - Set Tx buffer layout configuration. + * @mc_io: Pointer to MC portal's I/O object + * @token: Token of DPNI object + * @layout: Buffer layout configuration * - * @returns '0' on Success; Error code otherwise. + * Return: '0' on Success; Error code otherwise. * * @warning Allowed only when DPNI is disabled */ int dpni_set_tx_buffer_layout(struct fsl_mc_io *mc_io, uint16_t token, const struct dpni_buffer_layout *layout); + /** * dpni_get_tx_conf_buffer_layout() - Retrieve Tx confirmation buffer layout * attributes. @@ -686,6 +709,7 @@ int dpni_set_tx_buffer_layout(struct fsl_mc_io *mc_io, int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, uint16_t token, struct dpni_buffer_layout *layout); + /** * dpni_set_tx_conf_buffer_layout() - Set Tx confirmation buffer layout * configuration. @@ -700,15 +724,16 @@ int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, int dpni_set_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, uint16_t token, const struct dpni_buffer_layout *layout); + /** - * dpni_get_spid() - Get the AIOP storage profile ID associated with the DPNI + * dpni_get_qdid() - Get the Queuing Destination ID (QDID) that should be used + * for enqueue operations * @mc_io: Pointer to MC portal's I/O object * @token: Token of DPNI object - * @spid: Returned aiop storage-profile ID + * @qdid: Returned virtual QDID value that should be used as an argument + * in all enqueue operations * * Return: '0' on Success; Error code otherwise. - * - * @warning Only relevant for DPNI that belongs to AIOP container. */ int dpni_get_qdid(struct fsl_mc_io *mc_io, uint16_t token, uint16_t *qdid); @@ -781,13 +806,23 @@ int dpni_set_counter(struct fsl_mc_io *mc_io, uint16_t token, enum dpni_counter counter, uint64_t value); + +/* Enable auto-negotiation */ +#define DPNI_LINK_OPT_AUTONEG 0x0000000000000001ULL +/* Enable half-duplex mode */ +#define DPNI_LINK_OPT_HALF_DUPLEX 0x0000000000000002ULL +/* Enable pause frames */ +#define DPNI_LINK_OPT_PAUSE 0x0000000000000004ULL +/* Enable a-symmetric pause frames */ +#define DPNI_LINK_OPT_ASYM_PAUSE 0x0000000000000008ULL + /** * struct - Structure representing DPNI link configuration * @rate: Rate * @options: Mask of available options; use 'DPNI_LINK_OPT_<X>' values */ struct dpni_link_cfg { - uint64_t rate; + uint32_t rate; uint64_t options; }; @@ -801,7 +836,7 @@ struct dpni_link_cfg { */ int dpni_set_link_cfg(struct fsl_mc_io *mc_io, uint16_t token, - struct dpni_link_cfg *cfg); + const struct dpni_link_cfg *cfg); /** * struct dpni_link_state - Structure representing DPNI link state @@ -810,7 +845,7 @@ int dpni_set_link_cfg(struct fsl_mc_io *mc_io, * @up: Link state; '0' for down, '1' for up */ struct dpni_link_state { - uint64_t rate; + uint32_t rate; uint64_t options; int up; }; @@ -838,6 +873,7 @@ int dpni_get_link_state(struct fsl_mc_io *mc_io, int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io, uint16_t token, const uint8_t mac_addr[6]); + /** * dpni_get_primary_mac_addr() - Get the primary MAC address * @mc_io: Pointer to MC portal's I/O object @@ -849,6 +885,7 @@ int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io, int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io, uint16_t token, uint8_t mac_addr[6]); + /** * dpni_add_mac_addr() - Add MAC address filter * @mc_io: Pointer to MC portal's I/O object @@ -875,7 +912,7 @@ int dpni_remove_mac_addr(struct fsl_mc_io *mc_io, /** * enum dpni_dest - DPNI destination types - * DPNI_DEST_NONE: Unassigned destination; The queue is set in parked mode and + * @DPNI_DEST_NONE: Unassigned destination; The queue is set in parked mode and * does not generate FQDAN notifications; user is expected to * dequeue from the queue based on polling or other user-defined * method @@ -906,12 +943,69 @@ struct dpni_dest_cfg { uint8_t priority; }; +/** + * enum dpni_flc_type - DPNI FLC types + * @DPNI_FLC_USER_DEFINED: select the FLC to be used for user defined value + * @DPNI_FLC_STASH: select the FLC to be used for stash control + */ +enum dpni_flc_type { + DPNI_FLC_USER_DEFINED = 0, + DPNI_FLC_STASH = 1, +}; + +/** + * enum dpni_stash_size - DPNI FLC stashing size + * @DPNI_STASH_SIZE_0B: no stash + * @DPNI_STASH_SIZE_64B: stashes 64 bytes + * @DPNI_STASH_SIZE_128B: stashes 128 bytes + * @DPNI_STASH_SIZE_192B: stashes 192 bytes + */ +enum dpni_stash_size { + DPNI_STASH_SIZE_0B = 0, + DPNI_STASH_SIZE_64B = 1, + DPNI_STASH_SIZE_128B = 2, + DPNI_STASH_SIZE_192B = 3, +}; + +/* DPNI FLC stash options */ + +/* stashes the whole annotation area (up to 192 bytes) */ +#define DPNI_FLC_STASH_FRAME_ANNOTATION 0x00000001 + +/** + * struct dpni_flc_cfg - Structure representing DPNI FLC configuration + * @flc_type: FLC type + * @options: Mask of available options; + * use 'DPNI_FLC_STASH_<X>' values + * @frame_data_size: Size of frame data to be stashed + * @flow_context_size: Size of flow context to be stashed + * @flow_context: 1. In case flc_type is 'DPNI_FLC_USER_DEFINED': + * this value will be provided in the frame descriptor + * (FD[FLC]) + * 2. In case flc_type is 'DPNI_FLC_STASH': + * this value will be I/O virtual address of the + * flow-context; + * Must be cacheline-aligned and DMA-able memory + */ +struct dpni_flc_cfg { + enum dpni_flc_type flc_type; + uint32_t options; + enum dpni_stash_size frame_data_size; + enum dpni_stash_size flow_context_size; + uint64_t flow_context; +}; + /* DPNI queue modification options */ /* Select to modify the user's context associated with the queue */ #define DPNI_QUEUE_OPT_USER_CTX 0x00000001 /* Select to modify the queue's destination */ #define DPNI_QUEUE_OPT_DEST 0x00000002 +/** Select to modify the flow-context parameters; + * not applicable for Tx-conf/Err queues as the FD comes from the user + */ +#define DPNI_QUEUE_OPT_FLC 0x00000004 + /** * struct dpni_queue_cfg - Structure representing queue configuration @@ -922,11 +1016,17 @@ struct dpni_dest_cfg { * is contained in 'options' * @dest_cfg: Queue destination parameters; * valid only if 'DPNI_QUEUE_OPT_DEST' is contained in 'options' + * @flc_cfg: Flow context configuration; in case the TC's distribution + * is either NONE or HASH the FLC's settings of flow#0 are used. + * in the case of FS (flow-steering) the flow's FLC settings + * are used. + * valid only if 'DPNI_QUEUE_OPT_FLC' is contained in 'options' */ struct dpni_queue_cfg { uint32_t options; uint64_t user_ctx; struct dpni_dest_cfg dest_cfg; + struct dpni_flc_cfg flc_cfg; }; /** @@ -934,11 +1034,13 @@ struct dpni_queue_cfg { * @user_ctx: User context value provided in the frame descriptor of each * dequeued frame * @dest_cfg: Queue destination configuration + * @flc_cfg: Flow context configuration * @fqid: Virtual fqid value to be used for dequeue operations */ struct dpni_queue_attr { uint64_t user_ctx; struct dpni_dest_cfg dest_cfg; + struct dpni_flc_cfg flc_cfg; uint32_t fqid; }; diff --git a/include/fsl-mc/fsl_dprc.h b/include/fsl-mc/fsl_dprc.h index f837e89..26a4598 100644 --- a/include/fsl-mc/fsl_dprc.h +++ b/include/fsl-mc/fsl_dprc.h @@ -10,7 +10,7 @@ #define _FSL_DPRC_H /* DPRC Version */ -#define DPRC_VER_MAJOR 2 +#define DPRC_VER_MAJOR 4 #define DPRC_VER_MINOR 0 /* Command IDs */ @@ -88,6 +88,22 @@ do { \ MC_RSP_OP(cmd, 4, 40, 8, char, obj_desc->type[13]);\ MC_RSP_OP(cmd, 4, 48, 8, char, obj_desc->type[14]);\ MC_RSP_OP(cmd, 4, 56, 8, char, obj_desc->type[15]);\ + MC_RSP_OP(cmd, 5, 0, 8, char, obj_desc->label[0]);\ + MC_RSP_OP(cmd, 5, 8, 8, char, obj_desc->label[1]);\ + MC_RSP_OP(cmd, 5, 16, 8, char, obj_desc->label[2]);\ + MC_RSP_OP(cmd, 5, 24, 8, char, obj_desc->label[3]);\ + MC_RSP_OP(cmd, 5, 32, 8, char, obj_desc->label[4]);\ + MC_RSP_OP(cmd, 5, 40, 8, char, obj_desc->label[5]);\ + MC_RSP_OP(cmd, 5, 48, 8, char, obj_desc->label[6]);\ + MC_RSP_OP(cmd, 5, 56, 8, char, obj_desc->label[7]);\ + MC_RSP_OP(cmd, 6, 0, 8, char, obj_desc->label[8]);\ + MC_RSP_OP(cmd, 6, 8, 8, char, obj_desc->label[9]);\ + MC_RSP_OP(cmd, 6, 16, 8, char, obj_desc->label[10]);\ + MC_RSP_OP(cmd, 6, 24, 8, char, obj_desc->label[11]);\ + MC_RSP_OP(cmd, 6, 32, 8, char, obj_desc->label[12]);\ + MC_RSP_OP(cmd, 6, 40, 8, char, obj_desc->label[13]);\ + MC_RSP_OP(cmd, 6, 48, 8, char, obj_desc->label[14]);\ + MC_RSP_OP(cmd, 6, 56, 8, char, obj_desc->label[15]);\ } while (0) /* cmd, param, offset, width, type, arg_name */ @@ -175,11 +191,33 @@ do { \ /* param, offset, width, type, arg_name */ #define DPRC_RSP_GET_OBJ_REGION(cmd, region_desc) \ do { \ - MC_RSP_OP(cmd, 1, 0, 64, uint64_t, region_desc->base_paddr);\ + MC_RSP_OP(cmd, 1, 0, 64, uint64_t, region_desc->base_offset);\ MC_RSP_OP(cmd, 2, 0, 32, uint32_t, region_desc->size); \ } while (0) /* cmd, param, offset, width, type, arg_name */ +#define DPRC_CMD_SET_OBJ_LABEL(cmd, obj_index, label) \ +do { \ + MC_CMD_OP(cmd, 0, 0, 32, int, obj_index); \ + MC_CMD_OP(cmd, 1, 0, 8, char, label[0]);\ + MC_CMD_OP(cmd, 1, 8, 8, char, label[1]);\ + MC_CMD_OP(cmd, 1, 16, 8, char, label[2]);\ + MC_CMD_OP(cmd, 1, 24, 8, char, label[3]);\ + MC_CMD_OP(cmd, 1, 32, 8, char, label[4]);\ + MC_CMD_OP(cmd, 1, 40, 8, char, label[5]);\ + MC_CMD_OP(cmd, 1, 48, 8, char, label[6]);\ + MC_CMD_OP(cmd, 1, 56, 8, char, label[7]);\ + MC_CMD_OP(cmd, 2, 0, 8, char, label[8]);\ + MC_CMD_OP(cmd, 2, 8, 8, char, label[9]);\ + MC_CMD_OP(cmd, 2, 16, 8, char, label[10]);\ + MC_CMD_OP(cmd, 2, 24, 8, char, label[11]);\ + MC_CMD_OP(cmd, 2, 32, 8, char, label[12]);\ + MC_CMD_OP(cmd, 2, 40, 8, char, label[13]);\ + MC_CMD_OP(cmd, 2, 48, 8, char, label[14]);\ + MC_CMD_OP(cmd, 2, 56, 8, char, label[15]);\ +} while (0) + +/* cmd, param, offset, width, type, arg_name */ #define DPRC_CMD_CONNECT(cmd, endpoint1, endpoint2) \ do { \ MC_CMD_OP(cmd, 0, 0, 32, int, endpoint1->id); \ @@ -294,6 +332,7 @@ do { \ /* Data Path Resource Container API * Contains DPRC API for managing and querying DPAA resources */ + struct fsl_mc_io; /** @@ -366,7 +405,7 @@ int dprc_close(struct fsl_mc_io *mc_io, uint16_t token); /* Object initialization allowed - software context associated with this * container is allowed to invoke object initialization operations. */ -#define DPRC_CFG_OPT_OBJ_CREATE_ALLOWED 0x00000004 +#define DPRC_CFG_OPT_OBJ_CREATE_ALLOWED 0x00000004 /* Topology change allowed - software context associated with this * container is allowed to invoke topology operations, such as attach/detach @@ -389,11 +428,13 @@ int dprc_close(struct fsl_mc_io *mc_io, uint16_t token); * @portal_id: Portal ID; if set to 'DPRC_GET_PORTAL_ID_FROM_POOL', a free * portal ID is allocated by the DPRC * @options: Combination of 'DPRC_CFG_OPT_<X>' options + * @label: Object's label */ struct dprc_cfg { uint16_t icid; int portal_id; uint64_t options; + char label[16]; }; /** @@ -484,6 +525,7 @@ int dprc_get_obj_count(struct fsl_mc_io *mc_io, uint16_t token, int *obj_count); * @irq_count: Number of interrupts supported by the object * @region_count: Number of mappable regions supported by the object * @state: Object state: combination of DPRC_OBJ_STATE_ states + * @label: Object label */ struct dprc_obj_desc { char type[16]; @@ -494,6 +536,7 @@ struct dprc_obj_desc { uint8_t irq_count; uint8_t region_count; uint32_t state; + char label[16]; }; /** @@ -516,8 +559,8 @@ int dprc_get_obj(struct fsl_mc_io *mc_io, struct dprc_obj_desc *obj_desc); /** - * dprc_get_res_count() - Obtains the number of free resources that are assigned - * to this container, by pool type + * dprc_get_res_count() - Obtains the number of free resources that are + * assigned to this container, by pool type * @mc_io: Pointer to MC portal's I/O object * @token: Token of DPRC object * @type: pool type @@ -574,11 +617,14 @@ int dprc_get_res_ids(struct fsl_mc_io *mc_io, /** * struct dprc_region_desc - Mappable region descriptor - * @base_paddr: Region base physical address + * @base_offset: Region offset from region's base address. + * For DPMCP and DPRC objects, region base is offset from SoC MC portals + * base address; For DPIO, region base is offset from SoC QMan portals + * base address * @size: Region size (in bytes) */ struct dprc_region_desc { - uint64_t base_paddr; + uint64_t base_offset; uint32_t size; }; @@ -642,8 +688,8 @@ int dprc_disconnect(struct fsl_mc_io *mc_io, /** * dprc_get_connection() - Get connected endpoint and link status if connection * exists. -* @mc_io Pointer to MC portal's I/O object -* @token Token of DPRC object +* @mc_io Pointer to MC portal's I/O object +* @token Token of DPRC object * @endpoint1 Endpoint 1 configuration parameters * @endpoint2 Returned endpoint 2 configuration parameters * @state: Returned link state: 1 - link is up, 0 - link is down diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h index ec24415..9106f25 100644 --- a/include/fsl-mc/fsl_mc.h +++ b/include/fsl-mc/fsl_mc.h @@ -21,12 +21,9 @@ #define GCR1_M2_DE_RST BIT(14) #define GCR1_M_ALL_DE_RST (GCR1_M1_DE_RST | GCR1_M2_DE_RST) #define GSR_FS_MASK 0x3fffffff -#define MCFAPR_PL_MASK (0x1 << 18) -#define MCFAPR_BMT_MASK (0x1 << 17) -#define MCFAPR_BYPASS_ICID_MASK \ - (MCFAPR_PL_MASK | MCFAPR_BMT_MASK) #define SOC_MC_PORTALS_BASE_ADDR ((void __iomem *)0x00080C000000) +#define SOC_QBMAN_PORTALS_BASE_ADDR ((void __iomem *)0x000818000000) #define SOC_MC_PORTAL_STRIDE 0x10000 #define SOC_MC_PORTAL_ADDR(_portal_id) \ diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index 4099a74..728503b 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -136,4 +136,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, unsigned int controller_number, unsigned int dimm_number); +void update_spd_address(unsigned int ctrl_num, + unsigned int slot, + unsigned int *addr); #endif diff --git a/include/g_dnl.h b/include/g_dnl.h index 4eeb5e4..ba49f1f 100644 --- a/include/g_dnl.h +++ b/include/g_dnl.h @@ -34,6 +34,7 @@ struct g_dnl_bind_callback { }; int g_dnl_bind_fixup(struct usb_device_descriptor *, const char *); +int g_dnl_get_board_bcd_device_number(int gcnum); int g_dnl_board_usb_cable_connected(void); int g_dnl_register(const char *s); void g_dnl_unregister(void); diff --git a/include/image.h b/include/image.h index b6eb57e..63c3d37 100644 --- a/include/image.h +++ b/include/image.h @@ -246,6 +246,8 @@ struct lmb; #define IH_TYPE_LPC32XXIMAGE 21 /* x86 setup.bin Image */ #define IH_TYPE_LOADABLE 22 /* A list of typeless images */ +#define IH_TYPE_COUNT 23 /* Number of image types */ + /* * Compression Types */ @@ -411,6 +413,15 @@ char *get_table_entry_name(const table_entry_t *table, char *msg, int id); const char *genimg_get_os_name(uint8_t os); const char *genimg_get_arch_name(uint8_t arch); const char *genimg_get_type_name(uint8_t type); + +/** + * genimg_get_type_short_name() - get the short name for an image type + * + * @param type Image type (IH_TYPE_...) + * @return image short name, or "unknown" if unknown + */ +const char *genimg_get_type_short_name(uint8_t type); + const char *genimg_get_comp_name(uint8_t comp); int genimg_get_os_id(const char *name); int genimg_get_arch_id(const char *name); diff --git a/include/led.h b/include/led.h new file mode 100644 index 0000000..b929d0c --- /dev/null +++ b/include/led.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2015 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __LED_H +#define __LED_H + +/** + * struct led_uclass_plat - Platform data the uclass stores about each device + * + * @label: LED label + */ +struct led_uclass_plat { + const char *label; +}; + +struct led_ops { + /** + * set_on() - set the state of an LED + * + * @dev: LED device to change + * @on: 1 to turn the LED on, 0 to turn it off + * @return 0 if OK, -ve on error + */ + int (*set_on)(struct udevice *dev, int on); +}; + +#define led_get_ops(dev) ((struct led_ops *)(dev)->driver->ops) + +/** + * led_get_by_label() - Find an LED device by label + * + * @label: LED label to look up + * @devp: Returns the associated device, if found + * @return 0 if found, -ENODEV if not found, other -ve on error + */ +int led_get_by_label(const char *label, struct udevice **devp); + +/** + * led_set_on() - set the state of an LED + * + * @dev: LED device to change + * @on: 1 to turn the LED on, 0 to turn it off + * @return 0 if OK, -ve on error + */ +int led_set_on(struct udevice *dev, int on); + +#endif diff --git a/include/libfdt.h b/include/libfdt.h index f3cbb63..e48c21a 100644 --- a/include/libfdt.h +++ b/include/libfdt.h @@ -121,7 +121,12 @@ /* FDT_ERR_BADNCELLS: Device tree has a #address-cells, #size-cells * or similar property with a bad format or value */ -#define FDT_ERR_MAX 14 +#define FDT_ERR_TOODEEP 15 + /* FDT_ERR_TOODEEP: The depth of a node has exceeded the internal + * libfdt limit. This can happen if you have more than + * FDT_MAX_DEPTH nested nodes. */ + +#define FDT_ERR_MAX 15 /**********************************************************************/ /* Low-level functions (you probably don't need these) */ @@ -915,7 +920,7 @@ int fdt_get_string_index(const void *fdt, int node, const char *property, int index, const char **output); /** - * fdt_get_string() - obtain the string at a given index in a string list + * fdt_get_string() - obtain the first string in a string list * @fdt: pointer to the device tree blob * @node: offset of the node * @property: name of the property containing the string list @@ -1646,11 +1651,99 @@ int fdt_del_node(void *fdt, int nodeoffset); const char *fdt_strerror(int errval); +/** + * fdt_remove_unused_strings() - Remove any unused strings from an FDT + * + * This creates a new device tree in @new with unused strings removed. The + * called can then use fdt_pack() to minimise the space consumed. + * + * @old: Old device tree blog + * @new: Place to put new device tree blob, which must be as large as + * @old + * @return + * 0, on success + * -FDT_ERR_BADOFFSET, corrupt device tree + * -FDT_ERR_NOSPACE, out of space, which should not happen unless there + * is something very wrong with the device tree input + */ +int fdt_remove_unused_strings(const void *old, void *new); + struct fdt_region { int offset; int size; }; +/* + * Flags for fdt_find_regions() + * + * Add a region for the string table (always the last region) + */ +#define FDT_REG_ADD_STRING_TAB (1 << 0) + +/* + * Add all supernodes of a matching node/property, useful for creating a + * valid subset tree + */ +#define FDT_REG_SUPERNODES (1 << 1) + +/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */ +#define FDT_REG_DIRECT_SUBNODES (1 << 2) + +/* Add all subnodes of a matching node */ +#define FDT_REG_ALL_SUBNODES (1 << 3) + +/* Add a region for the mem_rsvmap table (always the first region) */ +#define FDT_REG_ADD_MEM_RSVMAP (1 << 4) + +/* Indicates what an fdt part is (node, property, value) */ +#define FDT_IS_NODE (1 << 0) +#define FDT_IS_PROP (1 << 1) +#define FDT_IS_VALUE (1 << 2) /* not supported */ +#define FDT_IS_COMPAT (1 << 3) /* used internally */ +#define FDT_NODE_HAS_PROP (1 << 4) /* node contains prop */ + +#define FDT_ANY_GLOBAL (FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \ + FDT_IS_COMPAT) +#define FDT_IS_ANY 0x1f /* all the above */ + +/* We set a reasonable limit on the number of nested nodes */ +#define FDT_MAX_DEPTH 32 + +/* Decribes what we want to include from the current tag */ +enum want_t { + WANT_NOTHING, + WANT_NODES_ONLY, /* No properties */ + WANT_NODES_AND_PROPS, /* Everything for one level */ + WANT_ALL_NODES_AND_PROPS /* Everything for all levels */ +}; + +/* Keeps track of the state at parent nodes */ +struct fdt_subnode_stack { + int offset; /* Offset of node */ + enum want_t want; /* The 'want' value here */ + int included; /* 1 if we included this node, 0 if not */ +}; + +struct fdt_region_ptrs { + int depth; /* Current tree depth */ + int done; /* What we have completed scanning */ + enum want_t want; /* What we are currently including */ + char *end; /* Pointer to end of full node path */ + int nextoffset; /* Next node offset to check */ +}; + +/* The state of our finding algortihm */ +struct fdt_region_state { + struct fdt_subnode_stack stack[FDT_MAX_DEPTH]; /* node stack */ + struct fdt_region *region; /* Contains list of regions found */ + int count; /* Numnber of regions found */ + const void *fdt; /* FDT blob */ + int max_regions; /* Maximum regions to find */ + int can_merge; /* 1 if we can merge with previous region */ + int start; /* Start position of current region */ + struct fdt_region_ptrs ptrs; /* Pointers for what we are up to */ +}; + /** * fdt_find_regions() - find regions in device tree * @@ -1710,4 +1803,165 @@ int fdt_find_regions(const void *fdt, char * const inc[], int inc_count, struct fdt_region region[], int max_regions, char *path, int path_len, int add_string_tab); +/** + * fdt_first_region() - find regions in device tree + * + * Given a nodes and properties to include and properties to exclude, find + * the regions of the device tree which describe those included parts. + * + * The use for this function is twofold. Firstly it provides a convenient + * way of performing a structure-aware grep of the tree. For example it is + * possible to grep for a node and get all the properties associated with + * that node. Trees can be subsetted easily, by specifying the nodes that + * are required, and then writing out the regions returned by this function. + * This is useful for small resource-constrained systems, such as boot + * loaders, which want to use an FDT but do not need to know about all of + * it. + * + * Secondly it makes it easy to hash parts of the tree and detect changes. + * The intent is to get a list of regions which will be invariant provided + * those parts are invariant. For example, if you request a list of regions + * for all nodes but exclude the property "data", then you will get the + * same region contents regardless of any change to "data" properties. + * + * This function can be used to produce a byte-stream to send to a hashing + * function to verify that critical parts of the FDT have not changed. + * Note that semantically null changes in order could still cause false + * hash misses. Such reordering might happen if the tree is regenerated + * from source, and nodes are reordered (the bytes-stream will be emitted + * in a different order and mnay hash functions will detect this). However + * if an existing tree is modified using libfdt functions, such as + * fdt_add_subnode() and fdt_setprop(), then this problem is avoided. + * + * The nodes/properties to include/exclude are defined by a function + * provided by the caller. This function is called for each node and + * property, and must return: + * + * 0 - to exclude this part + * 1 - to include this part + * -1 - for FDT_IS_PROP only: no information is available, so include + * if its containing node is included + * + * The last case is only used to deal with properties. Often a property is + * included if its containing node is included - this is the case where + * -1 is returned.. However if the property is specifically required to be + * included/excluded, then 0 or 1 can be returned. Note that including a + * property when the FDT_REG_SUPERNODES flag is given will force its + * containing node to be included since it is not valid to have a property + * that is not in a node. + * + * Using the information provided, the inclusion of a node can be controlled + * either by a node name or its compatible string, or any other property + * that the function can determine. + * + * As an example, including node "/" means to include the root node and all + * root properties. A flag provides a way of also including supernodes (of + * which there is none for the root node), and another flag includes + * immediate subnodes, so in this case we would get the FDT_BEGIN_NODE and + * FDT_END_NODE of all subnodes of /. + * + * The subnode feature helps in a hashing situation since it prevents the + * root node from changing at all. Any change to non-excluded properties, + * names of subnodes or number of subnodes would be detected. + * + * When used with FITs this provides the ability to hash and sign parts of + * the FIT based on different configurations in the FIT. Then it is + * impossible to change anything about that configuration (include images + * attached to the configuration), but it may be possible to add new + * configurations, new images or new signatures within the existing + * framework. + * + * Adding new properties to a device tree may result in the string table + * being extended (if the new property names are different from those + * already added). This function can optionally include a region for + * the string table so that this can be part of the hash too. This is always + * the last region. + * + * The FDT also has a mem_rsvmap table which can also be included, and is + * always the first region if so. + * + * The device tree header is not included in the region list. Since the + * contents of the FDT are changing (shrinking, often), the caller will need + * to regenerate the header anyway. + * + * @fdt: Device tree to check + * @h_include: Function to call to determine whether to include a part or + * not: + * + * @priv: Private pointer as passed to fdt_find_regions() + * @fdt: Pointer to FDT blob + * @offset: Offset of this node / property + * @type: Type of this part, FDT_IS_... + * @data: Pointer to data (node name, property name, compatible + * string, value (not yet supported) + * @size: Size of data, or 0 if none + * @return 0 to exclude, 1 to include, -1 if no information is + * available + * @priv: Private pointer passed to h_include + * @region: Returns list of regions, sorted by offset + * @max_regions: Maximum length of region list + * @path: Pointer to a temporary string for the function to use for + * building path names + * @path_len: Length of path, must be large enough to hold the longest + * path in the tree + * @flags: Various flags that control the region algortihm, see + * FDT_REG_... + * @return number of regions in list. If this is >max_regions then the + * region array was exhausted. You should increase max_regions and try + * the call again. Only the first max_regions elements are available in the + * array. + * + * On error a -ve value is return, which can be: + * + * -FDT_ERR_BADSTRUCTURE (too deep or more END tags than BEGIN tags + * -FDT_ERR_BADLAYOUT + * -FDT_ERR_NOSPACE (path area is too small) + */ +int fdt_first_region(const void *fdt, + int (*h_include)(void *priv, const void *fdt, int offset, + int type, const char *data, int size), + void *priv, struct fdt_region *region, + char *path, int path_len, int flags, + struct fdt_region_state *info); + +/** fdt_next_region() - find next region + * + * See fdt_first_region() for full description. This function finds the + * next region according to the provided parameters, which must be the same + * as passed to fdt_first_region(). + * + * This function can additionally return -FDT_ERR_NOTFOUND when there are no + * more regions + */ +int fdt_next_region(const void *fdt, + int (*h_include)(void *priv, const void *fdt, int offset, + int type, const char *data, int size), + void *priv, struct fdt_region *region, + char *path, int path_len, int flags, + struct fdt_region_state *info); + +/** + * fdt_add_alias_regions() - find aliases that point to existing regions + * + * Once a device tree grep is complete some of the nodes will be present + * and some will have been dropped. This function checks all the alias nodes + * to figure out which points point to nodes which are still present. These + * aliases need to be kept, along with the nodes they reference. + * + * Given a list of regions function finds the aliases that still apply and + * adds more regions to the list for these. This function is called after + * fdt_next_region() has finished returning regions and requires the same + * state. + * + * @fdt: Device tree file to reference + * @region: List of regions that will be kept + * @count: Number of regions + * @max_regions: Number of entries that can fit in @region + * @info: Region state as returned from fdt_next_region() + * @return new number of regions in @region (i.e. count + the number added) + * or -FDT_ERR_NOSPACE if there was not enough space. + */ +int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count, + int max_regions, struct fdt_region_state *info); + #endif /* _LIBFDT_H */ diff --git a/include/linker_lists.h b/include/linker_lists.h index b22d169..76898ab 100644 --- a/include/linker_lists.h +++ b/include/linker_lists.h @@ -83,7 +83,7 @@ * global list name ("outer"); iterators for only a sub-list should use * the full sub-list name ("outer_2_inner"). * - * Here is an example of the sections generated from a global list + * Here is an example of the sections generated from a global list * named "drivers", two sub-lists named "i2c" and "pci", and iterators * defined for the whole list and each sub-list: * @@ -103,7 +103,7 @@ */ /** - * ll_sym() - Access a linker-generated array entry + * llsym() - Access a linker-generated array entry * @_type: Data type of the entry * @_name: Name of the entry * @_list: name of the list. Should contain only characters allowed @@ -142,7 +142,7 @@ * the inner sections are present in the array. * * Example: - * ll_entry_declare(struct my_sub_cmd, my_sub_cmd, cmd_sub, cmd.sub) = { + * ll_entry_declare(struct my_sub_cmd, my_sub_cmd, cmd_sub) = { * .x = 3, * .y = 4, * }; @@ -162,7 +162,7 @@ * This is like ll_entry_declare() but creates multiple entries. It should * be assigned to an array. * - * ll_entry_declare_list(struct my_sub_cmd, my_sub_cmd, cmd_sub, cmd.sub) = { + * ll_entry_declare_list(struct my_sub_cmd, my_sub_cmd, cmd_sub) = { * { .x = 3, .y = 4 }, * { .x = 8, .y = 2 }, * { .x = 1, .y = 7 } @@ -222,7 +222,7 @@ */ #define ll_entry_end(_type, _list) \ ({ \ - static char end[0] __aligned(4) __attribute__((unused, \ + static char end[0] __aligned(4) __attribute__((unused, \ section(".u_boot_list_2_"#_list"_3"))); \ (_type *)&end; \ }) @@ -256,8 +256,8 @@ * @_name: Name of the entry * @_list: Name of the list in which this entry is placed * - * This function returns a pointer to a particular entry in LG-array - * identified by the subsection of u_boot_list where the entry resides + * This function returns a pointer to a particular entry in linker-generated + * array identified by the subsection of u_boot_list where the entry resides * and it's name. * * Example: @@ -272,7 +272,7 @@ ({ \ extern _type _u_boot_list_2_##_list##_2_##_name; \ _type *_ll_result = \ - &_u_boot_list_2_##_list##_2_##_name; \ + &_u_boot_list_2_##_list##_2_##_name; \ _ll_result; \ }) @@ -297,7 +297,7 @@ }) /** - * ll_entry_end() - Point after last entry of last linker-generated array + * ll_end() - Point after last entry of last linker-generated array * @_type: Data type of the entry * * This function returns (_type *) pointer after the very last entry of @@ -311,7 +311,7 @@ */ #define ll_end(_type) \ ({ \ - static char end[0] __aligned(4) __attribute__((unused, \ + static char end[0] __aligned(4) __attribute__((unused, \ section(".u_boot_list_3"))); \ (_type *)&end; \ }) diff --git a/include/linux/compat.h b/include/linux/compat.h index 6ff3915..fbebf91 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -36,10 +36,25 @@ extern struct p_current *current; #define KERN_INFO #define KERN_DEBUG +#define GFP_ATOMIC ((gfp_t) 0) +#define GFP_KERNEL ((gfp_t) 0) +#define GFP_NOFS ((gfp_t) 0) +#define GFP_USER ((gfp_t) 0) +#define __GFP_NOWARN ((gfp_t) 0) +#define __GFP_ZERO ((__force gfp_t)0x8000u) /* Return zeroed page on success */ + void *kmalloc(size_t size, int flags); -void *kzalloc(size_t size, int flags); + +static inline void *kzalloc(size_t size, gfp_t flags) +{ + return kmalloc(size, flags | __GFP_ZERO); +} #define vmalloc(size) kmalloc(size, 0) #define __vmalloc(size, flags, pgsz) kmalloc(size, flags) +static inline void *vzalloc(unsigned long size) +{ + return kzalloc(size, 0); +} #define kfree(ptr) free(ptr) #define vfree(ptr) free(ptr) @@ -73,13 +88,6 @@ void *kmem_cache_alloc(struct kmem_cache *obj, int flag); /* drivers/char/random.c */ #define get_random_bytes(...) -/* idr.c */ -#define GFP_ATOMIC ((gfp_t) 0) -#define GFP_KERNEL ((gfp_t) 0) -#define GFP_NOFS ((gfp_t) 0) -#define GFP_USER ((gfp_t) 0) -#define __GFP_NOWARN ((gfp_t) 0) - /* include/linux/leds.h */ struct led_trigger {}; @@ -189,8 +197,6 @@ struct work_struct {}; unsigned long copy_from_user(void *dest, const void *src, unsigned long count); -void *vzalloc(unsigned long size); - typedef unused_t spinlock_t; typedef int wait_queue_head_t; @@ -315,8 +321,6 @@ struct notifier_block {}; typedef unsigned long dmaaddr_t; -#define cpu_relax() do {} while (0) - #define pm_runtime_get_sync(dev) do {} while (0) #define pm_runtime_put(dev) do {} while (0) #define pm_runtime_put_sync(dev) do {} while (0) diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h index 7edc760..dd934a0 100644 --- a/include/linux/usb/dwc3.h +++ b/include/linux/usb/dwc3.h @@ -109,7 +109,11 @@ struct dwc3 { /* offset: 0xC100 */ u32 g_hwparams8; - u32 reserved4[63]; + u32 reserved4[11]; + + u32 g_fladj; + + u32 reserved5[51]; u32 d_cfg; u32 d_ctl; @@ -118,15 +122,15 @@ struct dwc3 { /* offset: 0xC100 */ u32 d_gcmdpar; u32 d_gcmd; - u32 reserved5[2]; + u32 reserved6[2]; u32 d_alepena; - u32 reserved6[55]; + u32 reserved7[55]; struct d_physical_endpoint d_phy_ep_cmd[32]; - u32 reserved7[128]; + u32 reserved8[128]; u32 o_cfg; u32 o_ctl; @@ -134,7 +138,7 @@ struct dwc3 { /* offset: 0xC100 */ u32 o_evten; u32 o_sts; - u32 reserved8[3]; + u32 reserved9[3]; u32 adp_cfg; u32 adp_ctl; @@ -143,7 +147,7 @@ struct dwc3 { /* offset: 0xC100 */ u32 bc_cfg; - u32 reserved9; + u32 reserved10; u32 bc_evt; u32 bc_evten; @@ -191,4 +195,16 @@ struct dwc3 { /* offset: 0xC100 */ #define DWC3_DCTL_CSFTRST (1 << 30) #define DWC3_DCTL_LSFTRST (1 << 29) +/* Global Frame Length Adjustment Register */ +#define GFLADJ_30MHZ_REG_SEL (1 << 7) +#define GFLADJ_30MHZ(n) ((n) & 0x3f) +#define GFLADJ_30MHZ_DEFAULT 0x20 + +#ifdef CONFIG_USB_XHCI_DWC3 +void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode); +void dwc3_core_soft_reset(struct dwc3 *dwc3_reg); +int dwc3_core_init(struct dwc3 *dwc3_reg); +void usb_phy_reset(struct dwc3 *dwc3_reg); +void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val); +#endif #endif /* __DWC3_H_ */ diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h new file mode 100644 index 0000000..602a413 --- /dev/null +++ b/include/linux/usb/xhci-fsl.h @@ -0,0 +1,64 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * FSL USB HOST xHCI Controller + * + * Author: Ramneek Mehresh<ramneek.mehresh@freescale.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_ARCH_XHCI_FSL_H_ +#define _ASM_ARCH_XHCI_FSL_H_ + +/* Default to the FSL XHCI defines */ +#define USB3_PWRCTL_CLK_CMD_MASK 0x3FE000 +#define USB3_PWRCTL_CLK_FREQ_MASK 0xFFC +#define USB3_PHY_PARTIAL_RX_POWERON BIT(6) +#define USB3_PHY_RX_POWERON BIT(14) +#define USB3_PHY_TX_POWERON BIT(15) +#define USB3_PHY_TX_RX_POWERON (USB3_PHY_RX_POWERON | USB3_PHY_TX_POWERON) +#define USB3_PWRCTL_CLK_CMD_SHIFT 14 +#define USB3_PWRCTL_CLK_FREQ_SHIFT 22 + +/* USBOTGSS_WRAPPER definitions */ +#define USBOTGSS_WRAPRESET BIT(17) +#define USBOTGSS_DMADISABLE BIT(16) +#define USBOTGSS_STANDBYMODE_NO_STANDBY BIT(4) +#define USBOTGSS_STANDBYMODE_SMRT BIT(5) +#define USBOTGSS_STANDBYMODE_SMRT_WKUP (0x3 << 4) +#define USBOTGSS_IDLEMODE_NOIDLE BIT(2) +#define USBOTGSS_IDLEMODE_SMRT BIT(3) +#define USBOTGSS_IDLEMODE_SMRT_WKUP (0x3 << 2) + +/* USBOTGSS_IRQENABLE_SET_0 bit */ +#define USBOTGSS_COREIRQ_EN BIT(1) + +/* USBOTGSS_IRQENABLE_SET_1 bits */ +#define USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN BIT(1) +#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN BIT(3) +#define USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN BIT(4) +#define USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN BIT(5) +#define USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN BIT(8) +#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN BIT(11) +#define USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN BIT(12) +#define USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN BIT(13) +#define USBOTGSS_IRQ_SET_1_OEVT_EN BIT(16) +#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN BIT(17) + +struct fsl_xhci { + struct xhci_hccr *hcd; + struct dwc3 *dwc3_reg; +}; + +#if defined(CONFIG_LS102XA) +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 +#elif defined(CONFIG_LS2085A) +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS2085A_XHCI_USB1_ADDR +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_LS2085A_XHCI_USB2_ADDR +#endif + +#define FSL_USB_XHCI_ADDR {CONFIG_SYS_FSL_XHCI_USB1_ADDR, \ + CONFIG_SYS_FSL_XHCI_USB2_ADDR} +#endif /* _ASM_ARCH_XHCI_FSL_H_ */ diff --git a/include/mmc.h b/include/mmc.h index dd98b3b..cda9a19 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -266,6 +266,28 @@ #define MMC_NUM_BOOT_PARTITION 2 #define MMC_PART_RPMB 3 /* RPMB partition number */ +/* Driver model support */ + +/** + * struct mmc_uclass_priv - Holds information about a device used by the uclass + */ +struct mmc_uclass_priv { + struct mmc *mmc; +}; + +/** + * mmc_get_mmc_dev() - get the MMC struct pointer for a device + * + * Provided that the device is already probed and ready for use, this value + * will be available. + * + * @dev: Device + * @return associated mmc struct pointer if available, else NULL + */ +struct mmc *mmc_get_mmc_dev(struct udevice *dev); + +/* End of driver model support */ + struct mmc_cid { unsigned long psn; unsigned short oid; diff --git a/include/net.h b/include/net.h index d17173d..d09bec9 100644 --- a/include/net.h +++ b/include/net.h @@ -93,6 +93,14 @@ struct eth_pdata { int phy_interface; }; +enum eth_recv_flags { + /* + * Check hardware device for new packets (otherwise only return those + * which are already in the memory buffer ready to process) + */ + ETH_RECV_CHECK_DEVICE = 1 << 0, +}; + /** * struct eth_ops - functions of Ethernet MAC controllers * @@ -111,7 +119,9 @@ struct eth_pdata { * mcast: Join or leave a multicast group (for TFTP) - optional * write_hwaddr: Write a MAC address to the hardware (used to pass it to Linux * on some platforms like ARM). This function expects the - * eth_pdata::enetaddr field to be populated - optional + * eth_pdata::enetaddr field to be populated. The method can + * return -ENOSYS to indicate that this is not implemented for + this hardware - optional. * read_rom_hwaddr: Some devices have a backup of the MAC address stored in a * ROM on the board. This is how the driver should expose it * to the network stack. This function should fill in the @@ -120,7 +130,7 @@ struct eth_pdata { struct eth_ops { int (*start)(struct udevice *dev); int (*send)(struct udevice *dev, void *packet, int length); - int (*recv)(struct udevice *dev, uchar **packetp); + int (*recv)(struct udevice *dev, int flags, uchar **packetp); int (*free_pkt)(struct udevice *dev, uchar *packet, int length); void (*stop)(struct udevice *dev); #ifdef CONFIG_MCAST_TFTP diff --git a/include/pci.h b/include/pci.h index 542e68b..94bca97 100644 --- a/include/pci.h +++ b/include/pci.h @@ -468,7 +468,10 @@ typedef int pci_dev_t; #define PCI_ANY_ID (~0) struct pci_device_id { - unsigned int vendor, device; /* Vendor and device ID or PCI_ANY_ID */ + unsigned int vendor, device; /* Vendor and device ID or PCI_ANY_ID */ + unsigned int subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */ + unsigned int class, class_mask; /* (class,subclass,prog-if) triplet */ + unsigned long driver_data; /* Data private to the driver */ }; struct pci_controller; @@ -805,6 +808,14 @@ struct dm_pci_ops { #define pci_get_ops(dev) ((struct dm_pci_ops *)(dev)->driver->ops) /** + * pci_get_bdf() - Get the BDF value for a device + * + * @dev: Device to check + * @return bus/device/function value (see PCI_BDF()) + */ +pci_dev_t pci_get_bdf(struct udevice *dev); + +/** * pci_bind_bus_devices() - scan a PCI bus and bind devices * * Scan a PCI bus looking for devices. Bind each one that is found. If @@ -1101,7 +1112,79 @@ struct dm_pci_emul_ops { int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn, struct udevice **emulp); -#endif +#endif /* CONFIG_DM_PCI */ + +/** + * PCI_DEVICE - macro used to describe a specific pci device + * @vend: the 16 bit PCI Vendor ID + * @dev: the 16 bit PCI Device ID + * + * This macro is used to create a struct pci_device_id that matches a + * specific device. The subvendor and subdevice fields will be set to + * PCI_ANY_ID. + */ +#define PCI_DEVICE(vend, dev) \ + .vendor = (vend), .device = (dev), \ + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID + +/** + * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem + * @vend: the 16 bit PCI Vendor ID + * @dev: the 16 bit PCI Device ID + * @subvend: the 16 bit PCI Subvendor ID + * @subdev: the 16 bit PCI Subdevice ID + * + * This macro is used to create a struct pci_device_id that matches a + * specific device with subsystem information. + */ +#define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \ + .vendor = (vend), .device = (dev), \ + .subvendor = (subvend), .subdevice = (subdev) + +/** + * PCI_DEVICE_CLASS - macro used to describe a specific pci device class + * @dev_class: the class, subclass, prog-if triple for this device + * @dev_class_mask: the class mask for this device + * + * This macro is used to create a struct pci_device_id that matches a + * specific PCI class. The vendor, device, subvendor, and subdevice + * fields will be set to PCI_ANY_ID. + */ +#define PCI_DEVICE_CLASS(dev_class, dev_class_mask) \ + .class = (dev_class), .class_mask = (dev_class_mask), \ + .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID + +/** + * PCI_VDEVICE - macro used to describe a specific pci device in short form + * @vend: the vendor name + * @dev: the 16 bit PCI Device ID + * + * This macro is used to create a struct pci_device_id that matches a + * specific PCI device. The subvendor, and subdevice fields will be set + * to PCI_ANY_ID. The macro allows the next field to follow as the device + * private data. + */ + +#define PCI_VDEVICE(vend, dev) \ + .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \ + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0 + +/** + * struct pci_driver_entry - Matches a driver to its pci_device_id list + * @driver: Driver to use + * @match: List of match records for this driver, terminated by {} + */ +struct pci_driver_entry { + struct driver *driver; + const struct pci_device_id *match; +}; + +#define U_BOOT_PCI_DEVICE(__name, __match) \ + ll_entry_declare(struct pci_driver_entry, __name, pci_driver_entry) = {\ + .driver = llsym(struct driver, __name, driver), \ + .match = __match, \ + } #endif /* __ASSEMBLY__ */ #endif /* _PCI_H */ diff --git a/include/power/pmic.h b/include/power/pmic.h index eb152ef..6ba4b6e 100644 --- a/include/power/pmic.h +++ b/include/power/pmic.h @@ -264,6 +264,40 @@ int pmic_reg_count(struct udevice *dev); */ int pmic_read(struct udevice *dev, uint reg, uint8_t *buffer, int len); int pmic_write(struct udevice *dev, uint reg, const uint8_t *buffer, int len); + +/** + * pmic_reg_read() - read a PMIC register value + * + * @dev: PMIC device to read + * @reg: Register to read + * @return value read on success or negative value of errno. + */ +int pmic_reg_read(struct udevice *dev, uint reg); + +/** + * pmic_reg_write() - write a PMIC register value + * + * @dev: PMIC device to write + * @reg: Register to write + * @value: Value to write + * @return 0 on success or negative value of errno. + */ +int pmic_reg_write(struct udevice *dev, uint reg, uint value); + +/** + * pmic_clrsetbits() - clear and set bits in a PMIC register + * + * This reads a register, optionally clears some bits, optionally sets some + * bits, then writes the register. + * + * @dev: PMIC device to update + * @reg: Register to update + * @clr: Bit mask to clear (set those bits that you want cleared) + * @set: Bit mask to set (set those bits that you want set) + * @return 0 on success or negative value of errno. + */ +int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set); + #endif /* CONFIG_DM_PMIC */ #ifdef CONFIG_POWER diff --git a/include/power/regulator.h b/include/power/regulator.h index 03a2cef..0152290 100644 --- a/include/power/regulator.h +++ b/include/power/regulator.h @@ -128,6 +128,11 @@ struct dm_regulator_mode { const char *name; }; +enum regulator_flag { + REGULATOR_FLAG_AUTOSET_UV = 1 << 0, + REGULATOR_FLAG_AUTOSET_UA = 1 << 1, +}; + /** * struct dm_regulator_uclass_platdata - pointed by dev->uclass_platdata, and * allocated on each regulator bind. This structure holds an information @@ -143,6 +148,8 @@ struct dm_regulator_mode { * @max_uA* - maximum amperage (micro Amps) * @always_on* - bool type, true or false * @boot_on* - bool type, true or false + * TODO(sjg@chromium.org): Consider putting the above two into @flags + * @flags: - flags value (see REGULATOR_FLAG_...) * @name** - fdt regulator name - should be taken from the device tree * * Note: @@ -162,6 +169,7 @@ struct dm_regulator_uclass_platdata { bool always_on; bool boot_on; const char *name; + int flags; }; /* Regulator device operations */ @@ -308,9 +316,39 @@ int regulator_get_mode(struct udevice *dev); int regulator_set_mode(struct udevice *dev, int mode_id); /** - * regulator_autoset: setup the regulator given by its uclass's platform data - * name field. The setup depends on constraints found in device's uclass's - * platform data (struct dm_regulator_uclass_platdata): + * regulators_enable_boot_on() - enable regulators needed for boot + * + * This enables all regulators which are marked to be on at boot time. This + * only works for regulators which don't have a range for voltage/current, + * since in that case it is not possible to know which value to use. + * + * This effectively calls regulator_autoset() for every regulator. + */ +int regulators_enable_boot_on(bool verbose); + +/** + * regulator_autoset: setup the voltage/current on a regulator + * + * The setup depends on constraints found in device's uclass's platform data + * (struct dm_regulator_uclass_platdata): + * + * - Enable - will set - if any of: 'always_on' or 'boot_on' is set to true, + * or if both are unset, then the function returns + * - Voltage value - will set - if '.min_uV' and '.max_uV' values are equal + * - Current limit - will set - if '.min_uA' and '.max_uA' values are equal + * + * The function returns on the first-encountered error. + * + * @platname - expected string for dm_regulator_uclass_platdata .name field + * @devp - returned pointer to the regulator device - if non-NULL passed + * @return: 0 on success or negative value of errno. + */ +int regulator_autoset(struct udevice *dev); + +/** + * regulator_autoset_by_name: setup the regulator given by its uclass's + * platform data name field. The setup depends on constraints found in device's + * uclass's platform data (struct dm_regulator_uclass_platdata): * - Enable - will set - if any of: 'always_on' or 'boot_on' is set to true, * or if both are unset, then the function returns * - Voltage value - will set - if '.min_uV' and '.max_uV' values are equal @@ -320,21 +358,18 @@ int regulator_set_mode(struct udevice *dev, int mode_id); * * @platname - expected string for dm_regulator_uclass_platdata .name field * @devp - returned pointer to the regulator device - if non-NULL passed - * @verbose - (true/false) print regulator setup info, or be quiet * @return: 0 on success or negative value of errno. * * The returned 'regulator' device can be used with: * - regulator_get/set_* */ -int regulator_autoset(const char *platname, - struct udevice **devp, - bool verbose); +int regulator_autoset_by_name(const char *platname, struct udevice **devp); /** * regulator_list_autoset: setup the regulators given by list of their uclass's * platform data name field. The setup depends on constraints found in device's * uclass's platform data. The function loops with calls to: - * regulator_autoset() for each name from the list. + * regulator_autoset_by_name() for each name from the list. * * @list_platname - an array of expected strings for .name field of each * regulator's uclass platdata @@ -375,7 +410,7 @@ int regulator_get_by_devname(const char *devname, struct udevice **devp); * Search by name, found in regulator uclass platdata. * * @platname - expected string for uc_pdata->name of regulator uclass platdata - * @devp - returned pointer to the regulator device + * @devp - returns pointer to the regulator device or NULL on error * @return 0 on success or negative value of errno. * * The returned 'regulator' device is probed and can be used with: diff --git a/include/power/sandbox_pmic.h b/include/power/sandbox_pmic.h index ae14292..8547674 100644 --- a/include/power/sandbox_pmic.h +++ b/include/power/sandbox_pmic.h @@ -117,11 +117,11 @@ enum { /* * Expected regulators setup after call of: - * - regulator_autoset() + * - regulator_autoset_by_name() * - regulator_list_autoset() */ -/* BUCK1: for testing regulator_autoset() */ +/* BUCK1: for testing regulator_autoset_by_name() */ #define SANDBOX_BUCK1_AUTOSET_EXPECTED_UV 1200000 #define SANDBOX_BUCK1_AUTOSET_EXPECTED_UA 200000 #define SANDBOX_BUCK1_AUTOSET_EXPECTED_ENABLE true diff --git a/include/ram.h b/include/ram.h new file mode 100644 index 0000000..e2172a8 --- /dev/null +++ b/include/ram.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2015 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __RAM_H +#define __RAM_H + +struct ram_info { + phys_addr_t base; + size_t size; +}; + +struct ram_ops { + /** + * get_info() - Get basic memory info + * + * @dev: Device to check (UCLASS_RAM) + * @info: Place to put info + * @return 0 if OK, -ve on error + */ + int (*get_info)(struct udevice *dev, struct ram_info *info); +}; + +#define ram_get_ops(dev) ((struct ram_ops *)(dev)->driver->ops) + +/** + * ram_get_info() - Get information about a RAM device + * + * @dev: Device to check (UCLASS_RAM) + * @info: Returns RAM info + * @return 0 if OK, -ve on error + */ +int ram_get_info(struct udevice *dev, struct ram_info *info); + +#endif diff --git a/include/rc4.h b/include/rc4.h new file mode 100644 index 0000000..ea409c2 --- /dev/null +++ b/include/rc4.h @@ -0,0 +1,21 @@ +/* + * (C) Copyright 2015 Google, Inc + * + * (C) Copyright 2008-2014 Rockchip Electronics + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __RC4_H +#define __RC4_H + +/** + * rc4_encode() - encode a buf with the RC4 cipher + * + * @buf: Buffer to encode (it is overwrite in the process + * @len: Length of buffer in bytes + * @key: 16-byte key to use + */ +void rc4_encode(unsigned char *buf, unsigned int len, unsigned char key[16]); + +#endif diff --git a/include/regmap.h b/include/regmap.h new file mode 100644 index 0000000..eccf770 --- /dev/null +++ b/include/regmap.h @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2015 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __REGMAP_H +#define __REGMAP_H + +/** + * struct regmap_range - a register map range + * + * @start: Start address + * @size: Size in bytes + */ +struct regmap_range { + ulong start; + ulong size; +}; + +/** + * struct regmap - a way of accessing hardware/bus registers + * + * @base: Base address of register map + * @range_count: Number of ranges available within the map + * @range: Pointer to the list of ranges, allocated if @range_count > 1 + * @base_range: If @range_count is <= 1, @range points here + */ +struct regmap { + phys_addr_t base; + int range_count; + struct regmap_range *range, base_range; +}; + +/* + * Interface to provide access to registers either through a direct memory + * bus or through a peripheral bus like I2C, SPI. + */ +int regmap_write(struct regmap *map, uint offset, uint val); +int regmap_read(struct regmap *map, uint offset, uint *valp); + +#define regmap_write32(map, ptr, member, val) \ + regmap_write(map, (uint32_t *)(ptr)->member - (uint32_t *)(ptr), val) + +#define regmap_read32(map, ptr, member, valp) \ + regmap_read(map, (uint32_t *)(ptr)->member - (uint32_t *)(ptr), valp) + +/** + * regmap_init_mem() - Set up a new register map that uses memory access + * + * Use regmap_uninit() to free it. + * + * @dev: Device that uses this map + * @mapp: Returns allocated map + */ +int regmap_init_mem(struct udevice *dev, struct regmap **mapp); + +/** + * regmap_get_range() - Obtain the base memory address of a regmap range + * + * @map: Regmap to query + * @range_num: Range to look up + */ +void *regmap_get_range(struct regmap *map, unsigned int range_num); + +/** + * regmap_uninit() - free a previously inited regmap + */ +int regmap_uninit(struct regmap *map); + +#endif diff --git a/include/reset.h b/include/reset.h new file mode 100644 index 0000000..383761e --- /dev/null +++ b/include/reset.h @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2015 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __RESET_H +#define __RESET_H + +enum reset_t { + RESET_WARM, /* Reset CPU, keep GPIOs active */ + RESET_COLD, /* Reset CPU and GPIOs */ + RESET_POWER, /* Reset PMIC (remove and restore power) */ + + RESET_COUNT, +}; + +struct reset_ops { + /** + * request() - request a reset of the given type + * + * Note that this function may return before the reset takes effect. + * + * @type: Reset type to request + * @return -EINPROGRESS if the reset has been started and + * will complete soon, -EPROTONOSUPPORT if not supported + * by this device, 0 if the reset has already happened + * (in which case this method will not actually return) + */ + int (*request)(struct udevice *dev, enum reset_t type); +}; + +#define reset_get_ops(dev) ((struct reset_ops *)(dev)->driver->ops) + +/** + * reset_request() - request a reset + * + * @type: Reset type to request + * @return 0 if OK, -EPROTONOSUPPORT if not supported by this device + */ +int reset_request(struct udevice *dev, enum reset_t type); + +/** + * reset_walk() - cause a reset + * + * This works through the available reset devices until it finds one that can + * perform a reset. If the provided reset type is not available, the next one + * will be tried. + * + * If this function fails to reset, it will display a message and halt + * + * @type: Reset type to request + * @return -EINPROGRESS if a reset is in progress, -ENOSYS if not available + */ +int reset_walk(enum reset_t type); + +/** + * reset_walk_halt() - try to reset, otherwise halt + * + * This calls reset_walk(). If it returns, indicating that reset is not + * supported, it prints a message and halts. + */ +void reset_walk_halt(enum reset_t type); + +/** + * reset_cpu() - calls reset_walk(RESET_WARM) + */ +void reset_cpu(ulong addr); + +#endif diff --git a/include/spl.h b/include/spl.h index d19940f..8e53426 100644 --- a/include/spl.h +++ b/include/spl.h @@ -81,6 +81,18 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image); int spl_load_image_ext(block_dev_desc_t *block_dev, int partition, const char *filename); int spl_load_image_ext_os(block_dev_desc_t *block_dev, int partition); +/** + * spl_init() - Set up device tree and driver model in SPL if enabled + * + * Call this function in board_init_f() if you want to use device tree and + * driver model early, before board_init_r() is called. This function will + * be called from board_init_r() if not called earlier. + * + * If this is not called, then driver model will be inactive in SPL's + * board_init_f(), and no device tree will be available. + */ +int spl_init(void); + #ifdef CONFIG_SPL_BOARD_INIT void spl_board_init(void); #endif diff --git a/include/syscon.h b/include/syscon.h new file mode 100644 index 0000000..c62ccd6 --- /dev/null +++ b/include/syscon.h @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2015 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __SYSCON_H +#define __SYSCON_H + +/** + * struct syscon_uc_info - Information stored by the syscon UCLASS_UCLASS + * + * @regmap: Register map for this controller + */ +struct syscon_uc_info { + struct regmap *regmap; +}; + +/* So far there are no ops so this is a placeholder */ +struct syscon_ops { +}; + +#define syscon_get_ops(dev) ((struct syscon_ops *)(dev)->driver->ops) + +/** + * syscon_get_regmap() - Get access to a register map + * + * @dev: Device to check (UCLASS_SCON) + * @info: Returns regmap for the device + * @return 0 if OK, -ve on error + */ +struct regmap *syscon_get_regmap(struct udevice *dev); + +/** + * syscon_get_regmap_by_driver_data() - Look up a controller by its ID + * + * Each system controller can be accessed by its driver data, which is + * assumed to be unique through the scope of all system controllers that + * are in use. This function looks up the regmap given this driver data. + * + * @driver_data: Driver data value to look up + * @return register map correponding to @driver_data, or -ve error code + */ +struct regmap *syscon_get_regmap_by_driver_data(ulong driver_data); + +/** + * syscon_get_first_range() - get the first memory range from a syscon regmap + * + * @driver_data: Driver data value to look up + * @return first region of register map correponding to @driver_data, or + * -ve error code + */ +void *syscon_get_first_range(ulong driver_data); + +#endif diff --git a/include/test/ut.h b/include/test/ut.h index 5e5aa6c..da7c1a9 100644 --- a/include/test/ut.h +++ b/include/test/ut.h @@ -9,6 +9,8 @@ #ifndef __TEST_UT_H #define __TEST_UT_H +#include <linux/err.h> + struct unit_test_state; /** @@ -101,6 +103,19 @@ void ut_failf(struct unit_test_state *uts, const char *fname, int line, } \ } +/* Assert that a pointer is not an error pointer */ +#define ut_assertok_ptr(expr) { \ + const void *val = (expr); \ + \ + if (IS_ERR(val)) { \ + ut_failf(uts, __FILE__, __LINE__, __func__, \ + #expr " = NULL", \ + "Expected pointer, got error %ld", \ + PTR_ERR(val)); \ + return CMD_RET_FAILURE; \ + } \ +} + /* Assert that an operation succeeds (returns 0) */ #define ut_assertok(cond) ut_asserteq(0, cond) diff --git a/include/usb.h b/include/usb.h index dca512d..cf00ffd 100644 --- a/include/usb.h +++ b/include/usb.h @@ -175,9 +175,9 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller); int usb_lowlevel_stop(int index); #if defined(CONFIG_MUSB_HOST) || defined(CONFIG_DM_USB) -int usb_reset_root_port(void); +int usb_reset_root_port(struct usb_device *dev); #else -#define usb_reset_root_port() +#define usb_reset_root_port(dev) #endif int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, @@ -493,15 +493,31 @@ struct usb_device_id { /** * struct usb_driver_entry - Matches a driver to its usb_device_ids - * @compatible: Compatible string - * @data: Data for this compatible string + * @driver: Driver to use + * @match: List of match records for this driver, terminated by {} */ struct usb_driver_entry { struct driver *driver; const struct usb_device_id *match; }; -#define USB_DEVICE(__name, __match) \ +#define USB_DEVICE_ID_MATCH_DEVICE \ + (USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_PRODUCT) + +/** + * USB_DEVICE - macro used to describe a specific usb device + * @vend: the 16 bit USB Vendor ID + * @prod: the 16 bit USB Product ID + * + * This macro is used to create a struct usb_device_id that matches a + * specific device. + */ +#define USB_DEVICE(vend, prod) \ + .match_flags = USB_DEVICE_ID_MATCH_DEVICE, \ + .idVendor = (vend), \ + .idProduct = (prod) + +#define U_BOOT_USB_DEVICE(__name, __match) \ ll_entry_declare(struct usb_driver_entry, __name, usb_driver_entry) = {\ .driver = llsym(struct driver, __name, driver), \ .match = __match, \ @@ -705,15 +721,16 @@ struct dm_usb_ops { * is read). This should be NULL for EHCI, which does not need this. */ int (*alloc_device)(struct udevice *bus, struct usb_device *udev); + + /** + * reset_root_port() - Reset usb root port + */ + int (*reset_root_port)(struct udevice *bus, struct usb_device *udev); }; #define usb_get_ops(dev) ((struct dm_usb_ops *)(dev)->driver->ops) #define usb_get_emul_ops(dev) ((struct dm_usb_ops *)(dev)->driver->ops) -#ifdef CONFIG_MUSB_HOST -int usb_reset_root_port(void); -#endif - /** * usb_get_dev_index() - look up a device index number * @@ -730,26 +747,18 @@ int usb_reset_root_port(void); struct usb_device *usb_get_dev_index(struct udevice *bus, int index); /** - * usb_legacy_port_reset() - Legacy function to reset a hub port - * - * @hub: Hub device - * @portnr: Port number (1=first) - */ -int usb_legacy_port_reset(struct usb_device *hub, int portnr); - -/** * usb_setup_device() - set up a device ready for use * * @dev: USB device pointer. This need not be a real device - it is * common for it to just be a local variable with its ->dev - * member (i.e. @dev->dev) set to the parent device + * member (i.e. @dev->dev) set to the parent device and + * dev->portnr set to the port number on the hub (1=first) * @do_read: true to read the device descriptor before an address is set * (should be false for XHCI buses, true otherwise) * @parent: Parent device (either UCLASS_USB or UCLASS_USB_HUB) - * @portnr: Port number on hub (1=first) or 0 for none * @return 0 if OK, -ve on error */ int usb_setup_device(struct usb_device *dev, bool do_read, - struct usb_device *parent, int portnr); + struct usb_device *parent); /** * usb_hub_scan() - Scan a hub and find its devices diff --git a/include/usb_ether.h b/include/usb_ether.h index 23507e1..c6d1416 100644 --- a/include/usb_ether.h +++ b/include/usb_ether.h @@ -19,25 +19,91 @@ #define ETH_DATA_LEN 1500 /* Max. octets in payload */ #define ETH_FRAME_LEN PKTSIZE_ALIGN /* Max. octets in frame sans FCS */ +/* TODO(sjg@chromium.org): Remove @pusb_dev when all boards use CONFIG_DM_ETH */ struct ueth_data { /* eth info */ - struct eth_device eth_dev; /* used with eth_register */ - int phy_id; /* mii phy id */ +#ifdef CONFIG_DM_ETH + uint8_t *rxbuf; + int rxsize; + int rxlen; /* Total bytes available in rxbuf */ + int rxptr; /* Current position in rxbuf */ +#else + struct eth_device eth_dev; /* used with eth_register */ + /* driver private */ + void *dev_priv; +#endif + int phy_id; /* mii phy id */ /* usb info */ struct usb_device *pusb_dev; /* this usb_device */ - unsigned char ifnum; /* interface number */ - unsigned char ep_in; /* in endpoint */ - unsigned char ep_out; /* out ....... */ - unsigned char ep_int; /* interrupt . */ - unsigned char subclass; /* as in overview */ - unsigned char protocol; /* .............. */ + unsigned char ifnum; /* interface number */ + unsigned char ep_in; /* in endpoint */ + unsigned char ep_out; /* out ....... */ + unsigned char ep_int; /* interrupt . */ + unsigned char subclass; /* as in overview */ + unsigned char protocol; /* .............. */ unsigned char irqinterval; /* Intervall for IRQ Pipe */ - - /* driver private */ - void *dev_priv; }; +#ifdef CONFIG_DM_ETH +/** + * usb_ether_register() - register a new USB ethernet device + * + * This selects the correct USB interface and figures out the endpoints to use. + * + * @dev: USB device + * @ss: Place to put USB ethernet data + * @rxsize: Maximum size to allocate for the receive buffer + * @return 0 if OK, -ve on error + */ +int usb_ether_register(struct udevice *dev, struct ueth_data *ueth, int rxsize); + +/** + * usb_ether_deregister() - deregister a USB ethernet device + * + * @ueth: USB Ethernet device + * @return 0 + */ +int usb_ether_deregister(struct ueth_data *ueth); + +/** + * usb_ether_receive() - recieve a packet from the bulk in endpoint + * + * The packet is stored in the internal buffer ready for processing. + * + * @ueth: USB Ethernet device + * @rxsize: Maximum size to receive + * @return 0 if a packet was received, -EAGAIN if not, -ENOSPC if @rxsize is + * larger than the size passed ot usb_ether_register(), other -ve on error + */ +int usb_ether_receive(struct ueth_data *ueth, int rxsize); + +/** + * usb_ether_get_rx_bytes() - obtain bytes from the internal packet buffer + * + * This should be called repeatedly to obtain packet data until it returns 0. + * After each packet is processed, call usb_ether_advance_rxbuf() to move to + * the next one. + * + * @ueth: USB Ethernet device + * @ptrp: Returns a pointer to the start of the next packet if there is + * one available + * @return number of bytes available, or 0 if none + */ +int usb_ether_get_rx_bytes(struct ueth_data *ueth, uint8_t **ptrp); + +/** + * usb_ether_advance_rxbuf() - Advance to the next packet in the internal buffer + * + * After processing the data returned by usb_ether_get_rx_bytes(), call this + * function to move to the next packet. You must specify the number of bytes + * you have processed in @num_bytes. + * + * @ueth: USB Ethernet device + * @num_bytes: Number of bytes to skip, or -1 to skip all bytes + */ +void usb_ether_advance_rxbuf(struct ueth_data *ueth, int num_bytes); +#else /* * Function definitions for each USB ethernet driver go here * (declaration is unconditional, compilation is conditional) @@ -65,5 +131,6 @@ int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, struct ueth_data *ss); int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss, struct eth_device *eth); +#endif #endif /* __USB_ETHER_H__ */ diff --git a/include/vsprintf.h b/include/vsprintf.h index d2fcca3..b5bc9c1 100644 --- a/include/vsprintf.h +++ b/include/vsprintf.h @@ -41,6 +41,32 @@ unsigned long long simple_strtoull(const char *cp, char **endp, long simple_strtol(const char *cp, char **endp, unsigned int base); /** + * trailing_strtol() - extract a trailing integer from a string + * + * Given a string this finds a trailing number on the string and returns it. + * For example, "abc123" would return 123. + * + * @str: String to exxamine + * @return training number if found, else -1 + */ +long trailing_strtol(const char *str); + +/** + * trailing_strtoln() - extract a trailing integer from a fixed-length string + * + * Given a fixed-length string this finds a trailing number on the string + * and returns it. For example, "abc123" would return 123. Only the + * characters between @str and @end - 1 are examined. If @end is NULL, it is + * set to str + strlen(str). + * + * @str: String to exxamine + * @end: Pointer to end of string to examine, or NULL to use the + * whole string + * @return training number if found, else -1 + */ +long trailing_strtoln(const char *str, const char *end); + +/** * panic() - Print a message and reset/hang * * Prints a message on the console(s) and then resets. If CONFIG_PANIC_HANG is |