diff options
Diffstat (limited to 'include')
33 files changed, 665 insertions, 249 deletions
diff --git a/include/ahci.h b/include/ahci.h index 0bdedac..a956c6f 100644 --- a/include/ahci.h +++ b/include/ahci.h @@ -145,7 +145,11 @@ struct ahci_ioports { }; struct ahci_probe_ent { +#ifdef CONFIG_DM_PCI + struct udevice *dev; +#else pci_dev_t dev; +#endif struct ahci_ioports port[AHCI_MAX_PORTS]; u32 n_ports; u32 hard_port_no; diff --git a/include/bios_emul.h b/include/bios_emul.h index 3643b82..80979ed 100644 --- a/include/bios_emul.h +++ b/include/bios_emul.h @@ -42,7 +42,7 @@ struct vbe_mode_info; int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int cleanUp); /* Run a BIOS ROM natively (only supported on x86 machines) */ -void bios_run_on_x86(pci_dev_t pcidev, unsigned long addr, int vesa_mode, +void bios_run_on_x86(struct udevice *dev, unsigned long addr, int vesa_mode, struct vbe_mode_info *mode_info); /** diff --git a/include/command.h b/include/command.h index 2ae9b6c..0524c0b 100644 --- a/include/command.h +++ b/include/command.h @@ -110,6 +110,7 @@ extern int common_diskboot(cmd_tbl_t *cmdtp, const char *intf, int argc, char *const argv[]); extern int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); +extern int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); /* * Error codes that commands return to cmd_process(). We use the standard 0 diff --git a/include/common.h b/include/common.h index 75c78d5..7bed0cc 100644 --- a/include/common.h +++ b/include/common.h @@ -224,32 +224,26 @@ void board_init_f(ulong); void board_init_r(gd_t *, ulong) __attribute__ ((noreturn)); /** - * board_init_f_mem() - Allocate global data and set stack position + * ulong board_init_f_alloc_reserve - allocate reserved area * * This function is called by each architecture very early in the start-up - * code to set up the environment for board_init_f(). It allocates space for - * global_data (see include/asm-generic/global_data.h) and places the stack - * below this. + * code to allow the C runtime to reserve space on the stack for writable + * 'globals' such as GD and the malloc arena. * - * This function requires a stack[1] Normally this is at @top. The function - * starts allocating space from 64 bytes below @top. First it creates space - * for global_data. Then it calls arch_setup_gd() which sets gd to point to - * the global_data space and can reserve additional bytes of space if - * required). Finally it allocates early malloc() memory - * (CONFIG_SYS_MALLOC_F_LEN). The new top of the stack is just below this, - * and it returned by this function. + * @top: top of the reserve area, growing down. + * @return: bottom of reserved area + */ +ulong board_init_f_alloc_reserve(ulong top); + +/** + * board_init_f_init_reserve - initialize the reserved area(s) * - * [1] Strictly speaking it would be possible to implement this function - * in C on many archs such that it does not require a stack. However this - * does not seem hugely important as only 64 byte are wasted. The 64 bytes - * are used to handle the calling standard which generally requires pushing - * addresses or registers onto the stack. We should be able to get away with - * less if this becomes important. + * This function is called once the C runtime has allocated the reserved + * area on the stack. It must initialize the GD at the base of that area. * - * @top: Top of available memory, also normally the top of the stack - * @return: New stack location + * @base: top from which reservation was done */ -ulong board_init_f_mem(ulong top); +void board_init_f_init_reserve(ulong base); /** * arch_setup_gd() - Set up the global_data pointer diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h index 6e299f6..3b198ae 100644 --- a/include/config_uncmd_spl.h +++ b/include/config_uncmd_spl.h @@ -29,7 +29,6 @@ #endif #undef CONFIG_DM_WARN -#undef CONFIG_DM_SEQ_ALIAS #undef CONFIG_DM_STDIO #endif /* CONFIG_SPL_BUILD */ diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index c51db8c..cf6a606 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -18,10 +18,6 @@ #include <configs/ti_am335x_common.h> -/* Don't override the distro default bootdelay */ -#undef CONFIG_BOOTDELAY -#include <config_distro_defaults.h> - #ifndef CONFIG_SPL_BUILD #ifndef CONFIG_FIT # define CONFIG_FIT diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index aac550a..de7538f 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -142,6 +142,8 @@ */ #ifdef CONFIG_SPL_BUILD #undef CONFIG_DM_MMC +#undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH #endif #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h new file mode 100644 index 0000000..f0de827 --- /dev/null +++ b/include/configs/clearfog.h @@ -0,0 +1,176 @@ +/* + * Copyright (C) 2015 Stefan Roese <sr@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _CONFIG_CLEARFOG_H +#define _CONFIG_CLEARFOG_H + +/* + * High Level Configuration Options (easy to change) + */ + +#define CONFIG_DISPLAY_BOARDINFO_LATE + +/* + * TEXT_BASE needs to be below 16MiB, since this area is scrubbed + * for DDR ECC byte filling in the SPL before loading the main + * U-Boot into it. + */ +#define CONFIG_SYS_TEXT_BASE 0x00800000 +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MMC +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_CMD_TFTPPUT +#define CONFIG_CMD_TIME + +/* I2C */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MVTWSI +#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE +#define CONFIG_SYS_I2C_SLAVE 0x0 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* SPI NOR flash default params, used by sf commands */ +#define CONFIG_SF_DEFAULT_SPEED 1000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 +#define CONFIG_SPI_FLASH_STMICRO + +/* + * SDIO/MMC Card Configuration + */ +#define CONFIG_MMC +#define CONFIG_MMC_SDMA +#define CONFIG_GENERIC_MMC +#define CONFIG_SDHCI +#define CONFIG_MV_SDHCI +#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE + +/* Partition support */ +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +/* Additional FS support/configuration */ +#define CONFIG_SUPPORT_VFAT + +/* USB/EHCI configuration */ +#define CONFIG_EHCI_IS_TDI + +#define CONFIG_ENV_MIN_ENTRIES 128 + +/* Environment in MMC */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SECT_SIZE 0x200 +#define CONFIG_ENV_SIZE 0x10000 +/* + * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC + * boot image starts @ LBA-0. + * As result in MMC/eMMC case it will be a 1 sector gap between u-boot + * image and environment + */ +#define CONFIG_ENV_OFFSET 0xf0000 +#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET + +#define CONFIG_PHY_MARVELL /* there is a marvell phy */ +#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ + +/* PCIe support */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_PCI +#define CONFIG_PCI_MVEBU +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#endif + +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ +#define CONFIG_SYS_ALT_MEMTEST + +/* Keep device tree and initrd in lower memory so the kernel can access them */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x10000000\0" \ + "initrd_high=0x10000000\0" + +/* SPL */ +/* + * Select the boot device here + * + * Currently supported are: + * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash + * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) + */ +#define SPL_BOOT_SPI_NOR_FLASH 1 +#define SPL_BOOT_SDIO_MMC_CARD 2 +#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SDIO_MMC_CARD + +/* Defines for SPL */ +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_SIZE (140 << 10) +#define CONFIG_SPL_TEXT_BASE 0x40000030 +#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) + +#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) +#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MALLOC_SIMPLE +#endif + +#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) +#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT + +#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH +/* SPL related SPI defines */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS +#endif + +#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD +/* SPL related MMC defines */ +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR ((CONFIG_SYS_U_BOOT_OFFS / 512)\ + + 1) +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS ((512 << 10) / 512) /* 512KiB */ +#ifdef CONFIG_SPL_BUILD +#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ +#endif +#endif + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +#endif /* _CONFIG_CLEARFOG_H */ diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 3673e5e..ef14132 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -10,15 +10,7 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_ARMADA_XP /* SOC Family Name */ -#define CONFIG_ARMADA_38X -#define CONFIG_DB_88F6820_GP /* Board target name for DDR training */ -#define CONFIG_SYS_L2_PL310 - -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -#endif #define CONFIG_DISPLAY_BOARDINFO_LATE /* @@ -99,16 +91,15 @@ #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ #define CONFIG_PHY_MARVELL /* there is a marvell phy */ -#define CONFIG_PHY_ADDR { 1, 0 } -#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* PCIe support */ +#ifndef CONFIG_SPL_BUILD #define CONFIG_PCI #define CONFIG_PCI_MVEBU #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_E1000 /* enable Intel E1000 support for testing */ +#endif #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ #define CONFIG_SYS_ALT_MEMTEST @@ -139,9 +130,9 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10) +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MALLOC_SIMPLE +#endif #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) @@ -158,7 +149,7 @@ #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS #endif @@ -176,10 +167,6 @@ #endif #endif -/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR_A38X -#define CONFIG_DDR3 - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index ab6e5a5..c8b0344 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2014 Stefan Roese <sr@denx.de> + * Copyright (C) 2014-2015 Stefan Roese <sr@denx.de> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -10,12 +10,8 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_ARMADA_XP /* SOC Family Name */ #define CONFIG_DB_784MP_GP /* Board target name for DDR training */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -#endif #define CONFIG_DISPLAY_BOARDINFO_LATE /* @@ -30,13 +26,18 @@ * Commands configuration */ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#define CONFIG_CMD_CACHE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC #define CONFIG_CMD_I2C -#define CONFIG_CMD_IDE #define CONFIG_CMD_NAND #define CONFIG_CMD_PCI #define CONFIG_CMD_PING +#define CONFIG_CMD_SATA #define CONFIG_CMD_SF #define CONFIG_CMD_SPI #define CONFIG_CMD_TFTPPUT @@ -64,48 +65,29 @@ #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ #define CONFIG_PHY_MARVELL /* there is a marvell phy */ -#define CONFIG_PHY_ADDR { 0x10, 0x11, 0x12, 0x13 } -#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_QSGMII #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -#define CONFIG_RESET_PHY_R #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ #define CONFIG_SYS_ALT_MEMTEST /* SATA support */ -#ifdef CONFIG_CMD_IDE -#define __io -#define CONFIG_IDE_PREINIT -#define CONFIG_MVSATA_IDE - -/* Needs byte-swapping for ATA data register */ -#define CONFIG_IDE_SWAP_IO - -#define CONFIG_SYS_ATA_REG_OFFSET 0x0100 /* Offset for register access */ -#define CONFIG_SYS_ATA_DATA_OFFSET 0x0100 /* Offset for data I/O */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 - -/* Each 8-bit ATA register is aligned to a 4-bytes address */ -#define CONFIG_SYS_ATA_STRIDE 4 - -/* CONFIG_CMD_IDE requires some #defines for ATA registers */ -#define CONFIG_SYS_IDE_MAXBUS 2 -#define CONFIG_SYS_IDE_MAXDEVICE CONFIG_SYS_IDE_MAXBUS - -/* ATA registers base is at SATA controller base */ -#define CONFIG_SYS_ATA_BASE_ADDR MVEBU_AXP_SATA_BASE -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x2000 -#define CONFIG_SYS_ATA_IDE1_OFFSET 0x4000 - +#define CONFIG_SYS_SATA_MAX_DEVICE 2 +#define CONFIG_SATA_MV +#define CONFIG_LIBATA +#define CONFIG_LBA48 +#define CONFIG_EFI_PARTITION #define CONFIG_DOS_PARTITION -#endif /* CONFIG_CMD_IDE */ + +/* Additional FS support/configuration */ +#define CONFIG_SUPPORT_VFAT /* PCIe support */ +#ifndef CONFIG_SPL_BUILD #define CONFIG_PCI #define CONFIG_PCI_MVEBU #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_E1000 /* enable Intel E1000 support for testing */ +#endif /* NAND */ #define CONFIG_SYS_NAND_USE_FLASH_BBT @@ -139,9 +121,9 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10) +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MALLOC_SIMPLE +#endif #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) @@ -161,7 +143,7 @@ #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR_AXP #define CONFIG_SPD_EEPROM 0x4e +#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index d89e661..99d9148 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -33,7 +33,7 @@ #define CONFIG_SYS_MALLOC_LEN SZ_1M #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_64M -#define CONFIG_SYS_TEXT_BASE 0x83FA0000 +#define CONFIG_SYS_TEXT_BASE 0x83F00000 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K) #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M) @@ -49,6 +49,13 @@ #define CONFIG_BAUDRATE 115200 /* + * DMA + */ +#if !defined(CONFIG_SPL_BUILD) +#define CONFIG_DMA_LPC32XX +#endif + +/* * I2C */ #define CONFIG_SYS_I2C @@ -114,9 +121,19 @@ #define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE #define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NAND /* + * USB + */ +#define CONFIG_USB_OHCI_LPC32XX +#define CONFIG_USB_ISP1301_I2C_ADDR 0x2d +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_FAT +#define CONFIG_CMD_USB + +/* * U-Boot General Configurations */ #define CONFIG_SYS_LONGHELP diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 81070b1..9d62421 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -142,6 +142,11 @@ #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 #define CONFIG_QSPI_QUAD_SUPPORT +#ifdef CONFIG_SPL_BUILD +#undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH +#endif + /* * Default to using SPI for environment, etc. * 0x000000 - 0x010000 : QSPI.SPL (64KiB) diff --git a/include/configs/ds414.h b/include/configs/ds414.h new file mode 100644 index 0000000..e3c7087 --- /dev/null +++ b/include/configs/ds414.h @@ -0,0 +1,162 @@ +/* + * Copyright (C) 2014 Stefan Roese <sr@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _CONFIG_SYNOLOGY_DS414_H +#define _CONFIG_SYNOLOGY_DS414_H + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_DISPLAY_BOARDINFO_LATE + +/* + * TEXT_BASE needs to be below 16MiB, since this area is scrubbed + * for DDR ECC byte filling in the SPL before loading the main + * U-Boot into it. + */ +#define CONFIG_SYS_TEXT_BASE 0x00800000 +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_I2C +#define CONFIG_CMD_PING +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_CMD_TFTPPUT +#define CONFIG_CMD_TIME +#define CONFIG_CMD_USB + +/* I2C */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MVTWSI +#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE +#define CONFIG_SYS_I2C_SLAVE 0x0 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* SPI NOR flash default params, used by sf commands */ +#define CONFIG_SF_DEFAULT_SPEED 1000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 + +/* Environment in SPI NOR flash */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x7E0000 /* RedBoot config partition in DTS */ +#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ +#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ + +#define CONFIG_PHY_MARVELL /* there is a marvell phy */ +#define CONFIG_PHY_ADDR { 0x1, 0x0 } +#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII + +#define CONFIG_SYS_ALT_MEMTEST + +/* PCIe support */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_PCI +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PCI_ENUM +#define CONFIG_PCI_MVEBU +#define CONFIG_PCI_SCAN_SHOW +#endif + +/* USB/EHCI/XHCI configuration */ + +#define CONFIG_DM_USB +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +/* FIXME: broken XHCI support + * Below defines should enable support for the two rear USB3 ports. Sadly, this + * does not work because: + * - xhci-pci seems to not support DM_USB, so with that enabled it is not + * found. + * - USB init fails, controller does not respond in time */ +#if 0 +#undef CONFIG_DM_USB +#define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_PCI +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if !defined(CONFIG_USB_XHCI) +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MARVELL +#define CONFIG_EHCI_IS_TDI +#endif + +/* why is this only defined in mv-common.h if CONFIG_DM is undefined? */ +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_ISO_PARTITION +#define CONFIG_SUPPORT_VFAT +#define CONFIG_SYS_MVFS + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* + * Memory layout while starting into the bin_hdr via the + * BootROM: + * + * 0x4000.4000 - 0x4003.4000 headers space (192KiB) + * 0x4000.4030 bin_hdr start address + * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) + * 0x4007.fffc BootROM stack top + * + * The address space between 0x4007.fffc and 0x400f.fff is not locked in + * L2 cache thus cannot be used. + */ + +/* SPL */ +/* Defines for SPL */ +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x40004030 +#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) + +#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) +#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MALLOC_SIMPLE +#endif + +#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) +#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT + +/* SPL related SPI defines */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 + +/* DS414 bus width is 32bits */ +#define CONFIG_DDR_32BIT + +/* Use random ethernet address if not configured */ +#define CONFIG_LIB_RAND +#define CONFIG_NET_RANDOM_ETHADDR + +/* Default Environment */ +#define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200" +#define CONFIG_LOADADDR 0x80000 +#undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */ +#define CONFIG_PREBOOT "usb start; sf probe" + +#endif /* _CONFIG_SYNOLOGY_DS414_H */ diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index da49243..43d7fd0 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -10,10 +10,6 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_ARMADA_XP /* SOC Family Name */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -#endif #define CONFIG_DISPLAY_BOARDINFO_LATE /* @@ -55,10 +51,7 @@ #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ #define CONFIG_PHY_MARVELL /* there is a marvell phy */ -#define CONFIG_PHY_ADDR { 0x0, 0x1, 0x2, 0x3 } -#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_SGMII #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -#define CONFIG_RESET_PHY_R #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ #define CONFIG_SYS_ALT_MEMTEST @@ -91,9 +84,9 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10) +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MALLOC_SIMPLE +#endif #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) @@ -112,7 +105,7 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR_AXP #define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */ +#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index f753e68..d22ea74 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -24,6 +24,8 @@ #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) +#define CONFIG_SPL_SERIAL_SUPPORT + #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_MEM32 diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 08046b5..a995415 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -126,21 +126,9 @@ */ #define CONFIG_PARTITION_UUIDS -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION - #define CONFIG_CMD_PART /* - * Filesystems - */ - -#define CONFIG_CMD_FS_GENERIC -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_EXT4 -#define CONFIG_CMD_FAT - -/* * SPL */ @@ -257,16 +245,24 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x82000000\0" \ + "loadaddr=0x82000000\0" \ + "fdt_addr_r=0x88000000\0" \ + "fdtaddr=0x88000000\0" \ + "ramdisk_addr_r=0x88080000\0" \ + "pxefile_addr_r=0x80100000\0" \ + "scriptaddr=0x80000000\0" \ + "bootm_size=0x10000000\0" \ "boot_mmc_dev=0\0" \ "kernel_mmc_part=3\0" \ "recovery_mmc_part=4\0" \ + "fdtfile=omap3-sniper.dtb\0" \ + "bootfile=/boot/extlinux/extlinux.conf\0" \ "bootargs=console=ttyO2 vram=5M,0x9FA00000 omapfb.vram=0:5M\0" /* - * ATAGs / Device Tree + * ATAGs */ -#define CONFIG_OF_LIBFDT #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG #define CONFIG_INITRD_TAG @@ -278,7 +274,6 @@ */ #define CONFIG_SYS_LOAD_ADDR 0x82000000 -#define CONFIG_BOOTDELAY 1 #define CONFIG_ANDROID_BOOT_IMAGE @@ -299,5 +294,6 @@ */ #include <config_defaults.h> +#include <config_distro_defaults.h> #endif diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index a09e906..8de0ab9 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -370,7 +370,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* SPL QSPI boot support */ #ifdef CONFIG_SPL_SPI_SUPPORT -#define CONFIG_DM_SEQ_ALIAS 1 #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 2087eb1..199612b 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -283,5 +283,6 @@ #endif #include <config_distro_defaults.h> +#define CONFIG_CMD_EXT4_WRITE #endif /* __CONFIG_TI_ARMV7_COMMON_H__ */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 08130eb..8b6c065 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -82,6 +82,32 @@ /* * Environment setup */ +#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \ + "bootcmd_" #devtypel #instance "=" \ + "setenv mmcdev " #instance"; "\ + "setenv bootpart " #instance":2 ; "\ + "run mmcboot\0" + +#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \ + #devtypel #instance " " + +#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \ + #devtypel #instance " " + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(LEGACY_MMC, legacy_mmc, 0) \ + func(MMC, mmc, 1) \ + func(LEGACY_MMC, legacy_mmc, 1) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#define CONFIG_BOOTCOMMAND \ + "run findfdt; " \ + "run distro_bootcmd" + +#include <config_distro_bootcmd.h> + #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ @@ -120,30 +146,7 @@ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine device tree to use; fi; \0" \ "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ - -#define CONFIG_BOOTCOMMAND \ - "run findfdt; " \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "echo SD/MMC found on device ${mmcdev};" \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadbootenv; then " \ - "run importbootenv; " \ - "fi;" \ - "if test -n ${uenvcmd}; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "fi;" \ - "if run loadimage; then " \ - "run loadfdt;" \ - "run mmcboot; " \ - "fi; " \ - "if run loaduimage; then " \ - "run uimageboot;" \ - "fi; " \ - "fi" + BOOTENV /* * Defines for SPL diff --git a/include/dm/device.h b/include/dm/device.h index 7fb9935..1cf8150 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -454,6 +454,17 @@ int device_find_next_child(struct udevice **devp); fdt_addr_t dev_get_addr(struct udevice *dev); /** + * dev_get_addr_index() - Get the indexed reg property of a device + * + * @dev: Pointer to a device + * @index: the 'reg' property can hold a list of <addr, size> pairs + * and @index is used to select which one is required + * + * @return addr + */ +fdt_addr_t dev_get_addr_index(struct udevice *dev, int index); + +/** * device_has_children() - check if a device has any children * * @dev: Device to check @@ -776,4 +787,25 @@ static inline void devm_kfree(struct udevice *dev, void *ptr) #endif /* ! CONFIG_DEVRES */ +/** + * dm_set_translation_offset() - Set translation offset + * @offs: Translation offset + * + * Some platforms need a special address translation. Those + * platforms (e.g. mvebu in SPL) can configure a translation + * offset in the DM by calling this function. It will be + * added to all addresses returned in dev_get_addr(). + */ +void dm_set_translation_offset(fdt_addr_t offs); + +/** + * dm_get_translation_offset() - Get translation offset + * + * This function returns the translation offset that can + * be configured by calling dm_set_translation_offset(). + * + * @return translation offset for the device address (0 as default). + */ +fdt_addr_t dm_get_translation_offset(void); + #endif diff --git a/include/dm/platform_data/lpc32xx_hsuart.h b/include/dm/platform_data/lpc32xx_hsuart.h new file mode 100644 index 0000000..fd191b5 --- /dev/null +++ b/include/dm/platform_data/lpc32xx_hsuart.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2015 Vladimir Zapolskiy <vz@mleia.com> + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _LPC32XX_HSUART_PLAT_H +#define _LPC32XX_HSUART_PLAT_H + +/** + * struct lpc32xx_hsuart_platdata - NXP LPC32xx HSUART platform data + * + * @base: Base register address + */ +struct lpc32xx_hsuart_platdata { + unsigned long base; +}; + +#endif diff --git a/include/fdtdec.h b/include/fdtdec.h index 5e724a9..27b350e 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -446,32 +446,15 @@ int fdtdec_get_pci_vendev(const void *blob, int node, /** * Look at the pci address of a device node that represents a PCI device - * and parse the bus, device and function number from it. For some cases - * like the bus number encoded in reg property is not correct after pci - * enumeration, this function looks through the node's compatible strings - * to get these numbers extracted instead. - * - * @param blob FDT blob - * @param node node to examine - * @param addr pci address in the form of fdt_pci_addr - * @param bdf returns bus, device, function triplet - * @return 0 if ok, negative on error - */ -int fdtdec_get_pci_bdf(const void *blob, int node, - struct fdt_pci_addr *addr, pci_dev_t *bdf); - -/** - * Look at the pci address of a device node that represents a PCI device * and return base address of the pci device's registers. * - * @param blob FDT blob - * @param node node to examine + * @param dev device to examine * @param addr pci address in the form of fdt_pci_addr * @param bar returns base address of the pci device's registers * @return 0 if ok, negative on error */ -int fdtdec_get_pci_bar32(const void *blob, int node, - struct fdt_pci_addr *addr, u32 *bar); +int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr, + u32 *bar); /** * Look up a 32-bit integer property in a node and return it. The property diff --git a/include/hash.h b/include/hash.h index e6d0f1d..d814337 100644 --- a/include/hash.h +++ b/include/hash.h @@ -114,21 +114,6 @@ int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag, int hash_block(const char *algo_name, const void *data, unsigned int len, uint8_t *output, int *output_size); -/** - * hash_show() - Print out a hash algorithm and value - * - * You will get a message like this (without a newline at the end): - * - * "sha1 for 9eb3337c ... 9eb3338f ==> 7942ef1df479fd3130f716eb9613d107dab7e257" - * - * @algo: Algorithm used for hash - * @addr: Address of data that was hashed - * @len: Length of data that was hashed - * @output: Hash value to display - */ -void hash_show(struct hash_algo *algo, ulong addr, ulong len, - uint8_t *output); - #endif /* !USE_HOSTCC */ /** diff --git a/include/ide.h b/include/ide.h index d5e05e9..f9357be 100644 --- a/include/ide.h +++ b/include/ide.h @@ -28,21 +28,23 @@ void ide_led(uchar led, uchar status); #ifdef CONFIG_SYS_64BIT_LBA typedef uint64_t lbaint_t; -#define LBAF "%llx" -#define LBAFU "%llu" +#define LBAFlength "ll" #else typedef ulong lbaint_t; -#define LBAF "%lx" -#define LBAFU "%lu" +#define LBAFlength "l" #endif +#define LBAF "%" LBAFlength "x" +#define LBAFU "%" LBAFlength "u" /* * Function Prototypes */ void ide_init(void); -ulong ide_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer); -ulong ide_write(int device, lbaint_t blknr, lbaint_t blkcnt, +typedef struct block_dev_desc block_dev_desc_t; +ulong ide_read(block_dev_desc_t *block_dev, lbaint_t blknr, lbaint_t blkcnt, + void *buffer); +ulong ide_write(block_dev_desc_t *block_dev, lbaint_t blknr, lbaint_t blkcnt, const void *buffer); #ifdef CONFIG_IDE_PREINIT diff --git a/include/mmc.h b/include/mmc.h index b89962a..465daeb 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -364,7 +364,6 @@ struct mmc { u8 part_attr; u8 wr_rel_set; char part_config; - char part_num; uint tran_speed; uint read_bl_len; uint write_bl_len; @@ -489,11 +488,9 @@ struct pci_device_id; * This finds all the matching PCI IDs and sets them up as MMC devices. * * @name: Name to use for devices - * @mmc_supported: PCI IDs to search for - * @num_ids: Number of elements in @mmc_supported + * @mmc_supported: PCI IDs to search for, terminated by {0, 0} */ -int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported, - int num_ids); +int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported); /* Set block count limit because of 16 bit register limit on some hardware*/ #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT diff --git a/include/net.h b/include/net.h index ebed29a..ac44d61 100644 --- a/include/net.h +++ b/include/net.h @@ -181,8 +181,7 @@ int eth_unregister(struct eth_device *dev);/* Remove network device */ extern struct eth_device *eth_current; -static inline __attribute__((always_inline)) -struct eth_device *eth_get_dev(void) +static __always_inline struct eth_device *eth_get_dev(void) { return eth_current; } @@ -200,14 +199,14 @@ static inline unsigned char *eth_get_ethaddr(void) /* Used only when NetConsole is enabled */ int eth_is_active(struct eth_device *dev); /* Test device for active state */ /* Set active state */ -static inline __attribute__((always_inline)) int eth_init_state_only(void) +static __always_inline int eth_init_state_only(void) { eth_get_dev()->state = ETH_STATE_ACTIVE; return 0; } /* Set passive state */ -static inline __attribute__((always_inline)) void eth_halt_state_only(void) +static __always_inline void eth_halt_state_only(void) { eth_get_dev()->state = ETH_STATE_PASSIVE; } @@ -657,7 +656,7 @@ int nc_input_packet(uchar *pkt, struct in_addr src_ip, unsigned dest_port, unsigned src_port, unsigned len); #endif -static inline __attribute__((always_inline)) int eth_is_on_demand_init(void) +static __always_inline int eth_is_on_demand_init(void) { #ifdef CONFIG_NETCONSOLE extern enum proto_t net_loop_last_protocol; diff --git a/include/part.h b/include/part.h index 720a867..4d00e22 100644 --- a/include/part.h +++ b/include/part.h @@ -10,12 +10,15 @@ #include <ide.h> #include <common.h> -typedef struct block_dev_desc { +typedef struct block_dev_desc block_dev_desc_t; + +struct block_dev_desc { int if_type; /* type of the interface */ int dev; /* device number */ unsigned char part_type; /* partition type */ unsigned char target; /* target SCSI ID */ unsigned char lun; /* target LUN */ + unsigned char hwpart; /* HW partition, e.g. for eMMC */ unsigned char type; /* device type */ unsigned char removable; /* removable device */ #ifdef CONFIG_LBA48 @@ -27,19 +30,19 @@ typedef struct block_dev_desc { char vendor [40+1]; /* IDE model, SCSI Vendor */ char product[20+1]; /* IDE Serial no, SCSI product */ char revision[8+1]; /* firmware revision */ - unsigned long (*block_read)(int dev, + unsigned long (*block_read)(block_dev_desc_t *block_dev, lbaint_t start, lbaint_t blkcnt, void *buffer); - unsigned long (*block_write)(int dev, + unsigned long (*block_write)(block_dev_desc_t *block_dev, lbaint_t start, lbaint_t blkcnt, const void *buffer); - unsigned long (*block_erase)(int dev, + unsigned long (*block_erase)(block_dev_desc_t *block_dev, lbaint_t start, lbaint_t blkcnt); void *priv; /* driver private struct pointer */ -}block_dev_desc_t; +}; #define BLOCK_CNT(size, block_dev_desc) (PAD_COUNT(size, block_dev_desc->blksz)) #define PAD_TO_BLOCKSIZE(size, block_dev_desc) \ diff --git a/include/pci.h b/include/pci.h index 2adca85..cb2562f 100644 --- a/include/pci.h +++ b/include/pci.h @@ -621,6 +621,7 @@ static inline void pci_set_ops(struct pci_controller *hose, extern void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data); #endif +#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT) extern phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, pci_addr_t addr, unsigned long flags); extern pci_addr_t pci_hose_phys_to_bus(struct pci_controller* hose, @@ -656,7 +657,6 @@ extern pci_addr_t pci_hose_phys_to_bus(struct pci_controller* hose, pci_bus_to_virt((dev), (addr), PCI_REGION_IO, (len), (map_flags)) /* For driver model these are defined in macros in pci_compat.c */ -#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT) extern int pci_hose_read_config_byte(struct pci_controller *hose, pci_dev_t dev, int where, u8 *val); extern int pci_hose_read_config_word(struct pci_controller *hose, @@ -862,12 +862,12 @@ struct dm_pci_ops { #define pci_get_ops(dev) ((struct dm_pci_ops *)(dev)->driver->ops) /** - * pci_get_bdf() - Get the BDF value for a device + * dm_pci_get_bdf() - Get the BDF value for a device * * @dev: Device to check * @return bus/device/function value (see PCI_BDF()) */ -pci_dev_t pci_get_bdf(struct udevice *dev); +pci_dev_t dm_pci_get_bdf(struct udevice *dev); /** * pci_bind_bus_devices() - scan a PCI bus and bind devices @@ -902,13 +902,13 @@ int pci_bind_bus_devices(struct udevice *bus); int pci_auto_config_devices(struct udevice *bus); /** - * pci_bus_find_bdf() - Find a device given its PCI bus address + * dm_pci_bus_find_bdf() - Find a device given its PCI bus address * * @bdf: PCI device address: bus, device and function -see PCI_BDF() * @devp: Returns the device for this address, if found * @return 0 if OK, -ENODEV if not found */ -int pci_bus_find_bdf(pci_dev_t bdf, struct udevice **devp); +int dm_pci_bus_find_bdf(pci_dev_t bdf, struct udevice **devp); /** * pci_bus_find_devfn() - Find a device on a bus @@ -995,7 +995,7 @@ int pci_find_device_id(struct pci_device_id *ids, int index, * @bdf: PCI bus address to scan (PCI_BUS(bdf) is the bus number) * @return 0 if OK, -ve on error */ -int dm_pci_hose_probe_bus(struct pci_controller *hose, pci_dev_t bdf); +int dm_pci_hose_probe_bus(struct udevice *bus); /** * pci_bus_read_config() - Read a configuration value from a device @@ -1167,6 +1167,96 @@ int pci_get_regions(struct udevice *dev, struct pci_region **iop, struct pci_region **memp, struct pci_region **prefp); /** + * dm_pci_read_bar32() - read a base address register from a device + * + * @dev: Device to check + * @barnum: Bar number to read (numbered from 0) + * @return: value of BAR + */ +u32 dm_pci_read_bar32(struct udevice *dev, int barnum); + +/** + * dm_pci_bus_to_phys() - convert a PCI bus address to a physical address + * + * @dev: Device containing the PCI address + * @addr: PCI address to convert + * @flags: Flags for the region type (PCI_REGION_...) + * @return physical address corresponding to that PCI bus address + */ +phys_addr_t dm_pci_bus_to_phys(struct udevice *dev, pci_addr_t addr, + unsigned long flags); + +/** + * dm_pci_phys_to_bus() - convert a physical address to a PCI bus address + * + * @dev: Device containing the bus address + * @addr: Physical address to convert + * @flags: Flags for the region type (PCI_REGION_...) + * @return PCI bus address corresponding to that physical address + */ +pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t addr, + unsigned long flags); + +/** + * dm_pci_map_bar() - get a virtual address associated with a BAR region + * + * Looks up a base address register and finds the physical memory address + * that corresponds to it + * + * @dev: Device to check + * @bar: Bar number to read (numbered from 0) + * @flags: Flags for the region type (PCI_REGION_...) + * @return: pointer to the virtual address to use + */ +void *dm_pci_map_bar(struct udevice *dev, int bar, int flags); + +#define dm_pci_virt_to_bus(dev, addr, flags) \ + dm_pci_phys_to_bus(dev, (virt_to_phys(addr)), (flags)) +#define dm_pci_bus_to_virt(dev, addr, flags, len, map_flags) \ + map_physmem(dm_pci_bus_to_phys(dev, (addr), (flags)), \ + (len), (map_flags)) + +#define dm_pci_phys_to_mem(dev, addr) \ + dm_pci_phys_to_bus((dev), (addr), PCI_REGION_MEM) +#define dm_pci_mem_to_phys(dev, addr) \ + dm_pci_bus_to_phys((dev), (addr), PCI_REGION_MEM) +#define dm_pci_phys_to_io(dev, addr) \ + dm_pci_phys_to_bus((dev), (addr), PCI_REGION_IO) +#define dm_pci_io_to_phys(dev, addr) \ + dm_pci_bus_to_phys((dev), (addr), PCI_REGION_IO) + +#define dm_pci_virt_to_mem(dev, addr) \ + dm_pci_virt_to_bus((dev), (addr), PCI_REGION_MEM) +#define dm_pci_mem_to_virt(dev, addr, len, map_flags) \ + dm_pci_bus_to_virt((dev), (addr), PCI_REGION_MEM, (len), (map_flags)) +#define dm_pci_virt_to_io(dev, addr) \ + dm_dm_pci_virt_to_bus((dev), (addr), PCI_REGION_IO) +#define dm_pci_io_to_virt(dev, addr, len, map_flags) \ + dm_dm_pci_bus_to_virt((dev), (addr), PCI_REGION_IO, (len), (map_flags)) + +/** + * dm_pci_find_device() - find a device by vendor/device ID + * + * @vendor: Vendor ID + * @device: Device ID + * @index: 0 to find the first match, 1 for second, etc. + * @devp: Returns pointer to the device, if found + * @return 0 if found, -ve on error + */ +int dm_pci_find_device(unsigned int vendor, unsigned int device, int index, + struct udevice **devp); + +/** + * dm_pci_find_class() - find a device by class + * + * @find_class: 3-byte (24-bit) class value to find + * @index: 0 to find the first match, 1 for second, etc. + * @devp: Returns pointer to the device, if found + * @return 0 if found, -ve on error + */ +int dm_pci_find_class(uint find_class, int index, struct udevice **devp); + +/** * struct dm_pci_emul_ops - PCI device emulator operations */ struct dm_pci_emul_ops { diff --git a/include/pci_rom.h b/include/pci_rom.h index 2f1665d..95c6d07 100644 --- a/include/pci_rom.h +++ b/include/pci_rom.h @@ -44,14 +44,14 @@ enum pci_rom_emul { }; /** - * pci_run_vga_bios() - Run the VGA BIOS in an x86 PC + * dm_pci_run_vga_bios() - Run the VGA BIOS in an x86 PC * * @dev: Video device containing the BIOS * @int15_handler: Function to call to handle int 0x15 * @exec_method: flags from enum pci_rom_emul */ -int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), - int exec_method); +int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), + int exec_method); /** * board_map_oprom_vendev() - map several PCI IDs to the one the ROM expects diff --git a/include/power/pmic.h b/include/power/pmic.h index 6ba4b6e..e0b2e12 100644 --- a/include/power/pmic.h +++ b/include/power/pmic.h @@ -12,7 +12,6 @@ #define __CORE_PMIC_H_ #include <i2c.h> -#include <spi.h> #include <linux/list.h> #include <power/power_chrg.h> diff --git a/include/spi.h b/include/spi.h index b4d2723..4b88d39 100644 --- a/include/spi.h +++ b/include/spi.h @@ -11,41 +11,27 @@ #define _SPI_H_ /* SPI mode flags */ -#define SPI_CPHA 0x01 /* clock phase */ -#define SPI_CPOL 0x02 /* clock polarity */ -#define SPI_MODE_0 (0|0) /* (original MicroWire) */ -#define SPI_MODE_1 (0|SPI_CPHA) -#define SPI_MODE_2 (SPI_CPOL|0) -#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) -#define SPI_CS_HIGH 0x04 /* CS active high */ -#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ -#define SPI_3WIRE 0x10 /* SI/SO signals shared */ -#define SPI_LOOP 0x20 /* loopback mode */ -#define SPI_SLAVE 0x40 /* slave mode */ -#define SPI_PREAMBLE 0x80 /* Skip preamble bytes */ - -/* SPI transfer flags */ -#define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */ -#define SPI_XFER_END 0x02 /* Deassert CS after transfer */ -#define SPI_XFER_MMAP 0x08 /* Memory Mapped start */ -#define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */ -#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) -#define SPI_XFER_U_PAGE (1 << 5) - -/* SPI TX operation modes */ -#define SPI_OPM_TX_QPP (1 << 0) -#define SPI_OPM_TX_BP (1 << 1) - -/* SPI RX operation modes */ -#define SPI_OPM_RX_AS (1 << 0) -#define SPI_OPM_RX_AF (1 << 1) -#define SPI_OPM_RX_DOUT (1 << 2) -#define SPI_OPM_RX_DIO (1 << 3) -#define SPI_OPM_RX_QOF (1 << 4) -#define SPI_OPM_RX_QIOF (1 << 5) -#define SPI_OPM_RX_EXTN (SPI_OPM_RX_AS | SPI_OPM_RX_AF | SPI_OPM_RX_DOUT | \ - SPI_OPM_RX_DIO | SPI_OPM_RX_QOF | \ - SPI_OPM_RX_QIOF) +#define SPI_CPHA BIT(0) /* clock phase */ +#define SPI_CPOL BIT(1) /* clock polarity */ +#define SPI_MODE_0 (0|0) /* (original MicroWire) */ +#define SPI_MODE_1 (0|SPI_CPHA) +#define SPI_MODE_2 (SPI_CPOL|0) +#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) +#define SPI_CS_HIGH BIT(2) /* CS active high */ +#define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */ +#define SPI_3WIRE BIT(4) /* SI/SO signals shared */ +#define SPI_LOOP BIT(5) /* loopback mode */ +#define SPI_SLAVE BIT(6) /* slave mode */ +#define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */ +#define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ +#define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */ +#define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */ + +/* SPI mode_rx flags */ +#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */ +#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */ +#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */ +#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */ /* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0) @@ -75,11 +61,13 @@ struct dm_spi_bus { * @cs: Chip select number (0..n-1) * @max_hz: Maximum bus speed that this slave can tolerate * @mode: SPI mode to use for this device (see SPI mode flags) + * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags) */ struct dm_spi_slave_platdata { unsigned int cs; uint max_hz; uint mode; + u8 mode_rx; }; #endif /* CONFIG_DM_SPI */ @@ -99,15 +87,14 @@ struct dm_spi_slave_platdata { * * @dev: SPI slave device * @max_hz: Maximum speed for this slave - * @mode: SPI mode to use for this slave (see SPI mode flags) * @speed: Current bus speed. This is 0 until the bus is first * claimed. * @bus: ID of the bus that the slave is attached to. For * driver model this is the sequence number of the SPI * bus (bus->seq) so does not need to be stored * @cs: ID of the chip select connected to the slave. - * @op_mode_rx: SPI RX operation mode. - * @op_mode_tx: SPI TX operation mode. + * @mode: SPI mode to use for this slave (see SPI mode flags) + * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags) * @wordlen: Size of SPI word in number of bits * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. @@ -120,18 +107,24 @@ struct spi_slave { struct udevice *dev; /* struct spi_slave is dev->parentdata */ uint max_hz; uint speed; - uint mode; #else unsigned int bus; unsigned int cs; #endif - u8 op_mode_rx; - u8 op_mode_tx; + uint mode; + u8 mode_rx; unsigned int wordlen; unsigned int max_write_size; void *memory_map; u8 option; + u8 flags; +#define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */ +#define SPI_XFER_END BIT(1) /* Deassert CS after transfer */ +#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) +#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ +#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ +#define SPI_XFER_U_PAGE BIT(4) }; /** diff --git a/include/spi_flash.h b/include/spi_flash.h index f25b3e7..0d26b8a 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -170,8 +170,6 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, /* Compatibility function - this is the old U-Boot API */ void spi_flash_free(struct spi_flash *flash); -int spi_flash_remove(struct udevice *flash); - static inline int spi_flash_read(struct spi_flash *flash, u32 offset, size_t len, void *buf) { diff --git a/include/usb_mass_storage.h b/include/usb_mass_storage.h index 69b80cd..5804b70 100644 --- a/include/usb_mass_storage.h +++ b/include/usb_mass_storage.h @@ -23,12 +23,10 @@ struct ums { unsigned int start_sector; unsigned int num_sectors; const char *name; - block_dev_desc_t *block_dev; + block_dev_desc_t block_dev; }; -extern struct ums *ums; - -int fsg_init(struct ums *); +int fsg_init(struct ums *ums_devs, int count); void fsg_cleanup(void); int fsg_main_thread(void *); int fsg_add(struct usb_configuration *c); |