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-rw-r--r--include/configs/P5020DS.h1
-rw-r--r--include/configs/cyrus.h6
2 files changed, 3 insertions, 4 deletions
diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h
index d2cedfe..a942d0c 100644
--- a/include/configs/P5020DS.h
+++ b/include/configs/P5020DS.h
@@ -9,7 +9,6 @@
* Also supports P5010 DS
*/
#define CONFIG_P5020DS
-#define CONFIG_PPC_P5020
#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */
diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h
index 4a11092..5f5138a 100644
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -9,7 +9,7 @@
#define CONFIG_CYRUS
-#if !defined(CONFIG_PPC_P5020) && !defined(CONFIG_PPC_P5040)
+#if !defined(CONFIG_ARCH_P5020) && !defined(CONFIG_PPC_P5040)
#error Must call Cyrus CONFIG with a specific CPU enabled.
#endif
@@ -18,7 +18,7 @@
#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE3
#define CONFIG_PCIE4
-#ifdef CONFIG_PPC_P5020
+#ifdef CONFIG_ARCH_P5020
#define CONFIG_SYS_FSL_RAID_ENGINE
#define CONFIG_SYS_DPAA_RMAN
#endif
@@ -30,7 +30,7 @@
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#define CONFIG_SYS_FSL_PBL_PBI board/varisys/cyrus/pbi.cfg
-#if defined(CONFIG_PPC_P5020)
+#if defined(CONFIG_ARCH_P5020)
#define CONFIG_SYS_CLK_FREQ 133000000
#define CONFIG_SYS_FSL_PBL_RCW board/varisys/cyrus/rcw_p5020_v2.cfg
#elif defined(CONFIG_PPC_P5040)