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-rw-r--r--include/configs/MPC8572DS.h3
-rw-r--r--include/configs/MigoR.h1
-rw-r--r--include/configs/ap325rxa.h2
-rw-r--r--include/configs/espt.h1
-rw-r--r--include/configs/mpr2.h2
-rw-r--r--include/configs/ms7720se.h1
-rw-r--r--include/configs/ms7722se.h1
-rw-r--r--include/configs/ms7750se.h1
-rw-r--r--include/configs/r2dplus.h1
-rw-r--r--include/configs/r7780mp.h1
-rw-r--r--include/configs/rsk7203.h1
-rw-r--r--include/configs/sh7757lcr.h146
-rw-r--r--include/configs/sh7763rdp.h1
-rw-r--r--include/configs/sh7785lcr.h2
-rw-r--r--include/configs/shmin.h1
-rw-r--r--include/mpc83xx.h7
-rw-r--r--include/pci.h2
17 files changed, 173 insertions, 1 deletions
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index e6b60cf..bf2fdd6 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -136,6 +136,7 @@
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#define CONFIG_DDR_SPD
+#define CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
@@ -654,12 +655,12 @@
*/
#include <config_cmd_default.h>
+#define CONFIG_CMD_ERRATA
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_PING
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_ELF
-#define CONFIG_CMD_IRQ
#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_REGINFO
diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h
index 8a6b8d0..7d9368c 100644
--- a/include/configs/MigoR.h
+++ b/include/configs/MigoR.h
@@ -59,6 +59,7 @@
#define MIGO_R_FLASH_BASE_1 (0xA0000000)
#define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024)
+#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h
index e7f37f5..711dd3c 100644
--- a/include/configs/ap325rxa.h
+++ b/include/configs/ap325rxa.h
@@ -63,6 +63,8 @@
#define AP325RXA_FLASH_BASE_1 (0xA0000000)
#define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024)
+#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
+
/* undef to save memory */
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
diff --git a/include/configs/espt.h b/include/configs/espt.h
index 26389ed..ad3c335 100644
--- a/include/configs/espt.h
+++ b/include/configs/espt.h
@@ -56,6 +56,7 @@
#define CONFIG_BAUDRATE 115200
#define CONFIG_CONS_SCIF0 1
+#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h
index 311f524..f32899f 100644
--- a/include/configs/mpr2.h
+++ b/include/configs/mpr2.h
@@ -58,6 +58,8 @@
#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
+#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
+
/* Memory */
#define CONFIG_SYS_SDRAM_BASE 0x8C000000
#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h
index 5304237..dd79b2d 100644
--- a/include/configs/ms7720se.h
+++ b/include/configs/ms7720se.h
@@ -52,6 +52,7 @@
#define MS7720SE_FLASH_BASE_1 0xA0000000
#define MS7720SE_FLASH_BANK_SIZE (8 * 1024 * 1024)
+#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h
index 1ddadf6..c8d04f7 100644
--- a/include/configs/ms7722se.h
+++ b/include/configs/ms7722se.h
@@ -57,6 +57,7 @@
#define MS7722SE_FLASH_BASE_1 (0xA0000000)
#define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024)
+#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h
index 9b43acb..16fb0d4 100644
--- a/include/configs/ms7750se.h
+++ b/include/configs/ms7750se.h
@@ -64,6 +64,7 @@
/* List of legal baudrate settings for this board */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
+#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index 8689513..5534b49 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -40,6 +40,7 @@
#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
#define CONFIG_SYS_SDRAM_SIZE (0x04000000)
+#define CONFIG_SYS_TEXT_BASE 0x0FFC0000
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256
diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h
index 802416f..e1febf3 100644
--- a/include/configs/r7780mp.h
+++ b/include/configs/r7780mp.h
@@ -60,6 +60,7 @@
/* check for keypress on bootdelay==0 */
/*#define CONFIG_ZERO_BOOTDELAY_CHECK*/
+#define CONFIG_SYS_TEXT_BASE 0x0FFC0000
#define CONFIG_SYS_SDRAM_BASE (0x08000000)
#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h
index b3feaa8..0802140 100644
--- a/include/configs/rsk7203.h
+++ b/include/configs/rsk7203.h
@@ -54,6 +54,7 @@
#define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */
#define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024)
+#define CONFIG_SYS_TEXT_BASE 0x0C7C0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h
new file mode 100644
index 0000000..9799767
--- /dev/null
+++ b/include/configs/sh7757lcr.h
@@ -0,0 +1,146 @@
+/*
+ * Configuation settings for the sh7757lcr board
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __SH7757LCR_H
+#define __SH7757LCR_H
+
+#undef DEBUG
+#define CONFIG_SH 1
+#define CONFIG_SH4A 1
+#define CONFIG_SH_32BIT 1
+#define CONFIG_CPU_SH7757 1
+#define CONFIG_SH7757LCR 1
+
+#define CONFIG_SYS_TEXT_BASE 0x8ef80000
+#define CONFIG_SYS_LDSCRIPT "board/renesas/sh7757lcr/u-boot.lds"
+
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_DFL
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_MD5SUM
+#define CONFIG_MD5
+#define CONFIG_CMD_LOADS
+
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
+
+#define CONFIG_VERSION_VARIABLE
+#undef CONFIG_SHOW_BOOT_PROGRESS
+
+/* MEMORY */
+#define SH7757LCR_SDRAM_BASE (0x80000000)
+#define SH7757LCR_SDRAM_SIZE (240 * 1024 * 1024)
+#define SH7757LCR_SDRAM_ECC_SETTING 0x0f000000 /* 240MByte */
+#define SH7757LCR_SDRAM_DVC_SIZE (16 * 1024 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT "=> "
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_PBSIZE 256
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE 512
+#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
+
+/* SCIF */
+#define CONFIG_SCIF_CONSOLE 1
+#define CONFIG_CONS_SCIF2 1
+#undef CONFIG_SYS_CONSOLE_INFO_QUIET
+#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
+
+#define CONFIG_SYS_MEMTEST_START (SH7757LCR_SDRAM_BASE)
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
+ 224 * 1024 * 1024)
+#undef CONFIG_SYS_ALT_MEMTEST
+#undef CONFIG_SYS_MEMTEST_SCRATCH
+#undef CONFIG_SYS_LOADS_BAUD_CHANGE
+
+#define CONFIG_SYS_SDRAM_BASE (SH7757LCR_SDRAM_BASE)
+#define CONFIG_SYS_SDRAM_SIZE (SH7757LCR_SDRAM_SIZE)
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
+ (128 + 16) * 1024 * 1024)
+
+#define CONFIG_SYS_MONITOR_BASE 0x00000000
+#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
+#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
+
+/* FLASH */
+#define CONFIG_SYS_NO_FLASH
+
+/* Ether */
+#define CONFIG_NET_MULTI 1
+#define CONFIG_SH_ETHER 1
+#define CONFIG_SH_ETHER_USE_PORT 0
+#define CONFIG_SH_ETHER_PHY_ADDR 1
+#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
+
+#define SH7757LCR_ETHERNET_MAC_BASE_SPI 0x000b0000
+#define SH7757LCR_SPI_SECTOR_SIZE (64 * 1024)
+#define SH7757LCR_ETHERNET_MAC_BASE SH7757LCR_ETHERNET_MAC_BASE_SPI
+#define SH7757LCR_ETHERNET_MAC_SIZE 17
+#define SH7757LCR_ETHERNET_NUM_CH 2
+#define BOARD_LATE_INIT 1
+
+/* Gigabit Ether */
+#define SH7757LCR_GIGA_ETHERNET_NUM_CH 2
+
+/* SPI */
+#define CONFIG_SH_SPI 1
+#define CONFIG_SH_SPI_BASE 0xfe002000
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO 1
+
+/* SH7757 board */
+#define SH7757LCR_SDRAM_PHYS_TOP 0x40000000
+#define SH7757LCR_GRA_OFFSET 0x1f000000
+#define SH7757LCR_PCIEBRG_ADDR_B0 0x000a0000
+#define SH7757LCR_PCIEBRG_SIZE_B0 (64 * 1024)
+#define SH7757LCR_PCIEBRG_ADDR 0x00090000
+#define SH7757LCR_PCIEBRG_SIZE (96 * 1024)
+
+/* ENV setting */
+#define CONFIG_ENV_IS_EMBEDDED
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SECT_SIZE (64 * 1024)
+#define CONFIG_ENV_ADDR (0x00080000)
+#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
+#define CONFIG_ENV_OVERWRITE 1
+#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netboot=bootp; bootm\0"
+
+/* Board Clock */
+#define CONFIG_SYS_CLK_FREQ 48000000
+#define CONFIG_SYS_TMU_CLK_DIV 4
+#define CONFIG_SYS_HZ 1000
+#endif /* __SH7757LCR_H */
diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h
index 209cb88..6a08413 100644
--- a/include/configs/sh7763rdp.h
+++ b/include/configs/sh7763rdp.h
@@ -56,6 +56,7 @@
#define CONFIG_BAUDRATE 115200
#define CONFIG_CONS_SCIF2 1
+#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h
index a95a759..8eb9a12 100644
--- a/include/configs/sh7785lcr.h
+++ b/include/configs/sh7785lcr.h
@@ -63,6 +63,7 @@
/* MEMORY */
#if defined(CONFIG_SH_32BIT)
+#define CONFIG_SYS_TEXT_BASE 0x8FF80000
/* 0x40000000 - 0x47FFFFFF does not use */
#define CONFIG_SH_SDRAM_OFFSET (0x8000000)
#define SH7785LCR_SDRAM_PHYS_BASE (0x40000000 + CONFIG_SH_SDRAM_OFFSET)
@@ -72,6 +73,7 @@
#define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024)
#define SH7785LCR_USB_BASE (0xa6000000)
#else
+#define CONFIG_SYS_TEXT_BASE 0x0FF80000
#define SH7785LCR_SDRAM_BASE (0x08000000)
#define SH7785LCR_SDRAM_SIZE (128 * 1024 * 1024)
#define SH7785LCR_FLASH_BASE_1 (0xa0000000)
diff --git a/include/configs/shmin.h b/include/configs/shmin.h
index bee7e44..3a008f0 100644
--- a/include/configs/shmin.h
+++ b/include/configs/shmin.h
@@ -56,6 +56,7 @@
#define SHMIN_SDRAM_BASE (0x8C000000)
#define SHMIN_FLASH_BASE_1 (0xA0000000)
+#define CONFIG_SYS_TEXT_BASE 0x8DFB0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 07e0e0b..ea137c7 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -694,14 +694,21 @@
/* SPMR - System PLL Mode Register
*/
#define SPMR_LBIUCM 0x80000000
+#define SPMR_LBIUCM_SHIFT 31
#define SPMR_DDRCM 0x40000000
+#define SPMR_DDRCM_SHIFT 30
#define SPMR_SPMF 0x0F000000
+#define SPMR_SPMF_SHIFT 24
#define SPMR_CKID 0x00800000
#define SPMR_CKID_SHIFT 23
#define SPMR_COREPLL 0x007F0000
+#define SPMR_COREPLL_SHIFT 16
#define SPMR_CEVCOD 0x000000C0
+#define SPMR_CEVCOD_SHIFT 6
#define SPMR_CEPDF 0x00000020
+#define SPMR_CEPDF_SHIFT 5
#define SPMR_CEPMF 0x0000001F
+#define SPMR_CEPMF_SHIFT 0
/* OCCR - Output Clock Control Register
*/
diff --git a/include/pci.h b/include/pci.h
index e80b6bd..c6b264b 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -420,6 +420,8 @@ struct pci_controller {
/* Used by ppc405 autoconfig*/
struct pci_region *pci_fb;
int current_busno;
+
+ void *priv_data;
};
extern __inline__ void pci_set_ops(struct pci_controller *hose,
generated by cgit v1.1 at 2024-12-03 05:27:20 +0000