diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/exynos4-common.h | 1 | ||||
| -rw-r--r-- | include/configs/km/km_arm.h | 2 | ||||
| -rw-r--r-- | include/configs/mcc200.h | 397 | ||||
| -rw-r--r-- | include/configs/s5p_goni.h | 1 | ||||
| -rw-r--r-- | include/configs/s5pc210_universal.h | 1 | ||||
| -rw-r--r-- | include/configs/smdkv310.h | 1 | ||||
| -rw-r--r-- | include/configs/socfpga_common.h | 76 | ||||
| -rw-r--r-- | include/configs/socfpga_cyclone5.h | 2 | ||||
| -rw-r--r-- | include/configs/zynq_zybo.h | 30 | ||||
| -rw-r--r-- | include/dt-bindings/reset/altr,rst-mgr.h | 90 | ||||
| -rw-r--r-- | include/lcd.h | 2 | ||||
| -rw-r--r-- | include/usb.h | 2 | ||||
| -rw-r--r-- | include/usb/s3c_udc.h | 1 |
13 files changed, 206 insertions, 400 deletions
diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 89ba14e..41631c7 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -59,6 +59,7 @@ #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index d31e674..f780f8b 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -20,6 +20,8 @@ #ifndef _CONFIG_KM_ARM_H #define _CONFIG_KM_ARM_H +#define CONFIG_SYS_GENERIC_BOARD + /* We got removed from Linux mach-types.h */ #define MACH_TYPE_KM_KIRKWOOD 2255 diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h deleted file mode 100644 index a317782..0000000 --- a/include/configs/mcc200.h +++ /dev/null @@ -1,397 +0,0 @@ -/* - * (C) Copyright 2006-2008 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ - -#define CONFIG_MPC5200 -#define CONFIG_MCC200 1 /* MCC200 board */ - -/* - * Valid values for CONFIG_SYS_TEXT_BASE are: - * 0xFC000000 boot low (standard configuration) - * 0xFFF00000 boot high - * 0x00100000 boot from RAM (for testing only) - */ -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xFC000000 -#endif - -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */ - -#define CONFIG_MISC_INIT_R - -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - -/* - * Serial console configuration - * - * To select console on the one of 8 external UARTs, - * define CONFIG_QUART_CONSOLE as 1, 2, 3, or 4 for the first Quad UART, - * or as 5, 6, 7, or 8 for the second Quad UART. - * COM11, COM12, COM13, COM14 are located on the second Quad UART. - * - * CONFIG_PSC_CONSOLE must be undefined in this case. - */ -#if !defined(CONFIG_PRS200) -/* MCC200 configuration: */ -#ifdef CONFIG_CONSOLE_COM12 -#define CONFIG_QUART_CONSOLE 6 /* console is on UARTF of QUART2 */ -#else -#define CONFIG_QUART_CONSOLE 8 /* console is on UARTH of QUART2 */ -#endif -#else -/* PRS200 configuration: */ -#undef CONFIG_QUART_CONSOLE -#endif /* CONFIG_PRS200 */ -/* - * To select console on PSC1, define CONFIG_PSC_CONSOLE as 1 - * and undefine CONFIG_QUART_CONSOLE. - */ -#if !defined(CONFIG_PRS200) -/* MCC200 configuration: */ -#define CONFIG_PSC_CONSOLE 1 /* PSC1 may be COM */ -#define CONFIG_PSC_CONSOLE2 2 /* PSC2 is PSoC */ -#else -/* PRS200 configuration: */ -#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ -#endif -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } - -#define CONFIG_MII 1 - -#define CONFIG_DOS_PARTITION - -/* USB */ -#define CONFIG_USB_OHCI -#define CONFIG_USB_STORAGE -/* automatic software updates (see board/mcc200/auto_update.c) */ -#define CONFIG_AUTO_UPDATE 1 - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_BEDBUG -#define CONFIG_CMD_FAT -#define CONFIG_CMD_I2C -#define CONFIG_CMD_USB - -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS - -/* - * Autobooting - */ -#define CONFIG_BOOTDELAY 1 /* autoboot after 1 second */ - -#define CONFIG_PREBOOT "echo;" \ - "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ - "echo" - -#undef CONFIG_BOOTARGS - -#ifdef CONFIG_PRS200 -# define CONFIG_SYS__BOARDNAME "prs200" -# define CONFIG_SYS__LINUX_CONSOLE "ttyS0" -#else -# define CONFIG_SYS__BOARDNAME "mcc200" -# define CONFIG_SYS__LINUX_CONSOLE "ttyEU5" -#endif - -/* Network */ -#define CONFIG_ETHADDR 00:17:17:ff:00:00 -#define CONFIG_IPADDR 10.76.9.29 -#define CONFIG_SERVERIP 10.76.9.1 - -#include <version.h> /* For U-Boot version */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "ubootver=" U_BOOT_VERSION "\0" \ - "netdev=eth0\0" \ - "hostname=" CONFIG_SYS__BOARDNAME "\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "ramargs=setenv bootargs root=/dev/mtdblock2 " \ - "rootfstype=cramfs\0" \ - "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ - "addcons=setenv bootargs ${bootargs} " \ - "console=${console},${baudrate} " \ - "ubootver=${ubootver} board=${board}\0" \ - "flash_nfs=run nfsargs addip addcons;" \ - "bootm ${kernel_addr}\0" \ - "flash_self=run ramargs addip addcons;" \ - "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "net_nfs=tftp 200000 ${bootfile};" \ - "run nfsargs addip addcons;bootm\0" \ - "console=" CONFIG_SYS__LINUX_CONSOLE "\0" \ - "rootpath=/opt/eldk/ppc_6xx\0" \ - "bootfile=/tftpboot/" CONFIG_SYS__BOARDNAME "/uImage\0" \ - "load=tftp 200000 /tftpboot/" CONFIG_SYS__BOARDNAME "/u-boot.bin\0" \ - "text_base=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ - "kernel_addr=0xFC0C0000\0" \ - "update=protect off ${text_base} +${filesize};" \ - "era ${text_base} +${filesize};" \ - "cp.b 200000 ${text_base} ${filesize}\0" \ - "unlock=yes\0" \ - "" - -#define CONFIG_BOOTCOMMAND "run flash_self" - -#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */ - -/* - * IPB Bus clocking configuration. - */ -#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ - -/* - * I2C configuration - */ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */ - -#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ -#define CONFIG_SYS_I2C_SLAVE 0x7F - -/* - * Flash configuration (8,16 or 32 MB) - * TEXT base always at 0xFFF00000 - * ENV_ADDR always at 0xFFF40000 - * FLASH_BASE at 0xFC000000 for 64 MB (only 32MB are supported, not enough addr lines!!!) - * 0xFE000000 for 32 MB - * 0xFF000000 for 16 MB - * 0xFF800000 for 8 MB - */ -#define CONFIG_SYS_FLASH_BASE 0xfc000000 -#define CONFIG_SYS_FLASH_SIZE 0x04000000 - -#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ -#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ - -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ - -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* hardware flash protection */ - -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ - -#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ - -#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ - -#define CONFIG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) - -#define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */ - -#if CONFIG_SYS_TEXT_BASE == CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_LOWBOOT 1 -#endif - -/* - * Memory map - */ -#define CONFIG_SYS_MBAR 0xf0000000 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 - -/* Use SRAM until RAM will be available */ -#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM -#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */ - - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -# define CONFIG_SYS_RAMBOOT 1 -#endif - -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -/* - * Ethernet configuration - */ -/* #define CONFIG_MPC5xxx_FEC 1 */ -/* #define CONFIG_MPC5xxx_FEC_MII100 */ -/* - * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb - */ -/* #define CONFIG_MPC5xxx_FEC_MII10 */ -#define CONFIG_PHY_ADDR 1 - -/* - * LCD Splash Screen - */ -#if !defined(CONFIG_PRS200) -#define CONFIG_LCD 1 -#define CONFIG_PROGRESSBAR 1 -#endif - -#if defined(CONFIG_LCD) -#define CONFIG_SPLASH_SCREEN 1 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -#define LCD_BPP LCD_MONOCHROME -#endif - -/* - * GPIO configuration - */ -/* 0x10000004 = 32MB SDRAM */ -/* 0x90000004 = 64MB SDRAM */ -#if defined(CONFIG_LCD) -/* set PSC2 in UART mode */ -#define CONFIG_SYS_GPS_PORT_CONFIG 0x00000044 -#else -#define CONFIG_SYS_GPS_PORT_CONFIG 0x00000004 -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ - -#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ -#if defined(CONFIG_CMD_KGDB) -# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ -#endif - -/* - * Various low-level settings - */ -#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI -#define CONFIG_SYS_HID0_FINAL HID0_ICE - -#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE -#define CONFIG_SYS_BOOTCS_CFG 0x0004fb00 -#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE - -/* Quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */ -#define CONFIG_SYS_CS2_START 0x80000000 -#define CONFIG_SYS_CS2_SIZE 0x00001000 -#define CONFIG_SYS_CS2_CFG 0x1d300 - -/* Second Quad UART @0x80010000 */ -#define CONFIG_SYS_CS1_START 0x80010000 -#define CONFIG_SYS_CS1_SIZE 0x00001000 -#define CONFIG_SYS_CS1_CFG 0x1d300 - -/* Leica - build revision resistors */ -/* -#define CONFIG_SYS_CS3_START 0x80020000 -#define CONFIG_SYS_CS3_SIZE 0x00000004 -#define CONFIG_SYS_CS3_CFG 0x1d300 -*/ - -/* - * Select one of quarts as a default - * console. If undefined - PSC console - * wil be default - */ -#define CONFIG_SYS_CS_BURST 0x00000000 -#define CONFIG_SYS_CS_DEADCYCLE 0x33333333 - -#define CONFIG_SYS_RESET_ADDRESS 0xff000000 - -/* - * QUART Expanders support - */ -#if defined(CONFIG_QUART_CONSOLE) -/* - * We'll use NS16550 chip routines, - */ -#define CONFIG_SYS_NS16550 1 -#define CONFIG_SYS_NS16550_SERIAL 1 -#define CONFIG_CONS_INDEX 1 -/* - * To achieve necessary offset on SC16C554 - * A0-A2 (register select) pins with NS16550 - * functions (in struct NS16550), REG_SIZE - * should be 4, because A0-A2 pins are connected - * to DA2-DA4 address bus lines. - */ -#define CONFIG_SYS_NS16550_REG_SIZE 4 -/* - * LocalPlus Bus already inited in cpu_init_f(), - * so can work with QUART's chip selects. - * One of four SC16C554 UARTs is selected with - * A3-A4 (DA5-DA6) lines. - */ -#if (CONFIG_QUART_CONSOLE > 0) && (CONFIG_QUART_CONSOLE < 5) && !defined(CONFIG_PRS200) -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CS2_START | (CONFIG_QUART_CONSOLE - 1)<<5) -#elif (CONFIG_QUART_CONSOLE > 4) && (CONFIG_QUART_CONSOLE < 9) -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CS1_START | (CONFIG_QUART_CONSOLE - 5)<<5) -#else -#error "Wrong QUART expander number." -#endif - -/* - * SC16C554 chip's external crystal oscillator frequency - * is 7.3728 MHz - */ -#define CONFIG_SYS_NS16550_CLK 7372800 -#endif /* CONFIG_QUART_CONSOLE */ -/*----------------------------------------------------------------------- - * USB stuff - *----------------------------------------------------------------------- - */ -#define CONFIG_USB_CLOCK 0x0001BBBB -#define CONFIG_USB_CONFIG 0x00005000 - -#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_STOP_STR "432" -#define CONFIG_SILENT_CONSOLE 1 - -#endif /* __CONFIG_H */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 3633a35..dfa2e07 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -281,6 +281,7 @@ #define CONFIG_SYS_MAX_I2C_BUS 7 #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_CMD_USB_MASS_STORAGE diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 4b30d14..e7bace4 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -181,6 +181,7 @@ #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED /* diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index a2469eb..655025c 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -14,6 +14,7 @@ #undef CONFIG_BOARD_COMMON #undef CONFIG_USB_GADGET #undef CONFIG_USB_GADGET_S3C_UDC_OTG +#undef CONFIG_USB_GADGET_S3C_UDC_OTG_PHY #undef CONFIG_CMD_USB_MASS_STORAGE #undef CONFIG_REVISION_TAG #undef CONFIG_CMD_THOR_DOWNLOAD diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 83a1bcd..c436fda 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -37,7 +37,7 @@ */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x0 -#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024) #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE @@ -79,6 +79,25 @@ #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS /* + * EPCS/EPCQx1 Serial Flash Controller + */ +#ifdef CONFIG_ALTERA_SPI +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_BAR +/* + * The base address is configurable in QSys, each board must specify the + * base address based on it's particular FPGA configuration. Please note + * that the address here is incremented by 0x400 from the Base address + * selected in QSys, since the SPI registers are at offset +0x400. + * #define CONFIG_SYS_SPI_BASE 0xff240400 + */ +#endif + +/* * Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) && !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) @@ -141,6 +160,33 @@ #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 /* FIXME -- SPL only? */ #endif + /* + * I2C support + */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_DW +#define CONFIG_SYS_I2C_BUS_MAX 4 +#define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS +#define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS +#define CONFIG_SYS_I2C_BASE2 SOCFPGA_I2C2_ADDRESS +#define CONFIG_SYS_I2C_BASE3 SOCFPGA_I2C3_ADDRESS +/* Using standard mode which the speed up to 100Kb/s */ +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SPEED1 100000 +#define CONFIG_SYS_I2C_SPEED2 100000 +#define CONFIG_SYS_I2C_SPEED3 100000 +/* Address of device when used as slave */ +#define CONFIG_SYS_I2C_SLAVE 0x02 +#define CONFIG_SYS_I2C_SLAVE1 0x02 +#define CONFIG_SYS_I2C_SLAVE2 0x02 +#define CONFIG_SYS_I2C_SLAVE3 0x02 +#ifndef __ASSEMBLY__ +/* Clock supplied to I2C controller in unit of MHz */ +unsigned int cm_get_l4_sp_clk_hz(void); +#define IC_CLK (cm_get_l4_sp_clk_hz() / 1000000) +#endif +#define CONFIG_CMD_I2C + /* * Serial Driver */ @@ -172,6 +218,34 @@ #endif /* + * USB Gadget (DFU, UMS) + */ +#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE) +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* USB Composite download gadget - g_dnl */ +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_MASS_STORAGE + +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +/* USB IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 /* NetChip */ +#define CONFIG_G_DNL_PRODUCT_NUM 0xA4A5 /* Linux-USB File-backed Storage Gadget */ +#define CONFIG_G_DNL_UMS_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM +#define CONFIG_G_DNL_UMS_PRODUCT_NUM CONFIG_G_DNL_PRODUCT_NUM +#ifndef CONFIG_G_DNL_MANUFACTURER +#define CONFIG_G_DNL_MANUFACTURER "Altera" +#endif +#endif + +/* * U-Boot environment */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 942738c..c3d958c 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -42,7 +42,7 @@ /* Booting Linux */ #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTFILE "zImage" -#define CONFIG_BOOTARGS "console=ttyS0" __stringify(CONFIG_BAUDRATE) +#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET #define CONFIG_BOOTCOMMAND "run ramboot" #else diff --git a/include/configs/zynq_zybo.h b/include/configs/zynq_zybo.h new file mode 100644 index 0000000..191f2a5 --- /dev/null +++ b/include/configs/zynq_zybo.h @@ -0,0 +1,30 @@ +/* + * (C) Copyright 2012 Xilinx + * (C) Copyright 2014 Digilent Inc. + * + * Configuration for Zynq Development Board - ZYBO + * See zynq-common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZYBO_H +#define __CONFIG_ZYNQ_ZYBO_H + +#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024) + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_BOOT_FREEBSD + +/* Define ZYBO PS Clock Frequency to 50MHz */ +#define CONFIG_ZYNQ_PS_CLK_FREQ 50000000UL + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_ZYNQ_ZYBO_H */ diff --git a/include/dt-bindings/reset/altr,rst-mgr.h b/include/dt-bindings/reset/altr,rst-mgr.h new file mode 100644 index 0000000..3f04908 --- /dev/null +++ b/include/dt-bindings/reset/altr,rst-mgr.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H +#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H + +/* MPUMODRST */ +#define CPU0_RESET 0 +#define CPU1_RESET 1 +#define WDS_RESET 2 +#define SCUPER_RESET 3 +#define L2_RESET 4 + +/* PERMODRST */ +#define EMAC0_RESET 32 +#define EMAC1_RESET 33 +#define USB0_RESET 34 +#define USB1_RESET 35 +#define NAND_RESET 36 +#define QSPI_RESET 37 +#define L4WD0_RESET 38 +#define L4WD1_RESET 39 +#define OSC1TIMER0_RESET 40 +#define OSC1TIMER1_RESET 41 +#define SPTIMER0_RESET 42 +#define SPTIMER1_RESET 43 +#define I2C0_RESET 44 +#define I2C1_RESET 45 +#define I2C2_RESET 46 +#define I2C3_RESET 47 +#define UART0_RESET 48 +#define UART1_RESET 49 +#define SPIM0_RESET 50 +#define SPIM1_RESET 51 +#define SPIS0_RESET 52 +#define SPIS1_RESET 53 +#define SDMMC_RESET 54 +#define CAN0_RESET 55 +#define CAN1_RESET 56 +#define GPIO0_RESET 57 +#define GPIO1_RESET 58 +#define GPIO2_RESET 59 +#define DMA_RESET 60 +#define SDR_RESET 61 + +/* PER2MODRST */ +#define DMAIF0_RESET 64 +#define DMAIF1_RESET 65 +#define DMAIF2_RESET 66 +#define DMAIF3_RESET 67 +#define DMAIF4_RESET 68 +#define DMAIF5_RESET 69 +#define DMAIF6_RESET 70 +#define DMAIF7_RESET 71 + +/* BRGMODRST */ +#define HPS2FPGA_RESET 96 +#define LWHPS2FPGA_RESET 97 +#define FPGA2HPS_RESET 98 + +/* MISCMODRST*/ +#define ROM_RESET 128 +#define OCRAM_RESET 129 +#define SYSMGR_RESET 130 +#define SYSMGRCOLD_RESET 131 +#define FPGAMGR_RESET 132 +#define ACPIDMAP_RESET 133 +#define S2F_RESET 134 +#define S2FCOLD_RESET 135 +#define NRSTPIN_RESET 136 +#define TIMESTAMPCOLD_RESET 137 +#define CLKMGRCOLD_RESET 138 +#define SCANMGR_RESET 139 +#define FRZCTRLCOLD_RESET 140 +#define SYSDBG_RESET 141 +#define DBG_RESET 142 +#define TAPCOLD_RESET 143 +#define SDRCOLD_RESET 144 + +#endif diff --git a/include/lcd.h b/include/lcd.h index ea5860c..020d880 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -250,7 +250,7 @@ typedef struct vidinfo { void *priv; /* Pointer to driver-specific data */ } vidinfo_t; -#endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */ +#endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_ATMEL_LCD */ extern vidinfo_t panel_info; diff --git a/include/usb.h b/include/usb.h index 9d0d04d..d3c7415 100644 --- a/include/usb.h +++ b/include/usb.h @@ -11,6 +11,8 @@ #include <usb_defs.h> #include <linux/usb/ch9.h> +#include <asm/cache.h> +#include <part.h> /* * The EHCI spec says that we must align to at least 32 bytes. However, diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index 70e48f8..7f49a4e 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -108,5 +108,6 @@ struct s3c_plat_otg_data { unsigned int regs_otg; unsigned int usb_phy_ctrl; unsigned int usb_flags; + unsigned int usb_gusbcfg; }; #endif |