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-rw-r--r--include/asm-generic/gpio.h17
-rw-r--r--include/atmel_hlcdc.h7
-rw-r--r--include/bouncebuf.h47
-rw-r--r--include/cbfs.h72
-rw-r--r--include/command.h8
-rw-r--r--include/common.h5
-rw-r--r--include/config_cmd_all.h4
-rw-r--r--include/configs/CPCI405.h2
-rw-r--r--include/configs/CPCI4052.h2
-rw-r--r--include/configs/CPCI405AB.h2
-rw-r--r--include/configs/CPCI405DT.h2
-rw-r--r--include/configs/CRAYL1.h1
-rw-r--r--include/configs/GEN860T.h5
-rw-r--r--include/configs/P1010RDB.h1
-rw-r--r--include/configs/P1022DS.h1
-rw-r--r--include/configs/P1023RDS.h2
-rw-r--r--include/configs/P2041RDB.h20
-rw-r--r--include/configs/P3041DS.h1
-rw-r--r--include/configs/P5020DS.h1
-rw-r--r--include/configs/P5040DS.h40
-rw-r--r--include/configs/PK1C20.h1
-rw-r--r--include/configs/TOP860.h1
-rw-r--r--include/configs/a3m071.h380
-rw-r--r--include/configs/am335x_evm.h27
-rw-r--r--include/configs/am3517_crane.h3
-rw-r--r--include/configs/am3517_evm.h36
-rw-r--r--include/configs/at91sam9x5ek.h19
-rw-r--r--include/configs/cam_enc_4xx.h3
-rw-r--r--include/configs/coreboot.h68
-rw-r--r--include/configs/corenet_ds.h2
-rw-r--r--include/configs/da850evm.h3
-rw-r--r--include/configs/devkit8000.h3
-rw-r--r--include/configs/eNET.h6
-rw-r--r--include/configs/eb_cpu5282.h102
-rw-r--r--include/configs/ep8260.h1
-rw-r--r--include/configs/hawkboard.h3
-rw-r--r--include/configs/ib62x0.h2
-rw-r--r--include/configs/iconnect.h2
-rw-r--r--include/configs/igep00x0.h3
-rw-r--r--include/configs/imx31_litekit.h6
-rw-r--r--include/configs/lwmon5.h1
-rw-r--r--include/configs/m28evk.h2
-rw-r--r--include/configs/mcx.h4
-rw-r--r--include/configs/mx28evk.h2
-rw-r--r--include/configs/mx31ads.h6
-rw-r--r--include/configs/mx31pdk.h6
-rw-r--r--include/configs/mx35pdk.h7
-rw-r--r--include/configs/mx51_efikamx.h6
-rw-r--r--include/configs/mx51evk.h6
-rw-r--r--include/configs/mx53evk.h6
-rw-r--r--include/configs/mx53loco.h9
-rw-r--r--include/configs/mx6qarm2.h2
-rw-r--r--include/configs/mx6qsabre_common.h2
-rw-r--r--include/configs/mx6qsabrelite.h2
-rw-r--r--include/configs/nios2-generic.h1
-rw-r--r--include/configs/omap3_beagle.h17
-rw-r--r--include/configs/omap3_evm.h6
-rw-r--r--include/configs/omap3_evm_quick_nand.h3
-rw-r--r--include/configs/omap3_overo.h3
-rw-r--r--include/configs/p1_p2_rdb_pc.h137
-rw-r--r--include/configs/qong.h6
-rw-r--r--include/configs/s5p_goni.h6
-rw-r--r--include/configs/s5pc210_universal.h6
-rw-r--r--include/configs/sc_sps_1.h2
-rw-r--r--include/configs/seaboard.h6
-rw-r--r--include/configs/sequoia.h3
-rw-r--r--include/configs/smdk5250.h7
-rw-r--r--include/configs/tam3517-common.h5
-rw-r--r--include/configs/tegra-common-post.h19
-rw-r--r--include/configs/tegra20-common.h8
-rw-r--r--include/configs/trats.h40
-rw-r--r--include/configs/tricorder.h3
-rw-r--r--include/configs/tt01.h6
-rw-r--r--include/configs/utx8245.h1
-rw-r--r--include/configs/vct.h1
-rw-r--r--include/configs/ventana.h3
-rw-r--r--include/configs/vision2.h6
-rw-r--r--include/edid.h275
-rw-r--r--include/env_attr.h55
-rw-r--r--include/env_callback.h75
-rw-r--r--include/env_default.h8
-rw-r--r--include/env_flags.h172
-rw-r--r--include/environment.h15
-rw-r--r--include/exports.h2
-rw-r--r--include/fdtdec.h112
-rw-r--r--include/g_dnl.h1
-rw-r--r--include/hash.h69
-rw-r--r--include/image.h2
-rw-r--r--include/lcd.h36
-rw-r--r--include/linux/byteorder/swab.h2
-rw-r--r--include/linux/linux_string.h8
-rw-r--r--include/linux/mtd/nand.h7
-rw-r--r--include/linux/string.h12
-rw-r--r--include/linux/usb/ch9.h514
-rw-r--r--include/linux/usb/musb.h162
-rw-r--r--include/nand.h1
-rw-r--r--include/nios2.h12
-rw-r--r--include/part.h52
-rw-r--r--include/part_efi.h147
-rw-r--r--include/pci.h123
-rw-r--r--include/physmem.h21
-rw-r--r--include/power/battery.h38
-rw-r--r--include/power/fg_battery_cell_params.h90
-rw-r--r--include/power/max17042_fg.h74
-rw-r--r--include/power/max8997_muic.h61
-rw-r--r--include/power/max8997_pmic.h (renamed from include/max8997_pmic.h)26
-rw-r--r--include/power/max8998_pmic.h (renamed from include/max8998_pmic.h)0
-rw-r--r--include/power/pmic.h (renamed from include/pmic.h)51
-rw-r--r--include/power/power_chrg.h43
-rw-r--r--include/sdhci.h1
-rw-r--r--include/search.h37
-rw-r--r--include/sha1.h26
-rw-r--r--include/sha256.h8
-rw-r--r--include/status_led.h3
-rw-r--r--include/stdio_dev.h3
-rw-r--r--include/usb.h19
-rw-r--r--include/usb/s3c_udc.h1
-rw-r--r--include/usb_defs.h6
-rw-r--r--include/video.h48
119 files changed, 3243 insertions, 442 deletions
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 23c9649..bfedbe4 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -42,10 +42,11 @@
*/
/**
- * Request ownership of a GPIO.
+ * Request a gpio. This should be called before any of the other functions
+ * are used on this gpio.
*
- * @param gpio GPIO number
- * @param label Name given to the GPIO
+ * @param gp GPIO number
+ * @param label User label for this GPIO
* @return 0 if ok, -1 on error
*/
int gpio_request(unsigned gpio, const char *label);
@@ -93,14 +94,4 @@ int gpio_get_value(unsigned gpio);
* @return 0 if ok, -1 on error
*/
int gpio_set_value(unsigned gpio, int value);
-
-/**
- * Request a gpio. This should be called before any of the other functions
- * are used on this gpio.
- *
- * @param gp GPIO number
- * @param label User label for this GPIO
- * @return 0 if ok, -1 on error
- */
-int gpio_request(unsigned gpio, const char *label);
#endif /* _ASM_GENERIC_GPIO_H_ */
diff --git a/include/atmel_hlcdc.h b/include/atmel_hlcdc.h
index 945b30a..fbd2f92 100644
--- a/include/atmel_hlcdc.h
+++ b/include/atmel_hlcdc.h
@@ -217,6 +217,13 @@ struct atmel_hlcd_regs {
#define LCDC_BASECFG3_RDEF(value) \
((LCDC_BASECFG3_RDEF_Msk & ((value) << LCDC_BASECFG3_RDEF_Pos)))
+#define LCDC_BASECLUT_BCLUT_Pos 0
+#define LCDC_BASECLUT_BCLUT_Msk (0xff << LCDC_BASECLUT_BCLUT_Pos)
+#define LCDC_BASECLUT_GCLUT_Pos 8
+#define LCDC_BASECLUT_GCLUT_Msk (0xff << LCDC_BASECLUT_GCLUT_Pos)
+#define LCDC_BASECLUT_RCLUT_Pos 16
+#define LCDC_BASECLUT_RCLUT_Msk (0xff << LCDC_BASECLUT_RCLUT_Pos)
+
#define LCDC_BASECFG4_DMA (0x1 << 8)
#define LCDC_BASECFG4_REP (0x1 << 9)
diff --git a/include/bouncebuf.h b/include/bouncebuf.h
index 31021c5..707b588 100644
--- a/include/bouncebuf.h
+++ b/include/bouncebuf.h
@@ -25,6 +25,8 @@
#ifndef __INCLUDE_BOUNCEBUF_H__
#define __INCLUDE_BOUNCEBUF_H__
+#include <linux/types.h>
+
/*
* GEN_BB_READ -- Data are read from the buffer eg. by DMA hardware.
* The source buffer is copied into the bounce buffer (if unaligned, otherwise
@@ -51,37 +53,36 @@
*/
#define GEN_BB_RW (GEN_BB_READ | GEN_BB_WRITE)
-#ifdef CONFIG_BOUNCE_BUFFER
+struct bounce_buffer {
+ /* Copy of data parameter passed to start() */
+ void *user_buffer;
+ /*
+ * DMA-aligned buffer. This field is always set to the value that
+ * should be used for DMA; either equal to .user_buffer, or to a
+ * freshly allocated aligned buffer.
+ */
+ void *bounce_buffer;
+ /* Copy of len parameter passed to start() */
+ size_t len;
+ /* DMA-aligned buffer length */
+ size_t len_aligned;
+ /* Copy of flags parameter passed to start() */
+ unsigned int flags;
+};
+
/**
* bounce_buffer_start() -- Start the bounce buffer session
+ * state: stores state passed between bounce_buffer_{start,stop}
* data: pointer to buffer to be aligned
* len: length of the buffer
- * backup: pointer to backup buffer (the original value is stored here if
- * needed
* flags: flags describing the transaction, see above.
*/
-int bounce_buffer_start(void **data, size_t len, void **backup, uint8_t flags);
+int bounce_buffer_start(struct bounce_buffer *state, void *data,
+ size_t len, unsigned int flags);
/**
* bounce_buffer_stop() -- Finish the bounce buffer session
- * data: pointer to buffer that was aligned
- * len: length of the buffer
- * backup: pointer to backup buffer (the original value is stored here if
- * needed
- * flags: flags describing the transaction, see above.
+ * state: stores state passed between bounce_buffer_{start,stop}
*/
-int bounce_buffer_stop(void **data, size_t len, void **backup, uint8_t flags);
-#else
-static inline int bounce_buffer_start(void **data, size_t len, void **backup,
- uint8_t flags)
-{
- return 0;
-}
-
-static inline int bounce_buffer_stop(void **data, size_t len, void **backup,
- uint8_t flags)
-{
- return 0;
-}
-#endif
+int bounce_buffer_stop(struct bounce_buffer *state);
#endif
diff --git a/include/cbfs.h b/include/cbfs.h
index 6ea3f35..5bb12c3 100644
--- a/include/cbfs.h
+++ b/include/cbfs.h
@@ -1,9 +1,6 @@
/*
* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
@@ -77,46 +74,47 @@ struct cbfs_cachenode {
extern enum cbfs_result file_cbfs_result;
-/*
- * Return a string describing the most recent error condition.
+/**
+ * file_cbfs_error() - Return a string describing the most recent error
+ * condition.
*
* @return A pointer to the constant string.
*/
const char *file_cbfs_error(void);
-/*
- * Initialize the CBFS driver and load metadata into RAM.
+/**
+ * file_cbfs_init() - Initialize the CBFS driver and load metadata into RAM.
*
- * @param end_of_rom Points to the end of the ROM the CBFS should be read
+ * @end_of_rom: Points to the end of the ROM the CBFS should be read
* from.
*/
void file_cbfs_init(uintptr_t end_of_rom);
-/*
- * Get the header structure for the current CBFS.
+/**
+ * file_cbfs_get_header() - Get the header structure for the current CBFS.
*
* @return A pointer to the constant structure, or NULL if there is none.
*/
const struct cbfs_header *file_cbfs_get_header(void);
-/*
- * Get a handle for the first file in CBFS.
+/**
+ * file_cbfs_get_first() - Get a handle for the first file in CBFS.
*
* @return A handle for the first file in CBFS, NULL on error.
*/
const struct cbfs_cachenode *file_cbfs_get_first(void);
-/*
- * Get a handle to the file after this one in CBFS.
+/**
+ * file_cbfs_get_next() - Get a handle to the file after this one in CBFS.
*
- * @param file A pointer to the handle to advance.
+ * @file: A pointer to the handle to advance.
*/
void file_cbfs_get_next(const struct cbfs_cachenode **file);
-/*
- * Find a file with a particular name in CBFS.
+/**
+ * file_cbfs_find() - Find a file with a particular name in CBFS.
*
- * @param name The name to search for.
+ * @name: The name to search for.
*
* @return A handle to the file, or NULL on error.
*/
@@ -127,53 +125,55 @@ const struct cbfs_cachenode *file_cbfs_find(const char *name);
/* All of the functions below can be used without first initializing CBFS. */
/***************************************************************************/
-/*
- * Find a file with a particular name in CBFS without using the heap.
+/**
+ * file_cbfs_find_uncached() - Find a file with a particular name in CBFS
+ * without using the heap.
*
- * @param end_of_rom Points to the end of the ROM the CBFS should be read
+ * @end_of_rom: Points to the end of the ROM the CBFS should be read
* from.
- * @param name The name to search for.
+ * @name: The name to search for.
*
* @return A handle to the file, or NULL on error.
*/
const struct cbfs_cachenode *file_cbfs_find_uncached(uintptr_t end_of_rom,
const char *name);
-/*
- * Get the name of a file in CBFS.
+/**
+ * file_cbfs_name() - Get the name of a file in CBFS.
*
- * @param file The handle to the file.
+ * @file: The handle to the file.
*
* @return The name of the file, NULL on error.
*/
const char *file_cbfs_name(const struct cbfs_cachenode *file);
-/*
- * Get the size of a file in CBFS.
+/**
+ * file_cbfs_size() - Get the size of a file in CBFS.
*
- * @param file The handle to the file.
+ * @file: The handle to the file.
*
* @return The size of the file, zero on error.
*/
u32 file_cbfs_size(const struct cbfs_cachenode *file);
-/*
- * Get the type of a file in CBFS.
+/**
+ * file_cbfs_type() - Get the type of a file in CBFS.
*
- * @param file The handle to the file.
+ * @file: The handle to the file.
*
* @return The type of the file, zero on error.
*/
u32 file_cbfs_type(const struct cbfs_cachenode *file);
-/*
- * Read a file from CBFS into RAM
+/**
+ * file_cbfs_read() - Read a file from CBFS into RAM
*
- * @param file A handle to the file to read.
- * @param buffer Where to read it into memory.
+ * @file: A handle to the file to read.
+ * @buffer: Where to read it into memory.
+ * @maxsize: Maximum number of bytes to read
*
* @return If positive or zero, the number of characters read. If negative, an
- * error occurred.
+ * error occurred.
*/
long file_cbfs_read(const struct cbfs_cachenode *file, void *buffer,
unsigned long maxsize);
diff --git a/include/command.h b/include/command.h
index 10bc260..476e7cf 100644
--- a/include/command.h
+++ b/include/command.h
@@ -89,10 +89,10 @@ extern int cmd_auto_complete(const char *const prompt, char *buf, int *np, int *
*/
#if defined(CONFIG_CMD_MEMORY) \
- || defined(CONFIG_CMD_I2C) \
- || defined(CONFIG_CMD_ITEST) \
- || defined(CONFIG_CMD_PCI) \
- || defined(CONFIG_CMD_PORTIO)
+ || defined(CONFIG_CMD_I2C) \
+ || defined(CONFIG_CMD_ITEST) \
+ || defined(CONFIG_CMD_PCI) \
+ || defined(CONFIG_CMD_PORTIO)
#define CMD_DATA_SIZE
extern int cmd_get_data_size(char* arg, int default_size);
#endif
diff --git a/include/common.h b/include/common.h
index 5e3c5ee..d0bf1e8 100644
--- a/include/common.h
+++ b/include/common.h
@@ -340,6 +340,11 @@ int envmatch (uchar *, int);
char *getenv (const char *);
int getenv_f (const char *name, char *buf, unsigned len);
ulong getenv_ulong(const char *name, int base, ulong default_val);
+/*
+ * Read an environment variable as a boolean
+ * Return -1 if variable does not exist (default to true)
+ */
+int getenv_yesno(const char *var);
int saveenv (void);
int setenv (const char *, const char *);
int setenv_ulong(const char *varname, ulong value);
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index f434cd0..e82f642 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -40,12 +40,15 @@
#define CONFIG_CMD_FDOS /* Floppy DOS support */
#define CONFIG_CMD_FLASH /* flinfo, erase, protect */
#define CONFIG_CMD_FPGA /* FPGA configuration Support */
+#define CONFIG_CMD_GETTIME /* Get time since boot */
+#define CONFIG_CMD_HASH /* calculate hash / digest */
#define CONFIG_CMD_HWFLOW /* RTS/CTS hw flow control */
#define CONFIG_CMD_I2C /* I2C serial bus support */
#define CONFIG_CMD_IDE /* IDE harddisk support */
#define CONFIG_CMD_IMI /* iminfo */
#define CONFIG_CMD_IMLS /* List all found images */
#define CONFIG_CMD_IMMAP /* IMMR dump support */
+#define CONFIG_CMD_IO /* Access to X86 IO space */
#define CONFIG_CMD_IRQ /* irqinfo */
#define CONFIG_CMD_ITEST /* Integer (and string) test */
#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
@@ -70,6 +73,7 @@
#define CONFIG_CMD_REGINFO /* Register dump */
#define CONFIG_CMD_REISER /* Reiserfs support */
#define CONFIG_CMD_RARP /* rarpboot support */
+#define CONFIG_CMD_READ /* Read data from partition */
#define CONFIG_CMD_RUN /* run command in env variable */
#define CONFIG_CMD_SAVEENV /* saveenv */
#define CONFIG_CMD_SAVES /* save S record dump */
diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h
index 9ecdad9..e3e5ebc 100644
--- a/include/configs/CPCI405.h
+++ b/include/configs/CPCI405.h
@@ -174,7 +174,7 @@
#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
#define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */
#define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */
-#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
+#define CONFIG_SYS_PCI_PTM2PCI (bd->bi_memsize) /* host use this pci address */
#define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index efab119..c4fff48 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -195,7 +195,7 @@
#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
#define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */
#define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */
-#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
+#define CONFIG_SYS_PCI_PTM2PCI (bd->bi_memsize) /* host use this pci address */
#define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */
diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h
index 83e9a04..9122cbd 100644
--- a/include/configs/CPCI405AB.h
+++ b/include/configs/CPCI405AB.h
@@ -192,7 +192,7 @@
#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
#define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */
#define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */
-#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
+#define CONFIG_SYS_PCI_PTM2PCI (bd->bi_memsize) /* host use this pci address */
#define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */
diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h
index 1944a07..f778af7 100644
--- a/include/configs/CPCI405DT.h
+++ b/include/configs/CPCI405DT.h
@@ -196,7 +196,7 @@
#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
#define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */
#define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */
-#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
+#define CONFIG_SYS_PCI_PTM2PCI (bd->bi_memsize) /* host use this pci address */
#define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */
diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h
index 1daec69..6bceccb 100644
--- a/include/configs/CRAYL1.h
+++ b/include/configs/CRAYL1.h
@@ -153,7 +153,6 @@
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* where to load what we get from TFTP */
-#define CONFIG_SYS_TFTP_LOADADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
#define CONFIG_SYS_DRAM_TEST 1
diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h
index b98cacc..9a649ca 100644
--- a/include/configs/GEN860T.h
+++ b/include/configs/GEN860T.h
@@ -96,11 +96,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE
/*
- * Set default load address for tftp network downloads
- */
-#define CONFIG_SYS_TFTP_LOADADDR 0x01000000
-
-/*
* Turn off the watchdog timer
*/
#undef CONFIG_WATCHDOG
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 57aef21..437ee6e 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -553,6 +553,7 @@ extern unsigned long get_sdram_size(void);
/* SATA */
#define CONFIG_FSL_SATA
+#define CONFIG_FSL_SATA_V2
#define CONFIG_LIBATA
#ifdef CONFIG_FSL_SATA
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index b3c850d..14d597a 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -360,6 +360,7 @@
/* SATA */
#define CONFIG_LIBATA
#define CONFIG_FSL_SATA
+#define CONFIG_FSL_SATA_V2
#define CONFIG_SYS_SATA_MAX_DEVICE 2
#define CONFIG_SATA1
diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h
index 800d666..878bd5f 100644
--- a/include/configs/P1023RDS.h
+++ b/include/configs/P1023RDS.h
@@ -524,7 +524,7 @@ extern unsigned long get_clock_freq(void);
/* Default address of microcode for the Linux Fman driver */
/* QE microcode/firmware address */
#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEF000000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000
#else
#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x1f00000
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 5cdb628..8b9b0db 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -202,15 +202,21 @@ unsigned long get_board_sys_clk(unsigned long dummy);
/* Set the local bus clock 1/8 of platform clock */
#define CONFIG_SYS_LBC_LCRR LCRR_CLKDIV_8
-#define CONFIG_SYS_FLASH_BASE 0xe8000000 /* Start of PromJet */
+/*
+ * This board doesn't have a promjet connector.
+ * However, it uses commone corenet board LAW and TLB.
+ * It is necessary to use the same start address with proper offset.
+ */
+#define CONFIG_SYS_FLASH_BASE 0xe0000000
#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe8000000ull
+#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull
#else
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
#endif
#define CONFIG_SYS_FLASH_BR_PRELIM \
- (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)
+ (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | \
+ BR_PS_16 | BR_V)
#define CONFIG_SYS_FLASH_OR_PRELIM \
((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \
| OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR)
@@ -294,7 +300,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7
-#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS}
+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
@@ -539,7 +545,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000
#else
#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEF000000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000
#endif
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
@@ -560,8 +566,10 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#endif /* CONFIG_PCI */
/* SATA */
+#define CONFIG_FSL_SATA_V2
+
+#ifdef CONFIG_FSL_SATA_V2
#define CONFIG_FSL_SATA
-#ifdef CONFIG_FSL_SATA
#define CONFIG_LIBATA
#define CONFIG_SYS_SATA_MAX_DEVICE 2
diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h
index cf184e7..ce8f9b0 100644
--- a/include/configs/P3041DS.h
+++ b/include/configs/P3041DS.h
@@ -32,6 +32,7 @@
#define CONFIG_MMC
#define CONFIG_NAND_FSL_ELBC
+#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE3
#define CONFIG_PCIE4
#define CONFIG_SYS_DPAA_RMAN
diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h
index 7018d7a..778230d 100644
--- a/include/configs/P5020DS.h
+++ b/include/configs/P5020DS.h
@@ -32,6 +32,7 @@
#define CONFIG_MMC
#define CONFIG_NAND_FSL_ELBC
+#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE3
#define CONFIG_PCIE4
#define CONFIG_SYS_FSL_RAID_ENGINE
diff --git a/include/configs/P5040DS.h b/include/configs/P5040DS.h
new file mode 100644
index 0000000..50d9e541
--- /dev/null
+++ b/include/configs/P5040DS.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * P5040 DS board configuration file
+ *
+ */
+#define CONFIG_P5040DS
+#define CONFIG_PHYS_64BIT
+#define CONFIG_PPC_P5040
+
+#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */
+
+#define CONFIG_MMC
+#define CONFIG_NAND_FSL_ELBC
+#define CONFIG_PCIE3
+#define CONFIG_SYS_FSL_RAID_ENGINE
+
+#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
+
+#include "corenet_ds.h"
diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h
index 403fafa..aced85b 100644
--- a/include/configs/PK1C20.h
+++ b/include/configs/PK1C20.h
@@ -142,6 +142,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_SYS_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
#define CONFIG_STATUS_LED /* Enable status driver */
+#define CONFIG_BOARD_SPECIFIC_LED
#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
#define STATUS_LED_STATE 1 /* Blinking */
diff --git a/include/configs/TOP860.h b/include/configs/TOP860.h
index 36921ca..4849f94 100644
--- a/include/configs/TOP860.h
+++ b/include/configs/TOP860.h
@@ -416,7 +416,6 @@
#define CONFIG_IPADDR 10.0.4.111
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_TFTP_LOADADDR 0x00100000
/*
* For booting Linux, the board info and command line data
diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h
new file mode 100644
index 0000000..df3b4ae
--- /dev/null
+++ b/include/configs/a3m071.h
@@ -0,0 +1,380 @@
+/*
+ * Copyright 2012 Stefan Roese <sr@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC5200
+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
+#define CONFIG_A3M071 /* ... on A3M071 board */
+#define CONFIG_MPC5200_DDR /* ... use DDR RAM */
+
+#define CONFIG_SYS_TEXT_BASE 0x01000000 /* boot low for 32 MiB boards */
+
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
+
+#define CONFIG_MISC_INIT_R
+#define CONFIG_SYS_LOWBOOT /* Enable lowboot */
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ { 9600, 19200, 38400, 57600, 115200, 230400 }
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_REGINFO
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
+/* define for 66MHz speed - undef for 33MHz PCI clock speed */
+#undef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT
+#define CONFIG_OF_BOARD_SETUP
+
+/* maximum size of the flat tree (8K) */
+#define OF_FLAT_TREE_MAX_SIZE 8192
+
+#define OF_CPU "PowerPC,5200@0"
+#define OF_SOC "soc5200@f0000000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C /* I2C with hardware support */
+#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
+
+#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+
+/*
+ * EEPROM configuration
+ */
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
+
+/*
+ * RTC configuration
+ */
+#define CONFIG_RTC_PCF8563
+#define CONFIG_SYS_I2C_RTC_ADDR 0x51
+
+/*
+ * NOR flash configuration
+ */
+#define CONFIG_SYS_FLASH_BASE 0xfc000000
+#define CONFIG_SYS_FLASH_SIZE 0x01000000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000)
+
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 256
+#define CONFIG_SYS_FLASH_ERASE_TOUT 240000
+#define CONFIG_SYS_FLASH_WRITE_TOUT 500
+#define CONFIG_SYS_FLASH_LOCK_TOUT 5
+#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+
+/*
+ * Environment settings
+ */
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SIZE 0x10000
+#define CONFIG_ENV_SECT_SIZE 0x20000
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Memory map
+ */
+#define CONFIG_SYS_MBAR 0xf0000000
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
+
+/* Use SRAM until RAM will be available */
+#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
+#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
+
+
+#define CONFIG_SYS_GBL_DATA_SIZE 128
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
+ CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_MONITOR_LEN (256 << 10)
+#define CONFIG_SYS_MALLOC_LEN (1 << 20)
+#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5xxx_FEC
+#define CONFIG_MPC5xxx_FEC_MII100
+#define CONFIG_PHY_ADDR 0x00
+
+/*
+ * GPIO configuration
+ */
+
+/*
+ * GPIO-config depends on failsave-level
+ * failsave 0 means just MPX-config, no digiboard, no fpga
+ * 1 means digiboard ok
+ * 2 means fpga ok
+ */
+
+/* for failsave-level 0 - full failsave */
+#define CONFIG_SYS_GPS_PORT_CONFIG 0x1005C005
+/* for failsave-level 1 - only digiboard ok */
+#define CONFIG_SYS_GPS_PORT_CONFIG_1 0x1005C005
+/* for failsave-level 2 - all ok */
+#define CONFIG_SYS_GPS_PORT_CONFIG_2 0x1005C005
+
+/*
+ * Configuration matrix
+ * MSB LSB
+ * failsave 0 0x1005C005 00010000000001011100000001100101 ( full failsave )
+ * failsave 1 0x1005C005 00010000000001011100000001100101 ( digib.-ver ok )
+ * failsave 2 0x1005C005 00010000000001011100000001100101 ( all ok )
+ * || ||| || | ||| | | | |
+ * || ||| || | ||| | | | | bit rev name
+ * ++-+++-++--+---+++-+---+---+---+- 0 31 CS1
+ * +-+++-++--+---+++-+---+---+---+- 1 30 LPTZ
+ * ||| || | ||| | | | | 2 29 ALTs
+ * +++-++--+---+++-+---+---+---+- 3 28 ALTs
+ * ++-++--+---+++-+---+---+---+- 4 27 CS7
+ * +-++--+---+++-+---+---+---+- 5 26 CS6
+ * || | ||| | | | | 6 25 ATA
+ * ++--+---+++-+---+---+---+- 7 24 ATA
+ * +--+---+++-+---+---+---+- 8 23 IR_USB_CLK
+ * | ||| | | | | 9 22 IRDA
+ * | ||| | | | | 10 21 IRDA
+ * +---+++-+---+---+---+- 11 20 IRDA
+ * ||| | | | | 12 19 Ether
+ * ||| | | | | 13 18 Ether
+ * ||| | | | | 14 17 Ether
+ * +++-+---+---+---+- 15 16 Ether
+ * ++-+---+---+---+- 16 15 PCI_DIS
+ * +-+---+---+---+- 17 14 USB_SE
+ * | | | | 18 13 USB
+ * +---+---+---+- 19 12 USB
+ * | | | 20 11 PSC3
+ * | | | 21 10 PSC3
+ * | | | 22 9 PSC3
+ * +---+---+- 23 8 PSC3
+ * | | 24 7 -
+ * | | 25 6 PSC2
+ * | | 26 5 PSC2
+ * +---+- 27 4 PSC2
+ * | 28 3 -
+ * | 29 2 PSC1
+ * | 30 1 PSC1
+ * +- 31 0 PSC1
+ */
+
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT "=> "
+
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CBSIZE 1024
+#else
+#define CONFIG_SYS_CBSIZE 256
+#endif
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START 0x00100000
+#define CONFIG_SYS_MEMTEST_END 0x00f00000
+
+#define CONFIG_SYS_LOAD_ADDR 0x00100000
+
+#define CONFIG_SYS_HZ 1000
+#define CONFIG_LOOPW
+#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
+
+/*
+ * Various low-level settings
+ */
+#define CONFIG_SYS_HID0_INIT (HID0_ICE | HID0_ICFI)
+#define CONFIG_SYS_HID0_FINAL HID0_ICE
+
+#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
+#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
+#define CONFIG_SYS_CS2_START 0xe0000000
+#define CONFIG_SYS_CS2_SIZE 0x00100000
+
+/* FPGA slave io (512kiB) - see ticket #66 */
+#define CONFIG_SYS_CS3_START 0xE9000000
+#define CONFIG_SYS_CS3_SIZE 0x00080000
+/* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0032B900 */
+#define CONFIG_SYS_CS3_CFG 0x0032B900
+
+/* Diagnosis Interface - see ticket #63 */
+#define CONFIG_SYS_CS4_START 0xEA000000
+#define CONFIG_SYS_CS4_SIZE 0x00000001
+/* 00000000 00000010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0002B900 */
+#define CONFIG_SYS_CS4_CFG 0x0002B900
+
+/* FPGA master io (64kiB) - see ticket #66 */
+#define CONFIG_SYS_CS5_START 0xE8000000
+#define CONFIG_SYS_CS5_SIZE 0x00010000
+/* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0032B900 */
+#define CONFIG_SYS_CS5_CFG 0x0032B900
+
+#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* for pci_clk = 66 MHz */
+#define CONFIG_SYS_BOOTCS_CFG 0x0006F900
+#define CONFIG_SYS_CS1_CFG 0x0004FB00
+#define CONFIG_SYS_CS2_CFG 0x0006F90C
+#else /* for pci_clk = 33 MHz */
+#define CONFIG_SYS_BOOTCS_CFG 0x0002F900
+#define CONFIG_SYS_CS1_CFG 0x0001FB00
+#define CONFIG_SYS_CS2_CFG 0x0002F90C
+#endif
+
+#define CONFIG_SYS_CS_BURST 0x00000000
+/* set DC for FPGA CS5 and CS3 to 0 - see ticket #66 */
+/* R 7 R 6 R 5 R 4 R 3 R 2 R 1 R 0 */
+/* 00 11 00 11 00 00 00 11 00 00 00 00 00 00 00 00 */
+#define CONFIG_SYS_CS_DEADCYCLE 0x33030000
+
+#define CONFIG_SYS_RESET_ADDRESS 0xff000000
+
+/*
+ * Environment Configuration
+ */
+
+#define CONFIG_BOOTDELAY 0 /* -1 disables auto-boot */
+#undef CONFIG_BOOTARGS
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_mtd\" to boot from flash with mtd filesystem;" \
+ "echo Type \"run net_nfs\" to boot from tftp with nfs filesystem;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_SYS_OS_BASE 0xfc080000
+#define CONFIG_SYS_FDT_BASE 0xfc060000
+
+#define xstr(s) str(s)
+#define str(s) #s
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "verify=no\0" \
+ "consoledev=ttyPSC0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "mtdargs=setenv bootargs root=/dev/mtdblock4 rw rootfstype=jffs2\0"\
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} " \
+ "console=${consoledev},${baudrate}\0" \
+ "flash_nfs=run nfsargs addip addtty;" \
+ "bootm ${kernel_addr} - ${fdtaddr}\0" \
+ "flash_mtd=run mtdargs addip addtty;" \
+ "bootm ${kernel_addr} - ${fdtaddr}\0" \
+ "flash_self=run ramargs addip addtty;" \
+ "bootm ${kernel_addr} ${ramdisk_addr} ${fdtaddr}\0" \
+ "net_nfs=sleep 2; tftp ${loadaddr} ${bootfile};" \
+ "tftp c00000 ${fdtfile};" \
+ "run nfsargs addip addtty;" \
+ "bootm ${loadaddr} - c00000\0" \
+ "load=tftp ${loadaddr} u-boot.bin\0" \
+ "update=protect off fc000000 fc03ffff; " \
+ "era fc000000 fc03ffff; cp.b ${loadaddr} fc000000 40000\0"\
+ "upd=run load;run update\0" \
+ "fdtaddr=" xstr(CONFIG_SYS_FDT_BASE) "\0" \
+ "fdtfile=dtbFile\0" \
+ "kernel_addr=" xstr(CONFIG_SYS_OS_BASE) "\0" \
+ ""
+
+#define CONFIG_BOOTCOMMAND "run flash_mtd"
+
+/*
+ * SPL related defines
+ */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_NOR_SUPPORT
+#define CONFIG_SPL_TEXT_BASE 0xfc000000
+#define CONFIG_SPL_START_S_PATH "arch/powerpc/cpu/mpc5xxx"
+#define CONFIG_SPL_LDSCRIPT "arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds"
+#define CONFIG_SPL_LIBCOMMON_SUPPORT /* image.c */
+#define CONFIG_SPL_LIBGENERIC_SUPPORT /* string.c */
+#define CONFIG_SPL_SERIAL_SUPPORT
+
+/* Place BSS for SPL near end of SDRAM */
+#define CONFIG_SPL_BSS_START_ADDR ((128 - 1) << 20)
+#define CONFIG_SPL_BSS_MAX_SIZE (64 << 10)
+
+#define CONFIG_SPL_OS_BOOT
+/* Place patched DT blob (fdt) at this address */
+#define CONFIG_SYS_SPL_ARGS_ADDR 0x01800000
+
+/* Settings for real U-Boot to be loaded from NOR flash */
+#ifndef __ASSEMBLY__
+extern char __spl_flash_end[];
+#endif
+#define CONFIG_SYS_UBOOT_BASE __spl_flash_end
+#define CONFIG_SYS_SPL_MAX_LEN (32 << 10)
+#define CONFIG_SYS_UBOOT_START 0x1000100
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index b6e48f8..ab9549b 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -257,6 +257,33 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
+/*
+ * USB configuration
+ */
+#define CONFIG_USB_MUSB_DSPS
+#define CONFIG_ARCH_MISC_INIT
+#define CONFIG_MUSB_GADGET
+#define CONFIG_MUSB_PIO_ONLY
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_MUSB_HOST
+#define CONFIG_AM335X_USB0
+#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
+#define CONFIG_AM335X_USB1
+#define CONFIG_AM335X_USB1_MODE MUSB_HOST
+
+#ifdef CONFIG_MUSB_HOST
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#endif
+
+#ifdef CONFIG_MUSB_GADGET
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_RNDIS
+#endif /* CONFIG_MUSB_GADGET */
+
+/* Unsupported features */
+#undef CONFIG_USE_IRQ
+
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 20a3df5..e1ad1e5 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -337,6 +337,9 @@
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index ce71d13..ba15325 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -97,15 +97,16 @@
/*
* USB configuration
- * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard
- * Enable CONFIG_MUSB_UDC for Device functionalities.
+ * Enable CONFIG_MUSB_HOST for Host functionalities MSC, keyboard
+ * Enable CONFIG_MUSB_GADGET for Device functionalities.
*/
-#define CONFIG_USB_AM35X 1
-#define CONFIG_MUSB_HCD 1
+#define CONFIG_USB_MUSB_AM35X
+#define CONFIG_MUSB_HOST
+#define CONFIG_MUSB_PIO_ONLY
-#ifdef CONFIG_USB_AM35X
+#ifdef CONFIG_USB_MUSB_AM35X
-#ifdef CONFIG_MUSB_HCD
+#ifdef CONFIG_MUSB_HOST
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
@@ -117,21 +118,15 @@
#define CONFIG_PREBOOT "usb start"
#endif /* CONFIG_USB_KEYBOARD */
-#endif /* CONFIG_MUSB_HCD */
+#endif /* CONFIG_MUSB_HOST */
-#ifdef CONFIG_MUSB_UDC
-/* USB device configuration */
-#define CONFIG_USB_DEVICE 1
-#define CONFIG_USB_TTY 1
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
-/* Change these to suit your needs */
-#define CONFIG_USBD_VENDORID 0x0451
-#define CONFIG_USBD_PRODUCTID 0x5678
-#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
-#define CONFIG_USBD_PRODUCT_NAME "AM3517EVM"
-#endif /* CONFIG_MUSB_UDC */
+#ifdef CONFIG_MUSB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_RNDIS
+#endif /* CONFIG_MUSB_GADGET */
-#endif /* CONFIG_USB_AM35X */
+#endif /* CONFIG_USB_MUSB_AM35X */
/* commands to include */
#include <config_cmd_default.h>
@@ -336,6 +331,9 @@
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 71f765b..1317582 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -168,8 +168,7 @@
#define CONFIG_BOOTCOMMAND "nand read " \
"0x22000000 0x200000 0x300000; " \
"bootm 0x22000000"
-#else
-#ifdef CONFIG_SYS_USE_SPIFLASH
+#elif defined(CONFIG_SYS_USE_SPIFLASH)
/* bootstrap + u-boot + env + linux in spi flash */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET 0x5000
@@ -179,14 +178,28 @@
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x100000 0x300000; " \
"bootm 0x22000000"
-#endif
+#else /* CONFIG_SYS_USE_MMC */
+/* bootstrap + u-boot + env + linux in mmc */
+#define CONFIG_ENV_IS_IN_MMC
+/* For FAT system, most cases it should be in the reserved sector */
+#define CONFIG_ENV_OFFSET 0x2000
+#define CONFIG_ENV_SIZE 0x1000
+#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
+#ifdef CONFIG_SYS_USE_MMC
+#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
+ "mtdparts=atmel_nand:" \
+ "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
+ "root=/dev/mmcblk0p2 " \
+ "rw rootfstype=ext4 rootwait"
+#else
#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
"mtdparts=atmel_nand:" \
"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
"root=/dev/mtdblock1 rw " \
"rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"
+#endif
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h
index 56dc1cb..a7a698c 100644
--- a/include/configs/cam_enc_4xx.h
+++ b/include/configs/cam_enc_4xx.h
@@ -219,6 +219,9 @@
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
#define CONFIG_SPL_SERIAL_SUPPORT
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index cc95e2b..adeace0 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -35,9 +35,13 @@
* (easy to change)
*/
#define CONFIG_SYS_COREBOOT
-#undef CONFIG_SHOW_BOOT_PROGRESS
+#define CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_LAST_STAGE_INIT
-
+#define CONFIG_X86_NO_RESET_VECTOR
+#define CONFIG_SYS_VSNPRINTF
+#define CONFIG_INTEL_CORE_ARCH /* Sandy bridge and ivy bridge chipsets. */
+#define CONFIG_ZBOOT_32
+#define CONFIG_PHYSMEM
/*-----------------------------------------------------------------------
* Watchdog Configuration
@@ -67,11 +71,16 @@
CONFIG_SYS_SCSI_MAX_LUN)
#endif
+/* Generic TPM interfaced through LPC bus */
+#define CONFIG_GENERIC_LPC_TPM
+#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000
+
/*-----------------------------------------------------------------------
* Real Time Clock Configuration
*/
#define CONFIG_RTC_MC146818
#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
+#define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS
/*-----------------------------------------------------------------------
* Serial Configuration
@@ -88,18 +97,18 @@
#define CONFIG_SYS_NS16550_COM2 UART1_BASE
#define CONFIG_SYS_NS16550_PORT_MAPPED
-/* max. 1 IDE bus */
-#define CONFIG_SYS_IDE_MAXBUS 1
-/* max. 1 drive per IDE bus */
-#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1)
+#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,eserial0\0" \
+ "stdout=vga,eserial0,cbmem\0" \
+ "stderr=vga,eserial0,cbmem\0"
-#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
-#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
-#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170
-#define CONFIG_SYS_ATA_DATA_OFFSET 0
-#define CONFIG_SYS_ATA_REG_OFFSET 0
-#define CONFIG_SYS_ATA_ALT_OFFSET 0x200
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_STDIO_DEREGISTER
+#define CONFIG_CBMEM_CONSOLE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_COMMAND_HISTORY
+#define CONFIG_AUTOCOMPLETE
#define CONFIG_SUPPORT_VFAT
/************************************************************
@@ -110,19 +119,30 @@
/************************************************************
* DISK Partition support
************************************************************/
+#define CONFIG_EFI_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_MAC_PARTITION
#define CONFIG_ISO_PARTITION /* Experimental */
+#define CONFIG_CMD_PART
#define CONFIG_CMD_CBFS
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
+#define CONFIG_PARTITION_UUIDS
/*-----------------------------------------------------------------------
* Video Configuration
*/
-#undef CONFIG_VIDEO
-#undef CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_COREBOOT
+#define CONFIG_VIDEO_SW_CURSOR
+#define VIDEO_FB_16BPP_WORD_SWAP
+#define CONFIG_I8042_KBD
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+
+/* x86 GPIOs are accessed through a PCI device */
+#define CONFIG_INTEL_ICH6_GPIO
/*-----------------------------------------------------------------------
* Command line configuration.
@@ -136,6 +156,7 @@
#define CONFIG_CMD_ECHO
#undef CONFIG_CMD_FLASH
#define CONFIG_CMD_FPGA
+#define CONFIG_CMD_GPIO
#define CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_IRQ
@@ -153,12 +174,19 @@
#define CONFIG_CMD_SETGETDCR
#define CONFIG_CMD_SOURCE
#define CONFIG_CMD_XIMG
-#define CONFIG_CMD_IDE
+#define CONFIG_CMD_SCSI
+
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_ZBOOT
+
#define CONFIG_BOOTDELAY 2
-#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
+#define CONFIG_BOOTARGS \
+ "root=/dev/sdb3 init=/sbin/init rootwait ro"
+#define CONFIG_BOOTCOMMAND \
+ "ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200
@@ -210,12 +238,11 @@
* (128kB + Environment Sector Size) malloc pool
*/
#define CONFIG_SYS_STACK_SIZE (32 * 1024)
-#define CONFIG_SYS_INIT_SP_ADDR (256 * 1024 + 16 * 1024)
+#define CONFIG_SYS_CAR_ADDR 0x19200000
+#define CONFIG_SYS_CAR_SIZE (16 * 1024)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024)
-/* Address of temporary Global Data */
-#define CONFIG_SYS_INIT_GD_ADDR (256 * 1024)
/* allow to overwrite serial and ethaddr */
@@ -240,4 +267,7 @@
*/
#define CONFIG_PCI
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_STD_DEVICES_SETTINGS
+
#endif /* __CONFIG_H */
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index c41b039..3f42cd9 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -549,7 +549,7 @@
#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000
#else
#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEF000000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000
#endif
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index ddd6155..99b4de7 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -227,6 +227,9 @@
#define CONFIG_SYS_NAND_ECCBYTES 10
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_LOAD
#endif
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index da3263f..83a8b5d 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -316,6 +316,9 @@
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
diff --git a/include/configs/eNET.h b/include/configs/eNET.h
index 4b1c219..28cf95b 100644
--- a/include/configs/eNET.h
+++ b/include/configs/eNET.h
@@ -168,16 +168,10 @@
#define CONFIG_SYS_STACK_SIZE (32 * 1024)
#define CONFIG_SYS_CAR_ADDR 0x19200000
#define CONFIG_SYS_CAR_SIZE (16 * 1024)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_CAR_ADDR + \
- CONFIG_SYS_CAR_SIZE)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SECT_SIZE + \
128*1024)
-/* Address of temporary Global Data */
-#define CONFIG_SYS_INIT_GD_ADDR CONFIG_SYS_CAR_ADDR
-
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index 9ecc10b..5a0d321 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -38,7 +38,7 @@
#define CONFIG_MCFUART
#define CONFIG_SYS_UART_PORT (0)
-#define CONFIG_BAUDRATE 9600
+#define CONFIG_BAUDRATE 115200
#undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */
@@ -52,20 +52,24 @@
#define CONFIG_RESET_TO_RETRY
#define CONFIG_SPLASH_SCREEN
+#define CONFIG_HW_WATCHDOG
+
+#define CONFIG_STATUS_LED
+#define CONFIG_BOARD_SPECIFIC_LED
+#define STATUS_LED_ACTIVE 0
+#define STATUS_LED_BIT 0x0008 /* Timer7 GPIO */
+#define STATUS_LED_BOOT 0
+#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
+#define STATUS_LED_STATE STATUS_LED_OFF
+
/*----------------------------------------------------------------------*
* Configuration for environment *
* Environment is in the second sector of the first 256k of flash *
*----------------------------------------------------------------------*/
-#ifndef CONFIG_MONITOR_IS_IN_RAM
-#define CONFIG_ENV_ADDR 0xF003C000 /* End of 256K */
-#define CONFIG_ENV_SECT_SIZE 0x4000
-#define CONFIG_ENV_IS_IN_FLASH 1
-#else
-#define CONFIG_ENV_ADDR 0xFFE04000
-#define CONFIG_ENV_SECT_SIZE 0x2000
+#define CONFIG_ENV_ADDR 0xFF040000
+#define CONFIG_ENV_SECT_SIZE 0x00020000
#define CONFIG_ENV_IS_IN_FLASH 1
-#endif
/*
* BOOTP options
@@ -78,26 +82,24 @@
/*
* Command line configuration.
*/
+#define CONFIG_CMDLINE_EDITING
#include <config_cmd_default.h>
#undef CONFIG_CMD_LOADB
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_LED
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_MCFTMR
-
#define CONFIG_BOOTDELAY 5
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_PROMPT "\nEB+CPU5282> "
#define CONFIG_SYS_LONGHELP 1
-#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
@@ -112,12 +114,12 @@
/*----------------------------------------------------------------------*
* Clock and PLL Configuration *
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_HZ 10000000
-#define CONFIG_SYS_CLK 58982400 /* 9,8304MHz * 6 */
+#define CONFIG_SYS_HZ 1000
+#define CONFIG_SYS_CLK 80000000 /* 8MHz * 8 */
-/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
+/* PLL Configuration: Ext Clock * 8 (see table 9-4 of MCF user manual) */
-#define CONFIG_SYS_MFD 0x01 /* PLL Multiplication Factor Devider */
+#define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */
#define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
/*----------------------------------------------------------------------*
@@ -135,7 +137,6 @@
#define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
#define MCFFEC_TOUT_LOOP 50000
-#define CONFIG_ETHADDR 00:CF:52:82:EB:01
#define CONFIG_OVERWRITE_ETHADDR_ONCE
/*-------------------------------------------------------------------------
@@ -151,7 +152,7 @@
*-----------------------------------------------------------------------*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
-#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
+#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
#define CONFIG_SYS_GBL_DATA_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
@@ -161,12 +162,11 @@
* (Set up by the startup code)
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
-#define CONFIG_SYS_SDRAM_BASE1 0x00000000
-#define CONFIG_SYS_SDRAM_SIZE1 16 /* SDRAM size in MB */
-
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE1
-#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE1
+#define CONFIG_SYS_SDRAM_BASE0 0x00000000
+#define CONFIG_SYS_SDRAM_SIZE0 16 /* SDRAM size in MB */
+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0
+#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0
/* If M5282 port is fully implemented the monitor base will be behind
* the vector table. */
@@ -190,16 +190,24 @@
/*-----------------------------------------------------------------------
* FLASH organization
*/
+#define CONFIG_FLASH_SHOW_PROGRESS 45
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
#define CONFIG_SYS_INT_FLASH_BASE 0xF0000000
#define CONFIG_SYS_INT_FLASH_ENABLE 0x21
-#define CONFIG_SYS_MAX_FLASH_SECT 35
-#define CONFIG_SYS_MAX_FLASH_BANKS 2
+#define CONFIG_SYS_MAX_FLASH_SECT 128
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_FLASH_ERASE_TOUT 10000000
#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_SIZE 16*1024*1024
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
+
/*-----------------------------------------------------------------------
* Cache Configuration
*/
@@ -221,12 +229,16 @@
* Memory bank definitions
*/
-#define CONFIG_SYS_CS0_BASE 0xFFE00000
+#define CONFIG_SYS_CS0_BASE 0xFF000000
#define CONFIG_SYS_CS0_CTRL 0x00001980
-#define CONFIG_SYS_CS0_MASK 0x001F0001
+#define CONFIG_SYS_CS0_MASK 0x00FF0001
-#define CONFIG_SYS_CS3_BASE 0xE0000000
-#define CONFIG_SYS_CS0_CTRL 0x00001980
+#define CONFIG_SYS_CS2_BASE 0xE0000000
+#define CONFIG_SYS_CS2_CTRL 0x00001980
+#define CONFIG_SYS_CS2_MASK 0x000F0001
+
+#define CONFIG_SYS_CS3_BASE 0xE0100000
+#define CONFIG_SYS_CS3_CTRL 0x00001980
#define CONFIG_SYS_CS3_MASK 0x000F0001
/*-----------------------------------------------------------------------
@@ -248,24 +260,42 @@
#define CONFIG_SYS_PCDDR 0x0000000
#define CONFIG_SYS_PCDAT 0x0000000
+#define CONFIG_SYS_PASPAR 0x0F0F
#define CONFIG_SYS_PEHLPAR 0xC0
#define CONFIG_SYS_PUAPAR 0x0F
#define CONFIG_SYS_DDRUA 0x05
#define CONFIG_SYS_PJPAR 0xFF
/*-----------------------------------------------------------------------
+ * I2C
+ */
+
+#define CONFIG_HARD_I2C
+#define CONFIG_FSL_I2C
+
+#define CONFIG_SYS_I2C_OFFSET 0x00000300
+#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
+
+#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C_SLAVE 0
+
+#ifdef CONFIG_CMD_DATE
+#define CONFIG_RTC_DS1338
+#define CONFIG_I2C_RTC_ADDR 0x68
+#endif
+
+/*-----------------------------------------------------------------------
* VIDEO configuration
*/
#define CONFIG_VIDEO
#ifdef CONFIG_VIDEO
-#define CONFIG_VIDEO_VCXK 1
+#define CONFIG_VIDEO_VCXK 1
#define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2
#define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1
-#define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS3_BASE
-#define CONFIG_SYS_VCXK_AUTODETECT 1
+#define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS2_BASE
#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT
#define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR
diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h
index ccfe032..5a87cc5 100644
--- a/include/configs/ep8260.h
+++ b/include/configs/ep8260.h
@@ -371,7 +371,6 @@
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_TFTP_LOADADDR 0x00100000 /* default load address for network file downloads */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h
index c0e3ed3..8d27590 100644
--- a/include/configs/hawkboard.h
+++ b/include/configs/hawkboard.h
@@ -63,6 +63,9 @@
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */
#define CONFIG_SPL_SERIAL_SUPPORT
diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h
index 85856f2..f646ae5 100644
--- a/include/configs/ib62x0.h
+++ b/include/configs/ib62x0.h
@@ -1,7 +1,7 @@
/*
* Copyright (C) 2011-2012
* Gerald Kerma <dreagle@doukki.net>
- * Luka Perkov <uboot@lukaperkov.net>
+ * Luka Perkov <luka@openwrt.org>
*
* See file CREDITS for list of people who contributed to this
* project.
diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h
index 2b523c9..ba57849 100644
--- a/include/configs/iconnect.h
+++ b/include/configs/iconnect.h
@@ -1,7 +1,7 @@
/*
* (C) Copyright 2009-2012
* Wojciech Dubowik <wojciech.dubowik@neratec.com>
- * Luka Perkov <uboot@lukaperkov.net>
+ * Luka Perkov <luka@openwrt.org>
*
* See file CREDITS for list of people who contributed to this
* project.
diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h
index c81ab76..be7937d 100644
--- a/include/configs/igep00x0.h
+++ b/include/configs/igep00x0.h
@@ -338,6 +338,9 @@
#ifdef CONFIG_BOOT_NAND
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
/* NAND boot config */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h
index 6ae764a..8fc3942 100644
--- a/include/configs/imx31_litekit.h
+++ b/include/configs/imx31_litekit.h
@@ -72,9 +72,9 @@
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
/* PMIC Controller */
-#define CONFIG_PMIC
-#define CONFIG_PMIC_SPI
-#define CONFIG_PMIC_FSL
+#define CONFIG_POWER
+#define CONFIG_POWER_SPI
+#define CONFIG_POWER_FSL
#define CONFIG_FSL_PMIC_BUS 1
#define CONFIG_FSL_PMIC_CS 0
#define CONFIG_FSL_PMIC_CLK 1000000
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 2d33ebc..2ebcd16 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -401,7 +401,6 @@
#define CONFIG_USB_EHCI /* Enable EHCI USB support */
#define CONFIG_USB_EHCI_PPC4XX /* on PPC4xx platform */
#define CONFIG_SYS_PPC4XX_USB_ADDR 0xe0000300
-#define CONFIG_EHCI_DCACHE /* with dcache handling support */
#define CONFIG_EHCI_MMIO_BIG_ENDIAN
#define CONFIG_EHCI_DESC_BIG_ENDIAN
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index b49ec8c..3f37e84 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -297,7 +297,7 @@
"if tftp ${update_nand_full_filename} ; then " \
"run update_nand_get_fcb_size ; " \
"nand scrub -y 0x0 ${filesize} ; " \
- "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \
+ "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \
"setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
"setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
"nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index bf49cc1..e304c99 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -114,7 +114,6 @@
#define CONFIG_USB_EHCI_OMAP
#define CONFIG_USB_ULPI
#define CONFIG_USB_ULPI_VIEWPORT_OMAP
-/*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
@@ -379,6 +378,9 @@
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 8b89b25..cdf3e15 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -263,7 +263,7 @@
"if tftp ${update_nand_full_filename} ; then " \
"run update_nand_get_fcb_size ; " \
"nand scrub -y 0x0 ${filesize} ; " \
- "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \
+ "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \
"setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
"setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
"nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 9d9f4a7..9e4006b4 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -68,9 +68,9 @@
#define CONFIG_MXC_GPIO
/* PMIC Controller */
-#define CONFIG_PMIC
-#define CONFIG_PMIC_SPI
-#define CONFIG_PMIC_FSL
+#define CONFIG_POWER
+#define CONFIG_POWER_SPI
+#define CONFIG_POWER_FSL
#define CONFIG_FSL_PMIC_BUS 1
#define CONFIG_FSL_PMIC_CS 0
#define CONFIG_FSL_PMIC_CLK 1000000
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 6572676..138a941 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -69,9 +69,9 @@
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
/* PMIC Controller */
-#define CONFIG_PMIC
-#define CONFIG_PMIC_SPI
-#define CONFIG_PMIC_FSL
+#define CONFIG_POWER
+#define CONFIG_POWER_SPI
+#define CONFIG_POWER_FSL
#define CONFIG_FSL_PMIC_BUS 1
#define CONFIG_FSL_PMIC_CS 2
#define CONFIG_FSL_PMIC_CLK 1000000
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 1c2f599..1dc7af1 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -65,10 +65,9 @@
/*
* PMIC Configs
*/
-#define CONFIG_PMIC
-#define CONFIG_PMIC_I2C
-#define CONFIG_PMIC_FSL
-#define CONFIG_PMIC_FSL_MC13892
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_FSL
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
#define CONFIG_RTC_MC13XXX
diff --git a/include/configs/mx51_efikamx.h b/include/configs/mx51_efikamx.h
index a056566..a74a0a7 100644
--- a/include/configs/mx51_efikamx.h
+++ b/include/configs/mx51_efikamx.h
@@ -127,9 +127,9 @@
#endif
/* SPI PMIC */
-#define CONFIG_PMIC
-#define CONFIG_PMIC_SPI
-#define CONFIG_PMIC_FSL
+#define CONFIG_POWER
+#define CONFIG_POWER_SPI
+#define CONFIG_POWER_FSL
#define CONFIG_FSL_PMIC_BUS 0
#define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
#define CONFIG_FSL_PMIC_CLK 25000000
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 4e82355..fa0db38 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -69,9 +69,9 @@
#define CONFIG_MXC_SPI
/* PMIC Controller */
-#define CONFIG_PMIC
-#define CONFIG_PMIC_SPI
-#define CONFIG_PMIC_FSL
+#define CONFIG_POWER
+#define CONFIG_POWER_SPI
+#define CONFIG_POWER_FSL
#define CONFIG_FSL_PMIC_BUS 0
#define CONFIG_FSL_PMIC_CS 0
#define CONFIG_FSL_PMIC_CLK 2500000
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index c472075..a0af3ee 100644
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -55,9 +55,9 @@
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC Configs */
-#define CONFIG_PMIC
-#define CONFIG_PMIC_I2C
-#define CONFIG_PMIC_FSL
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_FSL
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
#define CONFIG_PMIC_FSL_MC13892
#define CONFIG_RTC_MC13XXX
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 37f9d69..ef8dc0d 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -89,11 +89,10 @@
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC Controller */
-#define CONFIG_PMIC
-#define CONFIG_PMIC_I2C
-#define CONFIG_DIALOG_PMIC
-#define CONFIG_PMIC_FSL
-#define CONFIG_PMIC_FSL_MC13892
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_DIALOG_POWER
+#define CONFIG_POWER_FSL
#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h
index 6ebdaa8..138e460 100644
--- a/include/configs/mx6qarm2.h
+++ b/include/configs/mx6qarm2.h
@@ -51,7 +51,7 @@
#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC_BOUNCE_BUFFER
+#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h
index b8621b8..0f226f7 100644
--- a/include/configs/mx6qsabre_common.h
+++ b/include/configs/mx6qsabre_common.h
@@ -46,7 +46,7 @@
#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC_BOUNCE_BUFFER
+#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index 759275a..4ce4d4c 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -73,7 +73,7 @@
#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC_BOUNCE_BUFFER
+#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h
index 69ff3ef..624bd5c 100644
--- a/include/configs/nios2-generic.h
+++ b/include/configs/nios2-generic.h
@@ -68,6 +68,7 @@
#define CONFIG_SYS_ALTERA_PIO_GPIO_NUM LED_PIO_WIDTH
#define CONFIG_STATUS_LED /* Enable status driver */
+#define CONFIG_BOARD_SPECIFIC_LED
#define CONFIG_GPIO_LED /* Enable GPIO LED driver */
#define CONFIG_GPIO /* Enable GPIO driver */
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 7a3cc16..12d65f2 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -117,21 +117,19 @@
#define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}}
/* USB */
-#define CONFIG_MUSB_UDC 1
-#define CONFIG_USB_OMAP3 1
+#define CONFIG_MUSB_GADGET
+#define CONFIG_USB_MUSB_OMAP2PLUS
+#define CONFIG_MUSB_PIO_ONLY
+#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_TWL4030_USB 1
-
-/* USB device configuration */
-#define CONFIG_USB_DEVICE 1
-#define CONFIG_USB_TTY 1
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETHER_RNDIS
/* USB EHCI */
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_OMAP
-/*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
#define CONFIG_USB_ULPI
@@ -414,6 +412,9 @@
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_OMAP3_ID_NAND
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index f6e4236..fc6e782 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -95,10 +95,7 @@
#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
/* Partition tables */
-/* Only need DOS partition support for SPL, currently */
-#ifndef CONFIG_SPL_BUILD
#define CONFIG_EFI_PARTITION
-#endif
#define CONFIG_DOS_PARTITION
/* USB
@@ -113,6 +110,9 @@
/* NAND SPL */
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
diff --git a/include/configs/omap3_evm_quick_nand.h b/include/configs/omap3_evm_quick_nand.h
index 362fa1d..8f02584 100644
--- a/include/configs/omap3_evm_quick_nand.h
+++ b/include/configs/omap3_evm_quick_nand.h
@@ -81,6 +81,9 @@
*/
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 626cf7a..fd31c73 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -319,6 +319,9 @@
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 350150b..964bfcd 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -38,6 +38,7 @@
#define __SW_BOOT_MASK 0x03
#define __SW_BOOT_NOR 0xe4
#define __SW_BOOT_SD 0x54
+#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
#if defined(CONFIG_P1020UTM)
@@ -46,6 +47,7 @@
#define __SW_BOOT_MASK 0x03
#define __SW_BOOT_NOR 0xe0
#define __SW_BOOT_SD 0x50
+#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
#if defined(CONFIG_P1020RDB)
@@ -61,6 +63,7 @@
#define __SW_BOOT_SD 0x9c
#define __SW_BOOT_NAND 0xec
#define __SW_BOOT_PCIE 0x6c
+#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
#if defined(CONFIG_P1021RDB)
@@ -78,6 +81,7 @@
#define __SW_BOOT_SD 0x9c
#define __SW_BOOT_NAND 0xec
#define __SW_BOOT_PCIE 0x6c
+#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
#if defined(CONFIG_P1024RDB)
@@ -91,6 +95,7 @@
#define __SW_BOOT_SPI 0x08
#define __SW_BOOT_SD 0x04
#define __SW_BOOT_NAND 0x0c
+#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
#if defined(CONFIG_P1025RDB)
@@ -108,6 +113,7 @@
#define __SW_BOOT_SPI 0x08
#define __SW_BOOT_SD 0x04
#define __SW_BOOT_NAND 0x0c
+#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
#if defined(CONFIG_P2020RDB)
@@ -122,6 +128,14 @@
#define __SW_BOOT_SD 0x68 /* or 0x18 */
#define __SW_BOOT_NAND 0xe8
#define __SW_BOOT_PCIE 0xa8
+#define CONFIG_SYS_L2_SIZE (512 << 10)
+#endif
+
+#if CONFIG_SYS_L2_SIZE >= (512 << 10)
+/* must be 32-bit */
+#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#endif
#ifdef CONFIG_SDCARD
@@ -140,16 +154,39 @@
#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc
#endif
-#if defined(CONFIG_NAND) && defined(CONFIG_NAND_FSL_ELBC)
-#define CONFIG_NAND_U_BOOT
-#define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_TEXT_BASE_SPL 0xff800000
-#ifdef CONFIG_NAND_SPL
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL
+#ifdef CONFIG_NAND
+#define CONFIG_SPL
+#define CONFIG_SPL_INIT_MINIMAL
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
+
+#define CONFIG_SPL_TEXT_BASE 0xfffff000
+#define CONFIG_SPL_MAX_SIZE (4 * 1024)
+
+#ifdef CONFIG_SYS_INIT_L2_ADDR
+/* We multiply CONFIG_SPL_MAX_SIZE by two to leave some room for BSS. */
+#define CONFIG_SYS_TEXT_BASE 0xf8f82000
+#define CONFIG_SPL_RELOC_TEXT_BASE \
+ (CONFIG_SYS_INIT_L2_END - CONFIG_SPL_MAX_SIZE * 2)
+#define CONFIG_SPL_RELOC_STACK \
+ (CONFIG_SYS_INIT_L2_END - CONFIG_SPL_MAX_SIZE * 2)
+#define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
+#define CONFIG_SYS_NAND_U_BOOT_START \
+ (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SPL_MAX_SIZE)
#else
-#define CONFIG_SYS_TEXT_BASE 0x11001000
-#endif /* CONFIG_NAND_SPL */
+#define CONFIG_SYS_TEXT_BASE 0x00201000
+#define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000
+#define CONFIG_SPL_RELOC_STACK 0x00100000
+#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE)
+#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
+#endif
+
+#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000)
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0
+#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#endif
#ifndef CONFIG_SYS_TEXT_BASE
@@ -161,8 +198,12 @@
#endif
#ifndef CONFIG_SYS_MONITOR_BASE
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
+#else
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#endif
+#endif
/* High Level Configuration Options */
#define CONFIG_BOOKE
@@ -221,7 +262,7 @@
/* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
SPL code*/
-#if defined(CONFIG_NAND_SPL)
+#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#endif
@@ -248,39 +289,7 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
/* Default settings for DDR3 */
-#ifdef CONFIG_P2020RDB
-#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f
-#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202
-#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000
-#define CONFIG_SYS_DDR_CS1_BNDS 0x00000000
-#define CONFIG_SYS_DDR_CS1_CONFIG 0x00000000
-#define CONFIG_SYS_DDR_CS1_CONFIG_2 0x00000000
-
-#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef
-#define CONFIG_SYS_DDR_INIT_ADDR 0x00000000
-#define CONFIG_SYS_DDR_INIT_EXT_ADDR 0x00000000
-#define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000
-
-#define CONFIG_SYS_DDR_ZQ_CONTROL 0x89080600
-#define CONFIG_SYS_DDR_WRLVL_CONTROL 0x8645F607
-#define CONFIG_SYS_DDR_SR_CNTR 0x00000000
-#define CONFIG_SYS_DDR_RCW_1 0x00000000
-#define CONFIG_SYS_DDR_RCW_2 0x00000000
-#define CONFIG_SYS_DDR_CONTROL 0xC7000000 /* Type = DDR3 */
-#define CONFIG_SYS_DDR_CONTROL_2 0x24401000
-#define CONFIG_SYS_DDR_TIMING_4 0x00220001
-#define CONFIG_SYS_DDR_TIMING_5 0x02401400
-
-#define CONFIG_SYS_DDR_TIMING_3 0x00020000
-#define CONFIG_SYS_DDR_TIMING_0 0x00330104
-#define CONFIG_SYS_DDR_TIMING_1 0x6f6B4644
-#define CONFIG_SYS_DDR_TIMING_2 0x0FA88CCF
-#define CONFIG_SYS_DDR_CLK_CTRL 0x02000000
-#define CONFIG_SYS_DDR_MODE_1 0x00421422
-#define CONFIG_SYS_DDR_MODE_2 0x04000000
-#define CONFIG_SYS_DDR_INTERVAL 0x0C300100
-
-#else
+#ifndef CONFIG_P2020RDB
#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f
#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302
#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000
@@ -318,21 +327,18 @@
/*
* Memory map
*
- * 0x0000_0000 0x7fff_ffff DDR Up to 2GB cacheable
+ * 0x0000_0000 0x7fff_ffff DDR Up to 2GB cacheable
* 0x8000_0000 0xdfff_ffff PCI Express Mem 1.5G non-cacheable(PCIe * 3)
+ * 0xec00_0000 0xefff_ffff NOR flash Up to 64M non-cacheable CS0/1
+ * 0xf8f8_0000 0xf8ff_ffff L2 SRAM Up to 512K cacheable
+ * (early boot only)
+ * 0xff80_0000 0xff80_7fff NAND flash 32K non-cacheable CS1/0
+ * 0xff98_0000 0xff98_ffff PMC 64K non-cacheable CS2
+ * 0xffa0_0000 0xffaf_ffff CPLD 1M non-cacheable CS3
+ * 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable CS2
* 0xffc0_0000 0xffc3_ffff PCI IO range 256k non-cacheable
- *
- * Localbus cacheable (TBD)
- * 0xXXXX_XXXX 0xXXXX_XXXX SRAM YZ M Cacheable
- *
- * Localbus non-cacheable
- * 0xec00_0000 0xefff_ffff FLASH Up to 64M non-cacheable
- * 0xff80_0000 0xff8f_ffff NAND flash 1M non-cacheable
- * 0xff90_0000 0xff97_ffff L2 SDRAM(REV.) 512K cacheable(optional)
- * 0xffa0_0000 0xffaf_ffff CPLD 1M non-cacheable
- * 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable
- * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0
- * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable
+ * 0xffd0_0000 0xffd0_3fff L1 for stack 16K cacheable
+ * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable
*/
@@ -392,15 +398,6 @@
#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024)
-/* NAND boot: 4K NAND loader config */
-#define CONFIG_SYS_NAND_SPL_SIZE 0x1000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) + CONFIG_SYS_NAND_SPL_SIZE)
-#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000 - CONFIG_SYS_NAND_SPL_SIZE)
-#define CONFIG_SYS_NAND_U_BOOT_START 0x11000000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS (0)
-#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000
-#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
-
#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
| BR_PS_8 /* Port Size = 8 bit */ \
@@ -461,7 +458,7 @@
OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
OR_GPCM_EAD)
-#ifdef CONFIG_NAND_U_BOOT
+#ifdef CONFIG_NAND
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
#define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
@@ -511,7 +508,7 @@
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
-#ifdef CONFIG_NAND_SPL
+#ifdef CONFIG_SPL_BUILD
#define CONFIG_NS16550_MIN_FUNCTIONS
#endif
@@ -709,7 +706,6 @@
/*
* Environment
*/
-#ifdef CONFIG_SYS_RAMBOOT
#ifdef CONFIG_RAMBOOT_SPIFLASH
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SPI_BUS 0
@@ -724,16 +720,15 @@
#define CONFIG_FSL_FIXED_MMC_LOCATION
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_SYS_MMC_ENV_DEV 0
-#elif defined(CONFIG_NAND_U_BOOT)
+#elif defined(CONFIG_NAND)
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE)
-#else
+#elif defined(CONFIG_SYS_RAMBOOT)
#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
#define CONFIG_ENV_SIZE 0x2000
-#endif
#else
#define CONFIG_ENV_IS_IN_FLASH
#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
diff --git a/include/configs/qong.h b/include/configs/qong.h
index e43a021..d9bf201 100644
--- a/include/configs/qong.h
+++ b/include/configs/qong.h
@@ -58,9 +58,9 @@
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
#define CONFIG_RTC_MC13XXX
-#define CONFIG_PMIC
-#define CONFIG_PMIC_SPI
-#define CONFIG_PMIC_FSL
+#define CONFIG_POWER
+#define CONFIG_POWER_SPI
+#define CONFIG_POWER_FSL
#define CONFIG_FSL_PMIC_BUS 1
#define CONFIG_FSL_PMIC_CS 0
#define CONFIG_FSL_PMIC_CLK 100000
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 7e0b302..56e8347 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -215,9 +215,9 @@
#define CONFIG_SYS_CACHELINE_SIZE 64
-#define CONFIG_PMIC
-#define CONFIG_PMIC_I2C
-#define CONFIG_PMIC_MAX8998
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_MAX8998
#include <asm/arch/gpio.h>
/*
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 035c27f..eb13bb3 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -256,9 +256,9 @@
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS 7
-#define CONFIG_PMIC
-#define CONFIG_PMIC_I2C
-#define CONFIG_PMIC_MAX8998
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_MAX8998
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h
index f5dc393..cb99d58 100644
--- a/include/configs/sc_sps_1.h
+++ b/include/configs/sc_sps_1.h
@@ -140,7 +140,7 @@
#ifdef CONFIG_CMD_MMC
#define CONFIG_APBH_DMA
#define CONFIG_MMC
-#define CONFIG_MMC_BOUNCE_BUFFER
+#define CONFIG_BOUNCE_BUFFER
#define CONFIG_GENERIC_MMC
#define CONFIG_MXS_MMC
#endif
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index c2d1c66..de0c777 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -103,10 +103,8 @@
#define CONFIG_TEGRA_KEYBOARD
#define CONFIG_KEYBOARD
-#undef TEGRA_DEVICE_SETTINGS
-#define TEGRA_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \
- "stdout=serial,lcd\0" \
- "stderr=serial,lcd\0"
+/* USB keyboard */
+#define CONFIG_USB_KEYBOARD
/* LCD support */
#define CONFIG_LCD
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 8e6954e..dd5d7cd 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -288,9 +288,6 @@
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_EHCI_MMIO_BIG_ENDIAN
#define CONFIG_EHCI_DESC_BIG_ENDIAN
-#ifdef CONFIG_4xx_DCACHE
-#define CONFIG_EHCI_DCACHE
-#endif
#else /* CONFIG_USB_EHCI */
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_OHCI_BE_CONTROLLER
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index e412da8..9ee462f 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -207,6 +207,7 @@
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_MAX_I2C_NUM 8
#define CONFIG_SYS_I2C_SLAVE 0x0
+#define CONFIG_I2C_EDID
/* PMIC */
#define CONFIG_PMIC
@@ -259,4 +260,10 @@
/* Enable devicetree support */
#define CONFIG_OF_LIBFDT
+/* SHA hashing */
+#define CONFIG_CMD_HASH
+#define CONFIG_HASH_VERIFY
+#define CONFIG_SHA1
+#define CONFIG_SHA256
+
#endif /* __CONFIG_H */
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index dd7757c..ee73c27 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -106,8 +106,6 @@
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_STORAGE
-/* #define CONFIG_EHCI_DCACHE */
-
/* commands to include */
#include <config_cmd_default.h>
@@ -254,6 +252,9 @@
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h
index 2d0d61d..ee40cc2 100644
--- a/include/configs/tegra-common-post.h
+++ b/include/configs/tegra-common-post.h
@@ -146,6 +146,25 @@
"fdt_addr_r=0x02000000\0" \
"ramdisk_addr_r=0x02100000\0" \
+#ifdef CONFIG_TEGRA_KEYBOARD
+#define STDIN_KBD_KBC ",tegra-kbc"
+#else
+#define STDIN_KBD_KBC ""
+#endif
+
+#ifdef CONFIG_USB_KEYBOARD
+#define STDIN_KBD_USB ",usbkbd"
+#define CONFIG_SYS_USB_EVENT_POLL
+#define CONFIG_PREBOOT "usb start"
+#else
+#define STDIN_KBD_USB ""
+#endif
+
+#define TEGRA_DEVICE_SETTINGS \
+ "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB "\0" \
+ "stdout=serial,lcd\0" \
+ "stderr=serial,lcd\0" \
+
#define CONFIG_EXTRA_ENV_SETTINGS \
TEGRA_DEVICE_SETTINGS \
MEM_LAYOUT_ENV_SETTINGS \
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index 72b661a..fe07f72 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -103,7 +103,6 @@
*/
#define CONFIG_USB_EHCI_TXFIFO_THRESH 10
#define CONFIG_EHCI_IS_TDI
-#define CONFIG_EHCI_DCACHE
/* Total I2C ports on Tegra20 */
#define TEGRA_I2C_NUM_CONTROLLERS 4
@@ -128,12 +127,8 @@
#define CONFIG_SYS_NO_FLASH
-/* Environment information, boards can override if required */
#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define TEGRA_DEVICE_SETTINGS "stdin=serial\0" \
- "stdout=serial\0" \
- "stderr=serial\0"
#define CONFIG_LOADADDR 0x408000 /* def. location for kernel */
#define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */
@@ -210,4 +205,7 @@
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_SYS_NAND_ONFI_DETECTION
+/* Misc utility code */
+#define CONFIG_BOUNCE_BUFFER
+
#endif /* __TEGRA20_COMMON_H */
diff --git a/include/configs/trats.h b/include/configs/trats.h
index a24e945..6efee5c 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -98,6 +98,7 @@
#undef CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_MMC
#define CONFIG_CMD_DFU
+#define CONFIG_CMD_GPT
/* FAT */
#define CONFIG_CMD_FAT
@@ -122,6 +123,26 @@
#define CONFIG_BOOTBLOCK "10"
#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
+/* Tizen - partitions definitions */
+#define PARTS_CSA "csa-mmc"
+#define PARTS_BOOTLOADER "u-boot"
+#define PARTS_BOOT "boot"
+#define PARTS_ROOT "platform"
+#define PARTS_DATA "data"
+#define PARTS_CSC "csc"
+#define PARTS_UMS "ums"
+
+#define PARTS_DEFAULT \
+ "uuid_disk=${uuid_gpt_disk};" \
+ "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
+ "name="PARTS_BOOTLOADER",size=60MiB," \
+ "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \
+ "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
+ "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
+ "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
+ "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
+ "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
+
#define CONFIG_DFU_ALT \
"dfu_alt_info=" \
"u-boot mmc 80 400;" \
@@ -171,7 +192,8 @@
"mmcbootpart=2\0" \
"mmcrootpart=3\0" \
"opts=always_resume=1\0" \
- CONFIG_DFU_ALT
+ "partitions=" PARTS_DEFAULT \
+ CONFIG_DFU_ALT \
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
@@ -213,6 +235,10 @@
#define CONFIG_DOS_PARTITION
+/* GPT */
+#define CONFIG_EFI_PARTITION
+#define CONFIG_PARTITION_UUIDS
+
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_CACHELINE_SIZE 32
@@ -239,10 +265,16 @@
#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
#define I2C_INIT multi_i2c_init()
-#define CONFIG_PMIC
-#define CONFIG_PMIC_I2C
-#define CONFIG_PMIC_MAX8997
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_MAX8997
+#define CONFIG_POWER_FG
+#define CONFIG_POWER_FG_MAX17042
+#define CONFIG_POWER_MUIC
+#define CONFIG_POWER_MUIC_MAX8997
+#define CONFIG_POWER_BATTERY
+#define CONFIG_POWER_BATTERY_TRATS
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_DUALSPEED
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index 5859a73..be0d2ec 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -282,6 +282,9 @@
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
index f46efa5..9f8f240 100644
--- a/include/configs/tt01.h
+++ b/include/configs/tt01.h
@@ -149,9 +149,9 @@
#define CONFIG_MXC_GPIO
/* MC13783 connected to CSPI3 and SS0 */
-#define CONFIG_PMIC
-#define CONFIG_PMIC_SPI
-#define CONFIG_PMIC_FSL
+#define CONFIG_POWER
+#define CONFIG_POWER_SPI
+#define CONFIG_POWER_FSL
#define CONFIG_FSL_PMIC_BUS 2
#define CONFIG_FSL_PMIC_CS 0
diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h
index d203bb4..66568c8 100644
--- a/include/configs/utx8245.h
+++ b/include/configs/utx8245.h
@@ -65,7 +65,6 @@
#define CONFIG_BOOTARGS "root=/dev/ram console=ttyS0,57600" /* RAMdisk */
#define CONFIG_ETHADDR 00:AA:00:14:00:05 /* UTX5 */
#define CONFIG_SERVERIP 10.8.17.105 /* Spree */
-#define CONFIG_SYS_TFTP_LOADADDR 10000
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_addr=FFA00000\0" \
diff --git a/include/configs/vct.h b/include/configs/vct.h
index b4b0949..7aeb668 100644
--- a/include/configs/vct.h
+++ b/include/configs/vct.h
@@ -136,7 +136,6 @@
*/
#define CONFIG_USB_EHCI /* Enable EHCI USB support */
#define CONFIG_USB_EHCI_VCT /* on VCT platform */
-#define CONFIG_EHCI_DCACHE /* with dcache handling support */
#define CONFIG_EHCI_MMIO_BIG_ENDIAN
#define CONFIG_EHCI_DESC_BIG_ENDIAN
#define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/ventana.h b/include/configs/ventana.h
index 8f45522..b55ebc9 100644
--- a/include/configs/ventana.h
+++ b/include/configs/ventana.h
@@ -78,6 +78,9 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
+/* USB keyboard */
+#define CONFIG_USB_KEYBOARD
+
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/vision2.h b/include/configs/vision2.h
index 13c5702..226d049 100644
--- a/include/configs/vision2.h
+++ b/include/configs/vision2.h
@@ -87,9 +87,9 @@
#define CONFIG_ENV_IS_IN_SPI_FLASH
/* PMIC Controller */
-#define CONFIG_PMIC
-#define CONFIG_PMIC_SPI
-#define CONFIG_PMIC_FSL
+#define CONFIG_POWER
+#define CONFIG_POWER_SPI
+#define CONFIG_POWER_FSL
#define CONFIG_FSL_PMIC_BUS 0
#define CONFIG_FSL_PMIC_CS 0
#define CONFIG_FSL_PMIC_CLK 2500000
diff --git a/include/edid.h b/include/edid.h
new file mode 100644
index 0000000..4788de9
--- /dev/null
+++ b/include/edid.h
@@ -0,0 +1,275 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * (C) Copyright 2010
+ * Petr Stetiar <ynezz@true.cz>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Contains stolen code from ddcprobe project which is:
+ * Copyright (C) Nalin Dahyabhai <bigfun@pobox.com>
+ *
+ */
+
+#ifndef __EDID_H_
+#define __EDID_H_
+
+#include <linux/types.h>
+
+#define GET_BIT(_x, _pos) \
+ (((_x) >> (_pos)) & 1)
+#define GET_BITS(_x, _pos_msb, _pos_lsb) \
+ (((_x) >> (_pos_lsb)) & ((1 << ((_pos_msb) - (_pos_lsb) + 1)) - 1))
+
+/* Aspect ratios used in EDID info. */
+enum edid_aspect {
+ ASPECT_625 = 0,
+ ASPECT_75,
+ ASPECT_8,
+ ASPECT_5625,
+};
+
+/* Detailed timing information used in EDID v1.x */
+struct edid_detailed_timing {
+ unsigned char pixel_clock[2];
+#define EDID_DETAILED_TIMING_PIXEL_CLOCK(_x) \
+ (((((uint32_t)(_x).pixel_clock[1]) << 8) + \
+ (_x).pixel_clock[0]) * 10000)
+ unsigned char horizontal_active;
+ unsigned char horizontal_blanking;
+ unsigned char horizontal_active_blanking_hi;
+#define EDID_DETAILED_TIMING_HORIZONTAL_ACTIVE(_x) \
+ ((GET_BITS((_x).horizontal_active_blanking_hi, 7, 4) << 8) + \
+ (_x).horizontal_active)
+#define EDID_DETAILED_TIMING_HORIZONTAL_BLANKING(_x) \
+ ((GET_BITS((_x).horizontal_active_blanking_hi, 3, 0) << 8) + \
+ (_x).horizontal_blanking)
+ unsigned char vertical_active;
+ unsigned char vertical_blanking;
+ unsigned char vertical_active_blanking_hi;
+#define EDID_DETAILED_TIMING_VERTICAL_ACTIVE(_x) \
+ ((GET_BITS((_x).vertical_active_blanking_hi, 7, 4) << 8) + \
+ (_x).vertical_active)
+#define EDID_DETAILED_TIMING_VERTICAL_BLANKING(_x) \
+ ((GET_BITS((_x).vertical_active_blanking_hi, 3, 0) << 8) + \
+ (_x).vertical_blanking)
+ unsigned char hsync_offset;
+ unsigned char hsync_pulse_width;
+ unsigned char sync_offset_pulse_width;
+ unsigned char hsync_vsync_offset_pulse_width_hi;
+#define EDID_DETAILED_TIMING_HSYNC_OFFSET(_x) \
+ ((GET_BITS((_x).hsync_vsync_offset_pulse_width_hi, 7, 6) << 8) + \
+ (_x).hsync_offset)
+#define EDID_DETAILED_TIMING_HSYNC_PULSE_WIDTH(_x) \
+ ((GET_BITS((_x).hsync_vsync_offset_pulse_width_hi, 5, 4) << 8) + \
+ (_x).hsync_pulse_width)
+#define EDID_DETAILED_TIMING_VSYNC_OFFSET(_x) \
+ ((GET_BITS((_x).hsync_vsync_offset_pulse_width_hi, 3, 2) << 4) + \
+ GET_BITS((_x).vsync_offset_pulse_width, 7, 4))
+#define EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH(_x) \
+ ((GET_BITS((_x).hsync_vsync_offset_pulse_width_hi, 1, 0) << 4) + \
+ GET_BITS((_x).vsync_offset_pulse_width, 3, 0))
+ unsigned char himage_size;
+ unsigned char vimage_size;
+ unsigned char himage_vimage_size_hi;
+#define EDID_DETAILED_TIMING_HIMAGE_SIZE(_x) \
+ ((GET_BITS((_x).himage_vimage_size_hi, 7, 4) << 8) + (_x).himage_size)
+#define EDID_DETAILED_TIMING_VIMAGE_SIZE(_x) \
+ ((GET_BITS((_x).himage_vimage_size_hi, 3, 0) << 8) + (_x).vimage_size)
+ unsigned char hborder;
+ unsigned char vborder;
+ unsigned char flags;
+#define EDID_DETAILED_TIMING_FLAG_INTERLACED(_x) \
+ GET_BIT((_x).flags, 7)
+#define EDID_DETAILED_TIMING_FLAG_STEREO(_x) \
+ GET_BITS((_x).flags, 6, 5)
+#define EDID_DETAILED_TIMING_FLAG_DIGITAL_COMPOSITE(_x) \
+ GET_BITS((_x).flags, 4, 3)
+#define EDID_DETAILED_TIMING_FLAG_POLARITY(_x) \
+ GET_BITS((_x).flags, 2, 1)
+#define EDID_DETAILED_TIMING_FLAG_INTERLEAVED(_x) \
+ GET_BIT((_x).flags, 0)
+} __attribute__ ((__packed__));
+
+enum edid_monitor_descriptor_types {
+ EDID_MONITOR_DESCRIPTOR_SERIAL = 0xff,
+ EDID_MONITOR_DESCRIPTOR_ASCII = 0xfe,
+ EDID_MONITOR_DESCRIPTOR_RANGE = 0xfd,
+ EDID_MONITOR_DESCRIPTOR_NAME = 0xfc,
+};
+
+struct edid_monitor_descriptor {
+ uint16_t zero_flag_1;
+ unsigned char zero_flag_2;
+ unsigned char type;
+ unsigned char zero_flag_3;
+ union {
+ char string[13];
+ struct {
+ unsigned char vertical_min;
+ unsigned char vertical_max;
+ unsigned char horizontal_min;
+ unsigned char horizontal_max;
+ unsigned char pixel_clock_max;
+ unsigned char gtf_data[8];
+ } range_data;
+ } data;
+} __attribute__ ((__packed__));
+
+struct edid1_info {
+ unsigned char header[8];
+ unsigned char manufacturer_name[2];
+#define EDID1_INFO_MANUFACTURER_NAME_ZERO(_x) \
+ GET_BIT(((_x).manufacturer_name[0]), 7)
+#define EDID1_INFO_MANUFACTURER_NAME_CHAR1(_x) \
+ GET_BITS(((_x).manufacturer_name[0]), 6, 2)
+#define EDID1_INFO_MANUFACTURER_NAME_CHAR2(_x) \
+ ((GET_BITS(((_x).manufacturer_name[0]), 1, 0) << 3) + \
+ GET_BITS(((_x).manufacturer_name[1]), 7, 5))
+#define EDID1_INFO_MANUFACTURER_NAME_CHAR3(_x) \
+ GET_BITS(((_x).manufacturer_name[1]), 4, 0)
+ unsigned char product_code[2];
+#define EDID1_INFO_PRODUCT_CODE(_x) \
+ (((uint16_t)(_x).product_code[1] << 8) + (_x).product_code[0])
+ unsigned char serial_number[4];
+#define EDID1_INFO_SERIAL_NUMBER(_x) \
+ (((uint32_t)(_x).serial_number[3] << 24) + \
+ ((_x).serial_number[2] << 16) + ((_x).serial_number[1] << 8) + \
+ (_x).serial_number[0])
+ unsigned char week;
+ unsigned char year;
+ unsigned char version;
+ unsigned char revision;
+ unsigned char video_input_definition;
+#define EDID1_INFO_VIDEO_INPUT_DIGITAL(_x) \
+ GET_BIT(((_x).video_input_definition), 7)
+#define EDID1_INFO_VIDEO_INPUT_VOLTAGE_LEVEL(_x) \
+ GET_BITS(((_x).video_input_definition), 6, 5)
+#define EDID1_INFO_VIDEO_INPUT_BLANK_TO_BLACK(_x) \
+ GET_BIT(((_x).video_input_definition), 4)
+#define EDID1_INFO_VIDEO_INPUT_SEPARATE_SYNC(_x) \
+ GET_BIT(((_x).video_input_definition), 3)
+#define EDID1_INFO_VIDEO_INPUT_COMPOSITE_SYNC(_x) \
+ GET_BIT(((_x).video_input_definition), 2)
+#define EDID1_INFO_VIDEO_INPUT_SYNC_ON_GREEN(_x) \
+ GET_BIT(((_x).video_input_definition), 1)
+#define EDID1_INFO_VIDEO_INPUT_SERRATION_V(_x) \
+ GET_BIT(((_x).video_input_definition), 0)
+ unsigned char max_size_horizontal;
+ unsigned char max_size_vertical;
+ unsigned char gamma;
+ unsigned char feature_support;
+#define EDID1_INFO_FEATURE_STANDBY(_x) \
+ GET_BIT(((_x).feature_support), 7)
+#define EDID1_INFO_FEATURE_SUSPEND(_x) \
+ GET_BIT(((_x).feature_support), 6)
+#define EDID1_INFO_FEATURE_ACTIVE_OFF(_x) \
+ GET_BIT(((_x).feature_support), 5)
+#define EDID1_INFO_FEATURE_DISPLAY_TYPE(_x) \
+ GET_BITS(((_x).feature_support), 4, 3)
+#define EDID1_INFO_FEATURE_RGB(_x) \
+ GET_BIT(((_x).feature_support), 2)
+#define EDID1_INFO_FEATURE_PREFERRED_TIMING_MODE(_x) \
+ GET_BIT(((_x).feature_support), 1)
+#define EDID1_INFO_FEATURE_DEFAULT_GTF_SUPPORT(_x) \
+ GET_BIT(((_x).feature_support), 0)
+ unsigned char color_characteristics[10];
+ unsigned char established_timings[3];
+#define EDID1_INFO_ESTABLISHED_TIMING_720X400_70(_x) \
+ GET_BIT(((_x).established_timings[0]), 7)
+#define EDID1_INFO_ESTABLISHED_TIMING_720X400_88(_x) \
+ GET_BIT(((_x).established_timings[0]), 6)
+#define EDID1_INFO_ESTABLISHED_TIMING_640X480_60(_x) \
+ GET_BIT(((_x).established_timings[0]), 5)
+#define EDID1_INFO_ESTABLISHED_TIMING_640X480_67(_x) \
+ GET_BIT(((_x).established_timings[0]), 4)
+#define EDID1_INFO_ESTABLISHED_TIMING_640X480_72(_x) \
+ GET_BIT(((_x).established_timings[0]), 3)
+#define EDID1_INFO_ESTABLISHED_TIMING_640X480_75(_x) \
+ GET_BIT(((_x).established_timings[0]), 2)
+#define EDID1_INFO_ESTABLISHED_TIMING_800X600_56(_x) \
+ GET_BIT(((_x).established_timings[0]), 1)
+#define EDID1_INFO_ESTABLISHED_TIMING_800X600_60(_x) \
+ GET_BIT(((_x).established_timings[0]), 0)
+#define EDID1_INFO_ESTABLISHED_TIMING_800X600_72(_x) \
+ GET_BIT(((_x).established_timings[1]), 7)
+#define EDID1_INFO_ESTABLISHED_TIMING_800X600_75(_x) \
+ GET_BIT(((_x).established_timings[1]), 6)
+#define EDID1_INFO_ESTABLISHED_TIMING_832X624_75(_x) \
+ GET_BIT(((_x).established_timings[1]), 5)
+#define EDID1_INFO_ESTABLISHED_TIMING_1024X768_87I(_x) \
+ GET_BIT(((_x).established_timings[1]), 4)
+#define EDID1_INFO_ESTABLISHED_TIMING_1024X768_60(_x) \
+ GET_BIT(((_x).established_timings[1]), 3)
+#define EDID1_INFO_ESTABLISHED_TIMING_1024X768_70(_x) \
+ GET_BIT(((_x).established_timings[1]), 2)
+#define EDID1_INFO_ESTABLISHED_TIMING_1024X768_75(_x) \
+ GET_BIT(((_x).established_timings[1]), 1)
+#define EDID1_INFO_ESTABLISHED_TIMING_1280X1024_75(_x) \
+ GET_BIT(((_x).established_timings[1]), 0)
+#define EDID1_INFO_ESTABLISHED_TIMING_1152X870_75(_x) \
+ GET_BIT(((_x).established_timings[2]), 7)
+ struct {
+ unsigned char xresolution;
+ unsigned char aspect_vfreq;
+ } __attribute__((__packed__)) standard_timings[8];
+#define EDID1_INFO_STANDARD_TIMING_XRESOLUTION(_x, _i) \
+ (((_x).standard_timings[_i]).xresolution)
+#define EDID1_INFO_STANDARD_TIMING_ASPECT(_x, _i) \
+ GET_BITS(((_x).standard_timings[_i].aspect_vfreq), 7, 6)
+#define EDID1_INFO_STANDARD_TIMING_VFREQ(_x, _i) \
+ GET_BITS(((_x).standard_timings[_i].aspect_vfreq), 5, 0)
+ union {
+ unsigned char timing[72];
+ struct edid_monitor_descriptor descriptor[4];
+ } monitor_details;
+ unsigned char extension_flag;
+ unsigned char checksum;
+} __attribute__ ((__packed__));
+
+/**
+ * Print the EDID info.
+ *
+ * @param edid_info The EDID info to be printed
+ */
+void edid_print_info(struct edid1_info *edid_info);
+
+/**
+ * Check the EDID info.
+ *
+ * @param info The EDID info to be checked
+ * @return 0 on valid, or -1 on invalid
+ */
+int edid_check_info(struct edid1_info *info);
+
+/**
+ * Get the horizontal and vertical rate ranges of the monitor.
+ *
+ * @param edid The EDID info
+ * @param hmin Returns the minimum horizontal rate
+ * @param hmax Returns the maxium horizontal rate
+ * @param vmin Returns the minimum vertical rate
+ * @param vmax Returns the maxium vertical rate
+ * @return 0 on success, or -1 on error
+ */
+int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin,
+ unsigned int *hmax, unsigned int *vmin,
+ unsigned int *vmax);
+
+#endif /* __EDID_H_ */
diff --git a/include/env_attr.h b/include/env_attr.h
new file mode 100644
index 0000000..6ef114f
--- /dev/null
+++ b/include/env_attr.h
@@ -0,0 +1,55 @@
+/*
+ * (C) Copyright 2012
+ * Joe Hershberger, National Instruments, joe.hershberger@ni.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ENV_ATTR_H__
+#define __ENV_ATTR_H__
+
+#define ENV_ATTR_LIST_DELIM ','
+#define ENV_ATTR_SEP ':'
+
+/*
+ * env_attr_walk takes as input an "attr_list" that takes the form:
+ * attributes = [^,:\s]*
+ * entry = name[:attributes]
+ * list = entry[,list]
+ * It will call the "callback" function with the "name" and attribute as "value"
+ * The callback may return a non-0 to abort the list walk.
+ * This return value will be passed through to the caller.
+ * 0 is returned on success.
+ */
+extern int env_attr_walk(const char *attr_list,
+ int (*callback)(const char *name, const char *value));
+
+/*
+ * env_attr_lookup takes as input an "attr_list" with the same form as above.
+ * It also takes as input a "name" to look for.
+ * If the name is found in the list, it's value is copied into "attributes".
+ * There is no protection on attributes being too small for the value.
+ * It returns -1 if attributes is NULL, 1 if "name" is not found, 2 if
+ * "attr_list" is NULL.
+ * Returns 0 on success.
+ */
+extern int env_attr_lookup(const char *attr_list, const char *name,
+ char *attributes);
+
+#endif /* __ENV_ATTR_H__ */
diff --git a/include/env_callback.h b/include/env_callback.h
new file mode 100644
index 0000000..47fdc6f
--- /dev/null
+++ b/include/env_callback.h
@@ -0,0 +1,75 @@
+/*
+ * (C) Copyright 2012
+ * Joe Hershberger, National Instruments, joe.hershberger@ni.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ENV_CALLBACK_H__
+#define __ENV_CALLBACK_H__
+
+#include <env_flags.h>
+#include <linker_lists.h>
+#include <search.h>
+
+#define ENV_CALLBACK_VAR ".callbacks"
+
+/* Board configs can define additional static callback bindings */
+#ifndef CONFIG_ENV_CALLBACK_LIST_STATIC
+#define CONFIG_ENV_CALLBACK_LIST_STATIC
+#endif
+
+#ifdef CONFIG_SILENT_CONSOLE
+#define SILENT_CALLBACK "silent:silent,"
+#else
+#define SILENT_CALLBACK
+#endif
+
+/*
+ * This list of callback bindings is static, but may be overridden by defining
+ * a new association in the ".callbacks" environment variable.
+ */
+#define ENV_CALLBACK_LIST_STATIC ENV_CALLBACK_VAR ":callbacks," \
+ ENV_FLAGS_VAR ":flags," \
+ "baudrate:baudrate," \
+ "bootfile:bootfile," \
+ "loadaddr:loadaddr," \
+ SILENT_CALLBACK \
+ "stdin:console,stdout:console,stderr:console," \
+ CONFIG_ENV_CALLBACK_LIST_STATIC
+
+struct env_clbk_tbl {
+ const char *name; /* Callback name */
+ int (*callback)(const char *name, const char *value, enum env_op op,
+ int flags);
+};
+
+struct env_clbk_tbl *find_env_callback(const char *);
+void env_callback_init(ENTRY *var_entry);
+
+/*
+ * Define a callback that can be associated with variables.
+ * when associated through the ".callbacks" environment variable, the callback
+ * will be executed any time the variable is inserted, overwritten, or deleted.
+ */
+#define U_BOOT_ENV_CALLBACK(name, callback) \
+ ll_entry_declare(struct env_clbk_tbl, name, env_clbk, env_clbk) = \
+ {#name, callback}
+
+#endif /* __ENV_CALLBACK_H__ */
diff --git a/include/env_default.h b/include/env_default.h
index a1db73a..39c5b7c 100644
--- a/include/env_default.h
+++ b/include/env_default.h
@@ -24,6 +24,8 @@
* MA 02111-1307 USA
*/
+#include <env_callback.h>
+
#ifdef DEFAULT_ENV_INSTANCE_EMBEDDED
env_t environment __PPCENV__ = {
ENV_CRC, /* CRC Sum */
@@ -36,6 +38,12 @@ static char default_environment[] = {
#else
const uchar default_environment[] = {
#endif
+#ifdef CONFIG_ENV_CALLBACK_LIST_DEFAULT
+ ENV_CALLBACK_VAR "=" CONFIG_ENV_CALLBACK_LIST_DEFAULT "\0"
+#endif
+#ifdef CONFIG_ENV_FLAGS_LIST_DEFAULT
+ ENV_FLAGS_VAR "=" CONFIG_ENV_FLAGS_LIST_DEFAULT "\0"
+#endif
#ifdef CONFIG_BOOTARGS
"bootargs=" CONFIG_BOOTARGS "\0"
#endif
diff --git a/include/env_flags.h b/include/env_flags.h
new file mode 100644
index 0000000..d1aa144
--- /dev/null
+++ b/include/env_flags.h
@@ -0,0 +1,172 @@
+/*
+ * (C) Copyright 2012
+ * Joe Hershberger, National Instruments, joe.hershberger@ni.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ENV_FLAGS_H__
+#define __ENV_FLAGS_H__
+
+enum env_flags_vartype {
+ env_flags_vartype_string,
+ env_flags_vartype_decimal,
+ env_flags_vartype_hex,
+ env_flags_vartype_bool,
+#ifdef CONFIG_CMD_NET
+ env_flags_vartype_ipaddr,
+ env_flags_vartype_macaddr,
+#endif
+ env_flags_vartype_end
+};
+
+enum env_flags_varaccess {
+ env_flags_varaccess_any,
+ env_flags_varaccess_readonly,
+ env_flags_varaccess_writeonce,
+ env_flags_varaccess_changedefault,
+ env_flags_varaccess_end
+};
+
+#define ENV_FLAGS_VAR ".flags"
+#define ENV_FLAGS_ATTR_MAX_LEN 2
+#define ENV_FLAGS_VARTYPE_LOC 0
+#define ENV_FLAGS_VARACCESS_LOC 1
+
+#ifndef CONFIG_ENV_FLAGS_LIST_STATIC
+#define CONFIG_ENV_FLAGS_LIST_STATIC ""
+#endif
+
+#ifdef CONFIG_CMD_NET
+#ifdef CONFIG_ENV_OVERWRITE
+#define ETHADDR_FLAGS "ethaddr:ma,"
+#else
+#ifdef CONFIG_OVERWRITE_ETHADDR_ONCE
+#define ETHADDR_FLAGS "ethaddr:mc,"
+#else
+#define ETHADDR_FLAGS "ethaddr:mo,"
+#endif
+#endif
+#else
+#define ETHADDR_FLAGS ""
+#endif
+
+#ifndef CONFIG_ENV_OVERWRITE
+#define SERIAL_FLAGS "serial#:so,"
+#else
+#define SERIAL_FLAGS ""
+#endif
+
+#define ENV_FLAGS_LIST_STATIC \
+ ETHADDR_FLAGS \
+ SERIAL_FLAGS \
+ CONFIG_ENV_FLAGS_LIST_STATIC
+
+#ifdef CONFIG_CMD_ENV_FLAGS
+/*
+ * Print the whole list of available type flags.
+ */
+void env_flags_print_vartypes(void);
+/*
+ * Print the whole list of available access flags.
+ */
+void env_flags_print_varaccess(void);
+/*
+ * Return the name of the type.
+ */
+const char *env_flags_get_vartype_name(enum env_flags_vartype type);
+/*
+ * Return the name of the access.
+ */
+const char *env_flags_get_varaccess_name(enum env_flags_varaccess access);
+#endif
+
+/*
+ * Parse the flags string from a .flags attribute list into the vartype enum.
+ */
+enum env_flags_vartype env_flags_parse_vartype(const char *flags);
+/*
+ * Parse the flags string from a .flags attribute list into the varaccess enum.
+ */
+enum env_flags_varaccess env_flags_parse_varaccess(const char *flags);
+/*
+ * Parse the binary flags from a hash table entry into the varaccess enum.
+ */
+enum env_flags_varaccess env_flags_parse_varaccess_from_binflags(int binflags);
+
+#ifdef USE_HOSTCC
+/*
+ * Look up the type of a variable directly from the .flags var.
+ */
+enum env_flags_vartype env_flags_get_type(const char *name);
+/*
+ * Look up the access of a variable directly from the .flags var.
+ */
+enum env_flags_varaccess env_flags_get_access(const char *name);
+/*
+ * Validate the newval for its type to conform with the requirements defined by
+ * its flags (directly looked at the .flags var).
+ */
+int env_flags_validate_type(const char *name, const char *newval);
+/*
+ * Validate the newval for its access to conform with the requirements defined
+ * by its flags (directly looked at the .flags var).
+ */
+int env_flags_validate_access(const char *name, int check_mask);
+/*
+ * Validate that the proposed access to variable "name" is valid according to
+ * the defined flags for that variable, if any.
+ */
+int env_flags_validate_varaccess(const char *name, int check_mask);
+/*
+ * Validate the parameters passed to "env set" for type compliance
+ */
+int env_flags_validate_env_set_params(int argc, char * const argv[]);
+
+#else /* !USE_HOSTCC */
+
+#include <search.h>
+
+/*
+ * When adding a variable to the environment, initialize the flags for that
+ * variable.
+ */
+void env_flags_init(ENTRY *var_entry);
+
+/*
+ * Validate the newval for to conform with the requirements defined by its flags
+ */
+int env_flags_validate(const ENTRY *item, const char *newval, enum env_op op,
+ int flag);
+
+#endif /* USE_HOSTCC */
+
+/*
+ * These are the binary flags used in the environment entry->flags variable to
+ * decribe properties of veriables in the table
+ */
+#define ENV_FLAGS_VARTYPE_BIN_MASK 0x00000007
+/* The actual variable type values use the enum value (within the mask) */
+#define ENV_FLAGS_VARACCESS_PREVENT_DELETE 0x00000008
+#define ENV_FLAGS_VARACCESS_PREVENT_CREATE 0x00000010
+#define ENV_FLAGS_VARACCESS_PREVENT_OVERWR 0x00000020
+#define ENV_FLAGS_VARACCESS_PREVENT_NONDEF_OVERWR 0x00000040
+#define ENV_FLAGS_VARACCESS_BIN_MASK 0x00000078
+
+#endif /* __ENV_FLAGS_H__ */
diff --git a/include/environment.h b/include/environment.h
index e8ab703..e64b43d 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -164,6 +164,9 @@ extern void env_reloc(void);
#ifndef DO_DEPS_ONLY
+#include <env_attr.h>
+#include <env_callback.h>
+#include <env_flags.h>
#include <search.h>
extern struct hsearch_data env_htab;
@@ -178,6 +181,9 @@ unsigned char env_get_char_memory(int index);
/* Function that updates CRC of the enironment */
void env_crc_update(void);
+/* Look up the variable from the default environment */
+char *getenv_default(const char *name);
+
/* [re]set to the default environment */
void set_default_env(const char *s);
@@ -187,15 +193,6 @@ int set_default_vars(int nvars, char * const vars[]);
/* Import from binary representation into hash table */
int env_import(const char *buf, int check);
-/*
- * Check if variable "name" can be changed from oldval to newval,
- * and if so, apply the changes (e.g. baudrate).
- * When (flag & H_FORCE) is set, it does not print out any error
- * message and forces overwriting of write-once variables.
- */
-int env_check_apply(const char *name, const char *oldval,
- const char *newval, int flag);
-
#endif /* DO_DEPS_ONLY */
#endif /* _ENVIRONMENT_H_ */
diff --git a/include/exports.h b/include/exports.h
index 63aa4b2..6cf31aa 100644
--- a/include/exports.h
+++ b/include/exports.h
@@ -23,7 +23,7 @@ char *getenv (const char *name);
int setenv (const char *varname, const char *varvalue);
long simple_strtol(const char *cp,char **endp,unsigned int base);
int strcmp(const char * cs,const char * ct);
-int ustrtoul(const char *cp, char **endp, unsigned int base);
+unsigned long ustrtoul(const char *cp, char **endp, unsigned int base);
#if defined(CONFIG_CMD_I2C)
int i2c_write (uchar, uint, int , uchar* , int);
int i2c_read (uchar, uint, int , uchar* , int);
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 64e5cff..70d0e97 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -40,10 +40,12 @@
typedef u64 fdt_addr_t;
#define FDT_ADDR_T_NONE (-1ULL)
#define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
+#define fdt_size_to_cpu(reg) be64_to_cpu(reg)
#else
typedef u32 fdt_addr_t;
#define FDT_ADDR_T_NONE (-1U)
#define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
+#define fdt_size_to_cpu(reg) be32_to_cpu(reg)
#endif
/* Information obtained about memory from the FDT */
@@ -90,6 +92,22 @@ struct fdt_gpio_state {
#define fdt_gpio_isvalid(x) ((x)->gpio != FDT_GPIO_NONE)
/**
+ * Read the GPIO taking into account the polarity of the pin.
+ *
+ * @param gpio pointer to the decoded gpio
+ * @return value of the gpio if successful, < 0 if unsuccessful
+ */
+int fdtdec_get_gpio(struct fdt_gpio_state *gpio);
+
+/**
+ * Write the GPIO taking into account the polarity of the pin.
+ *
+ * @param gpio pointer to the decoded gpio
+ * @return 0 if successful
+ */
+int fdtdec_set_gpio(struct fdt_gpio_state *gpio, int val);
+
+/**
* Find the next numbered alias for a peripheral. This is used to enumerate
* all the peripherals of a certain type.
*
@@ -110,6 +128,19 @@ int fdtdec_next_alias(const void *blob, const char *name,
enum fdt_compat_id id, int *upto);
/**
+ * Find the compatible ID for a given node.
+ *
+ * Generally each node has at least one compatible string attached to it.
+ * This function looks through our list of known compatible strings and
+ * returns the corresponding ID which matches the compatible string.
+ *
+ * @param blob FDT blob to use
+ * @param node Node containing compatible string to find
+ * @return compatible ID, or COMPAT_UNKNOWN if we cannot find a match
+ */
+enum fdt_compat_id fdtdec_lookup(const void *blob, int node);
+
+/**
* Find the next compatible node for a peripheral.
*
* Do the first call with node = 0. This function will return a pointer to
@@ -169,6 +200,21 @@ s32 fdtdec_get_int(const void *blob, int node, const char *prop_name,
s32 default_val);
/**
+ * Look up a 64-bit integer property in a node and return it. The property
+ * must have at least 8 bytes of data (2 cells). The first two cells are
+ * concatenated to form a 8 bytes value, where the first cell is top half and
+ * the second cell is bottom half.
+ *
+ * @param blob FDT blob
+ * @param node node to examine
+ * @param prop_name name of property to find
+ * @param default_val default value to return if the property is not found
+ * @return integer value, if found, or default_val if not
+ */
+uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
+ uint64_t default_val);
+
+/**
* Checks whether a node is enabled.
* This looks for a 'status' property. If this exists, then returns 1 if
* the status is 'ok' and 0 otherwise. If there is no status property,
@@ -345,6 +391,22 @@ int fdtdec_decode_gpio(const void *blob, int node, const char *prop_name,
struct fdt_gpio_state *gpio);
/**
+ * Decode a list of GPIOs from an FDT. This creates a list of GPIOs with no
+ * terminating item.
+ *
+ * @param blob FDT blob to use
+ * @param node Node to look at
+ * @param prop_name Node property name
+ * @param gpio Array of gpio elements to fill from FDT. This will be
+ * untouched if either 0 or an error is returned
+ * @param max_count Maximum number of elements allowed
+ * @return number of GPIOs read if ok, -FDT_ERR_BADLAYOUT if max_count would
+ * be exceeded, or -FDT_ERR_NOTFOUND if the property is missing.
+ */
+int fdtdec_decode_gpios(const void *blob, int node, const char *prop_name,
+ struct fdt_gpio_state *gpio, int max_count);
+
+/**
* Set up a GPIO pin according to the provided gpio information. At present this
* just requests the GPIO.
*
@@ -356,6 +418,39 @@ int fdtdec_decode_gpio(const void *blob, int node, const char *prop_name,
*/
int fdtdec_setup_gpio(struct fdt_gpio_state *gpio);
+/**
+ * Look in the FDT for a config item with the given name and return its value
+ * as a 32-bit integer. The property must have at least 4 bytes of data. The
+ * value of the first cell is returned.
+ *
+ * @param blob FDT blob to use
+ * @param prop_name Node property name
+ * @param default_val default value to return if the property is not found
+ * @return integer value, if found, or default_val if not
+ */
+int fdtdec_get_config_int(const void *blob, const char *prop_name,
+ int default_val);
+
+/**
+ * Look in the FDT for a config item with the given name
+ * and return whether it exists.
+ *
+ * @param blob FDT blob
+ * @param prop_name property name to look up
+ * @return 1, if it exists, or 0 if not
+ */
+int fdtdec_get_config_bool(const void *blob, const char *prop_name);
+
+/**
+ * Look in the FDT for a config item with the given name and return its value
+ * as a string.
+ *
+ * @param blob FDT blob
+ * @param prop_name property name to look up
+ * @returns property string, NULL on error.
+ */
+char *fdtdec_get_config_string(const void *blob, const char *prop_name);
+
/*
* Look up a property in a node and return its contents in a byte
* array of given length. The property must have at least enough data for
@@ -387,4 +482,21 @@ int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
*/
const u8 *fdtdec_locate_byte_array(const void *blob, int node,
const char *prop_name, int count);
+
+/**
+ * Look up a property in a node which contains a memory region address and
+ * size. Then return a pointer to this address.
+ *
+ * The property must hold one address with a length. This is only tested on
+ * 32-bit machines.
+ *
+ * @param blob FDT blob
+ * @param node node to examine
+ * @param prop_name name of property to find
+ * @param ptrp returns pointer to region, or NULL if no address
+ * @param size returns size of region
+ * @return 0 if ok, -1 on error (propery not found)
+ */
+int fdtdec_decode_region(const void *blob, int node,
+ const char *prop_name, void **ptrp, size_t *size);
#endif
diff --git a/include/g_dnl.h b/include/g_dnl.h
index 0ec7440..f47395f 100644
--- a/include/g_dnl.h
+++ b/include/g_dnl.h
@@ -22,7 +22,6 @@
#define __G_DOWNLOAD_H_
#include <linux/usb/ch9.h>
-#include <usbdescriptors.h>
#include <linux/usb/gadget.h>
int g_dnl_register(const char *s);
diff --git a/include/hash.h b/include/hash.h
new file mode 100644
index 0000000..34ba558
--- /dev/null
+++ b/include/hash.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _HASH_H
+#define _HASH_H
+
+#ifdef CONFIG_SHA1SUM_VERIFY
+#define CONFIG_HASH_VERIFY
+#endif
+
+struct hash_algo {
+ const char *name; /* Name of algorithm */
+ int digest_size; /* Length of digest */
+ /**
+ * hash_func_ws: Generic hashing function
+ *
+ * This is the generic prototype for a hashing function. We only
+ * have the watchdog version at present.
+ *
+ * @input: Input buffer
+ * @ilen: Input buffer length
+ * @output: Checksum result (length depends on algorithm)
+ * @chunk_sz: Trigger watchdog after processing this many bytes
+ */
+ void (*hash_func_ws)(const unsigned char *input, unsigned int ilen,
+ unsigned char *output, unsigned int chunk_sz);
+ int chunk_size; /* Watchdog chunk size */
+};
+
+/*
+ * Maximum digest size for all algorithms we support. Having this value
+ * avoids a malloc() or C99 local declaration in common/cmd_hash.c.
+ */
+#define HASH_MAX_DIGEST_SIZE 32
+
+/**
+ * hash_command: Process a hash command for a particular algorithm
+ *
+ * This common function is used to implement specific hash commands.
+ *
+ * @algo_name: Hash algorithm being used
+ * @verify: Non-zero to enable verify mode
+ * @cmdtp: Pointer to command table entry
+ * @flag: Some flags normally 0 (see CMD_FLAG_.. above)
+ * @argc: Number of arguments (arg 0 must be the command text)
+ * @argv: Arguments
+ */
+int hash_command(const char *algo_name, int verify, cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[]);
+
+#endif
diff --git a/include/image.h b/include/image.h
index 0a895f2..b958b18 100644
--- a/include/image.h
+++ b/include/image.h
@@ -460,7 +460,6 @@ static inline void image_set_name(image_header_t *hdr, const char *name)
int image_check_hcrc(const image_header_t *hdr);
int image_check_dcrc(const image_header_t *hdr);
#ifndef USE_HOSTCC
-int getenv_yesno(char *var);
ulong getenv_bootm_low(void);
phys_size_t getenv_bootm_size(void);
phys_size_t getenv_bootm_mapsize(void);
@@ -615,6 +614,7 @@ int fit_image_check_type(const void *fit, int noffset, uint8_t type);
int fit_image_check_comp(const void *fit, int noffset, uint8_t comp);
int fit_check_format(const void *fit);
+int fit_conf_find_compat(const void *fit, const void *fdt);
int fit_conf_get_node(const void *fit, const char *conf_uname);
int fit_conf_get_kernel_node(const void *fit, int noffset);
int fit_conf_get_ramdisk_node(const void *fit, int noffset);
diff --git a/include/lcd.h b/include/lcd.h
index 8f84741..c24164a 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -302,6 +302,42 @@ void lcd_printf (const char *fmt, ...);
void lcd_clear(void);
int lcd_display_bitmap(ulong bmp_image, int x, int y);
+/**
+ * Get the width of the LCD in pixels
+ *
+ * @return width of LCD in pixels
+ */
+int lcd_get_pixel_width(void);
+
+/**
+ * Get the height of the LCD in pixels
+ *
+ * @return height of LCD in pixels
+ */
+int lcd_get_pixel_height(void);
+
+/**
+ * Get the number of text lines/rows on the LCD
+ *
+ * @return number of rows
+ */
+int lcd_get_screen_rows(void);
+
+/**
+ * Get the number of text columns on the LCD
+ *
+ * @return number of columns
+ */
+int lcd_get_screen_columns(void);
+
+/**
+ * Set the position of the text cursor
+ *
+ * @param col Column to place cursor (0 = left side)
+ * @param row Row to place cursor (0 = top line)
+ */
+void lcd_position_cursor(unsigned col, unsigned row);
+
/* Allow boards to customize the information displayed */
void lcd_show_board_info(void);
diff --git a/include/linux/byteorder/swab.h b/include/linux/byteorder/swab.h
index bb4a046..4334fa7 100644
--- a/include/linux/byteorder/swab.h
+++ b/include/linux/byteorder/swab.h
@@ -122,7 +122,6 @@ static __inline__ void __swab32s(__u32 *addr)
__arch__swab32s(addr);
}
-#ifdef __BYTEORDER_HAS_U64__
static __inline__ __attribute__((const)) __u64 __fswab64(__u64 x)
{
# ifdef __SWAB_64_THRU_32__
@@ -141,7 +140,6 @@ static __inline__ void __swab64s(__u64 *addr)
{
__arch__swab64s(addr);
}
-#endif /* __BYTEORDER_HAS_U64__ */
#if defined(__KERNEL__)
#define swab16 __swab16
diff --git a/include/linux/linux_string.h b/include/linux/linux_string.h
new file mode 100644
index 0000000..192b4c9
--- /dev/null
+++ b/include/linux/linux_string.h
@@ -0,0 +1,8 @@
+#ifndef _LINUX_LINUX_STRING_H_
+#define _LINUX_LINUX_STRING_H_
+
+extern char * skip_spaces(const char *);
+
+extern char *strim(char *);
+
+#endif
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index f63e04b..e9e9045 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -194,6 +194,9 @@ typedef enum {
/* Device behaves just like nand, but is readonly */
#define NAND_ROM 0x00000800
+/* Device supports subpage reads */
+#define NAND_SUBPAGE_READ 0x00001000
+
/* Options valid for Samsung large page devices */
#define NAND_SAMSUNG_LP_OPTIONS \
(NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)
@@ -203,9 +206,7 @@ typedef enum {
#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
-/* Large page NAND with SOFT_ECC should support subpage reads */
-#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT) \
- && (chip->page_shift > 9))
+#define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ))
/* Non chip related options */
/*
diff --git a/include/linux/string.h b/include/linux/string.h
index 9a8cbc2..e9b134d 100644
--- a/include/linux/string.h
+++ b/include/linux/string.h
@@ -38,8 +38,11 @@ extern int strcmp(const char *,const char *);
#ifndef __HAVE_ARCH_STRNCMP
extern int strncmp(const char *,const char *,__kernel_size_t);
#endif
-#if 0 /* not used - was: #ifndef __HAVE_ARCH_STRNICMP */
-extern int strnicmp(const char *, const char *, __kernel_size_t);
+#ifndef __HAVE_ARCH_STRCASECMP
+int strcasecmp(const char *s1, const char *s2);
+#endif
+#ifndef __HAVE_ARCH_STRNCASECMP
+extern int strncasecmp(const char *s1, const char *s2, __kernel_size_t len);
#endif
#ifndef __HAVE_ARCH_STRCHR
extern char * strchr(const char *,int);
@@ -47,10 +50,7 @@ extern char * strchr(const char *,int);
#ifndef __HAVE_ARCH_STRRCHR
extern char * strrchr(const char *,int);
#endif
-extern char * skip_spaces(const char *);
-
-extern char *strim(char *);
-
+#include <linux/linux_string.h>
#ifndef __HAVE_ARCH_STRSTR
extern char * strstr(const char *,const char *);
#endif
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index ce1d1e1..d1d732c 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -28,15 +28,13 @@
* [c] for consistency, removing all doubt even when it appears to
* someone that the two other points are non-issues for that
* particular descriptor type.
- *
- * Ported to U-boot by: Thomas Smits <ts.smits@gmail.com> and
- * Remy Bohmer <linux@bohmer.net>
*/
#ifndef __LINUX_USB_CH9_H
#define __LINUX_USB_CH9_H
#include <linux/types.h> /* __u8 etc */
+#include <asm/byteorder.h> /* le16_to_cpu */
/*-------------------------------------------------------------------------*/
@@ -70,7 +68,7 @@
#define USB_RECIP_OTHER 0x03
/* From Wireless USB 1.0 */
#define USB_RECIP_PORT 0x04
-#define USB_RECIP_RPIPE 0x05
+#define USB_RECIP_RPIPE 0x05
/*
* Standard requests, for the bRequest field of a SETUP packet.
@@ -90,6 +88,8 @@
#define USB_REQ_GET_INTERFACE 0x0A
#define USB_REQ_SET_INTERFACE 0x0B
#define USB_REQ_SYNCH_FRAME 0x0C
+#define USB_REQ_SET_SEL 0x30
+#define USB_REQ_SET_ISOCH_DELAY 0x31
#define USB_REQ_SET_ENCRYPTION 0x0D /* Wireless USB */
#define USB_REQ_GET_ENCRYPTION 0x0E
@@ -105,10 +105,16 @@
#define USB_REQ_LOOPBACK_DATA_READ 0x16
#define USB_REQ_SET_INTERFACE_DS 0x17
+/* The Link Power Management (LPM) ECN defines USB_REQ_TEST_AND_SET command,
+ * used by hubs to put ports into a new L1 suspend state, except that it
+ * forgot to define its number ...
+ */
+
/*
* USB feature flags are written using USB_REQ_{CLEAR,SET}_FEATURE, and
* are read as a bit array returned by USB_REQ_GET_STATUS. (So there
- * are at most sixteen features of each type.)
+ * are at most sixteen features of each type.) Hubs may also support a
+ * new USB_REQ_TEST_AND_SET_FEATURE to put ports into L1 suspend.
*/
#define USB_DEVICE_SELF_POWERED 0 /* (read only) */
#define USB_DEVICE_REMOTE_WAKEUP 1 /* dev may initiate wakeup */
@@ -120,8 +126,38 @@
#define USB_DEVICE_A_ALT_HNP_SUPPORT 5 /* (otg) other RH port does */
#define USB_DEVICE_DEBUG_MODE 6 /* (special devices only) */
+/*
+ * Test Mode Selectors
+ * See USB 2.0 spec Table 9-7
+ */
+#define TEST_J 1
+#define TEST_K 2
+#define TEST_SE0_NAK 3
+#define TEST_PACKET 4
+#define TEST_FORCE_EN 5
+
+/*
+ * New Feature Selectors as added by USB 3.0
+ * See USB 3.0 spec Table 9-6
+ */
+#define USB_DEVICE_U1_ENABLE 48 /* dev may initiate U1 transition */
+#define USB_DEVICE_U2_ENABLE 49 /* dev may initiate U2 transition */
+#define USB_DEVICE_LTM_ENABLE 50 /* dev may send LTM */
+#define USB_INTRF_FUNC_SUSPEND 0 /* function suspend */
+
+#define USB_INTR_FUNC_SUSPEND_OPT_MASK 0xFF00
+/*
+ * Suspend Options, Table 9-7 USB 3.0 spec
+ */
+#define USB_INTRF_FUNC_SUSPEND_LP (1 << (8 + 0))
+#define USB_INTRF_FUNC_SUSPEND_RW (1 << (8 + 1))
+
#define USB_ENDPOINT_HALT 0 /* IN/OUT will STALL */
+/* Bit array elements as returned by the USB_REQ_GET_STATUS request. */
+#define USB_DEV_STAT_U1_ENABLED 2 /* transition into U1 state */
+#define USB_DEV_STAT_U2_ENABLED 3 /* transition into U2 state */
+#define USB_DEV_STAT_LTM_ENABLED 4 /* Latency tolerance messages */
/**
* struct usb_ctrlrequest - SETUP data for a USB device control request
@@ -140,10 +176,6 @@
* For most devices, interfaces don't coordinate with each other, so
* such requests may be made at any time.
*/
-#if defined(__BIG_ENDIAN) || defined(__ARMEB__)
-#error (functionality not verified for big endian targets, todo...)
-#endif
-
struct usb_ctrlrequest {
__u8 bRequestType;
__u8 bRequest;
@@ -159,8 +191,12 @@ struct usb_ctrlrequest {
* (rarely) accepted by SET_DESCRIPTOR.
*
* Note that all multi-byte values here are encoded in little endian
- * byte order "on the wire". But when exposed through Linux-USB APIs,
- * they've been converted to cpu byte order.
+ * byte order "on the wire". Within the kernel and when exposed
+ * through the Linux-USB APIs, they are not converted to cpu byte
+ * order; it is the responsibility of the client code to do this.
+ * The single exception is when device and configuration descriptors (but
+ * not other descriptors) are read from usbfs (i.e. /proc/bus/usb/BBB/DDD);
+ * in this case the fields are converted to host endianness by the kernel.
*/
/*
@@ -187,6 +223,11 @@ struct usb_ctrlrequest {
#define USB_DT_WIRELESS_ENDPOINT_COMP 0x11
#define USB_DT_WIRE_ADAPTER 0x21
#define USB_DT_RPIPE 0x22
+#define USB_DT_CS_RADIO_CONTROL 0x23
+/* From the T10 UAS specification */
+#define USB_DT_PIPE_USAGE 0x24
+/* From the USB 3.0 spec */
+#define USB_DT_SS_ENDPOINT_COMP 0x30
/* Conventional codes for class-specific descriptors. The convention is
* defined in the USB "Common Class" Spec (3.11). Individual class specs
@@ -204,6 +245,28 @@ struct usb_descriptor_header {
__u8 bDescriptorType;
} __attribute__ ((packed));
+
+/*-------------------------------------------------------------------------*/
+
+/* USB_DT_DEVICE: Device descriptor */
+struct usb_device_descriptor {
+ __u8 bLength;
+ __u8 bDescriptorType;
+
+ __le16 bcdUSB;
+ __u8 bDeviceClass;
+ __u8 bDeviceSubClass;
+ __u8 bDeviceProtocol;
+ __u8 bMaxPacketSize0;
+ __le16 idVendor;
+ __le16 idProduct;
+ __le16 bcdDevice;
+ __u8 iManufacturer;
+ __u8 iProduct;
+ __u8 iSerialNumber;
+ __u8 bNumConfigurations;
+} __attribute__ ((packed));
+
#define USB_DT_DEVICE_SIZE 18
@@ -230,6 +293,8 @@ struct usb_descriptor_header {
#define USB_CLASS_APP_SPEC 0xfe
#define USB_CLASS_VENDOR_SPEC 0xff
+#define USB_SUBCLASS_VENDOR_SPEC 0xff
+
/*-------------------------------------------------------------------------*/
/* USB_DT_CONFIG: Configuration descriptor information.
@@ -260,11 +325,56 @@ struct usb_config_descriptor {
#define USB_CONFIG_ATT_WAKEUP (1 << 5) /* can wakeup */
#define USB_CONFIG_ATT_BATTERY (1 << 4) /* battery powered */
+/*-------------------------------------------------------------------------*/
+
+/* USB_DT_STRING: String descriptor */
+struct usb_string_descriptor {
+ __u8 bLength;
+ __u8 bDescriptorType;
+
+ __le16 wData[1]; /* UTF-16LE encoded */
+} __attribute__ ((packed));
+
/* note that "string" zero is special, it holds language codes that
* the device supports, not Unicode characters.
*/
+/*-------------------------------------------------------------------------*/
+
+/* USB_DT_INTERFACE: Interface descriptor */
+struct usb_interface_descriptor {
+ __u8 bLength;
+ __u8 bDescriptorType;
+
+ __u8 bInterfaceNumber;
+ __u8 bAlternateSetting;
+ __u8 bNumEndpoints;
+ __u8 bInterfaceClass;
+ __u8 bInterfaceSubClass;
+ __u8 bInterfaceProtocol;
+ __u8 iInterface;
+} __attribute__ ((packed));
+
#define USB_DT_INTERFACE_SIZE 9
+
+/*-------------------------------------------------------------------------*/
+
+/* USB_DT_ENDPOINT: Endpoint descriptor */
+struct usb_endpoint_descriptor {
+ __u8 bLength;
+ __u8 bDescriptorType;
+
+ __u8 bEndpointAddress;
+ __u8 bmAttributes;
+ __le16 wMaxPacketSize;
+ __u8 bInterval;
+
+ /* NOTE: these two are _only_ in audio endpoints. */
+ /* use USB_DT_ENDPOINT*_SIZE in bLength, not sizeof. */
+ __u8 bRefresh;
+ __u8 bSynchAddress;
+} __attribute__ ((packed));
+
#define USB_DT_ENDPOINT_SIZE 7
#define USB_DT_ENDPOINT_AUDIO_SIZE 9 /* Audio extension */
@@ -282,6 +392,254 @@ struct usb_config_descriptor {
#define USB_ENDPOINT_XFER_INT 3
#define USB_ENDPOINT_MAX_ADJUSTABLE 0x80
+/* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */
+#define USB_ENDPOINT_INTRTYPE 0x30
+#define USB_ENDPOINT_INTR_PERIODIC (0 << 4)
+#define USB_ENDPOINT_INTR_NOTIFICATION (1 << 4)
+
+#define USB_ENDPOINT_SYNCTYPE 0x0c
+#define USB_ENDPOINT_SYNC_NONE (0 << 2)
+#define USB_ENDPOINT_SYNC_ASYNC (1 << 2)
+#define USB_ENDPOINT_SYNC_ADAPTIVE (2 << 2)
+#define USB_ENDPOINT_SYNC_SYNC (3 << 2)
+
+#define USB_ENDPOINT_USAGE_MASK 0x30
+#define USB_ENDPOINT_USAGE_DATA 0x00
+#define USB_ENDPOINT_USAGE_FEEDBACK 0x10
+#define USB_ENDPOINT_USAGE_IMPLICIT_FB 0x20 /* Implicit feedback Data endpoint */
+
+/*-------------------------------------------------------------------------*/
+
+/**
+ * usb_endpoint_num - get the endpoint's number
+ * @epd: endpoint to be checked
+ *
+ * Returns @epd's number: 0 to 15.
+ */
+static inline int usb_endpoint_num(const struct usb_endpoint_descriptor *epd)
+{
+ return epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
+}
+
+/**
+ * usb_endpoint_type - get the endpoint's transfer type
+ * @epd: endpoint to be checked
+ *
+ * Returns one of USB_ENDPOINT_XFER_{CONTROL, ISOC, BULK, INT} according
+ * to @epd's transfer type.
+ */
+static inline int usb_endpoint_type(const struct usb_endpoint_descriptor *epd)
+{
+ return epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
+}
+
+/**
+ * usb_endpoint_dir_in - check if the endpoint has IN direction
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint is of type IN, otherwise it returns false.
+ */
+static inline int usb_endpoint_dir_in(const struct usb_endpoint_descriptor *epd)
+{
+ return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN);
+}
+
+/**
+ * usb_endpoint_dir_out - check if the endpoint has OUT direction
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint is of type OUT, otherwise it returns false.
+ */
+static inline int usb_endpoint_dir_out(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT);
+}
+
+/**
+ * usb_endpoint_xfer_bulk - check if the endpoint has bulk transfer type
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint is of type bulk, otherwise it returns false.
+ */
+static inline int usb_endpoint_xfer_bulk(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
+ USB_ENDPOINT_XFER_BULK);
+}
+
+/**
+ * usb_endpoint_xfer_control - check if the endpoint has control transfer type
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint is of type control, otherwise it returns false.
+ */
+static inline int usb_endpoint_xfer_control(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
+ USB_ENDPOINT_XFER_CONTROL);
+}
+
+/**
+ * usb_endpoint_xfer_int - check if the endpoint has interrupt transfer type
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint is of type interrupt, otherwise it returns
+ * false.
+ */
+static inline int usb_endpoint_xfer_int(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
+ USB_ENDPOINT_XFER_INT);
+}
+
+/**
+ * usb_endpoint_xfer_isoc - check if the endpoint has isochronous transfer type
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint is of type isochronous, otherwise it returns
+ * false.
+ */
+static inline int usb_endpoint_xfer_isoc(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
+ USB_ENDPOINT_XFER_ISOC);
+}
+
+/**
+ * usb_endpoint_is_bulk_in - check if the endpoint is bulk IN
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint has bulk transfer type and IN direction,
+ * otherwise it returns false.
+ */
+static inline int usb_endpoint_is_bulk_in(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return usb_endpoint_xfer_bulk(epd) && usb_endpoint_dir_in(epd);
+}
+
+/**
+ * usb_endpoint_is_bulk_out - check if the endpoint is bulk OUT
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint has bulk transfer type and OUT direction,
+ * otherwise it returns false.
+ */
+static inline int usb_endpoint_is_bulk_out(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return usb_endpoint_xfer_bulk(epd) && usb_endpoint_dir_out(epd);
+}
+
+/**
+ * usb_endpoint_is_int_in - check if the endpoint is interrupt IN
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint has interrupt transfer type and IN direction,
+ * otherwise it returns false.
+ */
+static inline int usb_endpoint_is_int_in(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return usb_endpoint_xfer_int(epd) && usb_endpoint_dir_in(epd);
+}
+
+/**
+ * usb_endpoint_is_int_out - check if the endpoint is interrupt OUT
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint has interrupt transfer type and OUT direction,
+ * otherwise it returns false.
+ */
+static inline int usb_endpoint_is_int_out(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return usb_endpoint_xfer_int(epd) && usb_endpoint_dir_out(epd);
+}
+
+/**
+ * usb_endpoint_is_isoc_in - check if the endpoint is isochronous IN
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint has isochronous transfer type and IN direction,
+ * otherwise it returns false.
+ */
+static inline int usb_endpoint_is_isoc_in(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return usb_endpoint_xfer_isoc(epd) && usb_endpoint_dir_in(epd);
+}
+
+/**
+ * usb_endpoint_is_isoc_out - check if the endpoint is isochronous OUT
+ * @epd: endpoint to be checked
+ *
+ * Returns true if the endpoint has isochronous transfer type and OUT direction,
+ * otherwise it returns false.
+ */
+static inline int usb_endpoint_is_isoc_out(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return usb_endpoint_xfer_isoc(epd) && usb_endpoint_dir_out(epd);
+}
+
+/**
+ * usb_endpoint_maxp - get endpoint's max packet size
+ * @epd: endpoint to be checked
+ *
+ * Returns @epd's max packet
+ */
+static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd)
+{
+ return __le16_to_cpu(epd->wMaxPacketSize);
+}
+
+static inline int usb_endpoint_interrupt_type(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return epd->bmAttributes & USB_ENDPOINT_INTRTYPE;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* USB_DT_SS_ENDPOINT_COMP: SuperSpeed Endpoint Companion descriptor */
+struct usb_ss_ep_comp_descriptor {
+ __u8 bLength;
+ __u8 bDescriptorType;
+
+ __u8 bMaxBurst;
+ __u8 bmAttributes;
+ __le16 wBytesPerInterval;
+} __attribute__ ((packed));
+
+#define USB_DT_SS_EP_COMP_SIZE 6
+
+/* Bits 4:0 of bmAttributes if this is a bulk endpoint */
+static inline int
+usb_ss_max_streams(const struct usb_ss_ep_comp_descriptor *comp)
+{
+ int max_streams;
+
+ if (!comp)
+ return 0;
+
+ max_streams = comp->bmAttributes & 0x1f;
+
+ if (!max_streams)
+ return 0;
+
+ max_streams = 1 << max_streams;
+
+ return max_streams;
+}
+
+/* Bits 1:0 of bmAttributes if this is an isoc endpoint */
+#define USB_SS_MULT(p) (1 + ((p) & 0x3))
/*-------------------------------------------------------------------------*/
@@ -388,7 +746,7 @@ struct usb_encryption_descriptor {
/*-------------------------------------------------------------------------*/
-/* USB_DT_BOS: group of wireless capabilities */
+/* USB_DT_BOS: group of device-level capabilities */
struct usb_bos_descriptor {
__u8 bLength;
__u8 bDescriptorType;
@@ -397,6 +755,7 @@ struct usb_bos_descriptor {
__u8 bNumDeviceCaps;
} __attribute__((packed));
+#define USB_DT_BOS_SIZE 5
/*-------------------------------------------------------------------------*/
/* USB_DT_DEVICE_CAPABILITY: grouped with BOS */
@@ -434,6 +793,61 @@ struct usb_wireless_cap_descriptor { /* Ultra Wide Band */
__u8 bReserved;
} __attribute__((packed));
+/* USB 2.0 Extension descriptor */
+#define USB_CAP_TYPE_EXT 2
+
+struct usb_ext_cap_descriptor { /* Link Power Management */
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDevCapabilityType;
+ __le32 bmAttributes;
+#define USB_LPM_SUPPORT (1 << 1) /* supports LPM */
+#define USB_BESL_SUPPORT (1 << 2) /* supports BESL */
+#define USB_BESL_BASELINE_VALID (1 << 3) /* Baseline BESL valid*/
+#define USB_BESL_DEEP_VALID (1 << 4) /* Deep BESL valid */
+#define USB_GET_BESL_BASELINE(p) (((p) & (0xf << 8)) >> 8)
+#define USB_GET_BESL_DEEP(p) (((p) & (0xf << 12)) >> 12)
+} __attribute__((packed));
+
+#define USB_DT_USB_EXT_CAP_SIZE 7
+
+/*
+ * SuperSpeed USB Capability descriptor: Defines the set of SuperSpeed USB
+ * specific device level capabilities
+ */
+#define USB_SS_CAP_TYPE 3
+struct usb_ss_cap_descriptor { /* Link Power Management */
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDevCapabilityType;
+ __u8 bmAttributes;
+#define USB_LTM_SUPPORT (1 << 1) /* supports LTM */
+ __le16 wSpeedSupported;
+#define USB_LOW_SPEED_OPERATION (1) /* Low speed operation */
+#define USB_FULL_SPEED_OPERATION (1 << 1) /* Full speed operation */
+#define USB_HIGH_SPEED_OPERATION (1 << 2) /* High speed operation */
+#define USB_5GBPS_OPERATION (1 << 3) /* Operation at 5Gbps */
+ __u8 bFunctionalitySupport;
+ __u8 bU1devExitLat;
+ __le16 bU2DevExitLat;
+} __attribute__((packed));
+
+#define USB_DT_USB_SS_CAP_SIZE 10
+
+/*
+ * Container ID Capability descriptor: Defines the instance unique ID used to
+ * identify the instance across all operating modes
+ */
+#define CONTAINER_ID_TYPE 4
+struct usb_ss_container_id_descriptor {
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDevCapabilityType;
+ __u8 bReserved;
+ __u8 ContainerID[16]; /* 128-bit number */
+} __attribute__((packed));
+
+#define USB_DT_USB_SS_CONTN_ID_SIZE 20
/*-------------------------------------------------------------------------*/
/* USB_DT_WIRELESS_ENDPOINT_COMP: companion descriptor associated with
@@ -491,9 +905,22 @@ enum usb_device_speed {
USB_SPEED_UNKNOWN = 0, /* enumerating */
USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */
USB_SPEED_HIGH, /* usb 2.0 */
- USB_SPEED_VARIABLE, /* wireless (usb 2.5) */
+ USB_SPEED_WIRELESS, /* wireless (usb 2.5) */
+ USB_SPEED_SUPER, /* usb 3.0 */
};
+#ifdef __KERNEL__
+
+/**
+ * usb_speed_string() - Returns human readable-name of the speed.
+ * @speed: The speed to return human-readable name for. If it's not
+ * any of the speeds defined in usb_device_speed enum, string for
+ * USB_SPEED_UNKNOWN will be returned.
+ */
+extern const char *usb_speed_string(enum usb_device_speed speed);
+
+#endif
+
enum usb_device_state {
/* NOTATTACHED isn't in the USB spec, and this state acts
* the same as ATTACHED ... but it's clearer this way.
@@ -503,8 +930,8 @@ enum usb_device_state {
/* chapter 9 and authentication (wireless) device states */
USB_STATE_ATTACHED,
USB_STATE_POWERED, /* wired */
- USB_STATE_UNAUTHENTICATED, /* auth */
USB_STATE_RECONNECTING, /* auth */
+ USB_STATE_UNAUTHENTICATED, /* auth */
USB_STATE_DEFAULT, /* limited function */
USB_STATE_ADDRESS,
USB_STATE_CONFIGURED, /* most functions */
@@ -514,7 +941,64 @@ enum usb_device_state {
/* NOTE: there are actually four different SUSPENDED
* states, returning to POWERED, DEFAULT, ADDRESS, or
* CONFIGURED respectively when SOF tokens flow again.
+ * At this level there's no difference between L1 and L2
+ * suspend states. (L2 being original USB 1.1 suspend.)
*/
};
-#endif /* __LINUX_USB_CH9_H */
+enum usb3_link_state {
+ USB3_LPM_U0 = 0,
+ USB3_LPM_U1,
+ USB3_LPM_U2,
+ USB3_LPM_U3
+};
+
+/*
+ * A U1 timeout of 0x0 means the parent hub will reject any transitions to U1.
+ * 0xff means the parent hub will accept transitions to U1, but will not
+ * initiate a transition.
+ *
+ * A U1 timeout of 0x1 to 0x7F also causes the hub to initiate a transition to
+ * U1 after that many microseconds. Timeouts of 0x80 to 0xFE are reserved
+ * values.
+ *
+ * A U2 timeout of 0x0 means the parent hub will reject any transitions to U2.
+ * 0xff means the parent hub will accept transitions to U2, but will not
+ * initiate a transition.
+ *
+ * A U2 timeout of 0x1 to 0xFE also causes the hub to initiate a transition to
+ * U2 after N*256 microseconds. Therefore a U2 timeout value of 0x1 means a U2
+ * idle timer of 256 microseconds, 0x2 means 512 microseconds, 0xFE means
+ * 65.024ms.
+ */
+#define USB3_LPM_DISABLED 0x0
+#define USB3_LPM_U1_MAX_TIMEOUT 0x7F
+#define USB3_LPM_U2_MAX_TIMEOUT 0xFE
+#define USB3_LPM_DEVICE_INITIATED 0xFF
+
+struct usb_set_sel_req {
+ __u8 u1_sel;
+ __u8 u1_pel;
+ __le16 u2_sel;
+ __le16 u2_pel;
+} __attribute__ ((packed));
+
+/*
+ * The Set System Exit Latency control transfer provides one byte each for
+ * U1 SEL and U1 PEL, so the max exit latency is 0xFF. U2 SEL and U2 PEL each
+ * are two bytes long.
+ */
+#define USB3_LPM_MAX_U1_SEL_PEL 0xFF
+#define USB3_LPM_MAX_U2_SEL_PEL 0xFFFF
+
+/*-------------------------------------------------------------------------*/
+
+/*
+ * As per USB compliance update, a device that is actively drawing
+ * more than 100mA from USB must report itself as bus-powered in
+ * the GetStatus(DEVICE) call.
+ * http://compliance.usb.org/index.asp?UpdateFile=Electrical&Format=Standard#34
+ */
+#define USB_SELF_POWER_VBUS_MAX_DRAW 100
+
+#endif /* __LINUX_USB_CH9_H */
diff --git a/include/linux/usb/musb.h b/include/linux/usb/musb.h
new file mode 100644
index 0000000..9f65ef9
--- /dev/null
+++ b/include/linux/usb/musb.h
@@ -0,0 +1,162 @@
+/*
+ * This is used to for host and peripheral modes of the driver for
+ * Inventra (Multidrop) Highspeed Dual-Role Controllers: (M)HDRC.
+ *
+ * Board initialization should put one of these into dev->platform_data,
+ * probably on some platform_device named "musb-hdrc". It encapsulates
+ * key configuration differences between boards.
+ */
+
+#ifndef __LINUX_USB_MUSB_H
+#define __LINUX_USB_MUSB_H
+
+#ifndef __deprecated
+#define __deprecated
+#endif
+
+/* The USB role is defined by the connector used on the board, so long as
+ * standards are being followed. (Developer boards sometimes won't.)
+ */
+enum musb_mode {
+ MUSB_UNDEFINED = 0,
+ MUSB_HOST, /* A or Mini-A connector */
+ MUSB_PERIPHERAL, /* B or Mini-B connector */
+ MUSB_OTG /* Mini-AB connector */
+};
+
+struct clk;
+
+enum musb_fifo_style {
+ FIFO_RXTX,
+ FIFO_TX,
+ FIFO_RX
+} __attribute__ ((packed));
+
+enum musb_buf_mode {
+ BUF_SINGLE,
+ BUF_DOUBLE
+} __attribute__ ((packed));
+
+struct musb_fifo_cfg {
+ u8 hw_ep_num;
+ enum musb_fifo_style style;
+ enum musb_buf_mode mode;
+ u16 maxpacket;
+};
+
+#define MUSB_EP_FIFO(ep, st, m, pkt) \
+{ \
+ .hw_ep_num = ep, \
+ .style = st, \
+ .mode = m, \
+ .maxpacket = pkt, \
+}
+
+#define MUSB_EP_FIFO_SINGLE(ep, st, pkt) \
+ MUSB_EP_FIFO(ep, st, BUF_SINGLE, pkt)
+
+#define MUSB_EP_FIFO_DOUBLE(ep, st, pkt) \
+ MUSB_EP_FIFO(ep, st, BUF_DOUBLE, pkt)
+
+struct musb_hdrc_eps_bits {
+ const char name[16];
+ u8 bits;
+};
+
+struct musb_hdrc_config {
+ struct musb_fifo_cfg *fifo_cfg; /* board fifo configuration */
+ unsigned fifo_cfg_size; /* size of the fifo configuration */
+
+ /* MUSB configuration-specific details */
+ unsigned multipoint:1; /* multipoint device */
+ unsigned dyn_fifo:1 __deprecated; /* supports dynamic fifo sizing */
+ unsigned soft_con:1 __deprecated; /* soft connect required */
+ unsigned utm_16:1 __deprecated; /* utm data witdh is 16 bits */
+ unsigned big_endian:1; /* true if CPU uses big-endian */
+ unsigned mult_bulk_tx:1; /* Tx ep required for multbulk pkts */
+ unsigned mult_bulk_rx:1; /* Rx ep required for multbulk pkts */
+ unsigned high_iso_tx:1; /* Tx ep required for HB iso */
+ unsigned high_iso_rx:1; /* Rx ep required for HD iso */
+ unsigned dma:1 __deprecated; /* supports DMA */
+ unsigned vendor_req:1 __deprecated; /* vendor registers required */
+
+ u8 num_eps; /* number of endpoints _with_ ep0 */
+ u8 dma_channels __deprecated; /* number of dma channels */
+ u8 dyn_fifo_size; /* dynamic size in bytes */
+ u8 vendor_ctrl __deprecated; /* vendor control reg width */
+ u8 vendor_stat __deprecated; /* vendor status reg witdh */
+ u8 dma_req_chan __deprecated; /* bitmask for required dma channels */
+ u8 ram_bits; /* ram address size */
+
+ struct musb_hdrc_eps_bits *eps_bits __deprecated;
+#ifdef CONFIG_BLACKFIN
+ /* A GPIO controlling VRSEL in Blackfin */
+ unsigned int gpio_vrsel;
+ unsigned int gpio_vrsel_active;
+ /* musb CLKIN in Blackfin in MHZ */
+ unsigned char clkin;
+#endif
+
+};
+
+struct musb_hdrc_platform_data {
+ /* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */
+ u8 mode;
+
+ /* for clk_get() */
+ const char *clock;
+
+ /* (HOST or OTG) switch VBUS on/off */
+ int (*set_vbus)(struct device *dev, int is_on);
+
+ /* (HOST or OTG) mA/2 power supplied on (default = 8mA) */
+ u8 power;
+
+ /* (PERIPHERAL) mA/2 max power consumed (default = 100mA) */
+ u8 min_power;
+
+ /* (HOST or OTG) msec/2 after VBUS on till power good */
+ u8 potpgt;
+
+ /* (HOST or OTG) program PHY for external Vbus */
+ unsigned extvbus:1;
+
+ /* Power the device on or off */
+ int (*set_power)(int state);
+
+ /* MUSB configuration-specific details */
+ struct musb_hdrc_config *config;
+
+ /* Architecture specific board data */
+ void *board_data;
+
+ /* Platform specific struct musb_ops pointer */
+ const void *platform_ops;
+};
+
+
+/* TUSB 6010 support */
+
+#define TUSB6010_OSCCLK_60 16667 /* psec/clk @ 60.0 MHz */
+#define TUSB6010_REFCLK_24 41667 /* psec/clk @ 24.0 MHz XI */
+#define TUSB6010_REFCLK_19 52083 /* psec/clk @ 19.2 MHz CLKIN */
+
+#ifdef CONFIG_ARCH_OMAP2
+
+extern int __init tusb6010_setup_interface(
+ struct musb_hdrc_platform_data *data,
+ unsigned ps_refclk, unsigned waitpin,
+ unsigned async_cs, unsigned sync_cs,
+ unsigned irq, unsigned dmachan);
+
+extern int tusb6010_platform_retime(unsigned is_refclk);
+
+#endif /* OMAP2 */
+
+/*
+ * U-Boot specfic stuff
+ */
+int musb_register(struct musb_hdrc_platform_data *plat, void *bdata,
+ void *ctl_regs);
+
+#endif /* __LINUX_USB_MUSB_H */
diff --git a/include/nand.h b/include/nand.h
index bbe28b2..dded4e2 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -139,6 +139,7 @@ int nand_read_skip_bad(nand_info_t *nand, loff_t offset, size_t *length,
int nand_write_skip_bad(nand_info_t *nand, loff_t offset, size_t *length,
u_char *buffer, int flags);
int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts);
+int nand_torture(nand_info_t *nand, loff_t offset);
#define NAND_LOCK_STATUS_TIGHT 0x01
#define NAND_LOCK_STATUS_UNLOCK 0x04
diff --git a/include/nios2.h b/include/nios2.h
index df8126a..cbca0dc 100644
--- a/include/nios2.h
+++ b/include/nios2.h
@@ -24,8 +24,6 @@
#ifndef __NIOS2_H__
#define __NIOS2_H__
-#include <linux/stringify.h>
-
/*------------------------------------------------------------------------
* Control registers -- use with wrctl() & rdctl()
*----------------------------------------------------------------------*/
@@ -39,14 +37,8 @@
* Access to control regs
*----------------------------------------------------------------------*/
-#define rdctl(reg)\
- ({unsigned int val;\
- asm volatile("rdctl %0, ctl" __stringify(reg) \
- : "=r" (val) ); val;})
-
-#define wrctl(reg,val)\
- asm volatile( "wrctl ctl" _str_(reg) ",%0"\
- : : "r" (val))
+#define rdctl(reg) __builtin_rdctl(reg)
+#define wrctl(reg, val) __builtin_wrctl(reg, val)
/*------------------------------------------------------------------------
* Control reg bit masks
diff --git a/include/part.h b/include/part.h
index 27ea283..c58a734 100644
--- a/include/part.h
+++ b/include/part.h
@@ -176,10 +176,62 @@ int test_part_amiga (block_dev_desc_t *dev_desc);
#endif
#ifdef CONFIG_EFI_PARTITION
+#include <part_efi.h>
/* disk/part_efi.c */
int get_partition_info_efi (block_dev_desc_t * dev_desc, int part, disk_partition_t *info);
void print_part_efi (block_dev_desc_t *dev_desc);
int test_part_efi (block_dev_desc_t *dev_desc);
+
+/**
+ * write_gpt_table() - Write the GUID Partition Table to disk
+ *
+ * @param dev_desc - block device descriptor
+ * @param gpt_h - pointer to GPT header representation
+ * @param gpt_e - pointer to GPT partition table entries
+ *
+ * @return - zero on success, otherwise error
+ */
+int write_gpt_table(block_dev_desc_t *dev_desc,
+ gpt_header *gpt_h, gpt_entry *gpt_e);
+
+/**
+ * gpt_fill_pte(): Fill the GPT partition table entry
+ *
+ * @param gpt_h - GPT header representation
+ * @param gpt_e - GPT partition table entries
+ * @param partitions - list of partitions
+ * @param parts - number of partitions
+ *
+ * @return zero on success
+ */
+int gpt_fill_pte(gpt_header *gpt_h, gpt_entry *gpt_e,
+ disk_partition_t *partitions, int parts);
+
+/**
+ * gpt_fill_header(): Fill the GPT header
+ *
+ * @param dev_desc - block device descriptor
+ * @param gpt_h - GPT header representation
+ * @param str_guid - disk guid string representation
+ * @param parts_count - number of partitions
+ *
+ * @return - error on str_guid conversion error
+ */
+int gpt_fill_header(block_dev_desc_t *dev_desc, gpt_header *gpt_h,
+ char *str_guid, int parts_count);
+
+/**
+ * gpt_restore(): Restore GPT partition table
+ *
+ * @param dev_desc - block device descriptor
+ * @param str_disk_guid - disk GUID
+ * @param partitions - list of partitions
+ * @param parts - number of partitions
+ *
+ * @return zero on success
+ */
+int gpt_restore(block_dev_desc_t *dev_desc, char *str_disk_guid,
+ disk_partition_t *partitions, const int parts_count);
#endif
#endif /* _PART_H */
diff --git a/include/part_efi.h b/include/part_efi.h
new file mode 100644
index 0000000..6de0a32
--- /dev/null
+++ b/include/part_efi.h
@@ -0,0 +1,147 @@
+/*
+ * Copyright (C) 2008 RuggedCom, Inc.
+ * Richard Retanubun <RichardRetanubun@RuggedCom.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * See also linux/fs/partitions/efi.h
+ *
+ * EFI GUID Partition Table
+ * Per Intel EFI Specification v1.02
+ * http://developer.intel.com/technology/efi/efi.htm
+*/
+
+#include <linux/compiler.h>
+
+#ifndef _DISK_PART_EFI_H
+#define _DISK_PART_EFI_H
+
+#define MSDOS_MBR_SIGNATURE 0xAA55
+#define EFI_PMBR_OSTYPE_EFI 0xEF
+#define EFI_PMBR_OSTYPE_EFI_GPT 0xEE
+
+#define GPT_BLOCK_SIZE 512
+#define GPT_HEADER_SIGNATURE 0x5452415020494645ULL
+#define GPT_HEADER_REVISION_V1 0x00010000
+#define GPT_PRIMARY_PARTITION_TABLE_LBA 1ULL
+#define GPT_ENTRY_NAME "gpt"
+#define GPT_ENTRY_NUMBERS 128
+#define GPT_ENTRY_SIZE 128
+
+#define EFI_GUID(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) \
+ ((efi_guid_t) \
+ {{ (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
+ (b) & 0xff, ((b) >> 8) & 0xff, \
+ (c) & 0xff, ((c) >> 8) & 0xff, \
+ (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) }})
+
+#define PARTITION_SYSTEM_GUID \
+ EFI_GUID( 0xC12A7328, 0xF81F, 0x11d2, \
+ 0xBA, 0x4B, 0x00, 0xA0, 0xC9, 0x3E, 0xC9, 0x3B)
+#define LEGACY_MBR_PARTITION_GUID \
+ EFI_GUID( 0x024DEE41, 0x33E7, 0x11d3, \
+ 0x9D, 0x69, 0x00, 0x08, 0xC7, 0x81, 0xF3, 0x9F)
+#define PARTITION_MSFT_RESERVED_GUID \
+ EFI_GUID( 0xE3C9E316, 0x0B5C, 0x4DB8, \
+ 0x81, 0x7D, 0xF9, 0x2D, 0xF0, 0x02, 0x15, 0xAE)
+#define PARTITION_BASIC_DATA_GUID \
+ EFI_GUID( 0xEBD0A0A2, 0xB9E5, 0x4433, \
+ 0x87, 0xC0, 0x68, 0xB6, 0xB7, 0x26, 0x99, 0xC7)
+#define PARTITION_LINUX_RAID_GUID \
+ EFI_GUID( 0xa19d880f, 0x05fc, 0x4d3b, \
+ 0xa0, 0x06, 0x74, 0x3f, 0x0f, 0x84, 0x91, 0x1e)
+#define PARTITION_LINUX_SWAP_GUID \
+ EFI_GUID( 0x0657fd6d, 0xa4ab, 0x43c4, \
+ 0x84, 0xe5, 0x09, 0x33, 0xc8, 0x4b, 0x4f, 0x4f)
+#define PARTITION_LINUX_LVM_GUID \
+ EFI_GUID( 0xe6d6d379, 0xf507, 0x44c2, \
+ 0xa2, 0x3c, 0x23, 0x8f, 0x2a, 0x3d, 0xf9, 0x28)
+
+/* linux/include/efi.h */
+typedef u16 efi_char16_t;
+
+typedef struct {
+ u8 b[16];
+} efi_guid_t;
+
+/* based on linux/include/genhd.h */
+struct partition {
+ u8 boot_ind; /* 0x80 - active */
+ u8 head; /* starting head */
+ u8 sector; /* starting sector */
+ u8 cyl; /* starting cylinder */
+ u8 sys_ind; /* What partition type */
+ u8 end_head; /* end head */
+ u8 end_sector; /* end sector */
+ u8 end_cyl; /* end cylinder */
+ __le32 start_sect; /* starting sector counting from 0 */
+ __le32 nr_sects; /* nr of sectors in partition */
+} __packed;
+
+/* based on linux/fs/partitions/efi.h */
+typedef struct _gpt_header {
+ __le64 signature;
+ __le32 revision;
+ __le32 header_size;
+ __le32 header_crc32;
+ __le32 reserved1;
+ __le64 my_lba;
+ __le64 alternate_lba;
+ __le64 first_usable_lba;
+ __le64 last_usable_lba;
+ efi_guid_t disk_guid;
+ __le64 partition_entry_lba;
+ __le32 num_partition_entries;
+ __le32 sizeof_partition_entry;
+ __le32 partition_entry_array_crc32;
+ u8 reserved2[GPT_BLOCK_SIZE - 92];
+} __packed gpt_header;
+
+typedef union _gpt_entry_attributes {
+ struct {
+ u64 required_to_function:1;
+ u64 no_block_io_protocol:1;
+ u64 legacy_bios_bootable:1;
+ u64 reserved:45;
+ u64 type_guid_specific:16;
+ } fields;
+ unsigned long long raw;
+} __packed gpt_entry_attributes;
+
+#define PARTNAME_SZ (72 / sizeof(efi_char16_t))
+typedef struct _gpt_entry {
+ efi_guid_t partition_type_guid;
+ efi_guid_t unique_partition_guid;
+ __le64 starting_lba;
+ __le64 ending_lba;
+ gpt_entry_attributes attributes;
+ efi_char16_t partition_name[PARTNAME_SZ];
+} __packed gpt_entry;
+
+typedef struct _legacy_mbr {
+ u8 boot_code[440];
+ __le32 unique_mbr_signature;
+ __le16 unknown;
+ struct partition partition_record[4];
+ __le16 signature;
+} __packed legacy_mbr;
+
+#endif /* _DISK_PART_EFI_H */
diff --git a/include/pci.h b/include/pci.h
index eba122f..15f583f 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -67,7 +67,130 @@
#define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */
#define PCI_CLASS_DEVICE 0x0a /* Device class */
#define PCI_CLASS_CODE 0x0b /* Device class code */
+#define PCI_CLASS_CODE_TOO_OLD 0x00
+#define PCI_CLASS_CODE_STORAGE 0x01
+#define PCI_CLASS_CODE_NETWORK 0x02
+#define PCI_CLASS_CODE_DISPLAY 0x03
+#define PCI_CLASS_CODE_MULTIMEDIA 0x04
+#define PCI_CLASS_CODE_MEMORY 0x05
+#define PCI_CLASS_CODE_BRIDGE 0x06
+#define PCI_CLASS_CODE_COMM 0x07
+#define PCI_CLASS_CODE_PERIPHERAL 0x08
+#define PCI_CLASS_CODE_INPUT 0x09
+#define PCI_CLASS_CODE_DOCKING 0x0A
+#define PCI_CLASS_CODE_PROCESSOR 0x0B
+#define PCI_CLASS_CODE_SERIAL 0x0C
+#define PCI_CLASS_CODE_WIRELESS 0x0D
+#define PCI_CLASS_CODE_I2O 0x0E
+#define PCI_CLASS_CODE_SATELLITE 0x0F
+#define PCI_CLASS_CODE_CRYPTO 0x10
+#define PCI_CLASS_CODE_DATA 0x11
+/* Base Class 0x12 - 0xFE is reserved */
+#define PCI_CLASS_CODE_OTHER 0xFF
+
#define PCI_CLASS_SUB_CODE 0x0a /* Device sub-class code */
+#define PCI_CLASS_SUB_CODE_TOO_OLD_NOTVGA 0x00
+#define PCI_CLASS_SUB_CODE_TOO_OLD_VGA 0x01
+#define PCI_CLASS_SUB_CODE_STORAGE_SCSI 0x00
+#define PCI_CLASS_SUB_CODE_STORAGE_IDE 0x01
+#define PCI_CLASS_SUB_CODE_STORAGE_FLOPPY 0x02
+#define PCI_CLASS_SUB_CODE_STORAGE_IPIBUS 0x03
+#define PCI_CLASS_SUB_CODE_STORAGE_RAID 0x04
+#define PCI_CLASS_SUB_CODE_STORAGE_ATA 0x05
+#define PCI_CLASS_SUB_CODE_STORAGE_SATA 0x06
+#define PCI_CLASS_SUB_CODE_STORAGE_SAS 0x07
+#define PCI_CLASS_SUB_CODE_STORAGE_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_NETWORK_ETHERNET 0x00
+#define PCI_CLASS_SUB_CODE_NETWORK_TOKENRING 0x01
+#define PCI_CLASS_SUB_CODE_NETWORK_FDDI 0x02
+#define PCI_CLASS_SUB_CODE_NETWORK_ATM 0x03
+#define PCI_CLASS_SUB_CODE_NETWORK_ISDN 0x04
+#define PCI_CLASS_SUB_CODE_NETWORK_WORLDFIP 0x05
+#define PCI_CLASS_SUB_CODE_NETWORK_PICMG 0x06
+#define PCI_CLASS_SUB_CODE_NETWORK_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_DISPLAY_VGA 0x00
+#define PCI_CLASS_SUB_CODE_DISPLAY_XGA 0x01
+#define PCI_CLASS_SUB_CODE_DISPLAY_3D 0x02
+#define PCI_CLASS_SUB_CODE_DISPLAY_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_MULTIMEDIA_VIDEO 0x00
+#define PCI_CLASS_SUB_CODE_MULTIMEDIA_AUDIO 0x01
+#define PCI_CLASS_SUB_CODE_MULTIMEDIA_PHONE 0x02
+#define PCI_CLASS_SUB_CODE_MULTIMEDIA_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_MEMORY_RAM 0x00
+#define PCI_CLASS_SUB_CODE_MEMORY_FLASH 0x01
+#define PCI_CLASS_SUB_CODE_MEMORY_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_BRIDGE_HOST 0x00
+#define PCI_CLASS_SUB_CODE_BRIDGE_ISA 0x01
+#define PCI_CLASS_SUB_CODE_BRIDGE_EISA 0x02
+#define PCI_CLASS_SUB_CODE_BRIDGE_MCA 0x03
+#define PCI_CLASS_SUB_CODE_BRIDGE_PCI 0x04
+#define PCI_CLASS_SUB_CODE_BRIDGE_PCMCIA 0x05
+#define PCI_CLASS_SUB_CODE_BRIDGE_NUBUS 0x06
+#define PCI_CLASS_SUB_CODE_BRIDGE_CARDBUS 0x07
+#define PCI_CLASS_SUB_CODE_BRIDGE_RACEWAY 0x08
+#define PCI_CLASS_SUB_CODE_BRIDGE_SEMI_PCI 0x09
+#define PCI_CLASS_SUB_CODE_BRIDGE_INFINIBAND 0x0A
+#define PCI_CLASS_SUB_CODE_BRIDGE_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_COMM_SERIAL 0x00
+#define PCI_CLASS_SUB_CODE_COMM_PARALLEL 0x01
+#define PCI_CLASS_SUB_CODE_COMM_MULTIPORT 0x02
+#define PCI_CLASS_SUB_CODE_COMM_MODEM 0x03
+#define PCI_CLASS_SUB_CODE_COMM_GPIB 0x04
+#define PCI_CLASS_SUB_CODE_COMM_SMARTCARD 0x05
+#define PCI_CLASS_SUB_CODE_COMM_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_PIC 0x00
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_DMA 0x01
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_TIMER 0x02
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_RTC 0x03
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_HOTPLUG 0x04
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_SD 0x05
+#define PCI_CLASS_SUB_CODE_PERIPHERAL_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_INPUT_KEYBOARD 0x00
+#define PCI_CLASS_SUB_CODE_INPUT_DIGITIZER 0x01
+#define PCI_CLASS_SUB_CODE_INPUT_MOUSE 0x02
+#define PCI_CLASS_SUB_CODE_INPUT_SCANNER 0x03
+#define PCI_CLASS_SUB_CODE_INPUT_GAMEPORT 0x04
+#define PCI_CLASS_SUB_CODE_INPUT_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_DOCKING_GENERIC 0x00
+#define PCI_CLASS_SUB_CODE_DOCKING_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_PROCESSOR_386 0x00
+#define PCI_CLASS_SUB_CODE_PROCESSOR_486 0x01
+#define PCI_CLASS_SUB_CODE_PROCESSOR_PENTIUM 0x02
+#define PCI_CLASS_SUB_CODE_PROCESSOR_ALPHA 0x10
+#define PCI_CLASS_SUB_CODE_PROCESSOR_POWERPC 0x20
+#define PCI_CLASS_SUB_CODE_PROCESSOR_MIPS 0x30
+#define PCI_CLASS_SUB_CODE_PROCESSOR_COPROC 0x40
+#define PCI_CLASS_SUB_CODE_SERIAL_1394 0x00
+#define PCI_CLASS_SUB_CODE_SERIAL_ACCESSBUS 0x01
+#define PCI_CLASS_SUB_CODE_SERIAL_SSA 0x02
+#define PCI_CLASS_SUB_CODE_SERIAL_USB 0x03
+#define PCI_CLASS_SUB_CODE_SERIAL_FIBRECHAN 0x04
+#define PCI_CLASS_SUB_CODE_SERIAL_SMBUS 0x05
+#define PCI_CLASS_SUB_CODE_SERIAL_INFINIBAND 0x06
+#define PCI_CLASS_SUB_CODE_SERIAL_IPMI 0x07
+#define PCI_CLASS_SUB_CODE_SERIAL_SERCOS 0x08
+#define PCI_CLASS_SUB_CODE_SERIAL_CANBUS 0x09
+#define PCI_CLASS_SUB_CODE_WIRELESS_IRDA 0x00
+#define PCI_CLASS_SUB_CODE_WIRELESS_IR 0x01
+#define PCI_CLASS_SUB_CODE_WIRELESS_RF 0x10
+#define PCI_CLASS_SUB_CODE_WIRELESS_BLUETOOTH 0x11
+#define PCI_CLASS_SUB_CODE_WIRELESS_BROADBAND 0x12
+#define PCI_CLASS_SUB_CODE_WIRELESS_80211A 0x20
+#define PCI_CLASS_SUB_CODE_WIRELESS_80211B 0x21
+#define PCI_CLASS_SUB_CODE_WIRELESS_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_I2O_V1_0 0x00
+#define PCI_CLASS_SUB_CODE_SATELLITE_TV 0x01
+#define PCI_CLASS_SUB_CODE_SATELLITE_AUDIO 0x02
+#define PCI_CLASS_SUB_CODE_SATELLITE_VOICE 0x03
+#define PCI_CLASS_SUB_CODE_SATELLITE_DATA 0x04
+#define PCI_CLASS_SUB_CODE_CRYPTO_NETWORK 0x00
+#define PCI_CLASS_SUB_CODE_CRYPTO_ENTERTAINMENT 0x10
+#define PCI_CLASS_SUB_CODE_CRYPTO_OTHER 0x80
+#define PCI_CLASS_SUB_CODE_DATA_DPIO 0x00
+#define PCI_CLASS_SUB_CODE_DATA_PERFCNTR 0x01
+#define PCI_CLASS_SUB_CODE_DATA_COMMSYNC 0x10
+#define PCI_CLASS_SUB_CODE_DATA_MGMT 0x20
+#define PCI_CLASS_SUB_CODE_DATA_OTHER 0x80
#define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */
#define PCI_LATENCY_TIMER 0x0d /* 8 bits */
diff --git a/include/physmem.h b/include/physmem.h
new file mode 100644
index 0000000..03d3a78
--- /dev/null
+++ b/include/physmem.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ */
+
+/*
+ * These functions work like memset but operate on physical memory which may
+ * not be accessible directly.
+ *
+ * @param s The physical address to start setting memory at.
+ * @param c The character to set each byte of the region to.
+ * @param n The number of bytes to set.
+ *
+ * @return The physical address of the memory which was set.
+ */
+phys_addr_t arch_phys_memset(phys_addr_t s, int c, phys_size_t n);
diff --git a/include/power/battery.h b/include/power/battery.h
new file mode 100644
index 0000000..e2fec68
--- /dev/null
+++ b/include/power/battery.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __POWER_BATTERY_H_
+#define __POWER_BATTERY_H_
+
+struct battery {
+ unsigned int version;
+ unsigned int state_of_chrg;
+ unsigned int time_to_empty;
+ unsigned int capacity;
+ unsigned int voltage_uV;
+
+ unsigned int state;
+};
+
+int power_bat_init(unsigned char bus);
+#endif /* __POWER_BATTERY_H_ */
diff --git a/include/power/fg_battery_cell_params.h b/include/power/fg_battery_cell_params.h
new file mode 100644
index 0000000..7ddf6f2
--- /dev/null
+++ b/include/power/fg_battery_cell_params.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __FG_BATTERY_CELL_PARAMS_H_
+#define __FG_BATTERY_CELL_PARAMS_H_
+
+#if defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TRATS)
+
+/* Cell characteristics - Exynos4 TRATS development board */
+/* Shall be written to addr 0x80h */
+u16 cell_character0[16] = {
+ 0xA2A0,
+ 0xB6E0,
+ 0xB850,
+ 0xBAD0,
+ 0xBB20,
+ 0xBB70,
+ 0xBBC0,
+ 0xBC20,
+ 0xBC80,
+ 0xBCE0,
+ 0xBD80,
+ 0xBE20,
+ 0xC090,
+ 0xC420,
+ 0xC910,
+ 0xD070
+};
+
+/* Shall be written to addr 0x90h */
+u16 cell_character1[16] = {
+ 0x0090,
+ 0x1A50,
+ 0x02F0,
+ 0x2060,
+ 0x2060,
+ 0x2E60,
+ 0x26A0,
+ 0x2DB0,
+ 0x2DB0,
+ 0x1870,
+ 0x2A20,
+ 0x16F0,
+ 0x08F0,
+ 0x0D40,
+ 0x08C0,
+ 0x08C0
+};
+
+/* Shall be written to addr 0xA0h */
+u16 cell_character2[16] = {
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100,
+ 0x0100
+};
+#endif
+#endif /* __FG_BATTERY_CELL_PARAMS_H_ */
diff --git a/include/power/max17042_fg.h b/include/power/max17042_fg.h
new file mode 100644
index 0000000..1103a48
--- /dev/null
+++ b/include/power/max17042_fg.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MAX17042_FG_H_
+#define __MAX17042_FG_H_
+
+/* MAX 17042 registers */
+enum {
+ MAX17042_STATUS = 0x00,
+ MAX17042_SOCREP = 0x06,
+ MAX17042_VCELL = 0x09,
+ MAX17042_CURRENT = 0x0A,
+ MAX17042_AVG_CURRENT = 0x0B,
+ MAX17042_SOCMIX = 0x0D,
+ MAX17042_SOCAV = 0x0E,
+ MAX17042_DESIGN_CAP = 0x18,
+ MAX17042_AVG_VCELL = 0x19,
+ MAX17042_CONFIG = 0x1D,
+ MAX17042_VERSION = 0x21,
+ MAX17042_LEARNCFG = 0x28,
+ MAX17042_FILTERCFG = 0x29,
+ MAX17042_RELAXCFG = 0x2A,
+ MAX17042_MISCCFG = 0x2B,
+ MAX17042_CGAIN = 0x2E,
+ MAX17042_COFF = 0x2F,
+ MAX17042_RCOMP0 = 0x38,
+ MAX17042_TEMPCO = 0x39,
+ MAX17042_FSTAT = 0x3D,
+ MAX17042_MLOCKReg1 = 0x62,
+ MAX17042_MLOCKReg2 = 0x63,
+ MAX17042_MODEL1 = 0x80,
+ MAX17042_MODEL2 = 0x90,
+ MAX17042_MODEL3 = 0xA0,
+ MAX17042_VFOCV = 0xFB,
+ MAX17042_VFSOC = 0xFF,
+
+ FG_NUM_OF_REGS = 0x100,
+};
+
+#define RCOMP0 0x0060
+#define TempCo 0x1015
+
+
+#define MAX17042_POR (1 << 1)
+
+#define MODEL_UNLOCK1 0x0059
+#define MODEL_UNLOCK2 0x00c4
+#define MODEL_LOCK1 0x0000
+#define MODEL_LOCK2 0x0000
+
+#define MAX17042_I2C_ADDR (0x6C >> 1)
+
+int power_fg_init(unsigned char bus);
+#endif /* __MAX17042_FG_H_ */
diff --git a/include/power/max8997_muic.h b/include/power/max8997_muic.h
new file mode 100644
index 0000000..0149c12
--- /dev/null
+++ b/include/power/max8997_muic.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MAX8997_MUIC_H_
+#define __MAX8997_MUIC_H_
+
+#include <power/power_chrg.h>
+
+/* MAX8997_MUIC_STATUS2 */
+#define MAX8997_MUIC_CHG_NO 0x00
+#define MAX8997_MUIC_CHG_USB 0x01
+#define MAX8997_MUIC_CHG_USB_D 0x02
+#define MAX8997_MUIC_CHG_TA 0x03
+#define MAX8997_MUIC_CHG_TA_500 0x04
+#define MAX8997_MUIC_CHG_TA_1A 0x05
+#define MAX8997_MUIC_CHG_MASK 0x07
+
+/* MAX 8997 MUIC registers */
+enum {
+ MAX8997_MUIC_ID = 0x00,
+ MAX8997_MUIC_INT1 = 0x01,
+ MAX8997_MUIC_INT2 = 0x02,
+ MAX8997_MUIC_INT3 = 0x03,
+ MAX8997_MUIC_STATUS1 = 0x04,
+ MAX8997_MUIC_STATUS2 = 0x05,
+ MAX8997_MUIC_STATUS3 = 0x06,
+ MAX8997_MUIC_INTMASK1 = 0x07,
+ MAX8997_MUIC_INTMASK2 = 0x08,
+ MAX8997_MUIC_INTMASK3 = 0x09,
+ MAX8997_MUIC_CDETCTRL = 0x0A,
+ MAX8997_MUIC_CONTROL1 = 0x0C,
+ MAX8997_MUIC_CONTROL2 = 0x0D,
+ MAX8997_MUIC_CONTROL3 = 0x0E,
+
+ MUIC_NUM_OF_REGS = 0x0F,
+};
+
+#define MAX8997_MUIC_I2C_ADDR (0x4A >> 1)
+
+int power_muic_init(unsigned int bus);
+#endif /* __MAX8997_MUIC_H_ */
diff --git a/include/max8997_pmic.h b/include/power/max8997_pmic.h
index 17ae24e..5d2d94d 100644
--- a/include/max8997_pmic.h
+++ b/include/power/max8997_pmic.h
@@ -111,7 +111,7 @@ enum {
MAX8997_REG_MBCCTRL6 = 0x55,
MAX8997_REG_OTPCGHCVS = 0x56,
- MAX8997_REG_SAFEOUTCTRL = 0x5a,
+ MAX8997_REG_SAFEOUTCTRL = 0x5a,
MAX8997_REG_LBCNFG1 = 0x5e,
MAX8997_REG_LBCNFG2 = 0x5f,
@@ -171,9 +171,31 @@ enum {
PMIC_NUM_OF_REGS = 0x9b,
};
+#define ACTDISSAFEO1 (1 << 4)
+#define ACTDISSAFEO2 (1 << 5)
#define ENSAFEOUT1 (1 << 6)
#define ENSAFEOUT2 (1 << 7)
+#define ENBUCK (1 << 0)
+#define ACTIVE_DISCHARGE (1 << 3)
+#define GNSLCT (1 << 2)
+#define LDO_ADE (1 << 1)
+#define SAFEOUT_4_85V 0x00
+#define SAFEOUT_4_90V 0x01
+#define SAFEOUT_4_95V 0x02
+#define SAFEOUT_3_30V 0x03
+
+/* Charger */
+enum {CHARGER_ENABLE, CHARGER_DISABLE};
+#define DETBAT (1 << 2)
+#define MBCICHFCSET (1 << 4)
+#define MBCHOSTEN (1 << 6)
+#define VCHGR_FC (1 << 7)
+
+#define CHARGER_MIN_CURRENT 200
+#define CHARGER_MAX_CURRENT 950
+#define CHARGER_CURRENT_RESOLUTION 50
+
#define MAX8997_I2C_ADDR (0xCC >> 1)
#define MAX8997_RTC_ADDR (0x0C >> 1)
#define MAX8997_MUIC_ADDR (0x4A >> 1)
@@ -187,4 +209,6 @@ enum {
EN_LDO = (0x3 << 6),
};
+#define MAX8997_LDO_MAX_VAL 0x3F
+unsigned char max8997_reg_ldo(int uV);
#endif /* __MAX8997_PMIC_H_ */
diff --git a/include/max8998_pmic.h b/include/power/max8998_pmic.h
index 0e559f9..0e559f9 100644
--- a/include/max8998_pmic.h
+++ b/include/power/max8998_pmic.h
diff --git a/include/pmic.h b/include/power/pmic.h
index 6a05b40..1ecfc05 100644
--- a/include/pmic.h
+++ b/include/power/pmic.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011 Samsung Electronics
+ * Copyright (C) 2011-2012 Samsung Electronics
* Lukasz Majewski <l.majewski@samsung.com>
*
* See file CREDITS for list of people who contributed to this
@@ -24,9 +24,15 @@
#ifndef __CORE_PMIC_H_
#define __CORE_PMIC_H_
-enum { PMIC_I2C, PMIC_SPI, };
+#include <common.h>
+#include <linux/list.h>
+#include <i2c.h>
+#include <power/power_chrg.h>
+
+enum { PMIC_I2C, PMIC_SPI, PMIC_NONE};
enum { I2C_PMIC, I2C_NUM, };
enum { PMIC_READ, PMIC_WRITE, };
+enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };
struct p_i2c {
unsigned char addr;
@@ -43,21 +49,52 @@ struct p_spi {
u32 (*prepare_tx)(u32 reg, u32 *val, u32 write);
};
+struct pmic;
+struct power_fg {
+ int (*fg_battery_check) (struct pmic *p, struct pmic *bat);
+ int (*fg_battery_update) (struct pmic *p, struct pmic *bat);
+};
+
+struct power_chrg {
+ int (*chrg_type) (struct pmic *p);
+ int (*chrg_bat_present) (struct pmic *p);
+ int (*chrg_state) (struct pmic *p, int state, int current);
+};
+
+struct power_battery {
+ struct battery *bat;
+ int (*battery_init) (struct pmic *bat, struct pmic *p1,
+ struct pmic *p2, struct pmic *p3);
+ int (*battery_charge) (struct pmic *bat);
+ /* Keep info about power devices involved with battery operation */
+ struct pmic *chrg, *fg, *muic;
+};
+
struct pmic {
const char *name;
unsigned char bus;
unsigned char interface;
- unsigned char number_of_regs;
+ unsigned char sensor_byte_order;
+ unsigned int number_of_regs;
union hw {
struct p_i2c i2c;
struct p_spi spi;
} hw;
+
+ void (*low_power_mode) (void);
+ struct power_battery *pbat;
+ struct power_chrg *chrg;
+ struct power_fg *fg;
+
+ struct pmic *parent;
+ struct list_head list;
};
-int pmic_init(void);
-int pmic_dialog_init(void);
-int check_reg(u32 reg);
-struct pmic *get_pmic(void);
+int pmic_init(unsigned char bus);
+int pmic_dialog_init(unsigned char bus);
+int check_reg(struct pmic *p, u32 reg);
+struct pmic *pmic_alloc(void);
+struct pmic *pmic_get(const char *s);
int pmic_probe(struct pmic *p);
int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
diff --git a/include/power/power_chrg.h b/include/power/power_chrg.h
new file mode 100644
index 0000000..24c4cde
--- /dev/null
+++ b/include/power/power_chrg.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __POWER_CHARGER_H_
+#define __POWER_CHARGER_H_
+
+/* Type of available chargers */
+enum {
+ CHARGER_NO = 0,
+ CHARGER_TA,
+ CHARGER_USB,
+ CHARGER_TA_500,
+ CHARGER_UNKNOWN,
+};
+
+enum {
+ UNKNOWN,
+ EXT_SOURCE,
+ CHARGE,
+ NORMAL,
+};
+
+#endif /* __POWER_CHARGER_H_ */
diff --git a/include/sdhci.h b/include/sdhci.h
index c44793d..cffbe53 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -225,6 +225,7 @@
#define SDHCI_QUIRK_BROKEN_VOLTAGE (1 << 4)
#define SDHCI_QUIRK_NO_CD (1 << 5)
#define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6)
+#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1 << 7)
/* to make gcc happy */
struct sdhci_host;
diff --git a/include/search.h b/include/search.h
index 93e1cbc..13d3be6 100644
--- a/include/search.h
+++ b/include/search.h
@@ -32,6 +32,12 @@
#define __set_errno(val) do { errno = val; } while (0)
+enum env_op {
+ env_op_create,
+ env_op_delete,
+ env_op_overwrite,
+};
+
/* Action which shall be performed in the call the hsearch. */
typedef enum {
FIND,
@@ -41,6 +47,9 @@ typedef enum {
typedef struct entry {
const char *key;
char *data;
+ int (*callback)(const char *name, const char *value, enum env_op op,
+ int flags);
+ int flags;
} ENTRY;
/* Opaque type for internal use. */
@@ -59,21 +68,20 @@ struct hsearch_data {
unsigned int filled;
/*
* Callback function which will check whether the given change for variable
- * "name" from "oldval" to "newval" may be applied or not, and possibly apply
- * such change.
+ * "item" to "newval" may be applied or not, and possibly apply such change.
* When (flag & H_FORCE) is set, it shall not print out any error message and
* shall force overwriting of write-once variables.
.* Must return 0 for approval, 1 for denial.
*/
- int (*apply)(const char *name, const char *oldval,
- const char *newval, int flag);
+ int (*change_ok)(const ENTRY *__item, const char *newval, enum env_op,
+ int flag);
};
/* Create a new hashing table which will at most contain NEL elements. */
extern int hcreate_r(size_t __nel, struct hsearch_data *__htab);
/* Destroy current internal hashing table. */
-extern void hdestroy_r(struct hsearch_data *__htab, int do_apply);
+extern void hdestroy_r(struct hsearch_data *__htab);
/*
* Search for entry matching ITEM.key in internal hash table. If
@@ -82,7 +90,7 @@ extern void hdestroy_r(struct hsearch_data *__htab, int do_apply);
* ITEM.data.
* */
extern int hsearch_r(ENTRY __item, ACTION __action, ENTRY ** __retval,
- struct hsearch_data *__htab);
+ struct hsearch_data *__htab, int __flag);
/*
* Search for an entry matching `MATCH'. Otherwise, Same semantics
@@ -99,10 +107,10 @@ extern int hstrstr_r(const char *__match, int __last_idx, ENTRY ** __retval,
/* Search and delete entry matching ITEM.key in internal hash table. */
extern int hdelete_r(const char *__key, struct hsearch_data *__htab,
- int do_apply);
+ int __flag);
extern ssize_t hexport_r(struct hsearch_data *__htab,
- const char __sep, char **__resp, size_t __size,
+ const char __sep, int __flag, char **__resp, size_t __size,
int argc, char * const argv[]);
/*
@@ -113,10 +121,15 @@ extern ssize_t hexport_r(struct hsearch_data *__htab,
*/
extern int himport_r(struct hsearch_data *__htab,
const char *__env, size_t __size, const char __sep,
- int __flag, int nvars, char * const vars[], int do_apply);
+ int __flag, int nvars, char * const vars[]);
+
+/* Walk the whole table calling the callback on each element */
+extern int hwalk_r(struct hsearch_data *__htab, int (*callback)(ENTRY *));
-/* Flags for himport_r() */
-#define H_NOCLEAR (1 << 0) /* do not clear hash table before importing */
-#define H_FORCE (1 << 1) /* overwrite read-only/write-once variables */
+/* Flags for himport_r(), hexport_r(), hdelete_r(), and hsearch_r() */
+#define H_NOCLEAR (1 << 0) /* do not clear hash table before importing */
+#define H_FORCE (1 << 1) /* overwrite read-only/write-once variables */
+#define H_INTERACTIVE (1 << 2) /* indicate that an import is user directed */
+#define H_HIDE_DOT (1 << 3) /* don't print env vars that begin with '.' */
#endif /* search.h */
diff --git a/include/sha1.h b/include/sha1.h
index 734d1fb..da09dab 100644
--- a/include/sha1.h
+++ b/include/sha1.h
@@ -59,7 +59,8 @@ void sha1_starts( sha1_context *ctx );
* \param input buffer holding the data
* \param ilen length of the input data
*/
-void sha1_update( sha1_context *ctx, unsigned char *input, int ilen );
+void sha1_update(sha1_context *ctx, const unsigned char *input,
+ unsigned int ilen);
/**
* \brief SHA-1 final digest
@@ -76,8 +77,8 @@ void sha1_finish( sha1_context *ctx, unsigned char output[20] );
* \param ilen length of the input data
* \param output SHA-1 checksum result
*/
-void sha1_csum( unsigned char *input, int ilen,
- unsigned char output[20] );
+void sha1_csum(const unsigned char *input, unsigned int ilen,
+ unsigned char *output);
/**
* \brief Output = SHA-1( input buffer ), with watchdog triggering
@@ -87,17 +88,8 @@ void sha1_csum( unsigned char *input, int ilen,
* \param output SHA-1 checksum result
* \param chunk_sz watchdog triggering period (in bytes of input processed)
*/
-void sha1_csum_wd (unsigned char *input, int ilen,
- unsigned char output[20], unsigned int chunk_sz);
-
-/**
- * \brief Output = SHA-1( file contents )
- *
- * \param path input file name
- * \param output SHA-1 checksum result
- * \return 0 if successful, or 1 if fopen failed
- */
-int sha1_file( char *path, unsigned char output[20] );
+void sha1_csum_wd(const unsigned char *input, unsigned int ilen,
+ unsigned char *output, unsigned int chunk_sz);
/**
* \brief Output = HMAC-SHA-1( input buffer, hmac key )
@@ -108,9 +100,9 @@ int sha1_file( char *path, unsigned char output[20] );
* \param ilen length of the input data
* \param output HMAC-SHA-1 result
*/
-void sha1_hmac( unsigned char *key, int keylen,
- unsigned char *input, int ilen,
- unsigned char output[20] );
+void sha1_hmac(const unsigned char *key, int keylen,
+ const unsigned char *input, unsigned int ilen,
+ unsigned char *output);
/**
* \brief Checkup routine
diff --git a/include/sha256.h b/include/sha256.h
index e38ea89..beadab3 100644
--- a/include/sha256.h
+++ b/include/sha256.h
@@ -3,6 +3,9 @@
#define SHA256_SUM_LEN 32
+/* Reset watchdog each time we process this many bytes */
+#define CHUNKSZ_SHA256 (64 * 1024)
+
typedef struct {
uint32_t total[2];
uint32_t state[8];
@@ -10,7 +13,10 @@ typedef struct {
} sha256_context;
void sha256_starts(sha256_context * ctx);
-void sha256_update(sha256_context * ctx, uint8_t * input, uint32_t length);
+void sha256_update(sha256_context *ctx, const uint8_t *input, uint32_t length);
void sha256_finish(sha256_context * ctx, uint8_t digest[SHA256_SUM_LEN]);
+void sha256_csum_wd(const unsigned char *input, unsigned int ilen,
+ unsigned char *output, unsigned int chunk_sz);
+
#endif /* _SHA256_H */
diff --git a/include/status_led.h b/include/status_led.h
index da9fae9..27e9127 100644
--- a/include/status_led.h
+++ b/include/status_led.h
@@ -273,9 +273,6 @@ void status_led_set (int led, int state);
#elif defined(CONFIG_STXXTC)
/* XXX empty just to avoid the error */
/************************************************************************/
-#elif defined(CONFIG_NIOS2)
-/* XXX empty just to avoid the error */
-/************************************************************************/
#elif defined(CONFIG_V38B)
# define STATUS_LED_BIT 0x0010 /* Timer7 GPIO */
diff --git a/include/stdio_dev.h b/include/stdio_dev.h
index 23e0ee1..932d093 100644
--- a/include/stdio_dev.h
+++ b/include/stdio_dev.h
@@ -120,5 +120,8 @@ int drv_nc_init (void);
#ifdef CONFIG_JTAG_CONSOLE
int drv_jtag_console_init (void);
#endif
+#ifdef CONFIG_CBMEM_CONSOLE
+int cbmemc_init(void);
+#endif
#endif
diff --git a/include/usb.h b/include/usb.h
index 9dd8791..8d8a2c9 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -27,7 +27,7 @@
#define _USB_H_
#include <usb_defs.h>
-#include <usbdescriptors.h>
+#include <linux/usb/ch9.h>
/*
* The EHCI spec says that we must align to at least 32 bytes. However,
@@ -67,12 +67,6 @@ struct devrequest {
unsigned short length;
} __attribute__ ((packed));
-/* All standard descriptors have these 2 fields in common */
-struct usb_descriptor_header {
- unsigned char bLength;
- unsigned char bDescriptorType;
-} __attribute__ ((packed));
-
/* Interface */
struct usb_interface {
struct usb_interface_descriptor desc;
@@ -86,7 +80,7 @@ struct usb_interface {
/* Configuration information.. */
struct usb_config {
- struct usb_configuration_descriptor desc;
+ struct usb_config_descriptor desc;
unsigned char no_of_if; /* number of interfaces */
struct usb_interface if_desc[USB_MAXINTERFACES];
@@ -153,7 +147,9 @@ struct usb_device {
defined(CONFIG_USB_SL811HS) || defined(CONFIG_USB_ISP116X_HCD) || \
defined(CONFIG_USB_R8A66597_HCD) || defined(CONFIG_USB_DAVINCI) || \
defined(CONFIG_USB_OMAP3) || defined(CONFIG_USB_DA8XX) || \
- defined(CONFIG_USB_BLACKFIN) || defined(CONFIG_USB_AM35X)
+ defined(CONFIG_USB_BLACKFIN) || defined(CONFIG_USB_AM35X) || \
+ defined(CONFIG_USB_MUSB_DSPS) || defined(CONFIG_USB_MUSB_AM35X) || \
+ defined(CONFIG_USB_MUSB_OMAP2PLUS)
int usb_lowlevel_init(int index, void **controller);
int usb_lowlevel_stop(int index);
@@ -285,7 +281,6 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
* - device: bits 8-14
* - endpoint: bits 15-18
* - Data0/1: bit 19
- * - speed: bit 26 (0 = Full, 1 = Low Speed, 2 = High)
* - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt,
* 10 = control, 11 = bulk)
*
@@ -297,7 +292,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
/* Create various pipes... */
#define create_pipe(dev,endpoint) \
(((dev)->devnum << 8) | ((endpoint) << 15) | \
- ((dev)->speed << 26) | (dev)->maxpacketsize)
+ (dev)->maxpacketsize)
#define default_pipe(dev) ((dev)->speed << 26)
#define usb_sndctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \
@@ -348,8 +343,6 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
#define usb_pipe_endpdev(pipe) (((pipe) >> 8) & 0x7ff)
#define usb_pipeendpoint(pipe) (((pipe) >> 15) & 0xf)
#define usb_pipedata(pipe) (((pipe) >> 19) & 1)
-#define usb_pipespeed(pipe) (((pipe) >> 26) & 3)
-#define usb_pipeslow(pipe) (usb_pipespeed(pipe) == USB_SPEED_LOW)
#define usb_pipetype(pipe) (((pipe) >> 30) & 3)
#define usb_pipeisoc(pipe) (usb_pipetype((pipe)) == PIPE_ISOCHRONOUS)
#define usb_pipeint(pipe) (usb_pipetype((pipe)) == PIPE_INTERRUPT)
diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h
index 6a8fd44..7114dae 100644
--- a/include/usb/s3c_udc.h
+++ b/include/usb/s3c_udc.h
@@ -24,7 +24,6 @@
#include <asm/errno.h>
#include <linux/usb/ch9.h>
-#include <usbdescriptors.h>
#include <linux/usb/gadget.h>
#include <linux/list.h>
#include <usb/lin_gadget_compat.h>
diff --git a/include/usb_defs.h b/include/usb_defs.h
index 8032e57..9502544 100644
--- a/include/usb_defs.h
+++ b/include/usb_defs.h
@@ -80,12 +80,6 @@
#define USB_DIR_OUT 0
#define USB_DIR_IN 0x80
-/* USB device speeds */
-#define USB_SPEED_FULL 0x0 /* 12Mbps */
-#define USB_SPEED_LOW 0x1 /* 1.5Mbps */
-#define USB_SPEED_HIGH 0x2 /* 480Mbps */
-#define USB_SPEED_RESERVED 0x3
-
/* Descriptor types */
#define USB_DT_DEVICE 0x01
#define USB_DT_CONFIG 0x02
diff --git a/include/video.h b/include/video.h
index 9519cea..f7e27f8 100644
--- a/include/video.h
+++ b/include/video.h
@@ -15,4 +15,52 @@ int video_init (void *videobase);
void video_putc (const char c);
void video_puts (const char *s);
+/**
+ * Display a BMP format bitmap on the screen
+ *
+ * @param bmp_image Address of BMP image
+ * @param x X position to draw image
+ * @param y Y position to draw image
+ */
+int video_display_bitmap(ulong bmp_image, int x, int y);
+
+/**
+ * Get the width of the screen in pixels
+ *
+ * @return width of screen in pixels
+ */
+int video_get_pixel_width(void);
+
+/**
+ * Get the height of the screen in pixels
+ *
+ * @return height of screen in pixels
+ */
+int video_get_pixel_height(void);
+
+/**
+ * Get the number of text lines/rows on the screen
+ *
+ * @return number of rows
+ */
+int video_get_screen_rows(void);
+
+/**
+ * Get the number of text columns on the screen
+ *
+ * @return number of columns
+ */
+int video_get_screen_columns(void);
+
+/**
+ * Set the position of the text cursor
+ *
+ * @param col Column to place cursor (0 = left side)
+ * @param row Row to place cursor (0 = top line)
+ */
+void video_position_cursor(unsigned col, unsigned row);
+
+/* Clear the display */
+void video_clear(void);
+
#endif