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-rw-r--r--include/asm-generic/u-boot.h4
-rw-r--r--include/common.h18
-rw-r--r--include/config_defaults.h6
-rw-r--r--include/config_distro_bootcmd.h4
-rw-r--r--include/config_uncmd_spl.h13
-rw-r--r--include/configs/a320evb.h211
-rw-r--r--include/configs/amcc-common.h2
-rw-r--r--include/configs/atngw100.h1
-rw-r--r--include/configs/atngw100mkii.h1
-rw-r--r--include/configs/atstk1002.h5
-rw-r--r--include/configs/atstk1006.h1
-rw-r--r--include/configs/canyonlands.h38
-rw-r--r--include/configs/cm4008.h104
-rw-r--r--include/configs/cm41xx.h104
-rw-r--r--include/configs/cm_fx6.h7
-rw-r--r--include/configs/dkb.h51
-rw-r--r--include/configs/exynos-common.h7
-rw-r--r--include/configs/exynos5-common.h2
-rw-r--r--include/configs/exynos5-dt-common.h3
-rw-r--r--include/configs/favr-32-ezkit.h1
-rw-r--r--include/configs/grasshopper.h5
-rw-r--r--include/configs/gw_ventana.h1
-rw-r--r--include/configs/hammerhead.h1
-rw-r--r--include/configs/hawkboard.h220
-rw-r--r--include/configs/imx31_phycore.h2
-rw-r--r--include/configs/jadecpu.h273
-rw-r--r--include/configs/km/km_arm.h2
-rw-r--r--include/configs/km82xx.h2
-rw-r--r--include/configs/ls1021aqds.h24
-rw-r--r--include/configs/ls1021atwr.h24
-rw-r--r--include/configs/ls2085a_common.h19
-rw-r--r--include/configs/ls2085a_emu.h4
-rw-r--r--include/configs/ls2085a_simu.h3
-rw-r--r--include/configs/lsxl.h42
-rw-r--r--include/configs/mimc200.h1
-rw-r--r--include/configs/mx31ads.h2
-rw-r--r--include/configs/mx6_common.h2
-rw-r--r--include/configs/mx6sabre_common.h3
-rw-r--r--include/configs/mx6sxsabresd.h3
-rw-r--r--include/configs/novena.h1
-rw-r--r--include/configs/odroid.h2
-rw-r--r--include/configs/omap3_igep00x0.h9
-rw-r--r--include/configs/peach-pi.h2
-rw-r--r--include/configs/peach-pit.h2
-rw-r--r--include/configs/rpi-common.h186
-rw-r--r--include/configs/rpi.h187
-rw-r--r--include/configs/rpi_2.h15
-rw-r--r--include/configs/s5p_goni.h5
-rw-r--r--include/configs/sama5d3_xplained.h2
-rw-r--r--include/configs/sama5d3xek.h2
-rw-r--r--include/configs/sandbox.h17
-rw-r--r--include/configs/silk.h117
-rw-r--r--include/configs/smdkc100.h7
-rw-r--r--include/configs/snapper9260.h5
-rw-r--r--include/configs/snow.h2
-rw-r--r--include/configs/socfpga_common.h7
-rw-r--r--include/configs/stv0991.h11
-rw-r--r--include/configs/sun4i.h4
-rw-r--r--include/configs/sun5i.h4
-rw-r--r--include/configs/sun7i.h4
-rw-r--r--include/configs/sunxi-common.h67
-rw-r--r--include/configs/tegra-common.h11
-rw-r--r--include/configs/ti_am335x_common.h7
-rw-r--r--include/configs/ti_omap3_common.h5
-rw-r--r--include/configs/tnetv107x_evm.h139
-rw-r--r--include/configs/uniphier.h4
-rw-r--r--include/configs/x86-common.h6
-rw-r--r--include/configs/zmx25.h2
-rw-r--r--include/debug_uart.h139
-rw-r--r--include/dm/device-internal.h4
-rw-r--r--include/dm/device.h10
-rw-r--r--include/dm/platform_data/serial_sh.h37
-rw-r--r--include/dwmmc.h2
-rw-r--r--include/fdt_support.h2
-rw-r--r--include/fsl-mc/fsl_dpmng.h121
-rw-r--r--include/fsl-mc/fsl_mc.h (renamed from include/fsl_mc.h)0
-rw-r--r--include/fsl-mc/fsl_mc_cmd.h132
-rw-r--r--include/fsl-mc/fsl_mc_sys.h26
-rw-r--r--include/fsl_ddr.h17
-rw-r--r--include/fsl_ddr_dimm_params.h2
-rw-r--r--include/fsl_esdhc.h1
-rw-r--r--include/fsl_sec.h26
-rw-r--r--include/hw_sha.h41
-rw-r--r--include/i2c.h13
-rw-r--r--include/mmc.h56
-rw-r--r--include/net.h4
-rw-r--r--include/netdev.h1
-rw-r--r--include/serial.h3
88 files changed, 1151 insertions, 1534 deletions
diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h
index aef39d7..a63a87a 100644
--- a/include/asm-generic/u-boot.h
+++ b/include/asm-generic/u-boot.h
@@ -32,6 +32,10 @@ typedef struct bd_info {
unsigned long bi_flashoffset; /* reserved area for startup monitor */
unsigned long bi_sramstart; /* start of SRAM memory */
unsigned long bi_sramsize; /* size of SRAM memory */
+#ifdef CONFIG_AVR32
+ unsigned char bi_phy_id[4]; /* PHY address for ATAG_ETHERNET */
+ unsigned long bi_board_number;/* ATAG_BOARDINFO */
+#endif
#ifdef CONFIG_ARM
unsigned long bi_arm_freq; /* arm frequency */
unsigned long bi_dsp_freq; /* dsp core frequency */
diff --git a/include/common.h b/include/common.h
index 9129454..77c55c6 100644
--- a/include/common.h
+++ b/include/common.h
@@ -253,6 +253,24 @@ int update_flash_size(int flash_size);
int arch_early_init_r(void);
/**
+ * Reserve all necessary stacks
+ *
+ * This is used in generic board init sequence in common/board_f.c. Each
+ * architecture could provide this function to tailor the required stacks.
+ *
+ * On entry gd->start_addr_sp is pointing to the suggested top of the stack.
+ * The callee ensures gd->start_add_sp is 16-byte aligned, so architectures
+ * require only this can leave it untouched.
+ *
+ * On exit gd->start_addr_sp and gd->irq_sp should be set to the respective
+ * positions of the stack. The stack pointer(s) will be set to this later.
+ * gd->irq_sp is only required, if the architecture needs it.
+ *
+ * @return 0 if no error
+ */
+__weak int arch_reserve_stacks(void);
+
+/**
* Show the DRAM size in a board-specific way
*
* This is used by boards to display DRAM information in their own way.
diff --git a/include/config_defaults.h b/include/config_defaults.h
index 4d49315..ad08c1d 100644
--- a/include/config_defaults.h
+++ b/include/config_defaults.h
@@ -20,10 +20,4 @@
#define CONFIG_ZLIB 1
#define CONFIG_PARTITIONS 1
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_DM_WARN
-#define CONFIG_DM_DEVICE_REMOVE
-#define CONFIG_DM_STDIO
-#endif
-
#endif
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index 49674f4..07a0b3b 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -10,6 +10,10 @@
#ifndef _CONFIG_CMD_DISTRO_BOOTCMD_H
#define _CONFIG_CMD_DISTRO_BOOTCMD_H
+/* We need the part command */
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_CMD_PART
+
#define BOOTENV_SHARED_BLKDEV_BODY(devtypel) \
"if " #devtypel " dev ${devnum}; then " \
"setenv devtype " #devtypel "; " \
diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h
index 9cb7a9a..a9106f4 100644
--- a/include/config_uncmd_spl.h
+++ b/include/config_uncmd_spl.h
@@ -20,5 +20,18 @@
#undef CONFIG_CMD_SNTP
#undef CONFIG_CMD_TFTPPUT
#undef CONFIG_CMD_TFTPSRV
+#undef CONFIG_OF_CONTROL
+
+#ifndef CONFIG_SPL_DM
+#undef CONFIG_DM_SERIAL
+#undef CONFIG_DM_GPIO
+#undef CONFIG_DM_I2C
+#undef CONFIG_DM_SPI
+#endif
+
+#undef CONFIG_DM_WARN
+#undef CONFIG_DM_DEVICE_REMOVE
+#undef CONFIG_DM_STDIO
+
#endif /* CONFIG_SPL_BUILD */
#endif /* __CONFIG_UNCMD_SPL_H__ */
diff --git a/include/configs/a320evb.h b/include/configs/a320evb.h
deleted file mode 100644
index 0d3cf36..0000000
--- a/include/configs/a320evb.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/*
- * (C) Copyright 2009 Faraday Technology
- * Po-Yu Chuang <ratbert@faraday-tech.com>
- *
- * Configuation settings for the Faraday A320 board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include <asm/arch/a320.h>
-
-/*
- * mach-type definition
- */
-#define MACH_TYPE_FARADAY 758
-#define CONFIG_MACH_TYPE MACH_TYPE_FARADAY
-
-/*
- * Linux kernel tagged list
- */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-
-/*
- * CPU and Board Configuration Options
- */
-#undef CONFIG_SKIP_LOWLEVEL_INIT
-
-/*
- * Power Management Unit
- */
-#define CONFIG_FTPMU010_POWER
-
-/*
- * Timer
- */
-
-/*
- * Real Time Clock
- */
-#define CONFIG_RTC_FTRTC010
-
-/*
- * Serial console configuration
- */
-
-/* FTUART is a high speed NS 16C550A compatible UART */
-#define CONFIG_BAUDRATE 38400
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_COM1 0x98200000
-#define CONFIG_SYS_NS16550_REG_SIZE -4
-#define CONFIG_SYS_NS16550_CLK 18432000
-
-/*
- * Ethernet
- */
-#define CONFIG_FTMAC100
-
-#define CONFIG_BOOTDELAY 3
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_PING
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "A320 # " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE \
- (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-
-/* max number of command args */
-#define CONFIG_SYS_MAXARGS 16
-
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
-
-/*
- * SDRAM controller configuration
- */
-#define CONFIG_SYS_FTSDMC020_TP0 (FTSDMC020_TP0_TRAS(2) | \
- FTSDMC020_TP0_TRP(1) | \
- FTSDMC020_TP0_TRCD(1) | \
- FTSDMC020_TP0_TRF(3) | \
- FTSDMC020_TP0_TWR(1) | \
- FTSDMC020_TP0_TCL(2))
-
-#define CONFIG_SYS_FTSDMC020_TP1 (FTSDMC020_TP1_INI_PREC(4) | \
- FTSDMC020_TP1_INI_REFT(8) | \
- FTSDMC020_TP1_REF_INTV(0x180))
-
-#define CONFIG_SYS_FTSDMC020_BANK0_BSR (FTSDMC020_BANK_ENABLE | \
- FTSDMC020_BANK_DDW_X16 | \
- FTSDMC020_BANK_DSZ_256M | \
- FTSDMC020_BANK_MBW_32 | \
- FTSDMC020_BANK_SIZE_64M)
-
-/*
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
- GENERATED_GBL_DATA_SIZE)
-
-/*
- * Load address and memory test area should agree with
- * board/faraday/a320/config.mk. Be careful not to overwrite U-boot itself.
- */
-#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x2000000)
-
-/* memtest works on 63 MB in DRAM */
-#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
-#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x3F00000)
-
-#define CONFIG_SYS_TEXT_BASE 0
-
-/*
- * Static memory controller configuration
- */
-
-#define CONFIG_FTSMC020
-#include <faraday/ftsmc020.h>
-
-#define FTSMC020_BANK0_CONFIG (FTSMC020_BANK_ENABLE | \
- FTSMC020_BANK_BASE(PHYS_FLASH_1) | \
- FTSMC020_BANK_SIZE_1M | \
- FTSMC020_BANK_MBW_8)
-
-#define FTSMC020_BANK0_TIMING (FTSMC020_TPR_RBE | \
- FTSMC020_TPR_AST(3) | \
- FTSMC020_TPR_CTW(3) | \
- FTSMC020_TPR_ATI(0xf) | \
- FTSMC020_TPR_AT2(3) | \
- FTSMC020_TPR_WTC(3) | \
- FTSMC020_TPR_AHT(3) | \
- FTSMC020_TPR_TRNA(0xf))
-
-#define FTSMC020_BANK1_CONFIG (FTSMC020_BANK_ENABLE | \
- FTSMC020_BANK_BASE(PHYS_FLASH_2) | \
- FTSMC020_BANK_SIZE_32M | \
- FTSMC020_BANK_MBW_32)
-
-#define FTSMC020_BANK1_TIMING (FTSMC020_TPR_AST(3) | \
- FTSMC020_TPR_CTW(3) | \
- FTSMC020_TPR_ATI(0xf) | \
- FTSMC020_TPR_AT2(3) | \
- FTSMC020_TPR_WTC(3) | \
- FTSMC020_TPR_AHT(3) | \
- FTSMC020_TPR_TRNA(0xf))
-
-#define CONFIG_SYS_FTSMC020_CONFIGS { \
- { FTSMC020_BANK0_CONFIG, FTSMC020_BANK0_TIMING, }, \
- { FTSMC020_BANK1_CONFIG, FTSMC020_BANK1_TIMING, }, \
-}
-
-/*
- * FLASH and environment organization
- */
-
-/* use CFI framework */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-
-/* support JEDEC */
-#define CONFIG_FLASH_CFI_LEGACY
-#define CONFIG_SYS_FLASH_LEGACY_512Kx8
-
-#define PHYS_FLASH_1 0x00000000
-#define PHYS_FLASH_2 0x00400000
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2, }
-
-#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
-
-/* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_BANKS 2
-
-/* max number of sectors on one chip */
-#define CONFIG_SYS_MAX_FLASH_SECT 512
-
-#undef CONFIG_SYS_FLASH_EMPTY_INFO
-
-/* environments */
-#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000)
-#define CONFIG_ENV_SIZE 0x20000
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h
index 2aea899..73e1b0a 100644
--- a/include/configs/amcc-common.h
+++ b/include/configs/amcc-common.h
@@ -20,8 +20,10 @@
*/
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
+#ifndef CONFIG_DM_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+#endif
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index 9c81e31..540e86a 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -143,7 +143,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
#define CONFIG_SYS_MALLOC_LEN (256*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
/* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
diff --git a/include/configs/atngw100mkii.h b/include/configs/atngw100mkii.h
index 7b4f9cf..35eae76 100644
--- a/include/configs/atngw100mkii.h
+++ b/include/configs/atngw100mkii.h
@@ -164,7 +164,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
#define CONFIG_SYS_MALLOC_LEN (256*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
/* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index 8f3fd0b..a9c064a 100644
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -104,6 +104,10 @@
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
+/* generic board */
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_EARLY_INIT_R
/*
* Command line configuration.
@@ -158,7 +162,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
#define CONFIG_SYS_MALLOC_LEN (256*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
/* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h
index bbe0aea..25090a6 100644
--- a/include/configs/atstk1006.h
+++ b/include/configs/atstk1006.h
@@ -159,7 +159,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
#define CONFIG_SYS_MALLOC_LEN (256*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
/* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h
index 8eeb15c..7a1499d 100644
--- a/include/configs/canyonlands.h
+++ b/include/configs/canyonlands.h
@@ -11,6 +11,10 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#include <linux/kconfig.h>
+
+#define CONFIG_SYS_GENERIC_BOARD
+
/*-----------------------------------------------------------------------
* High Level Configuration Options
*----------------------------------------------------------------------*/
@@ -19,10 +23,10 @@
* and Arches dual (460GT)
*/
#ifdef CONFIG_CANYONLANDS
-#define CONFIG_460EX 1 /* Specific PPC460EX */
+#define CONFIG_460EX /* Specific PPC460EX */
#define CONFIG_HOSTNAME canyonlands
#else
-#define CONFIG_460GT 1 /* Specific PPC460GT */
+#define CONFIG_460GT /* Specific PPC460GT */
#ifdef CONFIG_GLACIER
#define CONFIG_HOSTNAME glacier
#else
@@ -32,7 +36,7 @@
#endif
#endif
-#define CONFIG_440 1
+#define CONFIG_440
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xFFF80000
@@ -45,10 +49,10 @@
#define CONFIG_SYS_CLK_FREQ 66666667 /* external freq to pll */
-#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
-#define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */
-#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
-#define CONFIG_BOARD_TYPES 1 /* support board types */
+#define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */
+#define CONFIG_BOARD_EARLY_INIT_R /* Call board_early_init_r */
+#define CONFIG_MISC_INIT_R /* Call misc_init_r */
+#define CONFIG_BOARD_TYPES /* support board types */
/*-----------------------------------------------------------------------
* Base addresses -- Note these are effective addresses where the
@@ -134,7 +138,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
+#define CONFIG_SYS_FLASH_CFI_AMD_RESET /* Use AMD (Spansion) reset cmd */
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
@@ -172,9 +176,9 @@
* I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot
* code.
*/
-#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
+#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
#define SPD_EEPROM_ADDRESS {0x50, 0x51} /* SPD i2c spd addresses*/
-#define CONFIG_DDR_ECC 1 /* with ECC support */
+#define CONFIG_DDR_ECC /* with ECC support */
#define CONFIG_DDR_RQDC_FIXED 0x80000038 /* fixed value for RQDC */
#else /* defined(CONFIG_ARCHES) */
@@ -262,8 +266,8 @@
#define CONFIG_4xx_CONFIG_BLOCKSIZE 16
/* I2C SYSMON (LM75, AD7414 is almost compatible) */
-#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
-#define CONFIG_DTT_AD7414 1 /* use AD7414 */
+#define CONFIG_DTT_LM75 /* ON Semi's LM75 */
+#define CONFIG_DTT_AD7414 /* use AD7414 */
#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
#define CONFIG_SYS_DTT_MAX_TEMP 70
#define CONFIG_SYS_DTT_LOW_TEMP -30
@@ -275,14 +279,14 @@
#if !defined(CONFIG_ARCHES)
/* RTC configuration */
-#define CONFIG_RTC_M41T62 1
+#define CONFIG_RTC_M41T62
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
#endif
/*-----------------------------------------------------------------------
* Ethernet
*----------------------------------------------------------------------*/
-#define CONFIG_IBM_EMAC4_V4 1
+#define CONFIG_IBM_EMAC4_V4
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
@@ -322,9 +326,9 @@
#define CONFIG_GPCS_PHY2_ADDR 0xC
#endif /* !defined(CONFIG_ARCHES) */
-#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
-#define CONFIG_PHY_DYNAMIC_ANEG 1
+#define CONFIG_PHY_RESET /* reset phy upon startup */
+#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
+#define CONFIG_PHY_DYNAMIC_ANEG
/*-----------------------------------------------------------------------
* USB-OHCI
diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h
deleted file mode 100644
index 1cb54b3..0000000
--- a/include/configs/cm4008.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * (C) Copyright 2004
- * Greg Ungerer <greg.ungerer@opengear.com>.
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_KS8695 1 /* it is a KS8695 CPU */
-#define CONFIG_CM4008 1 /* it is an OpenGear CM4008 boad */
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-#define CONFIG_DRIVER_KS8695ETH /* use KS8695 ethernet driver */
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-/*
- * Hardware drivers
- */
-
-/*
- * select serial console configuration
- */
-#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_KS8695_SERIAL
-#define CONFIG_SERIAL1
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 115200
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#undef CONFIG_CMD_SAVEENV
-
-
-#define CONFIG_BOOTDELAY 0
-#define CONFIG_BOOTARGS "mem=16M console=ttyAM0,115200"
-#define CONFIG_BOOTCOMMAND "gofsk 0x02200000"
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-
-#define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of RAM */
-
-#define PHYS_FLASH_1 0x02000000 /* Flash Bank #1 */
-#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
-#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment */
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h
deleted file mode 100644
index adebd4b..0000000
--- a/include/configs/cm41xx.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * (C) Copyright 2005
- * Greg Ungerer <greg.ungerer@opengear.com>.
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_KS8695 1 /* it is a KS8695 CPU */
-#define CONFIG_CM41xx 1 /* it is an OpenGear CM41xx boad */
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-#define CONFIG_DRIVER_KS8695ETH /* use KS8695 ethernet driver */
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-/*
- * Hardware drivers
- */
-
-/*
- * select serial console configuration
- */
-#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_KS8695_SERIAL
-#define CONFIG_SERIAL1
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 115200
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#undef CONFIG_CMD_SAVEENV
-
-
-#define CONFIG_BOOTDELAY 0
-#define CONFIG_BOOTARGS "mem=32M console=ttyAM0,115200"
-#define CONFIG_BOOTCOMMAND "gofsk 0x02200000"
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-
-#define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of RAM */
-
-#define PHYS_FLASH_1 0x02000000 /* Flash Bank #1 */
-#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
-#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment */
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 1f64495..4207504 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -21,14 +21,7 @@
#define CONFIG_MACH_TYPE 4273
#ifndef CONFIG_SPL_BUILD
-#define CONFIG_DM
-#define CONFIG_CMD_DM
-
-#define CONFIG_DM_GPIO
#define CONFIG_CMD_GPIO
-
-#define CONFIG_DM_SERIAL
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#endif
/* Display information on boot */
diff --git a/include/configs/dkb.h b/include/configs/dkb.h
deleted file mode 100644
index 7ffbb14..0000000
--- a/include/configs/dkb.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * (C) Copyright 2011
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Lei Wen <leiwen@marvell.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_DKB_H
-#define __CONFIG_DKB_H
-
-/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING "\nMarvell-TTC DKB"
-
-/*
- * High Level Configuration Options
- */
-#define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */
-#define CONFIG_PANTHEON 1 /* SOC Family Name */
-#define CONFIG_MACH_TTC_DKB 1 /* Machine type */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - 0x00200000)
-#define CONFIG_NR_DRAM_BANKS_MAX 2
-
-/*
- * Commands configuration
- */
-#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
-#include <config_cmd_default.h>
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MMC
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
-/*
- * mv-common.h should be defined after CMD configs since it used them
- * to enable certain macros
- */
-#include "mv-common.h"
-
-#undef CONFIG_ARCH_MISC_INIT
-
-/*
- * Environment variables configurations
- */
-#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */
-#define CONFIG_ENV_SIZE 0x20000 /* 64k */
-
-#endif /* __CONFIG_DKB_H */
diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h
index 1f3ee55..59676ae 100644
--- a/include/configs/exynos-common.h
+++ b/include/configs/exynos-common.h
@@ -17,12 +17,6 @@
#include <linux/sizes.h>
#define CONFIG_SYS_GENERIC_BOARD
-#define CONFIG_DM
-#define CONFIG_CMD_DM
-#define CONFIG_DM_GPIO
-#define CONFIG_DM_SERIAL
-#define CONFIG_DM_SPI
-#define CONFIG_DM_SPI_FLASH
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
@@ -42,7 +36,6 @@
#define CONFIG_ENV_OVERWRITE
/* Size of malloc() pool before and after relocation */
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
/* select serial console configuration */
diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
index 0ba39a2..3ab8d55 100644
--- a/include/configs/exynos5-common.h
+++ b/include/configs/exynos5-common.h
@@ -126,6 +126,8 @@
#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
/* I2C */
+
+/* TODO(sjg@chromium.org): Move these two options to Kconfig */
#define CONFIG_DM_I2C
#define CONFIG_DM_I2C_COMPAT
#define CONFIG_CMD_I2C
diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h
index 9cef0b0..b1b8e1a 100644
--- a/include/configs/exynos5-dt-common.h
+++ b/include/configs/exynos5-dt-common.h
@@ -24,9 +24,6 @@
#define CONFIG_POWER_TPS65090
/* Enable keyboard */
-#define CONFIG_CROS_EC /* CROS_EC protocol */
-#define CONFIG_CROS_EC_KEYB /* CROS_EC keyboard input */
-#define CONFIG_CMD_CROS_EC
#define CONFIG_KEYBOARD
#endif
diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h
index 338d3dc..75bff4c 100644
--- a/include/configs/favr-32-ezkit.h
+++ b/include/configs/favr-32-ezkit.h
@@ -162,7 +162,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
#define CONFIG_SYS_MALLOC_LEN (256*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
/* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
diff --git a/include/configs/grasshopper.h b/include/configs/grasshopper.h
index 73534ad..54eb977 100644
--- a/include/configs/grasshopper.h
+++ b/include/configs/grasshopper.h
@@ -62,6 +62,10 @@
#define CONFIG_USART_BASE ATMEL_BASE_USART1
#define CONFIG_USART_ID 1
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_EARLY_INIT_R
+
/* User serviceable stuff */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
@@ -151,7 +155,6 @@
CONFIG_SYS_INTRAM_SIZE)
#define CONFIG_SYS_MALLOC_LEN (256*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
/* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 4f137fc..620f950 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -39,7 +39,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
/* Init Functions */
#define CONFIG_BOARD_EARLY_INIT_F
diff --git a/include/configs/hammerhead.h b/include/configs/hammerhead.h
index 4f0603a..0bc42f1 100644
--- a/include/configs/hammerhead.h
+++ b/include/configs/hammerhead.h
@@ -137,7 +137,6 @@
#define CONFIG_SYS_MALLOC_LEN (256*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
/* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00400000)
diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h
deleted file mode 100644
index 1d78e72..0000000
--- a/include/configs/hawkboard.h
+++ /dev/null
@@ -1,220 +0,0 @@
-/*
- * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
- *
- * Based on davinci_dvevm.h. Original Copyrights follow:
- *
- * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * Board
- */
-#define CONFIG_SYS_USE_NAND 1
-
-/*
- * SoC Configuration
- */
-#define CONFIG_MACH_DAVINCI_HAWK
-#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
-#define CONFIG_SOC_DA850 /* TI DA850 SoC */
-#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
-#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
-#define CONFIG_SYS_OSCIN_FREQ 24000000
-#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
-#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_AIS_CONFIG_FILE "board/$(BOARDDIR)/hawkboard-ais-nand.cfg"
-
-#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \
- DAVINCI_SYSCFG_SUSPSRC_EMAC | \
- DAVINCI_SYSCFG_SUSPSRC_I2C | \
- DAVINCI_SYSCFG_SUSPSRC_SPI1 | \
- DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \
- DAVINCI_SYSCFG_SUSPSRC_UART2)
-
-#if defined(CONFIG_UART_U_BOOT)
-#define CONFIG_SYS_TEXT_BASE 0xc1080000
-#elif !defined(CONFIG_SPL_BUILD)
-#define CONFIG_SYS_TEXT_BASE 0xc1180000
-#endif
-
-/* Spl */
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds"
-#define CONFIG_SPL_TEXT_BASE 0xc1080000
-#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
-
-/*
- * Memory Info
- */
-#define CONFIG_SYS_MALLOC_LEN (1*1024*1024) /* malloc() len */
-#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE
-#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */
-#define CONFIG_SYS_SDRAM_BASE 0xc0000000
-#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MONITOR_LEN 0x60000
-
-/* memtest start addr */
-#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1)
-
-/* memtest will be run on 16MB */
-#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024)
-
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-
-/*
- * Serial Driver info
- */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE -4
-#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE
-#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 115200
-
-/*
- * Network & Ethernet Configuration
- */
-#define CONFIG_DRIVER_TI_EMAC
-#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
-#define CONFIG_BOOTP_DNS2
-#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_NET_RETRY_COUNT 10
-
-/*
- * Nand Flash
- */
-#ifdef CONFIG_SYS_USE_NAND
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_SIZE (128 << 10)
-#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
-#define CONFIG_CLE_MASK 0x10
-#define CONFIG_ALE_MASK 0x8
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
-#define CONFIG_NAND_DAVINCI
-#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
-#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST /* SPL nand driver configuration */
-#define CFG_DAVINCI_STD_NAND_LAYOUT
-#define CONFIG_SYS_NAND_CS 3
-#define CONFIG_SYS_NAND_PAGE_2K
-/* Max number of NAND devices */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, }
-/* Block 0--not used by bootcode */
-#define CONFIG_ENV_OFFSET 0x0
-
-#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000
-#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
-#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
- CONFIG_SYS_NAND_U_BOOT_SIZE - \
- CONFIG_SYS_MALLOC_LEN - \
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_NAND_ECCPOS { \
- 24, 25, 26, 27, 28, \
- 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
- 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
- 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
- 59, 60, 61, 62, 63 }
-#define CONFIG_SYS_NAND_PAGE_COUNT 64
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
-#define CONFIG_SYS_NAND_ECCSIZE 512
-#define CONFIG_SYS_NAND_ECCBYTES 10
-#define CONFIG_SYS_NAND_OOBSIZE 64
-
-#endif /* CONFIG_SYS_USE_NAND */
-
-/* USB Configs */
-#define CONFIG_SYS_USB_OHCI_CPU_INIT
-#define CONFIG_USB_OHCI_NEW
-#define CONFIG_USB_OHCI_DA8XX
-#define CONFIG_USB_STORAGE
-#define CONFIG_DOS_PARTITION
-#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000
-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME "hawkboard"
-
-/*
- * U-Boot general configuration
- */
-#define CONFIG_MISC_INIT_R
-#define CONFIG_BOOTFILE "uImage" /* Boot file name */
-#define CONFIG_SYS_PROMPT "hawkboard > " /* Command Prompt */
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
-#define CONFIG_VERSION_VARIABLE
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CRC32_VERIFY
-#define CONFIG_MX_CYCLIC
-
-/*
- * Linux Information
- */
-#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTARGS \
- "mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\
- "4M ip=static"
-#define CONFIG_BOOTDELAY 3
-
-/*
- * U-Boot commands
- */
-#include <config_cmd_default.h>
-#define CONFIG_CMD_ENV
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_USB
-#define CONFIG_CMD_EXT2
-
-#ifdef CONFIG_CMD_BDI
-#define CONFIG_CLOCKS
-#endif
-
-#ifdef CONFIG_SYS_USE_NAND
-#undef CONFIG_CMD_FLASH
-#undef CONFIG_CMD_IMLS
-#define CONFIG_CMD_NAND
-#endif
-
-#ifndef CONFIG_DRIVER_TI_EMAC
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_DHCP
-#undef CONFIG_CMD_MII
-#undef CONFIG_CMD_PING
-#endif
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index 4195fa3..49039d6 100644
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -18,6 +18,8 @@
#define CONFIG_MX31 /* This is a mx31 */
#define CONFIG_MX31_CLK32 32000
+#define CONFIG_SYS_GENERIC_BOARD
+
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
diff --git a/include/configs/jadecpu.h b/include/configs/jadecpu.h
deleted file mode 100644
index 8175621..0000000
--- a/include/configs/jadecpu.h
+++ /dev/null
@@ -1,273 +0,0 @@
-/*
- * (C) Copyright 2010
- * Matthias Weisser <weisserm@arcor.de>
- *
- * Configuation settings for the jadecpu board
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_MB86R0x
-#define CONFIG_MB86R0x_IOCLK get_bus_freq(0)
-#define CONFIG_SYS_TEXT_BASE 0x10000000
-
-
-#define CONFIG_USE_ARCH_MEMCPY
-#define CONFIG_USE_ARCH_MEMSET
-
-#define MACH_TYPE_JADECPU 2636
-
-#define CONFIG_MACH_TYPE MACH_TYPE_JADECPU
-
-/*
- * Environment settings
- */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "gs_fast_boot=setenv bootdelay 5\0" \
- "gs_slow_boot=setenv bootdelay 10\0" \
- "bootcmd=dcache off; mw.l 0x40000000 0 1024; usb start;" \
- "fatls usb 0; fatload usb 0 0x40000000 jadecpu-init.bin;" \
- "bootelf 0x40000000\0" \
- ""
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-#define CONFIG_BOARD_LATE_INIT
-
-/*
- * Compressions
- */
-#define CONFIG_LZO
-
-/*
- * Hardware drivers
- */
-
-/*
- * Serial
- */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
-#define CONFIG_SYS_NS16550_COM1 0xfffe1000 /* UART 0 */
-#define CONFIG_SYS_NS16550_COM2 0xfff50000 /* UART 2 */
-#define CONFIG_SYS_NS16550_COM3 0xfff51000 /* UART 3 */
-#define CONFIG_SYS_NS16550_COM4 0xfff43000 /* UART 4 */
-
-#define CONFIG_CONS_INDEX 4
-
-/*
- * Ethernet
- */
-#define CONFIG_SMC911X
-#define CONFIG_SMC911X_BASE 0x02000000
-#define CONFIG_SMC911X_16_BIT
-
-/*
- * Video
- */
-#define CONFIG_VIDEO
-#define CONFIG_VIDEO_MB86R0xGDC
-#define CONFIG_SYS_WHITE_ON_BLACK
-#define CONFIG_CFB_CONSOLE
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
-#define CONFIG_VIDEO_LOGO
-#define CONFIG_SPLASH_SCREEN
-#define CONFIG_SPLASH_SCREEN_ALIGN
-#define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_VIDEO_BMP_GZIP
-#define CONFIG_VIDEO_BMP_RLE8
-#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (800*480 + 256*4 + 10*1024)
-#define VIDEO_FB_16BPP_WORD_SWAP
-#define VIDEO_KBD_INIT_FCT 0
-#define VIDEO_TSTC_FCT serial_stub_tstc
-#define VIDEO_GETC_FCT serial_stub_getc
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE 1
-#define CONFIG_BOOTP_BOOTPATH 1
-#define CONFIG_BOOTP_GATEWAY 1
-#define CONFIG_BOOTP_HOSTNAME 1
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-#undef CONFIG_CMD_BDI
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_IMLS
-#undef CONFIG_CMD_LOADS
-#undef CONFIG_CMD_SOURCE
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_XIMG
-
-#define CONFIG_CMD_BMP
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_USB
-#define CONFIG_CMD_CACHE
-
-#define CONFIG_SYS_HUSH_PARSER
-
-/* USB */
-#define CONFIG_USB_OHCI_NEW
-#define CONFIG_SYS_USB_OHCI_REGS_BASE 0xFFF81000
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mb86r0x"
-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-#define CONFIG_USB_STORAGE
-#define CONFIG_DOS_PARTITION
-
-/* SDRAM */
-#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM 0x40000000 /* Start address of DDRRAM */
-#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_SP_ADDR 0x01008000
-
-/*
- * FLASH and environment organization
- */
-#define CONFIG_SYS_FLASH_BASE 0x10000000
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_MAX_FLASH_SECT 256
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_SECT_SIZE (128 * 1024)
-#define CONFIG_ENV_SIZE (128 * 1024)
-
-/*
- * CFI FLASH driver setup
- */
-#define CONFIG_SYS_FLASH_CFI 1
-#define CONFIG_FLASH_CFI_DRIVER 1
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* ~10x faster */
-
-#define CONFIG_SYS_LOAD_ADDR 0x40000000 /* load address */
-
-#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024))
-#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE)
-
-#define CONFIG_BAUDRATE 115200
-
-#define CONFIG_SYS_PROMPT "jade> "
-#define CONFIG_SYS_CBSIZE 256
-#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
-#define CONFIG_CMDLINE_EDITING 1
-
-#define CONFIG_PREBOOT ""
-
-#define CONFIG_BOOTDELAY 5
-#define CONFIG_AUTOBOOT_KEYED
-#define CONFIG_AUTOBOOT_PROMPT "boot in %d s\n", bootdelay
-#define CONFIG_AUTOBOOT_DELAY_STR "delaygs"
-#define CONFIG_AUTOBOOT_STOP_STR "stopgs"
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (10 << 20)
-#define CONFIG_SYS_MEM_TOP_HIDE (4 << 20)
-
-/*
- * Clock reset generator init
- */
-#define CONFIG_SYS_CRG_CRHA_INIT 0xffff
-#define CONFIG_SYS_CRG_CRPA_INIT 0xffff
-#define CONFIG_SYS_CRG_CRPB_INIT 0xfffe
-#define CONFIG_SYS_CRG_CRHB_INIT 0xffff
-#define CONFIG_SYS_CRG_CRAM_INIT 0xffef
-
-/*
- * Memory controller settings
- */
-#define CONFIG_SYS_MEMC_MCFMODE0_INIT 0x00000001 /* 16bit */
-#define CONFIG_SYS_MEMC_MCFMODE2_INIT 0x00000001 /* 16bit */
-#define CONFIG_SYS_MEMC_MCFMODE4_INIT 0x00000021 /* 16bit, Page*/
-#define CONFIG_SYS_MEMC_MCFTIM0_INIT 0x16191008
-#define CONFIG_SYS_MEMC_MCFTIM2_INIT 0x03061008
-#define CONFIG_SYS_MEMC_MCFTIM4_INIT 0x03061804
-#define CONFIG_SYS_MEMC_MCFAREA0_INIT 0x000000c0 /* 0x0c000000 1MB */
-#define CONFIG_SYS_MEMC_MCFAREA2_INIT 0x00000020 /* 0x02000000 1MB */
-#define CONFIG_SYS_MEMC_MCFAREA4_INIT 0x001f0000 /* 0x10000000 32 MB */
-
-/*
- * DDR2 controller init settings
- */
-#define CONFIG_SYS_DDR2_DRIMS_INIT 0x5555
-#define CONFIG_SYS_CCNT_CDCRC_INIT_1 0x00000002
-#define CONFIG_SYS_CCNT_CDCRC_INIT_2 0x00000003
-#define CONFIG_SYS_DDR2_DRIC1_INIT 0x003f
-#define CONFIG_SYS_DDR2_DRIC2_INIT 0x0000
-#define CONFIG_SYS_DDR2_DRCA_INIT 0xc124 /* 512Mbit DDR2SDRAM x 2 */
-#define CONFIG_SYS_DDR2_DRCM_INIT 0x0032
-#define CONFIG_SYS_DDR2_DRCST1_INIT 0x3418
-#define CONFIG_SYS_DDR2_DRCST2_INIT 0x6e32
-#define CONFIG_SYS_DDR2_DRCR_INIT 0x0141
-#define CONFIG_SYS_DDR2_DRCF_INIT 0x0002
-#define CONFIG_SYS_DDR2_DRASR_INIT 0x0001
-#define CONFIG_SYS_DDR2_DROBS_INIT 0x0001
-#define CONFIG_SYS_DDR2_DROABA_INIT 0x0103
-#define CONFIG_SYS_DDR2_DRIBSODT1_INIT 0x003F
-#define CONFIG_SYS_DDR2_DROS_INIT 0x0001
-
-/*
- * DRAM init sequence
- */
-
-/* PALL Command */
-#define CONFIG_SYS_DDR2_INIT_DRIC1_1 0x0017
-#define CONFIG_SYS_DDR2_INIT_DRIC2_1 0x0400
-
-/* EMR(2) command */
-#define CONFIG_SYS_DDR2_INIT_DRIC1_2 0x0006
-#define CONFIG_SYS_DDR2_INIT_DRIC2_2 0x0000
-
-/* EMR(3) command */
-#define CONFIG_SYS_DDR2_INIT_DRIC1_3 0x0007
-#define CONFIG_SYS_DDR2_INIT_DRIC2_3 0x0000
-
-/* EMR(1) command */
-#define CONFIG_SYS_DDR2_INIT_DRIC1_4 0x0005
-#define CONFIG_SYS_DDR2_INIT_DRIC2_4 0x0000
-
-/* MRS command */
-#define CONFIG_SYS_DDR2_INIT_DRIC1_5 0x0004
-#define CONFIG_SYS_DDR2_INIT_DRIC2_5 0x0532
-
-/* PALL command */
-#define CONFIG_SYS_DDR2_INIT_DRIC1_6 0x0017
-#define CONFIG_SYS_DDR2_INIT_DRIC2_6 0x0400
-
-/* REF command 1 */
-#define CONFIG_SYS_DDR2_INIT_DRIC1_7 0x000f
-#define CONFIG_SYS_DDR2_INIT_DRIC2_7 0x0000
-
-/* MRS command */
-#define CONFIG_SYS_DDR2_INIT_DRIC1_8 0x0004
-#define CONFIG_SYS_DDR2_INIT_DRIC2_8 0x0432
-
-/* EMR(1) command */
-#define CONFIG_SYS_DDR2_INIT_DRIC1_9 0x0005
-#define CONFIG_SYS_DDR2_INIT_DRIC2_9 0x0380
-
-/* EMR(1) command */
-#define CONFIG_SYS_DDR2_INIT_DRIC1_10 0x0005
-#define CONFIG_SYS_DDR2_INIT_DRIC2_10 0x0002
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index f780f8b..2ed0855 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -195,7 +195,7 @@
}
#ifndef __ASSEMBLY__
-#include <asm/arch-kirkwood/gpio.h>
+#include <asm/arch/gpio.h>
extern void __set_direction(unsigned pin, int high);
void set_sda(int state);
void set_scl(int state);
diff --git a/include/configs/km82xx.h b/include/configs/km82xx.h
index 14fd290..12f9d42 100644
--- a/include/configs/km82xx.h
+++ b/include/configs/km82xx.h
@@ -34,6 +34,8 @@
#define CONFIG_SYS_TEXT_BASE 0xFE000000
+#define CONFIG_MISC_INIT_R
+
/* include common defines/options for all Keymile boards */
#include "km/keymile-common.h"
#include "km/km-powerpc.h"
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 2874ccc..3dc4da3 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -510,6 +510,30 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
+#define CONFIG_SYS_PCI_64BIT
+
+#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000
+#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */
+#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000
+#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */
+
+#define CONFIG_SYS_PCIE_IO_BUS 0x00000000
+#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000
+#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */
+
+#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000
+#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000
+#define CONFIG_SYS_PCIE_MEM_SIZE 0x08000000 /* 128M */
+
+#ifdef CONFIG_PCI
+#define CONFIG_NET_MULTI
+#define CONFIG_PCI_PNP
+#define CONFIG_E1000
+#define CONFIG_PCI_SCAN_SHOW
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_NET
+#endif
+
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 0a0bb5f..a13876b 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -303,6 +303,30 @@
#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
+#define CONFIG_SYS_PCI_64BIT
+
+#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000
+#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */
+#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000
+#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */
+
+#define CONFIG_SYS_PCIE_IO_BUS 0x00000000
+#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000
+#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */
+
+#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000
+#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000
+#define CONFIG_SYS_PCIE_MEM_SIZE 0x08000000 /* 128M */
+
+#ifdef CONFIG_PCI
+#define CONFIG_NET_MULTI
+#define CONFIG_PCI_PNP
+#define CONFIG_E1000
+#define CONFIG_PCI_SCAN_SHOW
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_NET
+#endif
+
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h
index 6fe032c..17a1cde 100644
--- a/include/configs/ls2085a_common.h
+++ b/include/configs/ls2085a_common.h
@@ -13,6 +13,7 @@
#define CONFIG_FSL_LSCH3
#define CONFIG_LS2085A
#define CONFIG_GICV3
+#define CONFIG_FSL_TZPC_BP147
/* Link Definitions */
#define CONFIG_SYS_TEXT_BASE 0x30001000
@@ -26,9 +27,6 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F 1
-#define CONFIG_IDENT_STRING " LS2085A-EMU"
-#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-EMU"
-
/* Flat Device Tree Definitions */
#define CONFIG_OF_LIBFDT
#define CONFIG_OF_BOARD_SETUP
@@ -209,12 +207,10 @@
#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024)
#define CONFIG_SYS_LS_MC_FW_IN_NOR
#define CONFIG_SYS_LS_MC_FW_ADDR 0x580200000ULL
-/* TODO Actual FW length needs to be determined at runtime from FW header */
-#define CONFIG_SYS_LS_MC_FW_LENGTH (4U * 1024 * 1024)
#define CONFIG_SYS_LS_MC_DPL_IN_NOR
#define CONFIG_SYS_LS_MC_DPL_ADDR 0x5806C0000ULL
/* TODO Actual DPL max length needs to be confirmed with the MC FW team */
-#define CONFIG_SYS_LS_MC_DPL_LENGTH 4096
+#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH (256 * 1024)
#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0xe00000
/* Carve the MC private DRAM block from the end of DRAM */
@@ -248,7 +244,8 @@
/* Physical Memory Map */
/* fixme: these need to be checked against the board */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_SYS_CLK_FREQ 133333333
+#define CONFIG_SYS_CLK_FREQ 100000000
+#define CONFIG_DDR_CLK_FREQ 133333333
#define CONFIG_NR_DRAM_BANKS 3
@@ -268,12 +265,14 @@
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"kernel_start=0x581200000\0" \
- "kernel_load=0x806f0000\0" \
+ "kernel_load=0xa0000000\0" \
"kernel_size=0x1000000\0" \
"console=ttyAMA0,38400n8\0"
-#define CONFIG_BOOTARGS "console=ttyS1,115200 root=/dev/ram0 " \
- "earlyprintk=uart8250-8bit,0x21c0600"
+#define CONFIG_BOOTARGS "console=ttyS1,115200 root=/dev/ram0 " \
+ "earlycon=uart8250,mmio,0x21c0600,115200 " \
+ "default_hugepagesz=2m hugepagesz=2m " \
+ "hugepages=16"
#define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \
"$kernel_size && bootm $kernel_load"
#define CONFIG_BOOTDELAY 1
diff --git a/include/configs/ls2085a_emu.h b/include/configs/ls2085a_emu.h
index 487cd99..a02d694 100644
--- a/include/configs/ls2085a_emu.h
+++ b/include/configs/ls2085a_emu.h
@@ -9,6 +9,9 @@
#include "ls2085a_common.h"
+#define CONFIG_IDENT_STRING " LS2085A-EMU"
+#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-EMU"
+
#define CONFIG_DDR_SPD
#define CONFIG_SYS_FSL_DDR_EMU /* Support emulator */
#define SPD_EEPROM_ADDRESS1 0x51
@@ -17,4 +20,5 @@
#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1
#define CONFIG_SYS_SPD_BUS_NUM 1 /* SPD on I2C bus 1 */
+#define CONFIG_FSL_DDR_SYNC_REFRESH
#endif /* __LS2_EMU_H */
diff --git a/include/configs/ls2085a_simu.h b/include/configs/ls2085a_simu.h
index 0f40b78..af34f3f 100644
--- a/include/configs/ls2085a_simu.h
+++ b/include/configs/ls2085a_simu.h
@@ -9,6 +9,9 @@
#include "ls2085a_common.h"
+#define CONFIG_IDENT_STRING " LS2085A-SIMU"
+#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-SIMU"
+
/* SMSC 91C111 ethernet configuration */
#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE (0x2210000)
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
index a14bfe3..c354c29 100644
--- a/include/configs/lsxl.h
+++ b/include/configs/lsxl.h
@@ -56,6 +56,7 @@
* Commands configuration
*/
#include <config_cmd_default.h>
+#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ELF
#define CONFIG_CMD_ENV
@@ -78,6 +79,9 @@
*/
#include "mv-common.h"
+/* loading initramfs images without uimage header */
+#define CONFIG_SUPPORT_RAW_INITRD
+
/* ST M25P40 */
#undef CONFIG_SPI_FLASH_MACRONIX
#define CONFIG_SPI_FLASH_STMICRO
@@ -125,27 +129,31 @@
"hdpart=0:1\0" \
"kernel_addr=0x00800000\0" \
"ramdisk_addr=0x01000000\0" \
- "fdt_addr=0x01ff0000\0" \
+ "fdt_addr=0x00ff0000\0" \
"bootcmd_legacy=ide reset " \
- "&& load ide ${hdpart} 0x00100000 /uImage.buffalo " \
- "&& load ide ${hdpart} 0x00800000 /initrd.buffalo " \
- "&& bootm 0x00100000 0x00800000\0" \
- "bootcmd_net=bootp ${kernel_addr} uImage " \
- "&& tftpboot ${ramdisk_addr} uInitrd " \
+ "&& load ide ${hdpart} ${kernel_addr} /uImage.buffalo " \
+ "&& load ide ${hdpart} ${ramdisk_addr} /initrd.buffalo "\
+ "&& bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "bootcmd_net=bootp ${kernel_addr} vmlinuz " \
+ "&& tftpboot ${ramdisk_addr} initrd.img " \
+ "&& setenv ramdisk_len ${filesize} " \
"&& tftpboot ${fdt_addr} " CONFIG_FDTFILE " " \
- "&& bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
+ "&& bootz ${kernel_addr} " \
+ "${ramdisk_addr}:${ramdisk_len} ${fdt_addr}\0" \
"bootcmd_hdd=ide reset " \
- "&& load ide ${hdpart} ${kernel_addr} /uImage " \
- "&& load ide ${hdpart} ${ramdisk_addr} /uInitrd " \
- "&& load ide ${hdpart} ${fdt_addr} " \
- "/" CONFIG_FDTFILE " " \
- "&& bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
+ "&& load ide ${hdpart} ${kernel_addr} /vmlinuz " \
+ "&& load ide ${hdpart} ${ramdisk_addr} /initrd.img " \
+ "&& setenv ramdisk_len ${filesize} " \
+ "&& load ide ${hdpart} ${fdt_addr} /dtb " \
+ "&& bootz ${kernel_addr} " \
+ "${ramdisk_addr}:${ramdisk_len} ${fdt_addr}\0" \
"bootcmd_usb=usb start " \
- "&& load usb 0:1 ${kernel_addr} /uImage " \
- "&& load usb 0:1 ${ramdisk_addr} /uInitrd " \
- "&& load usb 0:1 ${fdt_addr} " \
- "/" CONFIG_FDTFILE " " \
- "&& bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
+ "&& load usb 0:1 ${kernel_addr} /vmlinuz " \
+ "&& load usb 0:1 ${ramdisk_addr} /initrd.img " \
+ "&& setenv ramdisk_len ${filesize} " \
+ "&& load usb 0:1 ${fdt_addr} " CONFIG_FDTFILE " " \
+ "&& bootz ${kernel_addr} " \
+ "${ramdisk_addr}:${ramdisk_len} ${fdt_addr}\0" \
"bootcmd_rescue=run config_nc_dhcp; run nc\0" \
"eraseenv=sf probe 0 " \
"&& sf erase " __stringify(CONFIG_ENV_OFFSET) \
diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h
index fc7ecfa..2fd3add 100644
--- a/include/configs/mimc200.h
+++ b/include/configs/mimc200.h
@@ -157,7 +157,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
#define CONFIG_SYS_MALLOC_LEN (1024*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
/* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 0f4bd91..bed071f 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -14,6 +14,8 @@
/* High Level Configuration Options */
#define CONFIG_MX31 1 /* This is a mx31 */
+#define CONFIG_SYS_GENERIC_BOARD
+
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index e0528ce..29b72b2 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -28,6 +28,8 @@
#define CONFIG_SYS_PL310_BASE L2_PL310_BASE
#endif
+#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
+
#define CONFIG_MP
#define CONFIG_MXC_GPT_HCLK
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
index f0f721e..4aa8101 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -25,9 +25,6 @@
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
-#define CONFIG_DM
-#define CONFIG_DM_THERMAL
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_IMX6_THERMAL
#define CONFIG_SYS_GENERIC_BOARD
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index 404b922..a290129 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -227,9 +227,6 @@
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
#endif
-#define CONFIG_DM
-#define CONFIG_DM_THERMAL
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_IMX6_THERMAL
#define CONFIG_CMD_FUSE
diff --git a/include/configs/novena.h b/include/configs/novena.h
index ea75d2c..074110c 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -116,7 +116,6 @@
#define CONFIG_SYS_MEMTEST_END 0x20000000
#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
/* SPL */
#define CONFIG_SPL_FAT_SUPPORT
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 9d5dbdc..8b47537 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -177,8 +177,6 @@
/* I2C */
#define CONFIG_CMD_I2C
-#define CONFIG_DM_I2C
-#define CONFIG_DM_I2C_COMPAT
#define CONFIG_SYS_I2C_S3C24X0
#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000
#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 6295ec5..a5e7d8f 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -29,21 +29,24 @@
#define CONFIG_REVISION_TAG 1
-/* Status LED */
+/* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */
+#if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032)
#define CONFIG_STATUS_LED
#define CONFIG_BOARD_SPECIFIC_LED
#define CONFIG_GPIO_LED
#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
#define RED_LED_GPIO 27
-#endif
-#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
+#elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
#define RED_LED_GPIO 16
+#else
+#error "status LED not defined for this machine."
#endif
#define RED_LED_DEV 0
#define STATUS_LED_BIT RED_LED_GPIO
#define STATUS_LED_STATE STATUS_LED_ON
#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
#define STATUS_LED_BOOT RED_LED_DEV
+#endif
/* GPIO banks */
#define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */
diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h
index a1c980d..f04f061 100644
--- a/include/configs/peach-pi.h
+++ b/include/configs/peach-pi.h
@@ -43,8 +43,6 @@
#endif
#define CONFIG_POWER_TPS65090_EC
-#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
-#define CONFIG_DM_CROS_EC
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS
diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h
index 6516a72..b5efbdc 100644
--- a/include/configs/peach-pit.h
+++ b/include/configs/peach-pit.h
@@ -43,8 +43,6 @@
#endif
#define CONFIG_POWER_TPS65090_EC
-#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
-#define CONFIG_DM_CROS_EC
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS
diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h
new file mode 100644
index 0000000..3121ac9
--- /dev/null
+++ b/include/configs/rpi-common.h
@@ -0,0 +1,186 @@
+/*
+ * (C) Copyright 2012,2015 Stephen Warren
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _RPI_COMMON_H_
+#define _RPI_COMMON_H_
+
+#include <linux/sizes.h>
+
+/* Architecture, CPU, etc.*/
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_BCM2835
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_SYS_DCACHE_OFF
+/*
+ * 2835 is a SKU in a series for which the 2708 is the first or primary SoC,
+ * so 2708 has historically been used rather than a dedicated 2835 ID.
+ *
+ * We don't define a machine type for bcm2709/bcm2836 since the RPi Foundation
+ * chose to use someone else's previously registered machine ID (3139, MX51_GGC)
+ * rather than obtaining a valid ID:-/
+ */
+#ifndef CONFIG_BCM2836
+#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708
+#endif
+
+/* Memory layout */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+#define CONFIG_SYS_TEXT_BASE 0x00008000
+#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
+/*
+ * The board really has 256M. However, the VC (VideoCore co-processor) shares
+ * the RAM, and uses a configurable portion at the top. We tell U-Boot that a
+ * smaller amount of RAM is present in order to avoid stomping on the area
+ * the VC uses.
+ */
+#define CONFIG_SYS_SDRAM_SIZE SZ_128M
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
+ CONFIG_SYS_SDRAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_MALLOC_LEN SZ_4M
+#define CONFIG_SYS_MEMTEST_START 0x00100000
+#define CONFIG_SYS_MEMTEST_END 0x00200000
+#define CONFIG_LOADADDR 0x00200000
+
+/* Flash */
+#define CONFIG_SYS_NO_FLASH
+
+/* Devices */
+/* GPIO */
+#define CONFIG_BCM2835_GPIO
+/* LCD */
+#define CONFIG_LCD
+#define CONFIG_LCD_DT_SIMPLEFB
+#define LCD_BPP LCD_COLOR16
+/*
+ * Prevent allocation of RAM for FB; the real FB address is queried
+ * dynamically from the VideoCore co-processor, and comes from RAM
+ * not owned by the ARM CPU.
+ */
+#define CONFIG_FB_ADDR 0
+#define CONFIG_VIDEO_BCM2835
+#define CONFIG_SYS_WHITE_ON_BLACK
+
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_SDHCI
+#define CONFIG_MMC_SDHCI_IO_ACCESSORS
+#define CONFIG_BCM2835_SDHCI
+
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_DWC2
+#ifdef CONFIG_BCM2836
+#define CONFIG_USB_DWC2_REG_ADDR 0x3f980000
+#else
+#define CONFIG_USB_DWC2_REG_ADDR 0x20980000
+#endif
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_MISC_INIT_R
+#endif
+
+/* Console UART */
+#define CONFIG_PL01X_SERIAL
+#define CONFIG_CONS_INDEX 0
+#define CONFIG_BAUDRATE 115200
+
+/* Console configuration */
+#define CONFIG_SYS_CBSIZE 1024
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/* Environment */
+#define CONFIG_ENV_SIZE SZ_16K
+#define CONFIG_ENV_IS_IN_FAT
+#define FAT_ENV_INTERFACE "mmc"
+#define FAT_ENV_DEVICE_AND_PART "0:1"
+#define FAT_ENV_FILE "uboot.env"
+#define CONFIG_FAT_WRITE
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
+#define CONFIG_SYS_LOAD_ADDR 0x1000000
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
+/* Shell */
+#define CONFIG_SYS_MAXARGS 8
+#define CONFIG_SYS_PROMPT "U-Boot> "
+#define CONFIG_COMMAND_HISTORY
+
+/* Commands */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_MMC
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_CMD_PART
+
+/* Device tree support */
+#define CONFIG_OF_BOARD_SETUP
+/* ATAGs support for bootm/bootz */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_INITRD_TAG
+
+#include <config_distro_defaults.h>
+
+/* Some things don't make sense on this HW or yet */
+#undef CONFIG_CMD_FPGA
+
+/* Environment */
+#define ENV_DEVICE_SETTINGS \
+ "stdin=serial,lcd\0" \
+ "stdout=serial,lcd\0" \
+ "stderr=serial,lcd\0"
+
+/*
+ * Memory layout for where various images get loaded by boot scripts:
+ *
+ * scriptaddr can be pretty much anywhere that doesn't conflict with something
+ * else. Put it low in memory to avoid conflicts.
+ *
+ * pxefile_addr_r can be pretty much anywhere that doesn't conflict with
+ * something else. Put it low in memory to avoid conflicts.
+ *
+ * kernel_addr_r must be within the first 128M of RAM in order for the
+ * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
+ * decompress itself to 0x8000 after the start of RAM, kernel_addr_r
+ * should not overlap that area, or the kernel will have to copy itself
+ * somewhere else before decompression. Similarly, the address of any other
+ * data passed to the kernel shouldn't overlap the start of RAM. Pushing
+ * this up to 16M allows for a sizable kernel to be decompressed below the
+ * compressed load address.
+ *
+ * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
+ * the compressed kernel to be up to 16M too.
+ *
+ * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
+ * for the FDT/DTB to be up to 1M, which is hopefully plenty.
+ */
+#define ENV_MEM_LAYOUT_SETTINGS \
+ "scriptaddr=0x00000000\0" \
+ "pxefile_addr_r=0x00100000\0" \
+ "kernel_addr_r=0x01000000\0" \
+ "fdt_addr_r=0x02000000\0" \
+ "ramdisk_addr_r=0x02100000\0" \
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(USB, usb, 0) \
+ func(PXE, pxe, na) \
+ func(DHCP, dhcp, na)
+#include <config_distro_bootcmd.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ ENV_DEVICE_SETTINGS \
+ ENV_MEM_LAYOUT_SETTINGS \
+ BOOTENV
+
+#define CONFIG_BOOTDELAY 2
+
+#endif
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index c94f411..ab2f4db 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -1,193 +1,12 @@
/*
- * (C) Copyright 2012 Stephen Warren
+ * (C) Copyright 2012,2015 Stephen Warren
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * SPDX-License-Identifier: GPL-2.0
*/
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <linux/sizes.h>
-
-/* Architecture, CPU, etc.*/
-#define CONFIG_SYS_GENERIC_BOARD
-#define CONFIG_BCM2835
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_SYS_DCACHE_OFF
-/*
- * 2835 is a SKU in a series for which the 2708 is the first or primary SoC,
- * so 2708 has historically been used rather than a dedicated 2835 ID.
- */
-#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708
-
-/* Enable driver model */
-#define CONFIG_DM
-#define CONFIG_CMD_DM
-#define CONFIG_DM_GPIO
-#define CONFIG_DM_SERIAL
-
-/* Memory layout */
-#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_TEXT_BASE 0x00008000
-#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
-/*
- * The board really has 256M. However, the VC (VideoCore co-processor) shares
- * the RAM, and uses a configurable portion at the top. We tell U-Boot that a
- * smaller amount of RAM is present in order to avoid stomping on the area
- * the VC uses.
- */
-#define CONFIG_SYS_SDRAM_SIZE SZ_128M
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
- CONFIG_SYS_SDRAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MALLOC_LEN SZ_4M
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
-#define CONFIG_SYS_MEMTEST_START 0x00100000
-#define CONFIG_SYS_MEMTEST_END 0x00200000
-#define CONFIG_LOADADDR 0x00200000
-
-/* Flash */
-#define CONFIG_SYS_NO_FLASH
-
-/* Devices */
-/* GPIO */
-#define CONFIG_BCM2835_GPIO
-/* LCD */
-#define CONFIG_LCD
-#define CONFIG_LCD_DT_SIMPLEFB
-#define LCD_BPP LCD_COLOR16
-/*
- * Prevent allocation of RAM for FB; the real FB address is queried
- * dynamically from the VideoCore co-processor, and comes from RAM
- * not owned by the ARM CPU.
- */
-#define CONFIG_FB_ADDR 0
-#define CONFIG_VIDEO_BCM2835
-#define CONFIG_SYS_WHITE_ON_BLACK
-
-/* SD/MMC configuration */
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC
-#define CONFIG_SDHCI
-#define CONFIG_MMC_SDHCI_IO_ACCESSORS
-#define CONFIG_BCM2835_SDHCI
-
-#define CONFIG_CMD_USB
-#ifdef CONFIG_CMD_USB
-#define CONFIG_USB_DWC2
-#define CONFIG_USB_DWC2_REG_ADDR 0x20980000
-#define CONFIG_USB_STORAGE
-#define CONFIG_USB_HOST_ETHER
-#define CONFIG_USB_ETHER_SMSC95XX
-#define CONFIG_MISC_INIT_R
-#endif
-
-/* Console UART */
-#define CONFIG_PL01X_SERIAL
-#define CONFIG_CONS_INDEX 0
-#define CONFIG_BAUDRATE 115200
-
-/* Console configuration */
-#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-
-/* Environment */
-#define CONFIG_ENV_SIZE SZ_16K
-#define CONFIG_ENV_IS_IN_FAT
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_DEVICE_AND_PART "0:1"
-#define FAT_ENV_FILE "uboot.env"
-#define CONFIG_FAT_WRITE
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-#define CONFIG_SYS_LOAD_ADDR 0x1000000
-#define CONFIG_CONSOLE_MUX
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-
-/* Shell */
-#define CONFIG_SYS_MAXARGS 8
-#define CONFIG_SYS_PROMPT "U-Boot> "
-#define CONFIG_COMMAND_HISTORY
-
-/* Commands */
-#include <config_cmd_default.h>
-#define CONFIG_CMD_GPIO
-#define CONFIG_CMD_MMC
-#define CONFIG_PARTITION_UUIDS
-#define CONFIG_CMD_PART
-
-/* Device tree support */
-#define CONFIG_OF_BOARD_SETUP
-/* ATAGs support for bootm/bootz */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-
-#include <config_distro_defaults.h>
-
-/* Some things don't make sense on this HW or yet */
-#undef CONFIG_CMD_FPGA
-
-/* Environment */
-#define ENV_DEVICE_SETTINGS \
- "stdin=serial,lcd\0" \
- "stdout=serial,lcd\0" \
- "stderr=serial,lcd\0"
-
-/*
- * Memory layout for where various images get loaded by boot scripts:
- *
- * scriptaddr can be pretty much anywhere that doesn't conflict with something
- * else. Put it low in memory to avoid conflicts.
- *
- * pxefile_addr_r can be pretty much anywhere that doesn't conflict with
- * something else. Put it low in memory to avoid conflicts.
- *
- * kernel_addr_r must be within the first 128M of RAM in order for the
- * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
- * decompress itself to 0x8000 after the start of RAM, kernel_addr_r
- * should not overlap that area, or the kernel will have to copy itself
- * somewhere else before decompression. Similarly, the address of any other
- * data passed to the kernel shouldn't overlap the start of RAM. Pushing
- * this up to 16M allows for a sizable kernel to be decompressed below the
- * compressed load address.
- *
- * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
- * the compressed kernel to be up to 16M too.
- *
- * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
- * for the FDT/DTB to be up to 1M, which is hopefully plenty.
- */
-#define ENV_MEM_LAYOUT_SETTINGS \
- "scriptaddr=0x00000000\0" \
- "pxefile_addr_r=0x00100000\0" \
- "kernel_addr_r=0x01000000\0" \
- "fdt_addr_r=0x02000000\0" \
- "ramdisk_addr_r=0x02100000\0" \
-
-#define BOOT_TARGET_DEVICES(func) \
- func(MMC, mmc, 0) \
- func(USB, usb, 0) \
- func(PXE, pxe, na) \
- func(DHCP, dhcp, na)
-#include <config_distro_bootcmd.h>
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- ENV_DEVICE_SETTINGS \
- ENV_MEM_LAYOUT_SETTINGS \
- BOOTENV
-
-#define CONFIG_BOOTDELAY 2
+#include "rpi-common.h"
#endif
diff --git a/include/configs/rpi_2.h b/include/configs/rpi_2.h
new file mode 100644
index 0000000..2e7e74f
--- /dev/null
+++ b/include/configs/rpi_2.h
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2012,2015 Stephen Warren
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BCM2836
+
+#include "rpi-common.h"
+
+#endif
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index dfa2e07..8fadc68 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -40,7 +40,6 @@
#define CONFIG_CMDLINE_EDITING
/* Size of malloc() pool before and after relocation */
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
/*
@@ -290,9 +289,5 @@
#define CONFIG_OF_LIBFDT
#define CONFIG_SYS_GENERIC_BOARD
-#define CONFIG_DM
-#define CONFIG_CMD_DM
-#define CONFIG_DM_GPIO
-#define CONFIG_DM_SERIAL
#endif /* __CONFIG_H */
diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index 5a0ab28..5dab61d 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -227,7 +227,7 @@
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/cpu/at91-common/u-boot-spl.lds
+#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/u-boot-spl.lds
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index cccc1ed..bd288be 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -274,7 +274,7 @@
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/cpu/at91-common/u-boot-spl.lds
+#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/u-boot-spl.lds
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index e9d3f32..febbfb6 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -23,15 +23,6 @@
#define CONFIG_BOOTSTAGE
#define CONFIG_BOOTSTAGE_REPORT
-#define CONFIG_CMD_DEMO
-#define CONFIG_CMD_DM
-#define CONFIG_DM_DEMO
-#define CONFIG_DM_DEMO_SIMPLE
-#define CONFIG_DM_DEMO_SHAPE
-#define CONFIG_DM_GPIO
-#define CONFIG_DM_TEST
-#define CONFIG_DM_SERIAL
-#define CONFIG_DM_CROS_EC
#define CONFIG_SYS_STDIO_DEREGISTER
@@ -69,7 +60,6 @@
/*
* Size of malloc() pool, before and after relocation
*/
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_MALLOC_F_ADDR 0x0010000
#define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */
@@ -96,8 +86,6 @@
#define CONFIG_CMD_SF_TEST
#define CONFIG_CMD_SPI
#define CONFIG_SPI_FLASH
-#define CONFIG_DM_SPI
-#define CONFIG_DM_SPI_FLASH
#define CONFIG_SPI_FLASH_ATMEL
#define CONFIG_SPI_FLASH_EON
#define CONFIG_SPI_FLASH_GIGADEVICE
@@ -108,7 +96,6 @@
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_WINBOND
-#define CONFIG_DM_I2C
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C_SANDBOX
#define CONFIG_I2C_EDID
@@ -154,9 +141,6 @@
#define CONFIG_BOOTARGS ""
-#define CONFIG_CROS_EC
-#define CONFIG_CMD_CROS_EC
-#define CONFIG_CROS_EC_SANDBOX
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_BOARD_LATE_INIT
@@ -179,7 +163,6 @@
#define LCD_BPP LCD_COLOR16
#define CONFIG_LCD_BMP_RLE8
-#define CONFIG_CROS_EC_KEYB
#define CONFIG_KEYBOARD
#define CONFIG_EXTRA_ENV_SETTINGS "stdin=serial,cros-ec-keyb\0" \
diff --git a/include/configs/silk.h b/include/configs/silk.h
new file mode 100644
index 0000000..a4235e9
--- /dev/null
+++ b/include/configs/silk.h
@@ -0,0 +1,117 @@
+/*
+ * include/configs/silk.h
+ * This file is silk board configuration.
+ *
+ * Copyright (C) 2015 Renesas Electronics Corporation
+ * Copyright (C) 2015 Cogent Embedded, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef __SILK_H
+#define __SILK_H
+
+#undef DEBUG
+#define CONFIG_R8A7794
+#define CONFIG_RMOBILE_BOARD_STRING "Silk"
+
+#include "rcar-gen2-common.h"
+
+#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
+#define CONFIG_SYS_TEXT_BASE 0x70000000
+#else
+#define CONFIG_SYS_TEXT_BASE 0xE6304000
+#endif
+
+#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
+#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
+#else
+#define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC
+#endif
+#define STACK_AREA_SIZE 0xC000
+#define LOW_LEVEL_MERAM_STACK \
+ (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+
+/* MEMORY */
+#define RCAR_GEN2_SDRAM_BASE 0x40000000
+#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
+#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
+
+/* SCIF */
+#define CONFIG_SCIF_CONSOLE
+#define CONFIG_CONS_SCIF2
+#define CONFIG_SCIF_USE_EXT_CLK
+
+/* FLASH */
+#define CONFIG_SPI
+#define CONFIG_SPI_FLASH_BAR
+#define CONFIG_SH_QSPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_SPANSION
+#define CONFIG_SPI_FLASH_QUAD
+#define CONFIG_SYS_NO_FLASH
+
+/* SH Ether */
+#define CONFIG_NET_MULTI
+#define CONFIG_SH_ETHER
+#define CONFIG_SH_ETHER_USE_PORT 0
+#define CONFIG_SH_ETHER_PHY_ADDR 0x1
+#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_MICREL
+#define CONFIG_BITBANGMII
+#define CONFIG_BITBANGMII_MULTI
+
+/* Board Clock */
+#define RMOBILE_XTAL_CLK 20000000u
+#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
+#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
+#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2)
+#define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24)
+#define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */
+
+#define CONFIG_SYS_TMU_CLK_DIV 4
+
+/* i2c */
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SH
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
+#define CONFIG_SYS_I2C_SH_SPEED0 400000
+#define CONFIG_SYS_I2C_SH_SPEED1 400000
+#define CONFIG_SYS_I2C_SH_SPEED2 400000
+#define CONFIG_SH_I2C_DATA_HIGH 4
+#define CONFIG_SH_I2C_DATA_LOW 5
+#define CONFIG_SH_I2C_CLOCK 10000000
+
+#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
+
+/* USB */
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_RMOBILE
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+
+/* MMCIF */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_SH_MMCIF
+#define CONFIG_SH_MMCIF_ADDR 0xee200000
+#define CONFIG_SH_MMCIF_CLK 48000000
+
+/* Module stop status bits */
+/* INTC-RT */
+#define CONFIG_SMSTP0_ENA 0x00400000
+/* MSIF */
+#define CONFIG_SMSTP2_ENA 0x00002000
+/* INTC-SYS, IRQC */
+#define CONFIG_SMSTP4_ENA 0x00000180
+/* SCIF2 */
+#define CONFIG_SMSTP7_ENA 0x00080000
+
+#endif /* __SILK_H */
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index 982d0dc..080fc3a 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -48,9 +48,6 @@
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
-/* Small malloc pool before relocation */
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
-
/*
* select serial console configuration
*/
@@ -224,9 +221,5 @@
#define CONFIG_OF_LIBFDT
#define CONFIG_SYS_GENERIC_BOARD
-#define CONFIG_DM
-#define CONFIG_CMD_DM
-#define CONFIG_DM_GPIO
-#define CONFIG_DM_SERIAL
#endif /* __CONFIG_H */
diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h
index 9fa644f..6c68596 100644
--- a/include/configs/snapper9260.h
+++ b/include/configs/snapper9260.h
@@ -21,11 +21,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_GENERIC_BOARD
-#define CONFIG_DM
-#define CONFIG_CMD_DM
-#define CONFIG_DM_GPIO
-#define CONFIG_DM_SERIAL
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
/* CPU */
#define CONFIG_ARCH_CPU_INIT
diff --git a/include/configs/snow.h b/include/configs/snow.h
index ce6676e..fe802f2 100644
--- a/include/configs/snow.h
+++ b/include/configs/snow.h
@@ -20,9 +20,7 @@
#include <configs/exynos5-dt-common.h>
-#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */
#define CONFIG_POWER_TPS65090_I2C
-#define CONFIG_DM_CROS_EC
#define CONFIG_BOARD_COMMON
#define CONFIG_ARCH_EARLY_INIT_R
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 6b1f967..ee227fe 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -190,10 +190,6 @@ unsigned int cm_get_l4_sp_clk_hz(void);
* QSPI support
*/
#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */
-#define CONFIG_CMD_DM
-#define CONFIG_DM
-#define CONFIG_DM_SPI
-#define CONFIG_DM_SPI_FLASH
#define CONFIG_CADENCE_QSPI
/* Enable multiple SPI NOR flash manufacturers */
#define CONFIG_SPI_FLASH /* SPI flash subsystem */
@@ -210,9 +206,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#endif
#ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */
-#define CONFIG_CMD_DM
-#define CONFIG_DM
-#define CONFIG_DM_SPI
#define CONFIG_DESIGNWARE_SPI
#define CONFIG_CMD_SPI
#endif
diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index fd9bd63..156e0fa 100644
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -28,21 +28,10 @@
(PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024)
-#define CONFIG_SYS_MALLOC_F_LEN 0x2000
-#define CONFIG_DM
/* serial port (PL011) configuration */
#define CONFIG_BAUDRATE 115200
-#ifdef CONFIG_DM
-#define CONFIG_DM_SERIAL
#define CONFIG_PL01X_SERIAL
-#else
-#define CONFIG_SYS_SERIAL0 0x80406000
-#define CONFIG_CONS_INDEX 0
-#define CONFIG_PL011_SERIAL
-#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0}
-#define CONFIG_PL011_CLOCK (2700 * 1000)
-#endif
/* user interface */
#define CONFIG_SYS_PROMPT "STV0991> "
diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h
index 87d269b..1537e53 100644
--- a/include/configs/sun4i.h
+++ b/include/configs/sun4i.h
@@ -13,8 +13,6 @@
*/
#define CONFIG_CLK_FULL_SPEED 1008000000
-#define CONFIG_MACH_TYPE 4104
-
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
@@ -25,4 +23,6 @@
*/
#include <configs/sunxi-common.h>
+#define CONFIG_MACH_TYPE (4104 | ((CONFIG_MACH_TYPE_COMPAT_REV) << 28))
+
#endif /* __CONFIG_H */
diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h
index 52e3a6f..e755531 100644
--- a/include/configs/sun5i.h
+++ b/include/configs/sun5i.h
@@ -13,8 +13,6 @@
*/
#define CONFIG_CLK_FULL_SPEED 1008000000
-#define CONFIG_MACH_TYPE 4138
-
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
@@ -25,4 +23,6 @@
*/
#include <configs/sunxi-common.h>
+#define CONFIG_MACH_TYPE (4138 | ((CONFIG_MACH_TYPE_COMPAT_REV) << 28))
+
#endif /* __CONFIG_H */
diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h
index 7cd7890..f817f73 100644
--- a/include/configs/sun7i.h
+++ b/include/configs/sun7i.h
@@ -14,8 +14,6 @@
*/
#define CONFIG_CLK_FULL_SPEED 912000000
-#define CONFIG_MACH_TYPE 4283
-
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
@@ -31,4 +29,6 @@
*/
#include <configs/sunxi-common.h>
+#define CONFIG_MACH_TYPE (4283 | ((CONFIG_MACH_TYPE_COMPAT_REV) << 28))
+
#endif /* __CONFIG_H */
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index cea52db..bd7d049 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -13,26 +13,36 @@
#ifndef _SUNXI_COMMON_CONFIG_H
#define _SUNXI_COMMON_CONFIG_H
+#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
+/*
+ * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
+ * expense of restricting some features, so the regular machine id values can
+ * be used.
+ */
+# define CONFIG_MACH_TYPE_COMPAT_REV 0
+#else
+/*
+ * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
+ * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
+ * beyond the machine id check.
+ */
+# define CONFIG_MACH_TYPE_COMPAT_REV 1
+#endif
+
/*
* High Level Configuration Options
*/
#define CONFIG_SUNXI /* sunxi family */
#ifdef CONFIG_SPL_BUILD
-#ifndef CONFIG_SPL_FEL
#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
#endif
-#endif
#include <asm/arch/cpu.h> /* get chip and board defs */
#define CONFIG_SYS_TEXT_BASE 0x4a000000
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM)
-# define CONFIG_CMD_DM
-# define CONFIG_DM_GPIO
-# define CONFIG_DM_SERIAL
# define CONFIG_DW_SERIAL
-# define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#endif
/*
@@ -85,9 +95,6 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_SETEXPR
-#define CONFIG_PARTITION_UUIDS
-#define CONFIG_CMD_PART
-
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
@@ -149,10 +156,10 @@
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_BOARD_LOAD_IMAGE
+
#ifdef CONFIG_SPL_FEL
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
-#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
#define CONFIG_SPL_TEXT_BASE 0x2000
#define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */
@@ -192,6 +199,22 @@
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x7f
+
+#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
+#define CONFIG_SYS_I2C_SOFT
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
+#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
+/* We use pin names in Kconfig and sunxi_name_to_gpio() */
+#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
+#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
+#ifndef __ASSEMBLY__
+extern int soft_i2c_gpio_sda;
+extern int soft_i2c_gpio_scl;
+#endif
+#endif
+
#define CONFIG_CMD_I2C
/* PMU */
@@ -203,6 +226,20 @@
#define CONFIG_CONS_INDEX 1 /* UART0 */
#endif
+#if CONFIG_CONS_INDEX == 1
+#ifdef CONFIG_MACH_SUN9I
+#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
+#else
+#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
+#endif
+#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
+#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
+#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
+#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
+#else
+#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
+#endif
+
/* GPIO */
#define CONFIG_SUNXI_GPIO
#define CONFIG_SPL_GPIO_SUPPORT
@@ -210,10 +247,10 @@
#ifdef CONFIG_VIDEO
/*
- * The amount of RAM that is reserved for the FB. This will not show up as
- * RAM to the kernel, but will be reclaimed by a KMS driver in future.
+ * The amount of RAM to keep free at the top of RAM when relocating u-boot,
+ * to use as framebuffer. This must be a multiple of 4096.
*/
-#define CONFIG_SUNXI_FB_SIZE (9 << 20)
+#define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20)
/* Do we want to initialize a simple FB? */
#define CONFIG_VIDEO_DT_SIMPLEFB
@@ -231,8 +268,6 @@
/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
#define CONFIG_VGA_AS_SINGLE_DEVICE
-#define CONFIG_SYS_MEM_TOP_HIDE ((CONFIG_SUNXI_FB_SIZE + 0xFFF) & ~0xFFF)
-
/* To be able to hook simplefb into dt */
#ifdef CONFIG_VIDEO_DT_SIMPLEFB
#define CONFIG_OF_BOARD_SETUP
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index 8f1e370..005fc6a 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -18,16 +18,6 @@
#include <asm/arch/tegra.h> /* get chip and board defs */
-#define CONFIG_DM
-#define CONFIG_CMD_DM
-#define CONFIG_DM_GPIO
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_DM_SERIAL
-#endif
-#define CONFIG_DM_SPI
-#define CONFIG_DM_SPI_FLASH
-#define CONFIG_DM_I2C
-
#define CONFIG_SYS_TIMER_RATE 1000000
#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
@@ -47,7 +37,6 @@
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
-#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h
index 598526b..20a55f4 100644
--- a/include/configs/ti_am335x_common.h
+++ b/include/configs/ti_am335x_common.h
@@ -20,14 +20,7 @@
#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#ifndef CONFIG_SPL_BUILD
-#ifndef CONFIG_DM
-# define CONFIG_DM
-#endif
-# define CONFIG_CMD_DM
-# define CONFIG_DM_GPIO
-# define CONFIG_DM_SERIAL
# define CONFIG_OMAP_SERIAL
-# define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#endif
#include <asm/arch/omap.h>
diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index 3c634ee..840e108 100644
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -19,12 +19,7 @@
#include <asm/arch/omap3.h>
#ifndef CONFIG_SPL_BUILD
-# define CONFIG_DM
-# define CONFIG_CMD_DM
-# define CONFIG_DM_GPIO
-# define CONFIG_DM_SERIAL
# define CONFIG_OMAP_SERIAL
-# define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#endif
/* The chip has SDRC controller */
diff --git a/include/configs/tnetv107x_evm.h b/include/configs/tnetv107x_evm.h
deleted file mode 100644
index 00a1a9e..0000000
--- a/include/configs/tnetv107x_evm.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * Copyright (C) 2008 Texas Instruments, Inc <www.ti.com>
- *
- * Based on davinci_dvevm.h. Original Copyrights follow:
- *
- * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include <linux/sizes.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/clock.h>
-
-/* Architecture, CPU, etc */
-#define CONFIG_TNETV107X
-#define CONFIG_TNETV107X_EVM
-#define CONFIG_TNETV107X_WATCHDOG
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_DISABLE_TCM
-#define CONFIG_PERIPORT_REMAP
-#define CONFIG_PERIPORT_BASE 0x2000000
-#define CONFIG_PERIPORT_SIZE 0x10
-#define CONFIG_SYS_CLK_FREQ clk_get_rate(TNETV107X_LPSC_ARM)
-
-#define CONFIG_SYS_TIMERBASE TNETV107X_TIMER0_BASE
-#define CONFIG_SYS_HZ_CLOCK clk_get_rate(TNETV107X_LPSC_TIMER0)
-
-#define CONFIG_PLL_SYS_EXT_FREQ 25000000
-#define CONFIG_PLL_TDM_EXT_FREQ 19200000
-#define CONFIG_PLL_ETH_EXT_FREQ 25000000
-
-/* Memory Info */
-#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024)
-#define PHYS_SDRAM_1 TNETV107X_DDR_EMIF_DATA_BASE
-#define PHYS_SDRAM_1_SIZE 0x04000000
-#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
-#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024)
-#define CONFIG_NR_DRAM_BANKS 1
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-
-/* Serial Driver Info */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE -4
-#define CONFIG_SYS_NS16550_COM1 TNETV107X_UART1_BASE
-#define CONFIG_SYS_NS16550_CLK clk_get_rate(TNETV107X_LPSC_UART1)
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 115200
-
-/* Flash and environment info */
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_NAND_DAVINCI
-#define CONFIG_ENV_SIZE (SZ_128K)
-#define CONFIG_SYS_NAND_HW_ECC
-#define CONFIG_SYS_NAND_1BIT_ECC
-#define CONFIG_SYS_NAND_CS 2
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
-#define CONFIG_SYS_NAND_BASE TNETV107X_ASYNC_EMIF_DATA_CE0_BASE
-#define CONFIG_SYS_NAND_MASK_CLE 0x10
-#define CONFIG_SYS_NAND_MASK_ALE 0x8
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_MTD_DEVICE
-#define CONFIG_JFFS2_NAND
-#define CONFIG_ENV_OFFSET 0x180000
-
-/*
- * davinci_nand is a bit of a misnomer since this particular EMIF block is
- * commonly used across multiple TI devices. Unfortunately, this misnomer
- * (amongst others) carries forward into the kernel too. Consequently, if we
- * use a different device name here, the mtdparts variable won't be usable as
- * a kernel command-line argument.
- */
-#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
-#define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \
- "1536k(uboot)ro," \
- "128k(params)ro," \
- "4m(kernel)," \
- "-(filesystem)"
-
-/* General U-Boot configuration */
-#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_SYS_PROMPT "U-Boot > "
-#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SYS_MAXARGS 64
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_VERSION_VARIABLE
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CRC32_VERIFY
-#define CONFIG_MX_CYCLIC
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_MEMTEST_START + \
- 0x700000)
-#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTARGS "mem=32M console=ttyS1,115200n8 " \
- "root=/dev/mmcblk0p1 rw noinitrd"
-#define CONFIG_BOOTCOMMAND ""
-#define CONFIG_BOOTDELAY 1
-
-#define CONFIG_CMD_BDI
-#define CONFIG_CMD_BOOTD
-#define CONFIG_CMD_CONSOLE
-#define CONFIG_CMD_ECHO
-#define CONFIG_CMD_EDITENV
-#define CONFIG_CMD_IMI
-#define CONFIG_CMD_ITEST
-#define CONFIG_CMD_LOADB
-#define CONFIG_CMD_LOADS
-#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_MISC
-#define CONFIG_CMD_RUN
-#define CONFIG_CMD_SAVEENV
-#define CONFIG_CMD_SOURCE
-#define CONFIG_CMD_ENV
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_JFFS2
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 9420e6b..3f738fb 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -80,8 +80,6 @@
#define CONFIG_SMC911X_BASE CONFIG_SUPPORT_CARD_ETHER_BASE
#define CONFIG_SMC911X_32_BIT
-#define CONFIG_SYS_MALLOC_F_LEN 0x2000
-
/*-----------------------------------------------------------------------
* MMU and Cache Setting
*----------------------------------------------------------------------*/
@@ -192,8 +190,6 @@
#define CONFIG_FAT_WRITE
#define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_DM
-
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 062e6c2..994874c 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -22,11 +22,6 @@
#define CONFIG_DISPLAY_BOARDINFO_LATE
#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DM
-#define CONFIG_CMD_DM
-#define CONFIG_DM_GPIO
-#define CONFIG_DM_SERIAL
-
#define CONFIG_LMB
#define CONFIG_OF_LIBFDT
@@ -192,7 +187,6 @@
#define CONFIG_SYS_STACK_SIZE (32 * 1024)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_LEN 0x200000
-#define CONFIG_SYS_MALLOC_F_LEN (2 << 10)
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h
index 356ac88..342fa2c 100644
--- a/include/configs/zmx25.h
+++ b/include/configs/zmx25.h
@@ -15,6 +15,8 @@
#define CONFIG_MX25
#define CONFIG_SYS_TEXT_BASE 0xA0000000
+#define CONFIG_SYS_GENERIC_BOARD
+
#define CONFIG_SYS_TIMER_RATE 32768
#define CONFIG_SYS_TIMER_COUNTER \
(&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
diff --git a/include/debug_uart.h b/include/debug_uart.h
new file mode 100644
index 0000000..f56797b
--- /dev/null
+++ b/include/debug_uart.h
@@ -0,0 +1,139 @@
+/*
+ * Early debug UART support
+ *
+ * (C) Copyright 2014 Google, Inc
+ * Writte by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _DEBUG_UART_H
+#define _DEBUG_UART_H
+
+#include <linux/linkage.h>
+
+/*
+ * The debug UART is intended for use very early in U-Boot to debug problems
+ * when an ICE or other debug mechanism is not available.
+ *
+ * To use it you should:
+ * - Make sure your UART supports this interface
+ * - Enable CONFIG_DEBUG_UART
+ * - Enable the CONFIG for your UART to tell it to provide this interface
+ * (e.g. CONFIG_DEBUG_UART_NS16550)
+ * - Define the required settings as needed (see below)
+ * - Call debug_uart_init() before use
+ * - Call printch() to output a character
+ *
+ * Depending on your platform it may be possible to use this UART before a
+ * stack is available.
+ *
+ * If your UART does not support this interface you can probably add support
+ * quite easily. Remember that you cannot use driver model and it is preferred
+ * to use no stack.
+ *
+ * You must not use this UART once driver model is working and the serial
+ * drivers are up and running (done in serial_init()). Otherwise the drivers
+ * may conflict and you will get strange output.
+ *
+ *
+ * To enable the debug UART in your serial driver:
+ *
+ * - #include <debug_uart.h>
+ * - Define debug_uart_init(), trying to avoid using the stack
+ * - Define _debug_uart_putc() as static inline (avoiding stack usage)
+ * - Immediately afterwards, add DEBUG_UART_FUNCS to define the rest of the
+ * functionality (printch(), etc.)
+ */
+
+/**
+ * debug_uart_init() - Set up the debug UART ready for use
+ *
+ * This sets up the UART with the correct baud rate, etc.
+ *
+ * Available CONFIG is:
+ *
+ * - CONFIG_DEBUG_UART_BASE: Base address of UART
+ * - CONFIG_BAUDRATE: Requested baud rate
+ * - CONFIG_DEBUG_UART_CLOCK: Input clock for UART
+ */
+void debug_uart_init(void);
+
+/**
+ * printch() - Output a character to the debug UART
+ *
+ * @ch: Character to output
+ */
+asmlinkage void printch(int ch);
+
+/**
+ * printascii() - Output an ASCII string to the debug UART
+ *
+ * @str: String to output
+ */
+asmlinkage void printascii(const char *str);
+
+/**
+ * printhex2() - Output a 2-digit hex value
+ *
+ * @value: Value to output
+ */
+asmlinkage void printhex2(uint value);
+
+/**
+ * printhex4() - Output a 4-digit hex value
+ *
+ * @value: Value to output
+ */
+asmlinkage void printhex4(uint value);
+
+/**
+ * printhex8() - Output a 8-digit hex value
+ *
+ * @value: Value to output
+ */
+asmlinkage void printhex8(uint value);
+
+/*
+ * Now define some functions - this should be inserted into the serial driver
+ */
+#define DEBUG_UART_FUNCS \
+ asmlinkage void printch(int ch) \
+ { \
+ _debug_uart_putc(ch); \
+ } \
+\
+ asmlinkage void printascii(const char *str) \
+ { \
+ while (*str) \
+ _debug_uart_putc(*str++); \
+ } \
+\
+ static inline void printhex1(uint digit) \
+ { \
+ digit &= 0xf; \
+ _debug_uart_putc(digit > 9 ? digit - 10 + 'a' : digit + '0'); \
+ } \
+\
+ static inline void printhex(uint value, int digits) \
+ { \
+ while (digits-- > 0) \
+ printhex1(value >> (4 * digits)); \
+ } \
+\
+ asmlinkage void printhex2(uint value) \
+ { \
+ printhex(value, 2); \
+ } \
+\
+ asmlinkage void printhex4(uint value) \
+ { \
+ printhex(value, 4); \
+ } \
+\
+ asmlinkage void printhex8(uint value) \
+ { \
+ printhex(value, 8); \
+ }
+
+#endif
diff --git a/include/dm/device-internal.h b/include/dm/device-internal.h
index f0cc794..e2418fe 100644
--- a/include/dm/device-internal.h
+++ b/include/dm/device-internal.h
@@ -101,7 +101,11 @@ static inline int device_remove(struct udevice *dev) { return 0; }
* @dev: Pointer to device to unbind
* @return 0 if OK, -ve on error
*/
+#ifdef CONFIG_DM_DEVICE_REMOVE
int device_unbind(struct udevice *dev);
+#else
+static inline int device_unbind(struct udevice *dev) { return 0; }
+#endif
#ifdef CONFIG_DM_DEVICE_REMOVE
void device_free(struct udevice *dev);
diff --git a/include/dm/device.h b/include/dm/device.h
index 81afa8c..7a48eb8 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -12,6 +12,7 @@
#define _DM_DEVICE_H
#include <dm/uclass-id.h>
+#include <fdtdec.h>
#include <linker_lists.h>
#include <linux/list.h>
@@ -351,4 +352,13 @@ int device_find_first_child(struct udevice *parent, struct udevice **devp);
*/
int device_find_next_child(struct udevice **devp);
+/**
+ * dev_get_addr() - Get the reg property of a device
+ *
+ * @dev: Pointer to a device
+ *
+ * @return addr
+ */
+fdt_addr_t dev_get_addr(struct udevice *dev);
+
#endif
diff --git a/include/dm/platform_data/serial_sh.h b/include/dm/platform_data/serial_sh.h
new file mode 100644
index 0000000..0271ad6
--- /dev/null
+++ b/include/dm/platform_data/serial_sh.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2014 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ * Copyright (c) 2014 Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __serial_sh_h
+#define __serial_sh_h
+
+enum sh_clk_mode {
+ INT_CLK,
+ EXT_CLK,
+};
+
+enum sh_serial_type {
+ PORT_SCI,
+ PORT_SCIF,
+ PORT_SCIFA,
+ PORT_SCIFB,
+};
+
+/*
+ * Information about SCIF port
+ *
+ * @base: Register base address
+ * @clk: Input clock rate, used for calculating the baud rate divisor
+ * @clk_mode: Clock mode, set internal (INT) or external (EXT)
+ * @type: Type of SCIF
+ */
+struct sh_serial_platdata {
+ unsigned long base;
+ unsigned int clk;
+ enum sh_clk_mode clk_mode;
+ enum sh_serial_type type;
+};
+#endif /* __serial_sh_h */
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 109f7c8..86a5491 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -141,9 +141,9 @@ struct dwmci_host {
int dev_index;
int dev_id;
int buswidth;
- u32 clksel_val;
u32 fifoth_val;
struct mmc *mmc;
+ void *priv;
void (*clksel)(struct dwmci_host *host);
void (*board_init)(struct dwmci_host *host);
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 1f19fe4..ae5e8a3 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -100,7 +100,7 @@ void ft_pci_setup(void *blob, bd_t *bd);
*/
int ft_system_setup(void *blob, bd_t *bd);
-void set_working_fdt_addr(void *addr);
+void set_working_fdt_addr(ulong addr);
int fdt_shrink_to_minimum(void *blob);
int fdt_increase_size(void *fdt, int add_len);
diff --git a/include/fsl-mc/fsl_dpmng.h b/include/fsl-mc/fsl_dpmng.h
new file mode 100644
index 0000000..c2e1ddd
--- /dev/null
+++ b/include/fsl-mc/fsl_dpmng.h
@@ -0,0 +1,121 @@
+/* Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/*!
+ * @file fsl_dpmng.h
+ * @brief Management Complex General API
+ */
+
+#ifndef __FSL_DPMNG_H
+#define __FSL_DPMNG_H
+
+/*!
+ * @Group grp_dpmng Management Complex General API
+ *
+ * @brief Contains general API for the Management Complex firmware
+ * @{
+ */
+
+struct fsl_mc_io;
+
+/**
+ * @brief Management Complex firmware version information
+ */
+#define MC_VER_MAJOR 4
+#define MC_VER_MINOR 0
+
+struct mc_version {
+ uint32_t major;
+ /*!< Major version number: incremented on API compatibility changes */
+ uint32_t minor;
+ /*!< Minor version number: incremented on API additions (that are
+ * backward compatible); reset when major version is incremented
+ */
+ uint32_t revision;
+ /*!< Internal revision number: incremented on implementation changes
+ * and/or bug fixes that have no impact on API
+ */
+};
+
+/**
+ * @brief Retrieves the Management Complex firmware version information
+ *
+ * @param[in] mc_io Pointer to opaque I/O object
+ * @param[out] mc_ver_info Pointer to version information structure
+ *
+ * @returns '0' on Success; Error code otherwise.
+ */
+int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info);
+
+/**
+ * @brief Resets an AIOP tile
+ *
+ * @param[in] mc_io Pointer to opaque I/O object
+ * @param[in] container_id AIOP container ID
+ * @param[in] aiop_tile_id AIOP tile ID to reset
+ *
+ * @returns '0' on Success; Error code otherwise.
+ */
+int dpmng_reset_aiop(struct fsl_mc_io *mc_io,
+ int container_id,
+ int aiop_tile_id);
+
+/**
+ * @brief Loads an image to AIOP tile
+ *
+ * @param[in] mc_io Pointer to opaque I/O object
+ * @param[in] container_id AIOP container ID
+ * @param[in] aiop_tile_id AIOP tile ID to reset
+ * @param[in] img_iova I/O virtual address of AIOP ELF image
+ * @param[in] img_size Size of AIOP ELF image in memory (in bytes)
+ *
+ * @returns '0' on Success; Error code otherwise.
+ */
+int dpmng_load_aiop(struct fsl_mc_io *mc_io,
+ int container_id,
+ int aiop_tile_id,
+ uint64_t img_iova,
+ uint32_t img_size);
+
+/**
+ * @brief AIOP run configuration
+ */
+struct dpmng_aiop_run_cfg {
+ uint32_t cores_mask;
+ /*!< Mask of AIOP cores to run (core 0 in most significant bit) */
+ uint64_t options;
+ /*!< Execution options (currently none defined) */
+};
+
+/**
+ * @brief Starts AIOP tile execution
+ *
+ * @param[in] mc_io Pointer to MC portal's I/O object
+ * @param[in] container_id AIOP container ID
+ * @param[in] aiop_tile_id AIOP tile ID to reset
+ * @param[in] cfg AIOP run configuration
+ *
+ * @returns '0' on Success; Error code otherwise.
+ */
+int dpmng_run_aiop(struct fsl_mc_io *mc_io,
+ int container_id,
+ int aiop_tile_id,
+ const struct dpmng_aiop_run_cfg *cfg);
+
+/**
+ * @brief Resets MC portal
+ *
+ * This function closes all object handles (tokens) that are currently
+ * open in the MC portal on which the command is submitted. This allows
+ * cleanup of stale handles that belong to non-functional user processes.
+ *
+ * @param[in] mc_io Pointer to MC portal's I/O object
+ *
+ * @returns '0' on Success; Error code otherwise.
+ */
+int dpmng_reset_mc_portal(struct fsl_mc_io *mc_io);
+
+/** @} */
+
+#endif /* __FSL_DPMNG_H */
diff --git a/include/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index b9f089e..b9f089e 100644
--- a/include/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
diff --git a/include/fsl-mc/fsl_mc_cmd.h b/include/fsl-mc/fsl_mc_cmd.h
new file mode 100644
index 0000000..e7fcb5b
--- /dev/null
+++ b/include/fsl-mc/fsl_mc_cmd.h
@@ -0,0 +1,132 @@
+/* Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef __FSL_MC_CMD_H
+#define __FSL_MC_CMD_H
+
+#define MC_CMD_NUM_OF_PARAMS 7
+
+#define MAKE_UMASK64(_width) \
+ ((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 : -1))
+
+static inline uint64_t u64_enc(int lsoffset, int width, uint64_t val)
+{
+ return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset);
+}
+static inline uint64_t u64_dec(uint64_t val, int lsoffset, int width)
+{
+ return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width));
+}
+
+struct mc_command {
+ uint64_t header;
+ uint64_t params[MC_CMD_NUM_OF_PARAMS];
+};
+
+enum mc_cmd_status {
+ MC_CMD_STATUS_OK = 0x0, /*!< Completed successfully */
+ MC_CMD_STATUS_READY = 0x1, /*!< Ready to be processed */
+ MC_CMD_STATUS_AUTH_ERR = 0x3, /*!< Authentication error */
+ MC_CMD_STATUS_NO_PRIVILEGE = 0x4, /*!< No privilege */
+ MC_CMD_STATUS_DMA_ERR = 0x5, /*!< DMA or I/O error */
+ MC_CMD_STATUS_CONFIG_ERR = 0x6, /*!< Configuration error */
+ MC_CMD_STATUS_TIMEOUT = 0x7, /*!< Operation timed out */
+ MC_CMD_STATUS_NO_RESOURCE = 0x8, /*!< No resources */
+ MC_CMD_STATUS_NO_MEMORY = 0x9, /*!< No memory available */
+ MC_CMD_STATUS_BUSY = 0xA, /*!< Device is busy */
+ MC_CMD_STATUS_UNSUPPORTED_OP = 0xB, /*!< Unsupported operation */
+ MC_CMD_STATUS_INVALID_STATE = 0xC /*!< Invalid state */
+};
+
+#define MC_CMD_HDR_CMDID_O 52 /* Command ID field offset */
+#define MC_CMD_HDR_CMDID_S 12 /* Command ID field size */
+#define MC_CMD_HDR_AUTHID_O 38 /* Authentication ID field offset */
+#define MC_CMD_HDR_AUTHID_S 10 /* Authentication ID field size */
+#define MC_CMD_HDR_STATUS_O 16 /* Status field offset */
+#define MC_CMD_HDR_STATUS_S 8 /* Status field size*/
+#define MC_CMD_HDR_PRI_O 15 /* Priority field offset */
+#define MC_CMD_HDR_PRI_S 1 /* Priority field size */
+
+#define MC_CMD_HDR_READ_STATUS(_hdr) \
+ ((enum mc_cmd_status)u64_dec((_hdr), \
+ MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S))
+
+#define MC_CMD_HDR_READ_AUTHID(_hdr) \
+ ((uint16_t)u64_dec((_hdr), MC_CMD_HDR_AUTHID_O, MC_CMD_HDR_AUTHID_S))
+
+#define MC_CMD_PRI_LOW 0 /*!< Low Priority command indication */
+#define MC_CMD_PRI_HIGH 1 /*!< High Priority command indication */
+
+#define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \
+ ((_cmd).params[_param] |= u64_enc((_offset), (_width), _arg))
+
+#define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \
+ (_arg = (_type)u64_dec(_cmd.params[_param], (_offset), (_width)))
+
+static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id,
+ uint8_t priority,
+ uint16_t auth_id)
+{
+ uint64_t hdr;
+
+ hdr = u64_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id);
+ hdr |= u64_enc(MC_CMD_HDR_AUTHID_O, MC_CMD_HDR_AUTHID_S, auth_id);
+ hdr |= u64_enc(MC_CMD_HDR_PRI_O, MC_CMD_HDR_PRI_S, priority);
+ hdr |= u64_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S,
+ MC_CMD_STATUS_READY);
+
+ return hdr;
+}
+
+/**
+ * mc_write_command - writes a command to a Management Complex (MC) portal
+ *
+ * @portal: pointer to an MC portal
+ * @cmd: pointer to a filled command
+ */
+static inline void mc_write_command(struct mc_command __iomem *portal,
+ struct mc_command *cmd)
+{
+ int i;
+
+ /* copy command parameters into the portal */
+ for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
+ writeq(cmd->params[i], &portal->params[i]);
+
+ /* submit the command by writing the header */
+ writeq(cmd->header, &portal->header);
+}
+
+/**
+ * mc_read_response - reads the response for the last MC command from a
+ * Management Complex (MC) portal
+ *
+ * @portal: pointer to an MC portal
+ * @resp: pointer to command response buffer
+ *
+ * Returns MC_CMD_STATUS_OK on Success; Error code otherwise.
+ */
+static inline enum mc_cmd_status mc_read_response(
+ struct mc_command __iomem *portal,
+ struct mc_command *resp)
+{
+ int i;
+ enum mc_cmd_status status;
+
+ /* Copy command response header from MC portal: */
+ resp->header = readq(&portal->header);
+ status = MC_CMD_HDR_READ_STATUS(resp->header);
+ if (status != MC_CMD_STATUS_OK)
+ return status;
+
+ /* Copy command response data from MC portal: */
+ for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
+ resp->params[i] = readq(&portal->params[i]);
+
+ return status;
+}
+
+int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd);
+
+#endif /* __FSL_MC_CMD_H */
diff --git a/include/fsl-mc/fsl_mc_sys.h b/include/fsl-mc/fsl_mc_sys.h
new file mode 100644
index 0000000..c0befe0
--- /dev/null
+++ b/include/fsl-mc/fsl_mc_sys.h
@@ -0,0 +1,26 @@
+/*
+ * Freescale Layerscape Management Complex (MC) Environment-specific code
+ *
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _FSL_MC_SYS_H
+#define _FSL_MC_SYS_H
+
+#include <asm/io.h>
+
+struct mc_command;
+
+/*
+ * struct mc_portal_wrapper - MC command portal wrapper object
+ */
+struct fsl_mc_io {
+ struct mc_command __iomem *mmio_regs;
+};
+
+int mc_send_command(struct fsl_mc_io *mc_io,
+ struct mc_command *cmd);
+
+#endif /* _FSL_MC_SYS_H */
diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h
index 3286c95..feccef9 100644
--- a/include/fsl_ddr.h
+++ b/include/fsl_ddr.h
@@ -44,11 +44,12 @@ u32 fsl_ddr_get_version(void);
* to this specific DDR technology.
*/
static __inline__ int
-compute_dimm_parameters(const generic_spd_eeprom_t *spd,
+compute_dimm_parameters(const unsigned int ctrl_num,
+ const generic_spd_eeprom_t *spd,
dimm_params_t *pdimm,
unsigned int dimm_number)
{
- return ddr_compute_dimm_parameters(spd, pdimm, dimm_number);
+ return ddr_compute_dimm_parameters(ctrl_num, spd, pdimm, dimm_number);
}
#endif
@@ -92,13 +93,15 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
unsigned int size_only);
const char *step_to_string(unsigned int step);
-unsigned int compute_fsl_memctl_config_regs(const memctl_options_t *popts,
+unsigned int compute_fsl_memctl_config_regs(const unsigned int ctrl_num,
+ const memctl_options_t *popts,
fsl_ddr_cfg_regs_t *ddr,
const common_timing_params_t *common_dimm,
const dimm_params_t *dimm_parameters,
unsigned int dbw_capacity_adjust,
unsigned int size_only);
unsigned int compute_lowest_common_dimm_parameters(
+ const unsigned int ctrl_num,
const dimm_params_t *dimm_params,
common_timing_params_t *outpdimm,
unsigned int number_of_dimms);
@@ -108,13 +111,15 @@ unsigned int populate_memctl_options(int all_dimms_registered,
unsigned int ctrl_num);
void check_interleaving_options(fsl_ddr_info_t *pinfo);
-unsigned int mclk_to_picos(unsigned int mclk);
-unsigned int get_memory_clk_period_ps(void);
-unsigned int picos_to_mclk(unsigned int picos);
+unsigned int mclk_to_picos(const unsigned int ctrl_num, unsigned int mclk);
+unsigned int get_memory_clk_period_ps(const unsigned int ctrl_num);
+unsigned int picos_to_mclk(const unsigned int ctrl_num, unsigned int picos);
void fsl_ddr_set_lawbar(
const common_timing_params_t *memctl_common_params,
unsigned int memctl_interleaved,
unsigned int ctrl_num);
+void fsl_ddr_sync_memctl_refresh(unsigned int first_ctrl,
+ unsigned int last_ctrl);
int fsl_ddr_interactive_env_var_exists(void);
unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo, int var_is_set);
diff --git a/include/fsl_ddr_dimm_params.h b/include/fsl_ddr_dimm_params.h
index 09a67a6..751e935 100644
--- a/include/fsl_ddr_dimm_params.h
+++ b/include/fsl_ddr_dimm_params.h
@@ -112,7 +112,7 @@ typedef struct dimm_params_s {
#endif
} dimm_params_t;
-extern unsigned int ddr_compute_dimm_parameters(
+unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num,
const generic_spd_eeprom_t *spd,
dimm_params_t *pdimm,
unsigned int dimm_number);
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index e3d6581..57295b4 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -108,6 +108,7 @@
#define XFERTYP_RSPTYP_48_BUSY 0x00030000
#define XFERTYP_MSBSEL 0x00000020
#define XFERTYP_DTDSEL 0x00000010
+#define XFERTYP_DDREN 0x00000008
#define XFERTYP_AC12EN 0x00000004
#define XFERTYP_BCEN 0x00000002
#define XFERTYP_DMAEN 0x00000001
diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index aa850a3..b6e6f04 100644
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -175,6 +175,32 @@ struct jr_regs {
u32 jrcr;
};
+/*
+ * Scatter Gather Entry - Specifies the the Scatter Gather Format
+ * related information
+ */
+struct sg_entry {
+#ifdef CONFIG_SYS_FSL_SEC_LE
+ uint32_t addr_lo; /* Memory Address - lo */
+ uint16_t addr_hi; /* Memory Address of start of buffer - hi */
+ uint16_t reserved_zero;
+#else
+ uint16_t reserved_zero;
+ uint16_t addr_hi; /* Memory Address of start of buffer - hi */
+ uint32_t addr_lo; /* Memory Address - lo */
+#endif
+
+ uint32_t len_flag; /* Length of the data in the frame */
+#define SG_ENTRY_LENGTH_MASK 0x3FFFFFFF
+#define SG_ENTRY_EXTENSION_BIT 0x80000000
+#define SG_ENTRY_FINAL_BIT 0x40000000
+ uint32_t bpid_offset;
+#define SG_ENTRY_BPID_MASK 0x00FF0000
+#define SG_ENTRY_BPID_SHIFT 16
+#define SG_ENTRY_OFFSET_MASK 0x00001FFF
+#define SG_ENTRY_OFFSET_SHIFT 0
+};
+
int sec_init(void);
#endif
diff --git a/include/hw_sha.h b/include/hw_sha.h
index 783350d..ab19a99 100644
--- a/include/hw_sha.h
+++ b/include/hw_sha.h
@@ -7,7 +7,7 @@
*/
#ifndef __HW_SHA_H
#define __HW_SHA_H
-
+#include <hash.h>
/**
* Computes hash value of input pbuf using h/w acceleration
@@ -34,4 +34,43 @@ void hw_sha256(const uchar * in_addr, uint buflen,
*/
void hw_sha1(const uchar * in_addr, uint buflen,
uchar * out_addr, uint chunk_size);
+
+/*
+ * Create the context for sha progressive hashing using h/w acceleration
+ *
+ * @algo: Pointer to the hash_algo struct
+ * @ctxp: Pointer to the pointer of the context for hashing
+ * @return 0 if ok, -ve on error
+ */
+int hw_sha_init(struct hash_algo *algo, void **ctxp);
+
+/*
+ * Update buffer for sha progressive hashing using h/w acceleration
+ *
+ * The context is freed by this function if an error occurs.
+ *
+ * @algo: Pointer to the hash_algo struct
+ * @ctx: Pointer to the context for hashing
+ * @buf: Pointer to the buffer being hashed
+ * @size: Size of the buffer being hashed
+ * @is_last: 1 if this is the last update; 0 otherwise
+ * @return 0 if ok, -ve on error
+ */
+int hw_sha_update(struct hash_algo *algo, void *ctx, const void *buf,
+ unsigned int size, int is_last);
+
+/*
+ * Copy sha hash result at destination location
+ *
+ * The context is freed after completion of hash operation or after an error.
+ *
+ * @algo: Pointer to the hash_algo struct
+ * @ctx: Pointer to the context for hashing
+ * @dest_buf: Pointer to the destination buffer where hash is to be copied
+ * @size: Size of the buffer being hashed
+ * @return 0 if ok, -ve on error
+ */
+int hw_sha_finish(struct hash_algo *algo, void *ctx, void *dest_buf,
+ int size);
+
#endif
diff --git a/include/i2c.h b/include/i2c.h
index 27fe00f..31b0389 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -25,14 +25,13 @@
* enough as to be incompatible for compilation purposes.
*/
-#ifdef CONFIG_DM_I2C
-
enum dm_i2c_chip_flags {
DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
};
+struct udevice;
/**
* struct dm_i2c_chip - information about an i2c chip
*
@@ -125,21 +124,21 @@ int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
struct udevice **devp);
/**
- * i2c_set_bus_speed() - set the speed of a bus
+ * dm_i2c_set_bus_speed() - set the speed of a bus
*
* @bus: Bus to adjust
* @speed: Requested speed in Hz
* @return 0 if OK, -EINVAL for invalid values
*/
-int i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
+int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
/**
- * i2c_get_bus_speed() - get the speed of a bus
+ * dm_i2c_get_bus_speed() - get the speed of a bus
*
* @bus: Bus to check
* @return speed of selected I2C bus in Hz, -ve on error
*/
-int i2c_get_bus_speed(struct udevice *bus);
+int dm_i2c_get_bus_speed(struct udevice *bus);
/**
* i2c_set_chip_flags() - set flags for a chip
@@ -439,8 +438,6 @@ int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
int i2c_chip_ofdata_to_platdata(const void *blob, int node,
struct dm_i2c_chip *chip);
-#endif
-
#ifndef CONFIG_DM_I2C
/*
diff --git a/include/mmc.h b/include/mmc.h
index e4b071e..2ad0f19 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -14,24 +14,41 @@
#include <linux/compiler.h>
#include <part.h>
-#define SD_VERSION_SD 0x20000
-#define SD_VERSION_3 (SD_VERSION_SD | 0x300)
-#define SD_VERSION_2 (SD_VERSION_SD | 0x200)
-#define SD_VERSION_1_0 (SD_VERSION_SD | 0x100)
-#define SD_VERSION_1_10 (SD_VERSION_SD | 0x10a)
-#define MMC_VERSION_MMC 0x10000
-#define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC)
-#define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x102)
-#define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x104)
-#define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x202)
-#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x300)
-#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x400)
-#define MMC_VERSION_4_1 (MMC_VERSION_MMC | 0x401)
-#define MMC_VERSION_4_2 (MMC_VERSION_MMC | 0x402)
-#define MMC_VERSION_4_3 (MMC_VERSION_MMC | 0x403)
-#define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429)
-#define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405)
-#define MMC_VERSION_5_0 (MMC_VERSION_MMC | 0x500)
+/* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
+#define SD_VERSION_SD (1U << 31)
+#define MMC_VERSION_MMC (1U << 30)
+
+#define MAKE_SDMMC_VERSION(a, b, c) \
+ ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c))
+#define MAKE_SD_VERSION(a, b, c) \
+ (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c))
+#define MAKE_MMC_VERSION(a, b, c) \
+ (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c))
+
+#define EXTRACT_SDMMC_MAJOR_VERSION(x) \
+ (((u32)(x) >> 16) & 0xff)
+#define EXTRACT_SDMMC_MINOR_VERSION(x) \
+ (((u32)(x) >> 8) & 0xff)
+#define EXTRACT_SDMMC_CHANGE_VERSION(x) \
+ ((u32)(x) & 0xff)
+
+#define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0)
+#define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0)
+#define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0)
+#define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0)
+
+#define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0)
+#define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0)
+#define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0)
+#define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0)
+#define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0)
+#define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0)
+#define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0)
+#define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0)
+#define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0)
+#define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1)
+#define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0)
+#define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0)
#define MMC_MODE_HS (1 << 0)
#define MMC_MODE_HS_52MHz (1 << 1)
@@ -43,7 +60,8 @@
#define SD_DATA_4BIT 0x00040000
-#define IS_SD(x) (x->version & SD_VERSION_SD)
+#define IS_SD(x) ((x)->version & SD_VERSION_SD)
+#define IS_MMC(x) ((x)->version & SD_VERSION_MMC)
#define MMC_DATA_READ 1
#define MMC_DATA_WRITE 2
diff --git a/include/net.h b/include/net.h
index 73ea88b..43e3d28 100644
--- a/include/net.h
+++ b/include/net.h
@@ -512,10 +512,6 @@ unsigned add_ip_checksums(unsigned offset, unsigned sum, unsigned new_sum);
*/
int ip_checksum_ok(const void *addr, unsigned nbytes);
-/* Checksum */
-extern int NetCksumOk(uchar *, int); /* Return true if cksum OK */
-extern uint NetCksum(uchar *, int); /* Calculate the checksum */
-
/* Callbacks */
extern rxhand_f *net_get_udp_handler(void); /* Get UDP RX packet handler */
extern void net_set_udp_handler(rxhand_f *); /* Set UDP RX packet handler */
diff --git a/include/netdev.h b/include/netdev.h
index daffc12..90140bd 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -55,7 +55,6 @@ int ftmac100_initialize(bd_t *bits);
int ftmac110_initialize(bd_t *bits);
int greth_initialize(bd_t *bis);
void gt6426x_eth_initialize(bd_t *bis);
-int ks8695_eth_initialize(void);
int ks8851_mll_initialize(u8 dev_num, int base_addr);
int lan91c96_initialize(u8 dev_num, int base_addr);
int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
diff --git a/include/serial.h b/include/serial.h
index 66ed12c..de40e94 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -29,7 +29,7 @@ extern struct serial_device *default_serial_console(void);
#if defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
defined(CONFIG_405EX) || defined(CONFIG_440) || \
- defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) || \
+ defined(CONFIG_MPC5xxx) || \
defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) || \
defined(CONFIG_TEGRA) || defined(CONFIG_SYS_COREBOOT) || \
@@ -182,7 +182,6 @@ void evb64260_serial_initialize(void);
void imx_serial_initialize(void);
void iop480_serial_initialize(void);
void jz_serial_initialize(void);
-void ks8695_serial_initialize(void);
void leon2_serial_initialize(void);
void leon3_serial_initialize(void);
void lh7a40x_serial_initialize(void);