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-rw-r--r--include/configs/SBC8540.h22
-rw-r--r--include/configs/sbc8560.h28
2 files changed, 41 insertions, 9 deletions
diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h
index 6033d93..93509ee 100644
--- a/include/configs/SBC8540.h
+++ b/include/configs/SBC8540.h
@@ -103,18 +103,34 @@
#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
-#define CFG_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory */
-#define CFG_SDRAM_BASE CFG_DDR_SDRAM_BASE
#define CFG_SDRAM_SIZE 512 /* DDR is 512MB */
-#define SPD_EEPROM_ADDRESS 0x55 /* DDR DIMM */
+/* DDR Setup */
+#define CONFIG_FSL_DDR1
+#undef CONFIG_FSL_DDR_INTERACTIVE
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
+#undef CONFIG_DDR_SPD
#if defined(CONFIG_MPC85xx_REV1)
#define CONFIG_DDR_DLL /* possible DLL fix needed */
#endif
+#undef CONFIG_DDR_ECC /* only for ECC DDR module */
+#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
+#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+
+#define CFG_DDR_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_BASE CFG_DDR_SDRAM_BASE
+#define CONFIG_VERY_BIG_RAM
+
+#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_DIMM_SLOTS_PER_CTLR 1
+#define CONFIG_CHIP_SELECTS_PER_CTRL 2
+
+/* I2C addresses of SPD EEPROMs */
+#define SPD_EEPROM_ADDRESS 0x55 /* CTLR 0 DIMM 0 */
+
#undef CONFIG_CLOCKS_IN_MHZ
#if defined(CONFIG_RAM_AS_FLASH)
diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h
index b244eef..99d328c 100644
--- a/include/configs/sbc8560.h
+++ b/include/configs/sbc8560.h
@@ -97,18 +97,34 @@
#define CFG_CCSRBAR_PHYS CFG_CCSRBAR /* physical addr of CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
-#define CFG_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory */
-#define CFG_SDRAM_BASE CFG_DDR_SDRAM_BASE
#define CFG_SDRAM_SIZE 512 /* DDR is 512MB */
-#define SPD_EEPROM_ADDRESS 0x55 /* DDR DIMM */
-#undef CONFIG_DDR_ECC /* only for ECC DDR module */
-#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
+/* DDR Setup */
+#define CONFIG_FSL_DDR1
+#undef CONFIG_FSL_DDR_INTERACTIVE
+#undef CONFIG_DDR_ECC /* only for ECC DDR module */
+#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
+#undef CONFIG_DDR_SPD
#if defined(CONFIG_MPC85xx_REV1)
- #define CONFIG_DDR_DLL /* possible DLL fix needed */
+ #define CONFIG_DDR_DLL /* possible DLL fix needed */
#endif
+#undef CONFIG_DDR_ECC /* only for ECC DDR module */
+#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
+#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+
+#define CFG_DDR_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_BASE CFG_DDR_SDRAM_BASE
+#define CONFIG_VERY_BIG_RAM
+
+#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_DIMM_SLOTS_PER_CTLR 1
+#define CONFIG_CHIP_SELECTS_PER_CTRL 2
+
+/* I2C addresses of SPD EEPROMs */
+#define SPD_EEPROM_ADDRESS 0x55 /* CTLR 0 DIMM 0 */
+
#undef CONFIG_CLOCKS_IN_MHZ
#if defined(CONFIG_RAM_AS_FLASH)