diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/mgcoge.h | 35 | ||||
| -rw-r--r-- | include/configs/mgsuvd.h | 12 |
2 files changed, 43 insertions, 4 deletions
diff --git a/include/configs/mgcoge.h b/include/configs/mgcoge.h index f4a1cc0..98facf2 100644 --- a/include/configs/mgcoge.h +++ b/include/configs/mgcoge.h @@ -35,6 +35,9 @@ #define CONFIG_CPM2 1 /* Has a CPM2 */ +/* Do boardspecific init */ +#define CONFIG_BOARD_EARLY_INIT_R 1 + /* * Select serial console configuration * @@ -152,8 +155,13 @@ #define CFG_FLASH_SIZE 32 #define CFG_FLASH_CFI #define CFG_FLASH_CFI_DRIVER -#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */ -#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks */ +#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */ + +#define CFG_FLASH_BASE_1 0x50000000 +#define CFG_FLASH_SIZE_1 64 + +#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH_BASE_1 } #define CFG_MONITOR_BASE TEXT_BASE #if (CFG_MONITOR_BASE < CFG_FLASH_BASE) @@ -246,6 +254,8 @@ * ---- --- ------- ------ ------ * 0 60x GPCM 8 bit FLASH * 1 60x SDRAM 32 bit SDRAM + * 3 60x GPCM 8 bit GPIO/PIGGY + * 5 60x GPCM 16 bit CFG-Flash * */ /* Bank 0 - FLASH @@ -301,6 +311,27 @@ PSDMR_WRC_1C |\ PSDMR_CL_2) +/* GPIO/PIGGY on CS3 initialization values +*/ +#define CFG_PIGGY_BASE 0x30000000 +#define CFG_PIGGY_SIZE 128 + +#define CFG_BR3_PRELIM ((CFG_PIGGY_BASE & BRx_BA_MSK) |\ + BRx_PS_8 | BRx_MS_GPCM_P | BRx_V) + +#define CFG_OR3_PRELIM (MEG_TO_AM(CFG_PIGGY_SIZE) |\ + ORxG_CSNT | ORxG_ACS_DIV2 |\ + ORxG_SCY_3_CLK | ORxG_TRLX ) + +/* CFG-Flash on CS5 initialization values +*/ +#define CFG_BR5_PRELIM ((CFG_FLASH_BASE_1 & BRx_BA_MSK) |\ + BRx_PS_16 | BRx_MS_GPCM_P | BRx_V) + +#define CFG_OR5_PRELIM (MEG_TO_AM(CFG_FLASH_SIZE_1) |\ + ORxG_CSNT | ORxG_ACS_DIV2 |\ + ORxG_SCY_5_CLK | ORxG_TRLX ) + #define CFG_RESET_ADDRESS 0xFDFFFFFC /* "bad" address */ /* pass open firmware flat tree */ diff --git a/include/configs/mgsuvd.h b/include/configs/mgsuvd.h index 8181872..5482089 100644 --- a/include/configs/mgsuvd.h +++ b/include/configs/mgsuvd.h @@ -36,6 +36,9 @@ #define CONFIG_MPC866 1 /* This is a MPC866 CPU */ #define CONFIG_MGSUVD 1 /* ...on a mgsuvd board */ +/* Do boardspecific init */ +#define CONFIG_BOARD_EARLY_INIT_R 1 + #define CONFIG_8xx_GCLK_FREQ 66000000 #define CFG_SMC_UCODE_PATCH 1 /* Relocate SMC1 */ @@ -299,7 +302,12 @@ * 64 Refresh cycle in ms per number of rows */ #define CFG_PTA_PER_CLK ((4096 * 64 * 1000) / (4 * 64)) -/* HS HS noch zu setzen */ + +/* GPIO/PIGGY on CS3 initialization values +*/ +#define CFG_PIGGY_BASE (0x30000000) +#define CFG_OR3_PRELIM (0xfe000d24) +#define CFG_BR3_PRELIM (0x30000401) /* * Internal Definitions @@ -318,7 +326,7 @@ #define CONFIG_OF_BOARD_SETUP 1 #define OF_CPU "PowerPC,866@0" -#define OF_SOC "soc@f0000000" +#define OF_SOC "soc@fff00000" #define OF_TBCLK (bd->bi_busfreq / 4) #define OF_STDOUT_PATH "/soc/cpm/serial@a80" |