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-rw-r--r--include/configs/katmai.h21
-rw-r--r--include/configs/sc3.h2
-rw-r--r--include/i2c.h8
-rw-r--r--include/ppc440.h6
4 files changed, 30 insertions, 7 deletions
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index c750e14..f350155 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -107,11 +107,8 @@
* DDR SDRAM
*----------------------------------------------------------------------*/
#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
-#define SPD_EEPROM_ADDRESS {0x51, 0x52} /* SPD i2c spd addresses */
-#define IIC0_DIMM0_ADDR 0x51
-#define IIC0_DIMM1_ADDR 0x52
+#define SPD_EEPROM_ADDRESS {0x51, 0x52} /* SPD i2c spd addresses*/
#undef CONFIG_STRESS
-#undef ENABLE_ECC
/*-----------------------------------------------------------------------
* I2C
@@ -384,6 +381,22 @@
EBC_CFG_PME_DISABLE | \
EBC_CFG_PR_16)
+/*-----------------------------------------------------------------------
+ * GPIO Setup
+ *----------------------------------------------------------------------*/
+#define CFG_GPIO_PCIE_PRESENT0 17
+#define CFG_GPIO_PCIE_PRESENT1 21
+#define CFG_GPIO_PCIE_PRESENT2 23
+#define CFG_GPIO_RS232_FORCEOFF 30
+
+#define CFG_PFC0 (GPIO_VAL(CFG_GPIO_PCIE_PRESENT0) | \
+ GPIO_VAL(CFG_GPIO_PCIE_PRESENT1) | \
+ GPIO_VAL(CFG_GPIO_PCIE_PRESENT2) | \
+ GPIO_VAL(CFG_GPIO_RS232_FORCEOFF))
+#define CFG_GPIO_OR GPIO_VAL(CFG_GPIO_RS232_FORCEOFF)
+#define CFG_GPIO_TCR GPIO_VAL(CFG_GPIO_RS232_FORCEOFF)
+#define CFG_GPIO_ODR 0
+
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
diff --git a/include/configs/sc3.h b/include/configs/sc3.h
index b767449..f2f0598 100644
--- a/include/configs/sc3.h
+++ b/include/configs/sc3.h
@@ -115,7 +115,7 @@
":${hostname}:${netdev}:off panic=1\0" \
"flash_nfs=run nfsargs addip;" \
"bootm ${kernel_addr}\0" \
- "flash_nand=nand_args addip addcon;bootm ${kernel_addr}\0" \
+ "flash_nand=run nand_args addip addcon;bootm ${kernel_addr}\0" \
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_4xx\0" \
"bootfile=/tftpboot/sc3/uImage\0" \
diff --git a/include/i2c.h b/include/i2c.h
index 54c6f9f..d31c72d 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -56,6 +56,14 @@
#define I2C_SET_BUS(a)
#endif
+/* define the I2C bus number for RTC and DTT if not already done */
+#if !defined(CFG_RTC_BUS_NUM)
+#define CFG_RTC_BUS_NUM 0
+#endif
+#if !defined(CFG_DTT_BUS_NUM)
+#define CFG_DTT_BUS_NUM 0
+#endif
+
/*
* Initialization, must be called once on start up, may be called
* repeatedly to change the speed and slave addresses.
diff --git a/include/ppc440.h b/include/ppc440.h
index c24f5b7..1c7f11c 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -3190,7 +3190,8 @@
#define GPIO0 0
#define GPIO1 1
-#if defined(CONFIG_440GP) || defined(CONFIG_440GX)
+#if defined(CONFIG_440GP) || defined(CONFIG_440GX) || \
+ defined(CONFIG_440SP) || defined(CONFIG_440SPE)
#define GPIO0_BASE (CFG_PERIPHERAL_BASE+0x00000700)
#define GPIO0_OR (GPIO0_BASE+0x0)
@@ -3275,6 +3276,8 @@
#define GPIO_IN_SEL 0x40000000 /* GPIO_IN value put in GPIO_ISx for the GPIO nb 0 */
/* For the other GPIO number, you must shift */
+#define GPIO_VAL(gpio) (0x80000000 >> (gpio))
+
#ifndef __ASSEMBLY__
typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;
@@ -3285,7 +3288,6 @@ typedef struct { unsigned long add; /* gpio core base address */
gpio_select_t alt_nb; /* Selected Alternate */
} gpio_param_s;
-
#endif /* __ASSEMBLY__ */
/*