diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/IceCube.h | 20 | ||||
| -rw-r--r-- | include/configs/VCMA9.h | 9 | ||||
| -rw-r--r-- | include/mpc5xxx.h | 29 |
3 files changed, 52 insertions, 6 deletions
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h index 9d914a6..c2c398c 100644 --- a/include/configs/IceCube.h +++ b/include/configs/IceCube.h @@ -83,7 +83,8 @@ /* * Supported commands */ -#define CONFIG_COMMANDS (CONFIG_CMD_DFL | ADD_PCI_CMD) +#define CONFIG_COMMANDS (CONFIG_CMD_DFL | ADD_PCI_CMD | \ + CFG_CMD_I2C | CFG_CMD_EEPROM) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> @@ -98,6 +99,23 @@ /* * I2C configuration */ +#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ +#define CFG_I2C_MODULE 1 /* If defined then I2C module #2 is used + * otherwise I2C module #1 is used */ +#ifdef CONFIG_MPC5200 +#define CFG_I2C_SPEED 0x3D /* 86KHz given 133MHz IPBI */ +#else +#define CFG_I2C_SPEED 0x35 /* 86KHz given 33MHz IPBI */ +#endif +#define CFG_I2C_SLAVE 0x7F + +/* + * EEPROM configuration + */ +#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */ +#define CFG_I2C_EEPROM_ADDR_LEN 1 +#define CFG_EEPROM_PAGE_WRITE_BITS 3 +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 35 /* * Flash configuration diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index c0103fc..9f868f8 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2002 + * (C) Copyright 2002, 2003 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> * Marius Groeger <mgroeger@sysgo.de> * Gary Jennejohn <gj@denx.de> @@ -160,9 +160,10 @@ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ #define CFG_MEMTEST_START 0x30000000 /* memtest works on */ -#define CFG_MEMTEST_END 0x33F80000 /* 63.5 MB in DRAM */ +#define CFG_MEMTEST_END 0x30F80000 /* 15.5 MB in DRAM */ + #define CFG_ALT_MEMTEST -#define CFG_LOAD_ADDR 0x33000000 /* default load address */ +#define CFG_LOAD_ADDR 0x30800000 /* default load address */ #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ @@ -197,8 +198,6 @@ */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ - #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ #define CFG_FLASH_BASE PHYS_FLASH_1 diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h index 02683e3..b38d7d4 100644 --- a/include/mpc5xxx.h +++ b/include/mpc5xxx.h @@ -108,6 +108,9 @@ #define MPC5XXX_FEC (CFG_MBAR + 0x3000) +#define MPC5XXX_I2C1 (CFG_MBAR + 0x3D00) +#define MPC5XXX_I2C2 (CFG_MBAR + 0x3D40) + #if defined(CONFIG_MGT5100) #define MPC5XXX_SRAM (CFG_MBAR + 0x4000) #define MPC5XXX_SRAM_SIZE (8*1024) @@ -197,6 +200,24 @@ #define MPC5XXX_GPT0_ENABLE (MPC5XXX_GPT + 0x0) #define MPC5XXX_GPT0_COUNTER (MPC5XXX_GPT + 0x4) +/* I2Cn control register bits */ +#define I2C_EN 0x80 +#define I2C_IEN 0x40 +#define I2C_STA 0x20 +#define I2C_TX 0x10 +#define I2C_TXAK 0x08 +#define I2C_RSTA 0x04 +#define I2C_INIT_MASK (I2C_EN | I2C_STA | I2C_TX | I2C_RSTA) + +/* I2Cn status register bits */ +#define I2C_CF 0x80 +#define I2C_AAS 0x40 +#define I2C_BB 0x20 +#define I2C_AL 0x10 +#define I2C_SRW 0x04 +#define I2C_IF 0x02 +#define I2C_RXAK 0x01 + /* Programmable Serial Controller (PSC) status register bits */ #define PSC_SR_CDE 0x0080 #define PSC_SR_RXRDY 0x0100 @@ -505,6 +526,14 @@ struct mpc5xxx_sdma { volatile u32 EU37; /* SDMA + 0xfc */ }; +struct mpc5xxx_i2c { + volatile u32 madr; /* I2Cn + 0x00 */ + volatile u32 mfdr; /* I2Cn + 0x04 */ + volatile u32 mcr; /* I2Cn + 0x08 */ + volatile u32 msr; /* I2Cn + 0x0C */ + volatile u32 mdr; /* I2Cn + 0x10 */ +}; + /* function prototypes */ void loadtask(int basetask, int tasks); |