diff options
Diffstat (limited to 'include')
130 files changed, 356 insertions, 527 deletions
diff --git a/include/asm-arm/arch-arm720t/hardware.h b/include/asm-arm/arch-arm720t/hardware.h index 3056ca7..ec053c9 100644 --- a/include/asm-arm/arch-arm720t/hardware.h +++ b/include/asm-arm/arch-arm720t/hardware.h @@ -24,9 +24,7 @@ * MA 02111-1307 USA */ -#if defined(CONFIG_S3C4510B) -#include <asm-arm/arch-arm720t/s3c4510b.h> -#elif defined(CONFIG_NETARM) +#if defined(CONFIG_NETARM) #include <asm-arm/arch-arm720t/netarm_registers.h> #elif defined(CONFIG_IMPA7) /* include IMPA7 specific hardware file if there was one */ diff --git a/include/asm-arm/arch-arm720t/s3c4510b.h b/include/asm-arm/arch-s3c4510b/hardware.h index 6b8c8ed..6b8c8ed 100644 --- a/include/asm-arm/arch-arm720t/s3c4510b.h +++ b/include/asm-arm/arch-s3c4510b/hardware.h diff --git a/include/common.h b/include/common.h index 952ddff..20c058a 100644 --- a/include/common.h +++ b/include/common.h @@ -234,8 +234,8 @@ int mac_read_from_eeprom(void); /* common/flash.c */ void flash_perror (int); -/* common/cmd_autoscript.c */ -int autoscript (ulong addr, const char *fit_uname); +/* common/cmd_source.c */ +int source (ulong addr, const char *fit_uname); extern ulong load_addr; /* Default Load Address */ diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index db1f55c..c5e0d26 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -15,7 +15,6 @@ #define CONFIG_CMD_AMBAPP /* AMBA Plug & Play Bus print utility */ #define CONFIG_CMD_ASKENV /* ask for env variable */ -#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ #define CONFIG_CMD_BDI /* bdinfo */ #define CONFIG_CMD_BEDBUG /* Include BedBug Debugger */ #define CONFIG_CMD_BMP /* BMP support */ @@ -76,6 +75,7 @@ #define CONFIG_CMD_SETEXPR /* setexpr support */ #define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ #define CONFIG_CMD_SNTP /* SNTP support */ +#define CONFIG_CMD_SOURCE /* "source" command support */ #define CONFIG_CMD_SPI /* SPI utility */ #define CONFIG_CMD_TERMINAL /* built-in Serial Terminal */ #define CONFIG_CMD_UNIVERSE /* Tundra Universe Support */ diff --git a/include/config_cmd_default.h b/include/config_cmd_default.h index 3667602..0376e44 100644 --- a/include/config_cmd_default.h +++ b/include/config_cmd_default.h @@ -16,7 +16,6 @@ * hardware, not fully tested, etc.). */ -#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ #define CONFIG_CMD_BDI /* bdinfo */ #define CONFIG_CMD_BOOTD /* bootd */ #define CONFIG_CMD_CONSOLE /* coninfo */ @@ -37,6 +36,7 @@ #define CONFIG_CMD_NFS /* NFS support */ #define CONFIG_CMD_RUN /* run command in env variable */ #define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_SOURCE /* "source" command support */ #define CONFIG_CMD_XIMG /* Load part of Multi Image */ #endif /* _CONFIG_CMD_DEFAULT_H */ diff --git a/include/configs/ADNPESC1.h b/include/configs/ADNPESC1.h index 0977bee..b8afc17 100644 --- a/include/configs/ADNPESC1.h +++ b/include/configs/ADNPESC1.h @@ -44,7 +44,6 @@ #define CONFIG_ADNPESC1 1 /* SSV ADNP/ESC1 board */ #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */ #define CONFIG_SYS_HZ 1000 /* 1 msec time tick */ -#undef CONFIG_SYS_CLKS_IN_HZ #define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ /*------------------------------------------------------------------------ diff --git a/include/configs/APC405.h b/include/configs/APC405.h index 7453518..41eaaab 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -124,19 +124,19 @@ */ #include <config_cmd_default.h> +#define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_PCI -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_IDE -#define CONFIG_CMD_FAT +#define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF -#define CONFIG_CMD_DATE +#define CONFIG_CMD_FAT #define CONFIG_CMD_I2C +#define CONFIG_CMD_IDE +#define CONFIG_CMD_IRQ #define CONFIG_CMD_MII +#define CONFIG_CMD_PCI #define CONFIG_CMD_PING -#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_SOURCE #define CONFIG_CMD_USB -#define CONFIG_CMD_AUTOSCRIPT #define CONFIG_MAC_PARTITION #define CONFIG_DOS_PARTITION diff --git a/include/configs/B2.h b/include/configs/B2.h index c77ea1f..01b65c5 100644 --- a/include/configs/B2.h +++ b/include/configs/B2.h @@ -65,8 +65,12 @@ /* * select serial console configuration */ +#define CONFIG_S3C44B0_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ +#define CONFIG_S3C44B0_I2C +#define CONFIG_RTC_S3C44B0 + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -116,8 +120,6 @@ #define CONFIG_SYS_MEMTEST_START 0x0C400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0C800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x0c700000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* 1 kHz */ diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h index 527c846..150bd29 100644 --- a/include/configs/CRAYL1.h +++ b/include/configs/CRAYL1.h @@ -74,32 +74,32 @@ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ #define CONFIG_SYS_HUSH_PARSER 1 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_AUTOSCRIPT 1 +#define CONFIG_SOURCE 1 /* * Command line configuration. */ +#define CONFIG_CMD_ASKENV #define CONFIG_CMD_BDI -#define CONFIG_CMD_IMI -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_NET -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_CONSOLE -#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG #define CONFIG_CMD_ECHO +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMI #define CONFIG_CMD_IMMAP +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_NET #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DATE #define CONFIG_CMD_RUN -#define CONFIG_CMD_I2C -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SETGETDCR +#define CONFIG_CMD_SOURCE /* diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h index db9c17d..45ff2f7 100644 --- a/include/configs/DK1C20.h +++ b/include/configs/DK1C20.h @@ -50,7 +50,6 @@ #define CONFIG_DK1C20 1 /* Cyclone DK-1C20 board*/ #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */ #define CONFIG_SYS_HZ 1000 /* 1 msec time tick */ -#undef CONFIG_SYS_CLKS_IN_HZ #define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ /*------------------------------------------------------------------------ diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h index 3bd270c..ae567a3 100644 --- a/include/configs/DK1S10.h +++ b/include/configs/DK1S10.h @@ -48,7 +48,6 @@ #define CONFIG_DK1S10 1 /* Stratix DK-1S10 board*/ #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */ #define CONFIG_SYS_HZ 1000 /* 1 msec time tick */ -#undef CONFIG_SYS_CLKS_IN_HZ #define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ /*------------------------------------------------------------------------ diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 85c0e61..e6abbdc 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -290,14 +290,13 @@ int du440_phy_addr(int devnum); #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT -#define CONFIG_CMD_BSP +#define CONFIG_CMD_ASKENV #define CONFIG_CMD_BMP +#define CONFIG_CMD_BSP #define CONFIG_CMD_DATE -#define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DTT #define CONFIG_CMD_DIAG +#define CONFIG_CMD_DTT #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT @@ -309,9 +308,10 @@ int du440_phy_addr(int devnum); #define CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_CMD_PING -#define CONFIG_CMD_USB #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SOURCE +#define CONFIG_CMD_USB #define CONFIG_SUPPORT_VFAT @@ -428,7 +428,7 @@ int du440_phy_addr(int devnum); #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif -#define CONFIG_AUTOSCRIPT 1 +#define CONFIG_SOURCE 1 #define CONFIG_OF_LIBFDT #define CONFIG_OF_BOARD_SETUP diff --git a/include/configs/EP1C20.h b/include/configs/EP1C20.h index a0904d4..8941e4d 100644 --- a/include/configs/EP1C20.h +++ b/include/configs/EP1C20.h @@ -180,7 +180,6 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_BOOTD #undef CONFIG_CMD_CONSOLE #undef CONFIG_CMD_FPGA @@ -188,6 +187,7 @@ #undef CONFIG_CMD_ITEST #undef CONFIG_CMD_NFS #undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h index 1dd6e57..4729464 100644 --- a/include/configs/EXBITGEN.h +++ b/include/configs/EXBITGEN.h @@ -129,8 +129,6 @@ { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ 57600, 115200, 230400, 460800, 921600 } -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h index a399d22..8f18ab2 100644 --- a/include/configs/GEN860T.h +++ b/include/configs/GEN860T.h @@ -152,7 +152,7 @@ /* * Set default IP stuff just to get bootstrap entries into the - * environment so that we can autoscript the full default environment. + * environment so that we can source the full default environment. */ #define CONFIG_ETHADDR 9a:52:63:15:85:25 #define CONFIG_SERVERIP 10.0.4.201 diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 0ef4eba..21aedee 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -544,7 +544,7 @@ #define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP) /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */ -#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10) +#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT7L (0) diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 6cc27cb..3c57403 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -647,7 +647,8 @@ #define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP) /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */ -#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE | \ + BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT7L (0) diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 38a7386..ab6fe55 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -615,7 +615,8 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP) /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */ -#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE | \ + BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT7L 0 diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index cd910ea..edbc701 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -73,8 +73,8 @@ #define MV_INITRD_LENGTH 0x00300000 #define MV_SCRATCH_ADDR 0x00000000 #define MV_SCRATCH_LENGTH MV_INITRD_LENGTH -#define MV_AUTOSCR_ADDR 0xff840000 -#define MV_AUTOSCR_ADDR2 0xff850000 +#define MV_SOURCE_ADDR 0xff840000 +#define MV_SOURCE_ADDR2 0xff850000 #define MV_DTB_ADDR 0xfffc0000 #define CONFIG_SHOW_BOOT_PROGRESS 1 @@ -130,8 +130,8 @@ #define CONFIG_RESET_TO_RETRY 1000 #define CONFIG_BOOTCOMMAND "if imi ${autoscr_addr}; \ - then autoscr ${autoscr_addr}; \ - else autoscr ${autoscr_addr2}; \ + then source ${autoscr_addr}; \ + else source ${autoscr_addr2}; \ fi;" #define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs" @@ -149,8 +149,8 @@ "fpga=0\0" \ "fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \ "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \ - "autoscr_addr=" MK_STR(MV_AUTOSCR_ADDR) "\0" \ - "autoscr_addr2=" MK_STR(MV_AUTOSCR_ADDR2) "\0" \ + "autoscr_addr=" MK_STR(MV_SOURCE_ADDR) "\0" \ + "autoscr_addr2=" MK_STR(MV_SOURCE_ADDR2) "\0" \ "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \ "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \ "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \ diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index 4ecf806..8f741f5 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -360,7 +360,8 @@ #define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP) /* stack in DCACHE 0xFDF00000 & FLASH @ 0xFF800000 */ -#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE | \ + BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT7L 0 #define CONFIG_SYS_IBAT7U 0 @@ -411,8 +412,8 @@ #define MV_FPGA_SIZE 0x00076ca2 #define MV_KERNEL_ADDR 0xff810000 #define MV_INITRD_ADDR 0xffb00000 -#define MV_AUTOSCR_ADDR 0xff804000 -#define MV_AUTOSCR_ADDR2 0xff806000 +#define MV_SOURCE_ADDR 0xff804000 +#define MV_SOURCE_ADDR2 0xff806000 #define MV_DTB_ADDR 0xff808000 #define MV_INITRD_LENGTH 0x00400000 @@ -423,8 +424,8 @@ #define MV_INITRD_ADDR_RAM 0x01000000 #define CONFIG_BOOTCOMMAND "if imi ${autoscr_addr}; \ - then autoscr ${autoscr_addr}; \ - else autoscr ${autoscr_addr2}; \ + then source ${autoscr_addr}; \ + else source ${autoscr_addr2}; \ fi;" #define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs" @@ -437,8 +438,8 @@ "fpga=0\0" \ "fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \ "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \ - "autoscr_addr=" MK_STR(MV_AUTOSCR_ADDR) "\0" \ - "autoscr_addr2=" MK_STR(MV_AUTOSCR_ADDR2) "\0" \ + "autoscr_addr=" MK_STR(MV_SOURCE_ADDR) "\0" \ + "autoscr_addr2=" MK_STR(MV_SOURCE_ADDR2) "\0" \ "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \ "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \ "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \ diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index 2d04d89..796938a 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -71,7 +71,7 @@ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off;" \ "bootm" -#define CONFIG_AUTOSCRIPT +#define CONFIG_SOURCE #define CONFIG_LOADS_ECHO 0 /* echo off for serial download */ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */ diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index 4a27027..a14b2dd 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -71,7 +71,7 @@ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \ "bootm" -#define CONFIG_AUTOSCRIPT +#define CONFIG_SOURCE #define CONFIG_LOADS_ECHO 0 /* echo off for serial download */ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */ diff --git a/include/configs/NX823.h b/include/configs/NX823.h index 9182223..5054d5e 100644 --- a/include/configs/NX823.h +++ b/include/configs/NX823.h @@ -55,7 +55,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */ #undef CONFIG_WATCHDOG /* watchdog disabled, for now */ -#define CONFIG_AUTOSCRIPT +#define CONFIG_SOURCE /* * BOOTP options @@ -72,7 +72,7 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_SOURCE /* call various generic functions */ diff --git a/include/configs/PN62.h b/include/configs/PN62.h index 06c11e6..562c5c3 100644 --- a/include/configs/PN62.h +++ b/include/configs/PN62.h @@ -59,11 +59,11 @@ #define CONFIG_CMD_PCI #define CONFIG_CMD_BSP -#undef CONFIG_CMD_AUTOSCRIPT -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SAVEENV #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SAVEENV +#undef CONFIG_CMD_SOURCE #define CONFIG_BAUDRATE 19200 /* console baudrate */ diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index e20527e..79582e1 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -437,7 +437,7 @@ #define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP) /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */ -#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10) +#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT7L (0) diff --git a/include/configs/SMN42.h b/include/configs/SMN42.h index 45e6a58..05f6d9f 100644 --- a/include/configs/SMN42.h +++ b/include/configs/SMN42.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_LPC2292_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ @@ -139,8 +140,6 @@ #define CONFIG_SYS_MEMTEST_START 0x81800000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x83000000 /* 24 MB in SRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ /* for uClinux img is here*/ diff --git a/include/configs/SX1.h b/include/configs/SX1.h index 78c5152..caa6592 100644 --- a/include/configs/SX1.h +++ b/include/configs/SX1.h @@ -133,16 +133,14 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. * This time is further subdivided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */ +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/TOP860.h b/include/configs/TOP860.h index 8c2befb..b9e450d 100644 --- a/include/configs/TOP860.h +++ b/include/configs/TOP860.h @@ -125,7 +125,7 @@ #define CONFIG_CMD_BEDBUG -#define CONFIG_AUTOSCRIPT 1 +#define CONFIG_SOURCE 1 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 #undef CONFIG_LOADS_ECHO /* NO echo on for serial download */ @@ -419,15 +419,12 @@ /* * Set default IP stuff just to get bootstrap entries into the - * environment so that we can autoscript the full default environment. + * environment so that we can source the full default environment. */ #define CONFIG_ETHADDR 9a:52:63:15:85:25 #define CONFIG_SERVERIP 10.0.4.200 #define CONFIG_IPADDR 10.0.4.111 -/*----------------------------------------------------------------------- - * Defaults for Autoscript - */ #define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */ #define CONFIG_SYS_TFTP_LOADADDR 0x00100000 @@ -438,5 +435,4 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - #endif /* __CONFIG_H */ diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index d374981..fe1d102 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -253,7 +253,7 @@ #define CUSTOM_ENV_SETTINGS \ "bootfile=cam5200/uImage\0" \ "u-boot=cam5200/u-boot.bin\0" \ - "setup=tftp 200000 cam5200/setup.img; autoscr 200000\0" + "setup=tftp 200000 cam5200/setup.img; source 200000\0" #endif #if defined(CONFIG_TQM5200_B) diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index d9bcf6b..5e614fd 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -117,6 +117,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */ /************************************************************ @@ -172,9 +173,6 @@ #define CONFIG_SYS_ALT_MEMTEST #define CONFIG_SYS_LOAD_ADDR 0x30800000 /* default load address */ - -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - /* we configure PWM Timer 4 to 1us ~ 1MHz */ /*#define CONFIG_SYS_HZ 1000000 */ #define CONFIG_SYS_HZ 1562500 diff --git a/include/configs/VoVPN-GW.h b/include/configs/VoVPN-GW.h index 5f9a17f..b2d75e3 100644 --- a/include/configs/VoVPN-GW.h +++ b/include/configs/VoVPN-GW.h @@ -150,11 +150,9 @@ * Command line configuration. */ -#define CONFIG_CMD_AUTOSCRIPT #define CONFIG_CMD_BDI #define CONFIG_CMD_CONSOLE #define CONFIG_CMD_ECHO -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_FLASH #define CONFIG_CMD_IMI #define CONFIG_CMD_IMLS @@ -164,6 +162,8 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_RUN +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_SOURCE /* diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index 51d0a0a..ceef76e 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -131,8 +131,6 @@ /* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE {9600} -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info (bd_t) */ diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index ca1a9d4..11e0630 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -139,8 +139,6 @@ /* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE {9600} -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info (bd_t) */ diff --git a/include/configs/actux1.h b/include/configs/actux1.h index adbc399..91f6ff0 100644 --- a/include/configs/actux1.h +++ b/include/configs/actux1.h @@ -95,8 +95,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000 -/* everything, incl board info, in Hz */ -#undef CONFIG_SYS_CLKS_IN_HZ /* spec says 66.666 MHz, but it appears to be 33 */ #define CONFIG_SYS_HZ 3333333 diff --git a/include/configs/actux2.h b/include/configs/actux2.h index 4c579eb..b936938 100644 --- a/include/configs/actux2.h +++ b/include/configs/actux2.h @@ -86,8 +86,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000 -/* everything, incl board info, in Hz */ -#undef CONFIG_SYS_CLKS_IN_HZ /* spec says 66.666 MHz, but it appears to be 33 */ #define CONFIG_SYS_HZ 3333333 diff --git a/include/configs/actux3.h b/include/configs/actux3.h index 694f522..f5ee899 100644 --- a/include/configs/actux3.h +++ b/include/configs/actux3.h @@ -84,8 +84,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000 -/* everything, incl board info, in Hz */ -#undef CONFIG_SYS_CLKS_IN_HZ /* spec says 66.666 MHz, but it appears to be 33 */ #define CONFIG_SYS_HZ 3333333 diff --git a/include/configs/actux4.h b/include/configs/actux4.h index cdc9956..8d70a26 100644 --- a/include/configs/actux4.h +++ b/include/configs/actux4.h @@ -83,8 +83,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000 -/* everything, incl board info, in Hz */ -#undef CONFIG_SYS_CLKS_IN_HZ /* spec says 66.666 MHz, but it appears to be 33 */ #define CONFIG_SYS_HZ 3333333 diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 33a67ca..fa27119 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -69,11 +69,11 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 diff --git a/include/configs/apollon.h b/include/configs/apollon.h index f83dd9c..c14f871 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -127,7 +127,7 @@ #define CONFIG_MTD_PARTITIONS #endif -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_SOURCE #ifndef CONFIG_SYS_USE_NOR # undef CONFIG_CMD_FLASH @@ -196,7 +196,6 @@ #define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) #define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M) -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ /* default load address */ #define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) @@ -204,11 +203,9 @@ * or by 32KHz clk, or from external sig. This rate is divided by a local * divisor. */ -#define V_PVT 7 /* use with 12MHz/128 */ - #define CONFIG_SYS_TIMERBASE OMAP2420_GPT2 -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/armadillo.h b/include/configs/armadillo.h index 5a4ceaf..7ba5e17 100644 --- a/include/configs/armadillo.h +++ b/include/configs/armadillo.h @@ -64,6 +64,7 @@ /* * select serial console configuration */ +#define CONFIG_CLPS7111_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ @@ -105,8 +106,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00040000 /* default load address for armadillo: kernel img is here*/ #define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */ diff --git a/include/configs/assabet.h b/include/configs/assabet.h index 024fa20..a6c442b 100644 --- a/include/configs/assabet.h +++ b/include/configs/assabet.h @@ -57,6 +57,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on Intel Assabet */ /* allow to overwrite serial and ethaddr */ @@ -105,8 +106,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ - #define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */ #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 7e7f124..2ddbd17 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -91,10 +91,10 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 1fae3a3..1a5f9a4 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -86,11 +86,11 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 752d7e9..4d50932 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -90,11 +90,11 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index dd500ca..78e0081 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -91,11 +91,11 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 7a4039c..a48f2cb 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -82,12 +82,12 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_NET +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_USB #define CONFIG_CMD_NAND 1 diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index c998952..4ed5514 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -117,9 +117,9 @@ #define CONFIG_CMD_SF #define CONFIG_CMD_SPI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG #define CONFIG_ATMEL_USART 1 diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 2284277..b258f2d 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -142,9 +142,9 @@ #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MMC -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG #define CONFIG_ATMEL_USART 1 diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h index 8cfa312..f93118e 100644 --- a/include/configs/atstk1006.h +++ b/include/configs/atstk1006.h @@ -142,9 +142,9 @@ #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MMC -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG #define CONFIG_ATMEL_USART 1 diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h index f19374e..751e03c 100644 --- a/include/configs/cerf250.h +++ b/include/configs/cerf250.h @@ -113,8 +113,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ - #define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h index ce36a24..7ea1a46 100644 --- a/include/configs/cm4008.h +++ b/include/configs/cm4008.h @@ -53,6 +53,7 @@ * select serial console configuration */ #define CONFIG_ENV_IS_NOWHERE +#define CONFIG_KS8695_SERIAL #define CONFIG_SERIAL1 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 @@ -93,8 +94,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */ #define CONFIG_SYS_HZ (1000) /* 1ms resolution ticks */ diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h index 02cb1ef..ea374da 100644 --- a/include/configs/cm41xx.h +++ b/include/configs/cm41xx.h @@ -53,6 +53,7 @@ * select serial console configuration */ #define CONFIG_ENV_IS_NOWHERE +#define CONFIG_KS8695_SERIAL #define CONFIG_SERIAL1 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 @@ -93,8 +94,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */ #define CONFIG_SYS_HZ (1000) /* 1ms resolution ticks */ diff --git a/include/configs/cradle.h b/include/configs/cradle.h index 5131175..850d93b 100644 --- a/include/configs/cradle.h +++ b/include/configs/cradle.h @@ -99,8 +99,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/csb226.h b/include/configs/csb226.h index d65c14a..d9f85f0 100644 --- a/include/configs/csb226.h +++ b/include/configs/csb226.h @@ -124,8 +124,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */ /* RS: where is this documented? */ /* RS: is this where U-Boot is */ diff --git a/include/configs/csb272.h b/include/configs/csb272.h index 5d3b09a..204aea0 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -140,7 +140,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */ #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ diff --git a/include/configs/csb472.h b/include/configs/csb472.h index a33efde..9b3a11c 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -139,7 +139,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */ #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index 667c0d8..b43beaa 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -112,6 +112,7 @@ /* Flash & Environment */ /*=====================*/ #ifdef CONFIG_SYS_USE_NAND +#define CONFIG_NAND_DAVINCI #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 22d3808..2c97a00 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -81,6 +81,7 @@ /*=====================*/ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH +#define CONFIG_NAND_DAVINCI #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ #define CONFIG_ENV_SIZE SZ_128K diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 875bab6..9354c2f 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -77,6 +77,7 @@ /* Flash & Environment */ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH +#define CONFIG_NAND_DAVINCI #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ #define CONFIG_ENV_SIZE SZ_128K diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 47ab27a..0865d0d 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -112,6 +112,7 @@ /* Flash & Environment */ /*=====================*/ #ifdef CONFIG_SYS_USE_NAND +#define CONFIG_NAND_DAVINCI #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ diff --git a/include/configs/delta.h b/include/configs/delta.h index 001b48a..f5508b7 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -166,8 +166,6 @@ #define CONFIG_SYS_MEMTEST_START 0x80400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x80800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h index e329fd3..8f615bd 100644 --- a/include/configs/dnp1110.h +++ b/include/configs/dnp1110.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 */ /* allow to overwrite serial and ethaddr */ @@ -109,8 +110,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc0200000 /* default load address */ #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 84e1aef..dde4c83 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -70,16 +70,15 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ #define CONFIG_CMD_BDI /* bdinfo */ #define CONFIG_CMD_BOOTD /* bootd */ #define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_ECHO /* echo arguments */ -#define CONFIG_CMD_SAVEENV /* saveenv */ #define CONFIG_CMD_FLASH /* flinfo, erase, protect */ #define CONFIG_CMD_FPGA /* FPGA configuration Support */ #define CONFIG_CMD_IMI /* iminfo */ #define CONFIG_CMD_IMLS /* List all found images */ +#define CONFIG_CMD_IRQ /* IRQ Information */ #define CONFIG_CMD_ITEST /* Integer (and string) test */ #define CONFIG_CMD_LOADB /* loadb */ #define CONFIG_CMD_LOADS /* loads */ @@ -88,9 +87,10 @@ #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #undef CONFIG_CMD_NFS /* NFS support */ #define CONFIG_CMD_RUN /* run command in env variable */ +#define CONFIG_CMD_SAVEENV /* saveenv */ #define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_SOURCE /* "source" command Support */ #define CONFIG_CMD_XIMG /* Load part of Multi Image */ -#define CONFIG_CMD_IRQ /* IRQ Information */ #define CONFIG_BOOTDELAY 15 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600" @@ -116,8 +116,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */ diff --git a/include/configs/ep7312.h b/include/configs/ep7312.h index 322a3ca..630fff3 100644 --- a/include/configs/ep7312.h +++ b/include/configs/ep7312.h @@ -55,6 +55,7 @@ /* * select serial console configuration */ +#define CONFIG_CLPS7111_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ @@ -107,8 +108,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc0500000 /* default load address */ #define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */ diff --git a/include/configs/evb4510.h b/include/configs/evb4510.h index cbaae62..ffc9408 100644 --- a/include/configs/evb4510.h +++ b/include/configs/evb4510.h @@ -122,8 +122,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00780000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00000000 /* default load address */ #define CONFIG_SYS_SYS_CLK_FREQ 50000000 /* CPU freq: 50 MHz */ diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h index 21802df..739ff0d 100644 --- a/include/configs/favr-32-ezkit.h +++ b/include/configs/favr-32-ezkit.h @@ -139,9 +139,9 @@ #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MMC -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG #define CONFIG_ATMEL_USART 1 diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h index c0b3ab9..77d4578 100644 --- a/include/configs/gcplus.h +++ b/include/configs/gcplus.h @@ -70,6 +70,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */ /* allow to overwrite serial and ethaddr */ @@ -118,8 +119,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */ #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/configs/grsim.h b/include/configs/grsim.h index a9eaa4a..c3f1a31 100644 --- a/include/configs/grsim.h +++ b/include/configs/grsim.h @@ -65,23 +65,23 @@ /* * Supported commands */ -#define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */ -#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ -#define CONFIG_CMD_BDI /* bdinfo */ -#define CONFIG_CMD_CONSOLE /* coninfo */ +#define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */ +#define CONFIG_CMD_BDI /* bdinfo */ +#define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_DIAG -#define CONFIG_CMD_ECHO /* echo arguments */ -#define CONFIG_CMD_FPGA /* FPGA configuration Support */ +#define CONFIG_CMD_ECHO /* echo arguments */ +#define CONFIG_CMD_FPGA /* FPGA configuration Support */ #define CONFIG_CMD_IRQ -#define CONFIG_CMD_ITEST /* Integer (and string) test */ -#define CONFIG_CMD_LOADB /* loadb */ -#define CONFIG_CMD_LOADS /* loads */ +#define CONFIG_CMD_ITEST /* Integer (and string) test */ +#define CONFIG_CMD_LOADB /* loadb */ +#define CONFIG_CMD_LOADS /* loads */ #define CONFIG_CMD_MISC /* Misc functions like sleep etc */ -#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_RUN /* run command in env variable */ -#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ -#define CONFIG_CMD_XIMG /* Load part of Multi Image */ +#define CONFIG_CMD_RUN /* run command in env variable */ +#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_SOURCE /* "source" command support */ +#define CONFIG_CMD_XIMG /* Load part of Multi Image */ /* * Autobooting diff --git a/include/configs/grsim_leon2.h b/include/configs/grsim_leon2.h index 58f26fd..7ebbf25 100644 --- a/include/configs/grsim_leon2.h +++ b/include/configs/grsim_leon2.h @@ -64,21 +64,21 @@ /* * Supported commands */ -#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ -#define CONFIG_CMD_BDI /* bdinfo */ -#define CONFIG_CMD_CONSOLE /* coninfo */ +#define CONFIG_CMD_BDI /* bdinfo */ +#define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_DIAG -#define CONFIG_CMD_ECHO /* echo arguments */ -#define CONFIG_CMD_FPGA /* FPGA configuration Support */ +#define CONFIG_CMD_ECHO /* echo arguments */ +#define CONFIG_CMD_FPGA /* FPGA configuration Support */ #define CONFIG_CMD_IRQ -#define CONFIG_CMD_ITEST /* Integer (and string) test */ -#define CONFIG_CMD_LOADB /* loadb */ -#define CONFIG_CMD_LOADS /* loads */ +#define CONFIG_CMD_ITEST /* Integer (and string) test */ +#define CONFIG_CMD_LOADB /* loadb */ +#define CONFIG_CMD_LOADS /* loads */ #define CONFIG_CMD_MISC /* Misc functions like sleep etc */ #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_RUN /* run command in env variable */ -#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ -#define CONFIG_CMD_XIMG /* Load part of Multi Image */ +#define CONFIG_CMD_RUN /* run command in env variable */ +#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_SOURCE /* "source" command support */ +#define CONFIG_CMD_XIMG /* Load part of Multi Image */ /* * Autobooting diff --git a/include/configs/gth2.h b/include/configs/gth2.h index b1b4842..677baea 100644 --- a/include/configs/gth2.h +++ b/include/configs/gth2.h @@ -90,18 +90,18 @@ #define CONFIG_CMD_IDE #define CONFIG_CMD_DHCP -#undef CONFIG_CMD_SAVEENV +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_BEDBUG +#undef CONFIG_CMD_ELF #undef CONFIG_CMD_FAT #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_BEDBUG +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_MII #undef CONFIG_CMD_NFS -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_SAVEENV +#undef CONFIG_CMD_SOURCE /* diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 2dacfb6..284672b 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -271,8 +271,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x03c00000 /* 4 ... 60 MB in DRAM */ -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ diff --git a/include/configs/impa7.h b/include/configs/impa7.h index a3d023f..c7001cc 100644 --- a/include/configs/impa7.h +++ b/include/configs/impa7.h @@ -54,6 +54,7 @@ /* * select serial console configuration */ +#define CONFIG_CLPS7111_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ @@ -106,8 +107,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc1000000 /* default load address */ #define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */ diff --git a/include/configs/innokom.h b/include/configs/innokom.h index 043ae2f..895998a 100644 --- a/include/configs/innokom.h +++ b/include/configs/innokom.h @@ -115,8 +115,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* load kernel to this address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 6ce3b4d..9231e64 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -102,7 +102,6 @@ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ /*----------------------------------------------------------------------- diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 5b4747a..b4219d0 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -121,7 +121,6 @@ SIB at Block62 End Block62 address 0x24f80000 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ /*----------------------------------------------------------------------- diff --git a/include/configs/ixdp425.h b/include/configs/ixdp425.h index 70f3987..768e836 100644 --- a/include/configs/ixdp425.h +++ b/include/configs/ixdp425.h @@ -104,8 +104,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */ #define CONFIG_SYS_HZ 3333333 /* spec says 66.666 MHz, but it appears to be 33 */ diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h index 193008e..75707e5 100644 --- a/include/configs/ixdpg425.h +++ b/include/configs/ixdpg425.h @@ -115,7 +115,6 @@ #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ #define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ /* valid baudrates */ diff --git a/include/configs/keymile-common.h b/include/configs/keymile-common.h index 58b95f4..b2e37ec 100644 --- a/include/configs/keymile-common.h +++ b/include/configs/keymile-common.h @@ -240,7 +240,7 @@ "new_esw_0x${IVM_BoardId}_0x${IVM_HWKey}.scr \0" \ "new_esw=run set_new_esw_script; " \ "tftp ${autoscr_ws} ${new_esw_script}; " \ - "iminfo ${autoscr_ws}; autoscr ${autoscr_ws} \0" \ + "iminfo ${autoscr_ws}; source ${autoscr_ws} \0" \ "bootlimit=0 \0" \ CONFIG_KM_DEF_ENV_IOMUX \ CONFIG_KM_DEF_ENV_PRIVATE \ diff --git a/include/configs/lart.h b/include/configs/lart.h index 38b8e75..e34ec22 100644 --- a/include/configs/lart.h +++ b/include/configs/lart.h @@ -52,6 +52,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on LART */ /* allow to overwrite serial and ethaddr */ @@ -102,8 +103,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc8000000 /* default load address */ #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/configs/logodl.h b/include/configs/logodl.h index cd105da..9afa800 100644 --- a/include/configs/logodl.h +++ b/include/configs/logodl.h @@ -108,8 +108,6 @@ #define CONFIG_SYS_MEMTEST_START 0x08000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0800ffff /* 64 KiB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x08000000 /* load kernel to this address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/lpc2292sodimm.h b/include/configs/lpc2292sodimm.h index 563d35b..1515038 100644 --- a/include/configs/lpc2292sodimm.h +++ b/include/configs/lpc2292sodimm.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_LPC2292_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ @@ -106,8 +107,6 @@ #define CONFIG_SYS_MEMTEST_START 0x40000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x40000000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00040000 /* default load address for */ /* armadillo: kernel img is here*/ diff --git a/include/configs/lpd7a400.h b/include/configs/lpd7a400.h index 575f2a1..b1bd74f 100644 --- a/include/configs/lpd7a400.h +++ b/include/configs/lpd7a400.h @@ -99,8 +99,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0300000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0500000 /* 2 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc0f00000 /* default load address */ /* valid baudrates */ diff --git a/include/configs/lpd7a404.h b/include/configs/lpd7a404.h index 3e726a0..b197674 100644 --- a/include/configs/lpd7a404.h +++ b/include/configs/lpd7a404.h @@ -99,8 +99,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0300000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0500000 /* 2 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc0f00000 /* default load address */ /* valid baudrates */ diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h index 69774d7..a4b430b 100644 --- a/include/configs/lubbock.h +++ b/include/configs/lubbock.h @@ -122,8 +122,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/lwmon.h b/include/configs/lwmon.h index d52a5e0..8f00773 100644 --- a/include/configs/lwmon.h +++ b/include/configs/lwmon.h @@ -93,7 +93,7 @@ * 3 = 0x3C+0x3F = F3 + F6 : enable test mode */ -#define CONFIG_BOOTCOMMAND "autoscr 40040000;saveenv" +#define CONFIG_BOOTCOMMAND "source 40040000;saveenv" /* "gatewayip=10.8.211.250\0" \ */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -108,7 +108,7 @@ "key_magic2=3A+3C\0" \ "key_cmd2=echo *** Entering Update Mode ***;" \ "if fatload ide 0:3 10000 update.scr;" \ - "then autoscr 10000;" \ + "then source 10000;" \ "else echo *** UPDATE FAILED ***;" \ "fi\0" \ "key_magic3=3C+3F\0" \ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 05055c8..777a4d6 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -313,7 +313,7 @@ "cp.b 200000 FFF80000 80000\0" \ "upd=run load update\0" \ "lwe_env=tftp 200000 /tftpboot.dev/lwmon5/env_uboot.bin;" \ - "autoscr 200000\0" \ + "source 200000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" diff --git a/include/configs/modnet50.h b/include/configs/modnet50.h index 27213a8..74bab5f 100644 --- a/include/configs/modnet50.h +++ b/include/configs/modnet50.h @@ -56,6 +56,7 @@ /* * select serial console configuration */ +#define CONFIG_NETARM_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ @@ -111,8 +112,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00500000 /* default load address */ #define CONFIG_SYS_HZ 900 /* decrementer freq: 2 kHz */ diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index 9ac7e9a..edaa174 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -163,15 +163,15 @@ #else - #define CONFIG_CMD_USB #define CONFIG_CMD_CACHE + #define CONFIG_CMD_USB - #undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_BDI #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_IMI #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_MISC + #undef CONFIG_CMD_SOURCE #endif diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h index f136b0c..12e567b 100644 --- a/include/configs/mx1ads.h +++ b/include/configs/mx1ads.h @@ -40,6 +40,7 @@ /* * Select serial console configuration */ +#define CONFIG_IMX_SERIAL #define CONFIG_IMX_SERIAL1 /* internal uart 1 */ /* #define _CONFIG_UART2 */ /* internal uart 2 */ /* #define CONFIG_SILENT_CONSOLE */ /* use this to disable output */ @@ -133,7 +134,6 @@ #define CONFIG_SYS_MEMTEST_START 0x09000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0AF00000 /* 63 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_LOAD_ADDR 0x08800000 /* default load address */ /*#define CONFIG_SYS_HZ 1000 */ #define CONFIG_SYS_HZ 3686400 diff --git a/include/configs/mx1fs2.h b/include/configs/mx1fs2.h index a19eb78..24fa144 100644 --- a/include/configs/mx1fs2.h +++ b/include/configs/mx1fs2.h @@ -51,12 +51,12 @@ #define CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_NET #undef CONFIG_CMD_PING -#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_SOURCE /* @@ -80,8 +80,6 @@ #define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */ #define CONFIG_SYS_MEMTEST_END 0x08F00000 -#undef CONFIG_SYS_CLKS_IN_HZ /* use HZ for freq. display */ - #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ #define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */ @@ -291,11 +289,12 @@ 0x000b00b ->3<- -> 64MHz/4=16MHz */ #ifdef _CONFIG_UART1 +#define CONFIG_IMX_SERIAL #define CONFIG_IMX_SERIAL1 #elif defined _CONFIG_UART2 +#define CONFIG_IMX_SERIAL #define CONFIG_IMX_SERIAL2 #elif defined _CONFIG_UART3 | defined _CONFIG_UART4 -#define CONFIG_IMX_SERIAL_NONE #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK 3686400 diff --git a/include/configs/netstar.h b/include/configs/netstar.h index 0b38549..39560de 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -59,16 +59,6 @@ #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -/* - * FLASH organization - */ -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define PHYS_FLASH_1_SIZE (1 * 1024 * 1024) -#define CONFIG_SYS_MAX_FLASH_SECT 19 -#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* in ticks */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) - #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) @@ -106,10 +96,28 @@ #define CONFIG_DRIVER_SMC91111 #define CONFIG_SMC91111_BASE 0x04000300 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 19 + +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_FLASH_CFI_LEGACY +#define CONFIG_SYS_FLASH_LEGACY_512Kx16 + #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23) #define NAND_ALLOW_ERASE_ALL 1 +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_DRIVER_OMAP1510_I2C + +#define CONFIG_RTC_DS1307 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 + #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 @@ -133,6 +141,7 @@ */ #define CONFIG_CMD_BDI #define CONFIG_CMD_BOOTD +#define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_SAVEENV #define CONFIG_CMD_FLASH @@ -211,16 +220,14 @@ #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \ (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE) -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */ /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. * This time is further subdivided by a local divisor. */ #define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(pvt+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) #define OMAP5910_DPLL_DIV 1 #define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \ diff --git a/include/configs/nmdk8815.h b/include/configs/nmdk8815.h index 543780d..6d7b94f 100644 --- a/include/configs/nmdk8815.h +++ b/include/configs/nmdk8815.h @@ -96,7 +96,6 @@ /* timing informazion */ #define CONFIG_SYS_HZ (2400000 / 256) /* Timer0: 2.4Mhz + divider */ #define CONFIG_SYS_TIMERBASE 0x101E2000 -#undef CONFIG_SYS_CLKS_IN_HZ /* serial port (PL011) configuration */ #define CONFIG_PL011_SERIAL diff --git a/include/configs/ns9750dev.h b/include/configs/ns9750dev.h index b22c33c..79dcd64 100644 --- a/include/configs/ns9750dev.h +++ b/include/configs/ns9750dev.h @@ -122,8 +122,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00780000 /* 7,5 MB in DRAM */ /* @TODO */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00600000 /* default load address */ /* @TODO */ #define CONFIG_SYS_HZ (CPU_CLK_FREQ/64) diff --git a/include/configs/omap1510inn.h b/include/configs/omap1510inn.h index c7d1b6c..6c1c5ec 100644 --- a/include/configs/omap1510inn.h +++ b/include/configs/omap1510inn.h @@ -130,16 +130,14 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. * This time is further subdivided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */ +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap1610h2.h b/include/configs/omap1610h2.h index e2a6360..42e0198 100644 --- a/include/configs/omap1610h2.h +++ b/include/configs/omap1610h2.h @@ -125,16 +125,14 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by * DPLL1. This time is further subdivided by a local divisor. */ #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap1610inn.h b/include/configs/omap1610inn.h index 5dcfce1..22c873e 100644 --- a/include/configs/omap1610inn.h +++ b/include/configs/omap1610inn.h @@ -130,16 +130,14 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by * DPLL1. This time is further subdivided by a local divisor. */ #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 983b5f2..1803b13 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -135,7 +135,7 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 - #undef CONFIG_CMD_AUTOSCRIPT + #undef CONFIG_CMD_SOURCE #endif @@ -216,22 +216,20 @@ #define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) /* memtest works on */ #define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M) -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) /* default load address */ /* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ #ifdef CONFIG_APTIX -#define V_PVT 3 +#define V_PTV 3 #else -#define V_PVT 7 /* use with 12MHz/128 */ +#define V_PTV 7 /* use with 12MHz/128 */ #endif -#define CONFIG_SYS_TIMERBASE OMAP2420_GPT2 -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_TIMERBASE OMAP2420_GPT2 +#define CONFIG_SYS_PTV V_PTV /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 0f9344b..5a948e4 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -174,7 +174,7 @@ "rootfstype=jffs2\0" \ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ - "autoscr ${loadaddr}\0" \ + "source ${loadaddr}\0" \ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ @@ -219,8 +219,6 @@ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ /* load address */ @@ -228,11 +226,9 @@ * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index f4498a9..8cd8a1b 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -167,7 +167,7 @@ "rootfstype=jffs2\0" \ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ - "autoscr ${loadaddr}\0" \ + "source ${loadaddr}\0" \ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ @@ -212,9 +212,6 @@ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */ - /* in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ @@ -222,11 +219,9 @@ * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index dee0417..51b04b6 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -161,7 +161,7 @@ "rootfstype=jffs2\0" \ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ - "autoscr ${loadaddr}\0" \ + "source ${loadaddr}\0" \ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ @@ -206,9 +206,6 @@ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */ - /* in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ @@ -216,11 +213,9 @@ * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 00c0374..40107a6 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -163,7 +163,7 @@ "rootfstype=jffs2\0" \ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ - "autoscr ${loadaddr}\0" \ + "source ${loadaddr}\0" \ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ @@ -208,9 +208,6 @@ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */ - /* in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ @@ -218,11 +215,9 @@ * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index f8ae163..c60778c 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -171,7 +171,7 @@ "rootfstype=jffs2\0" \ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ - "autoscr ${loadaddr}\0" \ + "source ${loadaddr}\0" \ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ @@ -216,8 +216,6 @@ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ /* load address */ @@ -225,11 +223,9 @@ * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h index 63cd9c6..d0ce9dc 100644 --- a/include/configs/omap5912osk.h +++ b/include/configs/omap5912osk.h @@ -134,16 +134,14 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by * DPLL1. This time is further subdivided by a local divisor. */ #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap730p2.h b/include/configs/omap730p2.h index 166d592..32a9b23 100644 --- a/include/configs/omap730p2.h +++ b/include/configs/omap730p2.h @@ -142,18 +142,15 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The OMAP730 has 3 general purpose MPU timers, they can be driven by * the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a * local divisor. */ - -#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index 4da401f..edaa81b 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -117,7 +117,6 @@ #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ #define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h index 59741a9..ab9ea4f 100644 --- a/include/configs/pleb2.h +++ b/include/configs/pleb2.h @@ -122,8 +122,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index d1c2c65..5e2e7cf 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -236,8 +236,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa0800000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h index bf4a14e..af00187 100644 --- a/include/configs/sbc2410x.h +++ b/include/configs/sbc2410x.h @@ -70,6 +70,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SBC2410X */ /************************************************************ @@ -135,8 +136,6 @@ #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */ /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ @@ -200,6 +199,7 @@ * NAND flash settings */ #if defined(CONFIG_CMD_NAND) +#define CONFIG_NAND_S3C2410 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index db1d4ac..d0338f1 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -569,7 +569,8 @@ #define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP) /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */ -#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE | \ + BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT7L (0) diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 5b68ef9..97e1da2 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -122,7 +122,7 @@ "rootpath=/opt/eldk/ppc_4xx\0" \ "bootfile=/tftpboot/sc3/uImage\0" \ "u-boot=/tftpboot/sc3/u-boot.bin\0" \ - "setup=tftp 200000 /tftpboot/sc3/setup.img;autoscr 200000\0" \ + "setup=tftp 200000 /tftpboot/sc3/setup.img;source 200000\0" \ "kernel_addr=FFE08000\0" \ "" #undef CONFIG_BOOTCOMMAND @@ -186,20 +186,20 @@ #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT -#define CONFIG_CMD_PCI -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_NET -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#define CONFIG_CMD_NAND -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_I2C -#define CONFIG_CMD_IDE +#define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_CACHE #define CONFIG_CMD_ELF +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IDE +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NET +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_SOURCE #undef CONFIG_WATCHDOG /* watchdog disabled */ diff --git a/include/configs/sc520_cdp.h b/include/configs/sc520_cdp.h index 960350c..3e2bb02 100644 --- a/include/configs/sc520_cdp.h +++ b/include/configs/sc520_cdp.h @@ -116,8 +116,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */ diff --git a/include/configs/sc520_spunk.h b/include/configs/sc520_spunk.h index 2445a34..d42ef84 100644 --- a/include/configs/sc520_spunk.h +++ b/include/configs/sc520_spunk.h @@ -117,8 +117,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */ diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index 5971df7..893c3d3 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -29,6 +29,7 @@ #define CONFIG_SCB9328 1 /* on a scb9328tronix board */ #undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */ +#define CONFIG_IMX_SERIAL #define CONFIG_IMX_SERIAL1 /* * Select serial console configuration @@ -53,9 +54,9 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE /* @@ -86,8 +87,6 @@ #define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */ #define CONFIG_SYS_MEMTEST_END 0x08F00000 -#undef CONFIG_SYS_CLKS_IN_HZ /* use HZ for freq. display */ - #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ #define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */ diff --git a/include/configs/shannon.h b/include/configs/shannon.h index 75ba34c..c8b0b16 100644 --- a/include/configs/shannon.h +++ b/include/configs/shannon.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL3 1 /* we use SERIAL 3 */ /* allow to overwrite serial and ethaddr */ @@ -105,8 +106,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xd0000000 /* default load address */ #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/configs/smdk2400.h b/include/configs/smdk2400.h index 6388be4..ffdf217 100644 --- a/include/configs/smdk2400.h +++ b/include/configs/smdk2400.h @@ -63,6 +63,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SAMSUNG */ #undef CONFIG_HWFLOW /* include RTS/CTS flow control support */ @@ -137,8 +138,6 @@ #define CONFIG_SYS_MEMTEST_START 0x0c000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0e000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x0cf00000 /* default load address */ /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h index ecd958b..fb43706 100644 --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -60,6 +60,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */ /************************************************************ @@ -120,8 +121,6 @@ #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */ /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 06d6a88..d3cf6e5 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -288,6 +288,7 @@ #if !defined(CONFIG_ENABLE_MMU) #define CONFIG_CMD_USB 1 +#define CONFIG_USB_S3C64XX #define CONFIG_USB_OHCI_NEW 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400" diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 5a5f772..147233d 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -68,7 +68,7 @@ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \ "bootm" -#define CONFIG_AUTOSCRIPT +#define CONFIG_SOURCE #define CONFIG_LOADS_ECHO 0 /* echo off for serial download */ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */ diff --git a/include/configs/trab.h b/include/configs/trab.h index 8f13c35..520fe36 100644 --- a/include/configs/trab.h +++ b/include/configs/trab.h @@ -111,6 +111,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */ #define CONFIG_HWFLOW /* include RTS/CTS flow control support */ @@ -316,8 +317,6 @@ #define CONFIG_SYS_MEMTEST_START 0x0C000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x0CF00000 /* default load address */ #ifdef CONFIG_TRAB_50MHZ diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h index 70e5ce9..c2744b5 100644 --- a/include/configs/trizepsiv.h +++ b/include/configs/trizepsiv.h @@ -163,8 +163,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa1000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/vct.h b/include/configs/vct.h index 5371e2d..d202522 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -301,38 +301,38 @@ int vct_gpio_get(int pin); * (NOR/OneNAND) usage and Linux kernel booting. */ #if defined(CONFIG_VCT_SMALL_IMAGE) +#undef CONFIG_CMD_ASKENV +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_BEDBUG +#undef CONFIG_CMD_CACHE +#undef CONFIG_CMD_CONSOLE +#undef CONFIG_CMD_CRC32 +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_EEPROM #undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_PING -#undef CONFIG_CMD_SNTP #undef CONFIG_CMD_ELF -#undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_CACHE -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FAT +#undef CONFIG_CMD_I2C +#undef CONFIG_CMD_I2C #undef CONFIG_CMD_IRQ #undef CONFIG_CMD_ITEST +#undef CONFIG_CMD_LOADB +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_LOADY #undef CONFIG_CMD_MII #undef CONFIG_CMD_MISC +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_PING #undef CONFIG_CMD_REGINFO +#undef CONFIG_CMD_SNTP +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_STRINGS #undef CONFIG_CMD_TERMINAL -#undef CONFIG_CMD_ASKENV -#undef CONFIG_CMD_CRC32 -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_LOADY -#undef CONFIG_CMD_BDI #undef CONFIG_CMD_USB -#undef CONFIG_CMD_FAT #undef CONFIG_DRIVER_SMC911X #undef CONFIG_SOFT_I2C -#undef CONFIG_AUTOSCRIPT +#undef CONFIG_SOURCE #undef CONFIG_SYS_LONGHELP #undef CONFIG_TIMESTAMP #endif /* CONFIG_VCT_SMALL_IMAGE */ diff --git a/include/configs/versatile.h b/include/configs/versatile.h index 852becb..8f6383b 100644 --- a/include/configs/versatile.h +++ b/include/configs/versatile.h @@ -144,7 +144,6 @@ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ /*----------------------------------------------------------------------- diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h index cadd906..3f97843 100644 --- a/include/configs/voiceblue.h +++ b/include/configs/voiceblue.h @@ -210,14 +210,12 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - PHYS_SDRAM_1_RESERVED -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. * This time is further subdivided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) #define OMAP5910_DPLL_DIV 1 #define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \ diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h index d0afd29..e74303d 100644 --- a/include/configs/wepep250.h +++ b/include/configs/wepep250.h @@ -49,10 +49,10 @@ */ #include <config_cmd_default.h> -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_SOURCE /* @@ -79,8 +79,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest test area */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 -#undef CONFIG_SYS_CLKS_IN_HZ /* use HZ for freq. display */ - #define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */ diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h index 250247c..086ca69 100644 --- a/include/configs/xaeniax.h +++ b/include/configs/xaeniax.h @@ -134,8 +134,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa1000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/xm250.h b/include/configs/xm250.h index 8e9d5ab..922eb2c 100644 --- a/include/configs/xm250.h +++ b/include/configs/xm250.h @@ -117,8 +117,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h index 5d13f96..cad414c 100644 --- a/include/configs/xsengine.h +++ b/include/configs/xsengine.h @@ -139,7 +139,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ #define CONFIG_SYS_MEMTEST_START 0xA0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xA0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* valid baudrates */ #define CONFIG_SYS_LOAD_ADDR 0xA0000000 /* load kernel to this address */ diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h index 6febeea..064740d 100644 --- a/include/configs/zylonite.h +++ b/include/configs/zylonite.h @@ -139,8 +139,6 @@ #define CONFIG_SYS_MEMTEST_START 0x9c000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x9c400000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/ns16550.h b/include/ns16550.h index edfbc53..87624bf 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -1,6 +1,10 @@ /* * NS16550 Serial Port * originally from linux source (arch/ppc/boot/ns16550.h) + * + * Cleanup and unification + * (C) 2009 by Detlev Zundel, DENX Software Engineering GmbH + * * modified slightly to * have addresses as offsets from CONFIG_SYS_ISA_BASE * added a few more definitions @@ -115,53 +119,100 @@ struct NS16550 { typedef volatile struct NS16550 *NS16550_t; -#define FCR_FIFO_EN 0x01 /* Fifo enable */ -#define FCR_RXSR 0x02 /* Receiver soft reset */ -#define FCR_TXSR 0x04 /* Transmitter soft reset */ - -#define MCR_DTR 0x01 -#define MCR_RTS 0x02 -#define MCR_DMA_EN 0x04 -#define MCR_TX_DFR 0x08 -#define MCR_LOOP 0x10 /* Enable loopback test mode */ - -#define LCR_WLS_MSK 0x03 /* character length select mask */ -#define LCR_WLS_5 0x00 /* 5 bit character length */ -#define LCR_WLS_6 0x01 /* 6 bit character length */ -#define LCR_WLS_7 0x02 /* 7 bit character length */ -#define LCR_WLS_8 0x03 /* 8 bit character length */ -#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ -#define LCR_PEN 0x08 /* Parity eneble */ -#define LCR_EPS 0x10 /* Even Parity Select */ -#define LCR_STKP 0x20 /* Stick Parity */ -#define LCR_SBRK 0x40 /* Set Break */ -#define LCR_BKSE 0x80 /* Bank select enable */ -#define LCR_DLAB 0x80 /* Divisor latch access bit */ - -#define LSR_DR 0x01 /* Data ready */ -#define LSR_OE 0x02 /* Overrun */ -#define LSR_PE 0x04 /* Parity error */ -#define LSR_FE 0x08 /* Framing error */ -#define LSR_BI 0x10 /* Break */ -#define LSR_THRE 0x20 /* Xmit holding register empty */ -#define LSR_TEMT 0x40 /* Xmitter empty */ -#define LSR_ERR 0x80 /* Error */ - -#define MSR_DCD 0x80 /* Data Carrier Detect */ -#define MSR_RI 0x40 /* Ring Indicator */ -#define MSR_DSR 0x20 /* Data Set Ready */ -#define MSR_CTS 0x10 /* Clear to Send */ -#define MSR_DDCD 0x08 /* Delta DCD */ -#define MSR_TERI 0x04 /* Trailing edge ring indicator */ -#define MSR_DDSR 0x02 /* Delta DSR */ -#define MSR_DCTS 0x01 /* Delta CTS */ +/* + * These are the definitions for the FIFO Control Register + */ +#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ +#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ +#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ +#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ +#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ +#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ +#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ +#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ +#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ + +#define UART_FCR_RXSR 0x02 /* Receiver soft reset */ +#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ + +/* + * These are the definitions for the Modem Control Register + */ +#define UART_MCR_DTR 0x01 /* DTR */ +#define UART_MCR_RTS 0x02 /* RTS */ +#define UART_MCR_OUT1 0x04 /* Out 1 */ +#define UART_MCR_OUT2 0x08 /* Out 2 */ +#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ + +#define UART_MCR_DMA_EN 0x04 +#define UART_MCR_TX_DFR 0x08 + +/* + * These are the definitions for the Line Control Register + * + * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting + * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. + */ +#define UART_LCR_WLS_MSK 0x03 /* character length select mask */ +#define UART_LCR_WLS_5 0x00 /* 5 bit character length */ +#define UART_LCR_WLS_6 0x01 /* 6 bit character length */ +#define UART_LCR_WLS_7 0x02 /* 7 bit character length */ +#define UART_LCR_WLS_8 0x03 /* 8 bit character length */ +#define UART_LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ +#define UART_LCR_PEN 0x08 /* Parity eneble */ +#define UART_LCR_EPS 0x10 /* Even Parity Select */ +#define UART_LCR_STKP 0x20 /* Stick Parity */ +#define UART_LCR_SBRK 0x40 /* Set Break */ +#define UART_LCR_BKSE 0x80 /* Bank select enable */ +#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ + +/* + * These are the definitions for the Line Status Register + */ +#define UART_LSR_DR 0x01 /* Data ready */ +#define UART_LSR_OE 0x02 /* Overrun */ +#define UART_LSR_PE 0x04 /* Parity error */ +#define UART_LSR_FE 0x08 /* Framing error */ +#define UART_LSR_BI 0x10 /* Break */ +#define UART_LSR_THRE 0x20 /* Xmit holding register empty */ +#define UART_LSR_TEMT 0x40 /* Xmitter empty */ +#define UART_LSR_ERR 0x80 /* Error */ + +#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ +#define UART_MSR_RI 0x40 /* Ring Indicator */ +#define UART_MSR_DSR 0x20 /* Data Set Ready */ +#define UART_MSR_CTS 0x10 /* Clear to Send */ +#define UART_MSR_DDCD 0x08 /* Delta DCD */ +#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ +#define UART_MSR_DDSR 0x02 /* Delta DSR */ +#define UART_MSR_DCTS 0x01 /* Delta CTS */ + +/* + * These are the definitions for the Interrupt Identification Register + */ +#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ +#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ + +#define UART_IIR_MSI 0x00 /* Modem status interrupt */ +#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ +#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ +#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ + +/* + * These are the definitions for the Interrupt Enable Register + */ +#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ +#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ +#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ +#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ + #ifdef CONFIG_OMAP1510 -#define OSC_12M_SEL 0x01 /* selects 6.5 * current clk div */ +#define OSC_12M_SEL 0x01 /* selects 6.5 * current clk div */ #endif /* useful defaults for LCR */ -#define LCR_8N1 0x03 +#define UART_LCR_8N1 0x03 void NS16550_init (NS16550_t com_port, int baud_divisor); void NS16550_putc (NS16550_t com_port, char c); diff --git a/include/ps2mult.h b/include/ps2mult.h index 599cb6d..1a38733 100644 --- a/include/ps2mult.h +++ b/include/ps2mult.h @@ -53,103 +53,4 @@ struct serial_state { u8 *iomem_base; }; -#define UART_RX 0 /* In: Receive buffer (DLAB=0) */ -#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */ -#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */ - -#define UART_DLM 1 /* Out: Divisor Latch High (DLAB=1) */ -#define UART_IER 1 /* Out: Interrupt Enable Register */ - -#define UART_IIR 2 /* In: Interrupt ID Register */ -#define UART_FCR 2 /* Out: FIFO Control Register */ - -#define UART_LCR 3 /* Out: Line Control Register */ -#define UART_MCR 4 /* Out: Modem Control Register */ -#define UART_LSR 5 /* In: Line Status Register */ -#define UART_MSR 6 /* In: Modem Status Register */ -#define UART_SCR 7 /* I/O: Scratch Register */ - -/* - * These are the definitions for the FIFO Control Register - * (16650 only) - */ -#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */ -#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ -#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ -#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ -#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ -#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ -#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ -#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ -#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ - -/* - * These are the definitions for the Line Control Register - * - * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting - * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. - */ -#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ -#define UART_LCR_SBC 0x40 /* Set break control */ -#define UART_LCR_SPAR 0x20 /* Stick parity (?) */ -#define UART_LCR_EPAR 0x10 /* Even parity select */ -#define UART_LCR_PARITY 0x08 /* Parity Enable */ -#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */ -#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */ -#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */ -#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ -#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ - -/* - * These are the definitions for the Line Status Register - */ -#define UART_LSR_TEMT 0x40 /* Transmitter empty */ -#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ -#define UART_LSR_BI 0x10 /* Break interrupt indicator */ -#define UART_LSR_FE 0x08 /* Frame error indicator */ -#define UART_LSR_PE 0x04 /* Parity error indicator */ -#define UART_LSR_OE 0x02 /* Overrun error indicator */ -#define UART_LSR_DR 0x01 /* Receiver data ready */ - -/* - * These are the definitions for the Interrupt Identification Register - */ -#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ -#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ - -#define UART_IIR_MSI 0x00 /* Modem status interrupt */ -#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ -#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ -#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ - -/* - * These are the definitions for the Interrupt Enable Register - */ -#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ -#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ -#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ -#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ - -/* - * These are the definitions for the Modem Control Register - */ -#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ -#define UART_MCR_OUT2 0x08 /* Out2 complement */ -#define UART_MCR_OUT1 0x04 /* Out1 complement */ -#define UART_MCR_RTS 0x02 /* RTS complement */ -#define UART_MCR_DTR 0x01 /* DTR complement */ - -/* - * These are the definitions for the Modem Status Register - */ -#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ -#define UART_MSR_RI 0x40 /* Ring Indicator */ -#define UART_MSR_DSR 0x20 /* Data Set Ready */ -#define UART_MSR_CTS 0x10 /* Clear to Send */ -#define UART_MSR_DDCD 0x08 /* Delta DCD */ -#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ -#define UART_MSR_DDSR 0x02 /* Delta DSR */ -#define UART_MSR_DCTS 0x01 /* Delta CTS */ -#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */ - #endif /* __LINUX_PS2MULT_H */ |