diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-mx50/mx50.h | 1 | ||||
-rw-r--r-- | include/asm-arm/arch-mx51/imx_fuse.h | 33 | ||||
-rw-r--r-- | include/asm-arm/imx_iim.h | 71 | ||||
-rw-r--r-- | include/configs/mx25_3stack.h | 3 | ||||
-rw-r--r-- | include/configs/mx50_arm2.h | 2 | ||||
-rw-r--r-- | include/configs/mx50_arm2_lpddr2.h | 2 | ||||
-rw-r--r-- | include/configs/mx51_3stack.h | 10 | ||||
-rw-r--r-- | include/configs/mx51_bbg.h | 12 | ||||
-rw-r--r-- | include/configs/mx53_arm2.h | 15 | ||||
-rw-r--r-- | include/configs/mx53_arm2_ddr3.h | 15 | ||||
-rw-r--r-- | include/configs/mx53_evk.h | 15 | ||||
-rw-r--r-- | include/net.h | 1 |
12 files changed, 141 insertions, 39 deletions
diff --git a/include/asm-arm/arch-mx50/mx50.h b/include/asm-arm/arch-mx50/mx50.h index da51cc3..d5e0d2c 100644 --- a/include/asm-arm/arch-mx50/mx50.h +++ b/include/asm-arm/arch-mx50/mx50.h @@ -42,6 +42,7 @@ #define CTI2_BASE_ADDR (DEBUG_BASE_ADDR + 0x00006000) #define CTI3_BASE_ADDR (DEBUG_BASE_ADDR + 0x00007000) #define CORTEX_DBG_BASE_ADDR (DEBUG_BASE_ADDR + 0x00008000) +#define OCOTP_CTRL_BASE_ADDR (DEBUG_BASE_ADDR + 0x01002000) /* * SPBA global module enabled #0 diff --git a/include/asm-arm/arch-mx51/imx_fuse.h b/include/asm-arm/arch-mx51/imx_fuse.h deleted file mode 100644 index 8a65613..0000000 --- a/include/asm-arm/arch-mx51/imx_fuse.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * (C) Copyright 2009-2010 Freescale Semiconductor, Inc. - * - * Configuration settings for the MX51-3Stack Freescale board. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _IMX_FUSE_H_ -#define _IMX_FUSE_H_ - -#define IIM_ERR_SHIFT 8 -#define POLL_FUSE_PRGD (IIM_STAT_PRGD | (IIM_ERR_PRGE << IIM_ERR_SHIFT)) -#define POLL_FUSE_SNSD (IIM_STAT_SNSD | (IIM_ERR_SNSE << IIM_ERR_SHIFT)) - -int fuse_read(int bank, char row); -int fuse_blow(int bank, int row, int val); -int fuse_blow_func(char *func_name, char *func_val); - -#endif diff --git a/include/asm-arm/imx_iim.h b/include/asm-arm/imx_iim.h new file mode 100644 index 0000000..d2ccd34 --- /dev/null +++ b/include/asm-arm/imx_iim.h @@ -0,0 +1,71 @@ +/* + * (C) Copyright 2009-2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __IMX_IIM_H__ +#define __IMX_IIM_H__ + +/* IIM Control Registers */ +struct iim_regs { +#define IIM_STAT_BUSY (1 << 7) +#define IIM_STAT_PRGD (1 << 1) +#define IIM_STAT_SNSD (1 << 0) + u32 stat; + u32 statm; +#define IIM_ERR_PRGE (1 << 7) +#define IIM_ERR_WPE (1 << 6) +#define IIM_ERR_OPE (1 << 5) +#define IIM_ERR_RPE (1 << 4) +#define IIM_ERR_WLRE (1 << 3) +#define IIM_ERR_SNSE (1 << 2) +#define IIM_ERR_PARITYE (1 << 1) + u32 err; + u32 emask; + u32 fctl; + u32 ua; + u32 la; + u32 sdat; + u32 prev; + u32 srev; + u32 preg_p; + u32 scs0; + u32 scs1; + u32 scs2; + u32 scs3; +}; + +#define IIM_PROD_REV_SH 3 +#define IIM_PROD_REV_LEN 5 +#define IIM_SREV_REV_SH 4 +#define IIM_SREV_REV_LEN 4 +#define PROD_SIGNATURE_MX51 0x1 + +#define IIM_ERR_SHIFT 8 +#define POLL_FUSE_PRGD (IIM_STAT_PRGD | (IIM_ERR_PRGE << IIM_ERR_SHIFT)) +#define POLL_FUSE_SNSD (IIM_STAT_SNSD | (IIM_ERR_SNSE << IIM_ERR_SHIFT)) + +#define IIM_BANK_AREA_0_OFFSET 0x800 +#define IIM_BANK_AREA_1_OFFSET 0xc00 +#define IIM_BANK_AREA_2_OFFSET 0x1000 +#define IIM_BANK_AREA_3_OFFSET 0x1400 + +int iim_read(int bank, char row); +int iim_blow(int bank, int row, int val); +int iim_blow_func(char *func_name, char *func_val); + +#endif diff --git a/include/configs/mx25_3stack.h b/include/configs/mx25_3stack.h index 9a6391c..e8383c2 100644 --- a/include/configs/mx25_3stack.h +++ b/include/configs/mx25_3stack.h @@ -165,6 +165,9 @@ #define CONFIG_MII_GASKET #define CONFIG_DISCOVER_PHY +#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM +#define CONFIG_IIM_MAC_ADDR_OFFSET 0x68 + #define CONFIG_FEC0_IOBASE FEC_BASE #define CONFIG_FEC0_PINMUX -1 #define CONFIG_FEC0_PHY_ADDR 0x1F diff --git a/include/configs/mx50_arm2.h b/include/configs/mx50_arm2.h index 4f3a6ff..5a5b0f8 100644 --- a/include/configs/mx50_arm2.h +++ b/include/configs/mx50_arm2.h @@ -155,6 +155,8 @@ #define CONFIG_FEC0_PHY_ADDR -1 #define CONFIG_FEC0_MIIBASE -1 +#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM + #define CONFIG_MXC_FEC #define CONFIG_MII #define CONFIG_MII_GASKET diff --git a/include/configs/mx50_arm2_lpddr2.h b/include/configs/mx50_arm2_lpddr2.h index 548629e..47801f6 100644 --- a/include/configs/mx50_arm2_lpddr2.h +++ b/include/configs/mx50_arm2_lpddr2.h @@ -156,6 +156,8 @@ #define CONFIG_FEC0_PHY_ADDR -1 #define CONFIG_FEC0_MIIBASE -1 +#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM + #define CONFIG_MXC_FEC #define CONFIG_MII #define CONFIG_MII_GASKET diff --git a/include/configs/mx51_3stack.h b/include/configs/mx51_3stack.h index 354523c..e628ede 100644 --- a/include/configs/mx51_3stack.h +++ b/include/configs/mx51_3stack.h @@ -98,12 +98,17 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_NET #define CONFIG_CMD_MMC -#define CONFIG_CMD_FUSE +#define CONFIG_CMD_IIM /* * FUSE Configs * */ -#define CONFIG_IMX_FUSE +#ifdef CONFIG_CMD_IIM + #define CONFIG_IMX_IIM + #define IMX_IIM_BASE IIM_BASE_ADDR + #define CONFIG_IIM_MAC_BANK 1 + #define CONFIG_IIM_MAC_ROW 9 +#endif /* * MMC Configs @@ -112,7 +117,6 @@ #define CONFIG_MMC 1 #define CONFIG_GENERIC_MMC #define CONFIG_IMX_MMC - #define CONFIG_SYS_FSL_ESDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_DOS_PARTITION 1 diff --git a/include/configs/mx51_bbg.h b/include/configs/mx51_bbg.h index 76d718e..c240ada 100644 --- a/include/configs/mx51_bbg.h +++ b/include/configs/mx51_bbg.h @@ -94,13 +94,18 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_SF #define CONFIG_CMD_MMC -#define CONFIG_CMD_FUSE +#define CONFIG_CMD_IIM #define CONFIG_CMD_I2C /* * FUSE Configs * */ -#define CONFIG_IMX_FUSE +#ifdef CONFIG_CMD_IIM + #define CONFIG_IMX_IIM + #define IMX_IIM_BASE IIM_BASE_ADDR + #define CONFIG_IIM_MAC_BANK 1 + #define CONFIG_IIM_MAC_ROW 9 +#endif /* * SPI Configs @@ -152,6 +157,9 @@ #define CONFIG_MII #define CONFIG_DISCOVER_PHY +#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM +#define CONFIG_IIM_MAC_ADDR_OFFSET 0x24 + #define CONFIG_FEC0_IOBASE FEC_BASE_ADDR #define CONFIG_FEC0_PINMUX -1 #define CONFIG_FEC0_PHY_ADDR 0x1F diff --git a/include/configs/mx53_arm2.h b/include/configs/mx53_arm2.h index 0af93c9..f94191d 100644 --- a/include/configs/mx53_arm2.h +++ b/include/configs/mx53_arm2.h @@ -97,6 +97,8 @@ #define CONFIG_CMD_MMC #define CONFIG_CMD_ENV +#define CONFIG_CMD_IIM + #define CONFIG_CMD_CLOCK #define CONFIG_REF_CLK_FREQ CONFIG_MX53_HCLK_FREQ @@ -158,12 +160,25 @@ #define CONFIG_FEC0_PHY_ADDR -1 #define CONFIG_FEC0_MIIBASE -1 +#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM +#define CONFIG_IIM_MAC_ADDR_OFFSET 0x24 + #define CONFIG_MXC_FEC #define CONFIG_MII #define CONFIG_MII_GASKET #define CONFIG_DISCOVER_PHY /* + * FUSE Configs + * */ +#ifdef CONFIG_CMD_MMC + #define CONFIG_IMX_IIM + #define IMX_IIM_BASE IIM_BASE_ADDR + #define CONFIG_IIM_MAC_BANK 1 + #define CONFIG_IIM_MAC_ROW 9 +#endif + +/* * I2C Configs */ #define CONFIG_CMD_I2C 1 diff --git a/include/configs/mx53_arm2_ddr3.h b/include/configs/mx53_arm2_ddr3.h index 3b11e81..f4cd6ba 100644 --- a/include/configs/mx53_arm2_ddr3.h +++ b/include/configs/mx53_arm2_ddr3.h @@ -97,6 +97,8 @@ #define CONFIG_CMD_MMC #define CONFIG_CMD_ENV +#define CONFIG_CMD_IIM + #define CONFIG_CMD_CLOCK #define CONFIG_REF_CLK_FREQ CONFIG_MX53_HCLK_FREQ @@ -156,12 +158,25 @@ #define CONFIG_FEC0_PHY_ADDR -1 #define CONFIG_FEC0_MIIBASE -1 +#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM +#define CONFIG_IIM_MAC_ADDR_OFFSET 0x24 + #define CONFIG_MXC_FEC #define CONFIG_MII #define CONFIG_MII_GASKET #define CONFIG_DISCOVER_PHY /* + * FUSE Configs + * */ +#ifdef CONFIG_CMD_MMC + #define CONFIG_IMX_IIM + #define IMX_IIM_BASE IIM_BASE_ADDR + #define CONFIG_IIM_MAC_BANK 1 + #define CONFIG_IIM_MAC_ROW 9 +#endif + +/* * I2C Configs */ #define CONFIG_CMD_I2C 1 diff --git a/include/configs/mx53_evk.h b/include/configs/mx53_evk.h index 730f104..0b1e75e 100644 --- a/include/configs/mx53_evk.h +++ b/include/configs/mx53_evk.h @@ -93,7 +93,7 @@ #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_DNS - +#define CONFIG_CMD_IIM #define CONFIG_CMD_MMC #define CONFIG_CMD_ENV @@ -157,12 +157,25 @@ #define CONFIG_FEC0_PHY_ADDR -1 #define CONFIG_FEC0_MIIBASE -1 +#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM +#define CONFIG_IIM_MAC_ADDR_OFFSET 0x24 + #define CONFIG_MXC_FEC #define CONFIG_MII #define CONFIG_MII_GASKET #define CONFIG_DISCOVER_PHY /* + * FUSE Configs + * */ +#ifdef CONFIG_CMD_MMC + #define CONFIG_IMX_IIM + #define IMX_IIM_BASE IIM_BASE_ADDR + #define CONFIG_IIM_MAC_BANK 1 + #define CONFIG_IIM_MAC_ROW 9 +#endif + +/* * I2C Configs */ #define CONFIG_CMD_I2C 1 diff --git a/include/net.h b/include/net.h index 4873000..17279f7 100644 --- a/include/net.h +++ b/include/net.h @@ -105,6 +105,7 @@ struct eth_device { #ifdef CONFIG_MCAST_TFTP int (*mcast) (struct eth_device*, u32 ip, u8 set); #endif + int (*write_hwaddr) (struct eth_device *); struct eth_device *next; void *priv; }; |