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-rw-r--r--include/asm-ppc/processor.h13
-rw-r--r--include/configs/yellowstone.h14
-rw-r--r--include/configs/yosemite.h14
3 files changed, 36 insertions, 5 deletions
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index 6619686..f102600 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -747,11 +747,14 @@
#define PVR_440GX_RC 0x51B21892
#define PVR_440GX_RF 0x51B21894
#define PVR_405EP_RB 0x51210950
-#define PVR_440SP_RA 0x53221850
-#define PVR_440SP_RB 0x53221891
-#define PVR_440SP_RC 0x53221892
-#define PVR_440SPe_RA 0x53421890
-#define PVR_440SPe_RB 0x53421891
+#define PVR_440SP_6_RAB 0x53221850 /* 440SP rev A&B with RAID 6 support enabled */
+#define PVR_440SP_RAB 0x53321850 /* 440SP rev A&B without RAID 6 support */
+#define PVR_440SP_6_RC 0x53221891 /* 440SP rev C with RAID 6 support enabled */
+#define PVR_440SP_RC 0x53321891 /* 440SP rev C without RAID 6 support */
+#define PVR_440SPe_6_RA 0x53421890 /* 440SPe rev A with RAID 6 support enabled */
+#define PVR_440SPe_RA 0x53521890 /* 440SPe rev A without RAID 6 support */
+#define PVR_440SPe_6_RB 0x53421891 /* 440SPe rev B with RAID 6 support enabled */
+#define PVR_440SPe_RB 0x53521891 /* 440SPe rev B without RAID 6 support */
#define PVR_601 0x00010000
#define PVR_602 0x00050000
#define PVR_603 0x00030000
diff --git a/include/configs/yellowstone.h b/include/configs/yellowstone.h
index 58717f8..911a52d 100644
--- a/include/configs/yellowstone.h
+++ b/include/configs/yellowstone.h
@@ -302,6 +302,20 @@
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
+ * External Bus Controller (EBC) Setup
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH CFG_FLASH_BASE
+#define CFG_CPLD 0x80000000
+
+/* Memory Bank 0 (NOR-FLASH) initialization */
+#define CFG_EBC_PB0AP 0x03017300
+#define CFG_EBC_PB0CR (CFG_FLASH | 0xda000)
+
+/* Memory Bank 2 (CPLD) initialization */
+#define CFG_EBC_PB2AP 0x04814500
+#define CFG_EBC_PB2CR (CFG_CPLD | 0x18000)
+
+/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h
index 6e942ab..2cc18db 100644
--- a/include/configs/yosemite.h
+++ b/include/configs/yosemite.h
@@ -307,6 +307,20 @@
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
+ * External Bus Controller (EBC) Setup
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH CFG_FLASH_BASE
+#define CFG_CPLD 0x80000000
+
+/* Memory Bank 0 (NOR-FLASH) initialization */
+#define CFG_EBC_PB0AP 0x03017300
+#define CFG_EBC_PB0CR (CFG_FLASH | 0xda000)
+
+/* Memory Bank 2 (CPLD) initialization */
+#define CFG_EBC_PB2AP 0x04814500
+#define CFG_EBC_PB2CR (CFG_CPLD | 0x18000)
+
+/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */