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-rw-r--r--include/configs/qemu-ppce500.h206
1 files changed, 206 insertions, 0 deletions
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
new file mode 100644
index 0000000..10e014d
--- /dev/null
+++ b/include/configs/qemu-ppce500.h
@@ -0,0 +1,206 @@
+/*
+ * Copyright 2011-2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * Corenet DS style board configuration file
+ */
+#ifndef __QEMU_PPCE500_H
+#define __QEMU_PPCE500_H
+
+#define CONFIG_CMD_REGINFO
+
+/* High Level Configuration Options */
+#define CONFIG_BOOKE
+#define CONFIG_E500 /* BOOKE e500 family */
+#define CONFIG_QEMU_E500
+
+#undef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xf01000 /* 15 MB */
+
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+
+#define CONFIG_SYS_RAMBOOT
+
+#define CONFIG_PCI /* Enable PCI/PCIE */
+#define CONFIG_PCI1 1 /* PCI controller 1 */
+#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
+#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
+
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_ENABLE_36BIT_PHYS
+
+#define CONFIG_ADDR_MAP
+#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
+
+#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0x00400000
+#define CONFIG_SYS_ALT_MEMTEST
+#define CONFIG_PANIC_HANG /* do not reset board on panic */
+
+/* Needed to fill the ccsrbar pointer */
+#define CONFIG_BOARD_EARLY_INIT_F
+
+/* Virtual address to CCSRBAR */
+#define CONFIG_SYS_CCSRBAR 0xe0000000
+/* Physical address should be a function call */
+#ifndef __ASSEMBLY__
+extern unsigned long long get_phys_ccsrbar_addr_early(void);
+#endif
+#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
+
+/* Virtual address range for PCI region maps */
+#define CONFIG_SYS_PCI_MAP_START 0x80000000
+#define CONFIG_SYS_PCI_MAP_END 0xe8000000
+
+/* Virtual address to a temporary map if we need it (max 128MB) */
+#define CONFIG_SYS_TMPVIRT 0xe8000000
+
+/*
+ * DDR Setup
+ */
+#define CONFIG_VERY_BIG_RAM
+#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
+
+#define CONFIG_CHIP_SELECTS_PER_CTRL 0
+
+#define CONFIG_SYS_CLK_FREQ 33000000
+
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */
+
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_ENV_IS_NOWHERE
+
+#define CONFIG_HWCONFIG
+
+#define CONFIG_SYS_INIT_RAM_ADDR 0x00100000
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000
+/* The assembler doesn't like typecast */
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
+ ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
+
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
+
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
+
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
+
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT
+#define CONFIG_OF_BOARD_SETUP
+#define CONFIG_OF_STDOUT_VIA_ALIAS
+
+/* new uImage format support */
+#define CONFIG_FIT
+#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
+
+/*
+ * General PCI
+ * Memory space is mapped 1-1, but I/O space must start from 0.
+ */
+
+#ifdef CONFIG_PCI
+#define CONFIG_PCI_INDIRECT_BRIDGE
+#define CONFIG_NET_MULTI
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_E1000
+
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CONFIG_DOS_PARTITION
+#endif /* CONFIG_PCI */
+
+#define CONFIG_LBA48
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_EXT2
+
+/*
+ * Environment
+ */
+#define CONFIG_ENV_SIZE 0x2000
+
+#define CONFIG_LOADS_ECHO /* echo on for serial download */
+
+#define CONFIG_LAST_STAGE_INIT
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_GREPENV
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SETEXPR
+
+#ifdef CONFIG_PCI
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_NET
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_CMDLINE_EDITING /* Command-line editing */
+#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
+#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 64 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
+#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_ROOTPATH "/opt/nfsroot"
+#define CONFIG_BOOTFILE "uImage"
+#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
+
+/* default location for tftp and bootm */
+#define CONFIG_LOADADDR 1000000
+
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_BOOTDELAY 1
+#define CONFIG_BOOTCOMMAND \
+ "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
+
+#endif /* __QEMU_PPCE500_H */