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-rw-r--r--include/common.h12
-rw-r--r--include/configs/eNET.h24
-rw-r--r--include/configs/omap2420h4.h2
-rw-r--r--include/exports.h2
-rw-r--r--include/faraday/ftwdt010_wdt.h106
5 files changed, 133 insertions, 13 deletions
diff --git a/include/common.h b/include/common.h
index 54503ed..21c05db 100644
--- a/include/common.h
+++ b/include/common.h
@@ -180,11 +180,13 @@ typedef void (interrupt_handler_t)(void *);
* General Purpose Utilities
*/
#define min(X, Y) \
- ({ typeof (X) __x = (X), __y = (Y); \
+ ({ typeof (X) __x = (X); \
+ typeof (Y) __y = (Y); \
(__x < __y) ? __x : __y; })
#define max(X, Y) \
- ({ typeof (X) __x = (X), __y = (Y); \
+ ({ typeof (X) __x = (X); \
+ typeof (Y) __y = (Y); \
(__x > __y) ? __x : __y; })
#define MIN(x, y) min(x, y)
@@ -270,9 +272,9 @@ int setenv (char *, char *);
# include <asm/setup.h>
# include <asm/u-boot-arm.h> /* ARM version to be fixed! */
#endif /* CONFIG_ARM */
-#ifdef CONFIG_I386 /* x86 version to be fixed! */
-# include <asm/u-boot-i386.h>
-#endif /* CONFIG_I386 */
+#ifdef CONFIG_X86 /* x86 version to be fixed! */
+# include <asm/u-boot-x86.h>
+#endif /* CONFIG_X86 */
#ifdef CONFIG_AUTO_COMPLETE
int env_complete(char *var, int maxv, char *cmdv[], int maxsz, char *buf);
diff --git a/include/configs/eNET.h b/include/configs/eNET.h
index 34a9d68..548d52c 100644
--- a/include/configs/eNET.h
+++ b/include/configs/eNET.h
@@ -33,7 +33,6 @@
* High Level Configuration Options
* (easy to change)
*/
-#define CONFIG_X86
#define CONFIG_SYS_SC520
#define CONFIG_SYS_SC520_SSI
#define CONFIG_SHOW_BOOT_PROGRESS
@@ -158,16 +157,19 @@
/*-----------------------------------------------------------------------
* Memory organization:
* 32kB Stack
+ * 16kB Cache-As-RAM @ 0x19200000
* 256kB Monitor
+ * (128kB + Environment Sector Size) malloc pool
*/
-#define CONFIG_SYS_STACK_SIZE 0x8000
+#define CONFIG_SYS_STACK_SIZE (32 * 1024)
#define CONFIG_SYS_CAR_ADDR 0x19200000
-#define CONFIG_SYS_CAR_SIZE 0x00004000
+#define CONFIG_SYS_CAR_SIZE (16 * 1024)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_CAR_ADDR + \
CONFIG_SYS_CAR_SIZE)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SECT_SIZE + \
+ 128*1024)
/* Address of temporary Global Data */
#define CONFIG_SYS_INIT_GD_ADDR CONFIG_SYS_CAR_ADDR
@@ -198,17 +200,25 @@
#define CONFIG_SYS_FLASH_LEGACY_512Kx8
#define CONFIG_SYS_FLASH_ERASE_TOUT 2000 /* ms */
#define CONFIG_SYS_FLASH_WRITE_TOUT 2000 /* ms */
+
/*-----------------------------------------------------------------------
* Environment configuration
+ * - Boot flash is 512kB with 64kB sectors
+ * - StrataFlash is 32MB with 128kB sectors
+ * - Redundant embedded environment is 25% of the Boot flash
+ * - Redundant StrataFlash environment is <1% of the StrataFlash
+ * - Environment is therefore located in StrataFlash
+ * - Primary copy is located in first sector of first flash
+ * - Redundant copy is located in second sector of first flash
+ * - Stack is only 32kB, so environment size is limited to 4kB
*/
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SECT_SIZE 0x20000
-#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
+#define CONFIG_ENV_SIZE 0x01000
#define CONFIG_ENV_ADDR CONFIG_SYS_FLASH_BASE_1
-/* Redundant Copy */
#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE_1 + \
CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SECT_SIZE
+#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
/*-----------------------------------------------------------------------
* PCI configuration
diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h
index 7161ab1..2888c7b 100644
--- a/include/configs/omap2420h4.h
+++ b/include/configs/omap2420h4.h
@@ -38,6 +38,8 @@
/*#define CONFIG_APTIX 1 #* define if on APTIX test chip */
/*#define CONFIG_VIRTIO 1 #* Using Virtio simulator */
+#define CONFIG_STANDALONE_LOAD_ADDR 0x80300000
+
/* Clock config to target*/
#define PRCM_CONFIG_II 1
/* #define PRCM_CONFIG_III 1 */
diff --git a/include/exports.h b/include/exports.h
index 6382311..ddd1bf4 100644
--- a/include/exports.h
+++ b/include/exports.h
@@ -45,7 +45,7 @@ enum {
#define XF_VERSION 6
-#if defined(CONFIG_I386)
+#if defined(CONFIG_X86)
extern gd_t *global_data;
#endif
diff --git a/include/faraday/ftwdt010_wdt.h b/include/faraday/ftwdt010_wdt.h
new file mode 100644
index 0000000..31ca768
--- /dev/null
+++ b/include/faraday/ftwdt010_wdt.h
@@ -0,0 +1,106 @@
+/*
+ * Watchdog driver for the FTWDT010 Watch Dog Driver
+ *
+ * (c) Copyright 2004 Faraday Technology Corp. (www.faraday-tech.com)
+ * Based on sa1100_wdt.c by Oleg Drokin <green@crimea.edu>
+ * Based on SoftDog driver by Alan Cox <alan@redhat.com>
+ *
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * 27/11/2004 Initial release, Faraday.
+ * 12/01/2011 Port to u-boot, Macpaul Lin.
+ */
+
+#ifndef __FTWDT010_H
+#define __FTWDT010_H
+
+struct ftwdt010_wdt {
+ unsigned int wdcounter; /* Counter Reg - 0x00 */
+ unsigned int wdload; /* Counter Auto Reload Reg - 0x04 */
+ unsigned int wdrestart; /* Counter Restart Reg - 0x08 */
+ unsigned int wdcr; /* Control Reg - 0x0c */
+ unsigned int wdstatus; /* Status Reg - 0x10 */
+ unsigned int wdclear; /* Timer Clear - 0x14 */
+ unsigned int wdintrlen; /* Interrupt Length - 0x18 */
+};
+
+/*
+ * WDLOAD - Counter Auto Reload Register
+ * The Auto Reload Register is set to 0x03EF1480 (66Mhz) by default.
+ * Which means in a 66MHz system, the period of Watch Dog timer reset is
+ * one second.
+ */
+#define FTWDT010_WDLOAD(x) ((x) & 0xffffffff)
+
+/*
+ * WDRESTART - Watch Dog Timer Counter Restart Register
+ * If writing 0x5AB9 to WDRESTART register, Watch Dog timer will
+ * automatically reload WDLOAD to WDCOUNTER and restart counting.
+ */
+#define FTWDT010_WDRESTART_MAGIC 0x5AB9
+
+/* WDCR - Watch Dog Timer Control Register */
+#define FTWDT010_WDCR_ENABLE (1 << 0)
+#define FTWDT010_WDCR_RST (1 << 1)
+#define FTWDT010_WDCR_INTR (1 << 2)
+/* FTWDT010_WDCR_EXT bit: Watch Dog Timer External Signal Enable */
+#define FTWDT010_WDCR_EXT (1 << 3)
+/* FTWDT010_WDCR_CLOCK bit: Clock Source: 0: PCLK, 1: EXTCLK.
+ * The clock source PCLK cannot be gated when system sleeps, even if
+ * WDCLOCK bit is turned on.
+ *
+ * Faraday's Watch Dog timer can be driven by an external clock. The
+ * programmer just needs to write one to WdCR[WdClock] bit.
+ *
+ * Note: There is a limitation between EXTCLK and PCLK:
+ * EXTCLK cycle time / PCLK cycle time > 2.
+ * If the system does not need an external clock,
+ * just keep WdCR[WdClock] bit in its default value.
+ */
+#define FTWDT010_WDCR_CLOCK (1 << 4)
+
+/*
+ * WDSTATUS - Watch Dog Timer Status Register
+ * This bit is set when the counter reaches Zero
+ */
+#define FTWDT010_WDSTATUS(x) ((x) & 0x1)
+
+/*
+ * WDCLEAR - Watch Dog Timer Clear Register
+ * Writing one to this register will clear WDSTATUS.
+ */
+#define FTWDT010_WDCLEAR (1 << 0)
+
+/*
+ * WDINTRLEN - Watch Dog Timer Interrupt Length
+ * This register controls the duration length of wd_rst, wd_intr and wd_ext.
+ * The default value is 0xFF.
+ */
+#define FTWDT010_WDINTRLEN(x) ((x) & 0xff)
+
+/*
+ * Variable timeout should be set in ms.
+ * (CONFIG_SYS_CLK_FREQ/1000) equals 1 ms.
+ * WDLOAD = timeout * TIMEOUT_FACTOR.
+ */
+#define FTWDT010_TIMEOUT_FACTOR (CONFIG_SYS_CLK_FREQ / 1000) /* 1 ms */
+
+void ftwdt010_wdt_reset(void);
+void ftwdt010_wdt_disable(void);
+
+#endif /* __FTWDT010_H */