diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/mx6sabre_common.h | 200 | ||||
| -rw-r--r-- | include/configs/mx6sabresd.h | 36 |
2 files changed, 194 insertions, 42 deletions
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index e4165c2..4790be0 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012 Freescale Semiconductor, Inc. + * Copyright (C) 2012-2015 Freescale Semiconductor, Inc. * * Configuration settings for the Freescale i.MX6Q SabreSD board. * @@ -11,6 +11,16 @@ #define CONFIG_MX6 +#ifdef CONFIG_MX6SOLO +#define CONFIG_MX6DL +#endif + +/* uncomment for PLUGIN mode support */ +/* #define CONFIG_USE_PLUGIN */ + +/* uncomment for SECURE mode support */ +/* #define CONFIG_SECURE_BOOT */ + #include "mx6_common.h" #include <linux/sizes.h> @@ -58,6 +68,8 @@ #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ + #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII @@ -72,17 +84,6 @@ #define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS -#define CONFIG_CMD_SF -#ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_MXC_SPI -#define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS 0 -#define CONFIG_SF_DEFAULT_SPEED 20000000 -#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 -#endif - /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 @@ -100,24 +101,26 @@ #define CONFIG_LOADADDR 0x12000000 #define CONFIG_SYS_TEXT_BASE 0x17800000 +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + #ifdef CONFIG_SYS_BOOT_NAND -#define CONFIG_MFG_NAND_PARTITION "mtdparts=gpmi-nand:16m(boot),16m(kernel),16m(dtb),-(rootfs) " +#define CONFIG_MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),-(rootfs) " #else #define CONFIG_MFG_NAND_PARTITION "" #endif #define CONFIG_MFG_ENV_SETTINGS \ - "mfgtool_args=setenv bootargs console=" CONFIG_CONSOLE_DEV ",115200 " \ - "rdinit=/linuxrc " \ - "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ - "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ - "g_mass_storage.iSerialNumber=\"\" "\ - "enable_wait_mode=off "\ - CONFIG_MFG_NAND_PARTITION \ - "\0" \ - "initrd_addr=0x12C00000\0" \ - "initrd_high=0xffffffff\0" \ - "bootcmd_mfg=run mfgtool_args;bootm ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ + "mfgtool_args=setenv bootargs console=" CONFIG_CONSOLE_DEV ",115200 " \ + "rdinit=/linuxrc " \ + "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ + "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ + "g_mass_storage.iSerialNumber=\"\" "\ + "enable_wait_mode=off "\ + CONFIG_MFG_NAND_PARTITION \ + "\0" \ + "initrd_addr=0x12C00000\0" \ + "initrd_high=0xffffffff\0" \ + "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ #ifdef CONFIG_SUPPORT_EMMC_BOOT #define EMMC_ENV \ @@ -139,6 +142,42 @@ #define EMMC_ENV "" #endif +#if defined(CONFIG_SYS_BOOT_NAND) + /* + * The dts also enables the WEIN NOR which is mtd0. + * So the partions' layout for NAND is: + * mtd1: 16M (uboot) + * mtd2: 16M (kernel) + * mtd3: 16M (dtb) + * mtd4: left (rootfs) + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_MFG_ENV_SETTINGS \ + "fdt_addr=0x18000000\0" \ + "fdt_high=0xffffffff\0" \ + "bootargs=console=" CONFIG_CONSOLE_DEV ",115200 ubi.mtd=4 " \ + "root=ubi0:rootfs rootfstype=ubifs " \ + "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),-(rootfs)\0"\ + "bootcmd=nand read ${loadaddr} 0x4000000 0x800000;"\ + "nand read ${fdt_addr} 0x5000000 0x100000;"\ + "bootz ${loadaddr} - ${fdt_addr}\0" + +#elif defined(CONFIG_SYS_BOOT_SATA) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_MFG_ENV_SETTINGS \ + "fdt_addr=0x18000000\0" \ + "fdt_high=0xffffffff\0" \ + "bootargs=console=" CONFIG_CONSOLE_DEV ",115200 \0"\ + "bootargs_sata=setenv bootargs ${bootargs} " \ + "root=/dev/sda1 rootwait rw \0" \ + "bootcmd_sata=run bootargs_sata; sata init; " \ + "sata read ${loadaddr} 0x800 0x4000; " \ + "sata read ${fdt_addr} 0x8000 0x800; " \ + "bootz ${loadaddr} - ${fdt_addr} \0" \ + "bootcmd=run bootcmd_sata \0" + +#else #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_MFG_ENV_SETTINGS \ "script=boot.scr\0" \ @@ -151,8 +190,9 @@ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=1\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ "update_sd_firmware=" \ "if test ${ip_dyn} = yes; then " \ "setenv get_cmd dhcp; " \ @@ -167,7 +207,8 @@ "fi; " \ "fi\0" \ EMMC_ENV \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "smp=" CONFIG_SYS_NOSMP "\0"\ + "mmcargs=setenv bootargs console=${console},${baudrate} ${smp} " \ "root=${mmcroot}\0" \ "loadbootscript=" \ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ @@ -190,7 +231,7 @@ "else " \ "bootz; " \ "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ + "netargs=setenv bootargs console=${console},${baudrate} ${smp} " \ "root=/dev/nfs " \ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ "netboot=echo Booting from net ...; " \ @@ -227,6 +268,7 @@ "fi; " \ "fi; " \ "else run netboot; fi" +#endif #define CONFIG_ARP_TIMEOUT 200UL @@ -235,10 +277,14 @@ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 256 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_CMD_MEMTEST #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x10010000 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 @@ -266,10 +312,97 @@ #define CONFIG_ENV_SIZE (8 * 1024) +#ifndef CONFIG_SYS_NOSMP +#define CONFIG_SYS_NOSMP +#endif + +#if defined CONFIG_SYS_BOOT_SPINOR +#define CONFIG_SYS_USE_SPINOR +#define CONFIG_ENV_IS_IN_SPI_FLASH +#elif defined CONFIG_SYS_BOOT_EIMNOR +#define CONFIG_SYS_USE_EIMNOR +#define CONFIG_ENV_IS_IN_FLASH +#elif defined CONFIG_SYS_BOOT_NAND +#define CONFIG_SYS_USE_NAND +#define CONFIG_ENV_IS_IN_NAND +#elif defined CONFIG_SYS_BOOT_SATA +#define CONFIG_ENV_IS_IN_SATA +#define CONFIG_CMD_SATA +#else #define CONFIG_ENV_IS_IN_MMC +#endif + +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + +#ifdef CONFIG_SYS_USE_SPINOR +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +#ifdef CONFIG_SYS_USE_EIMNOR +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR +#define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024) +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ +#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ +#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ +#define CONFIG_SYS_FLASH_EMPTY_INFO +#endif + +#ifdef CONFIG_SYS_USE_NAND +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_TRIMFFS + +/* NAND stuff */ +#define CONFIG_NAND_MXS +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* DMA stuff, needed for GPMI/MXS NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 +#endif #if defined(CONFIG_ENV_IS_IN_MMC) #define CONFIG_ENV_OFFSET (8 * 64 * 1024) +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#elif defined(CONFIG_ENV_IS_IN_FLASH) +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_SIZE CONFIG_SYS_FLASH_SECT_SIZE +#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SIZE +#define CONFIG_ENV_OFFSET (4 * CONFIG_SYS_FLASH_SECT_SIZE) +#elif defined(CONFIG_ENV_IS_IN_NAND) +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_OFFSET (8 << 20) +#define CONFIG_ENV_SECT_SIZE (128 << 10) +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#elif defined(CONFIG_ENV_IS_IN_SATA) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_SATA_ENV_DEV 0 +#define CONFIG_SYS_DCACHE_OFF /* remove when sata driver support cache */ #endif #define CONFIG_OF_LIBFDT @@ -278,6 +411,12 @@ #define CONFIG_CMD_CACHE #endif +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 + /* Framebuffer */ #define CONFIG_VIDEO #define CONFIG_VIDEO_IPUV3 @@ -315,4 +454,7 @@ #define CONFIG_G_DNL_MANUFACTURER "FSL" #endif +#if defined(CONFIG_ANDROID_SUPPORT) +#include "mx6sabreandroid_common.h" +#endif #endif /* __MX6QSABRE_COMMON_CONFIG_H */ diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 72ba245..d44a9cb 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012 Freescale Semiconductor, Inc. + * Copyright (C) 2012-2015 Freescale Semiconductor, Inc. * * Configuration settings for the Freescale i.MX6Q SabreSD board. * @@ -21,24 +21,40 @@ #define CONFIG_MACH_TYPE 3980 #define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_CONSOLE_DEV "ttymxc0" -#define CONFIG_MMCROOT "/dev/mmcblk1p2" +#define CONFIG_MMCROOT "/dev/mmcblk2p2" /* SDHC3 */ #if defined(CONFIG_MX6Q) #define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb" +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) #elif defined(CONFIG_MX6DL) #define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb" -#endif #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) - -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ +#elif defined(CONFIG_MX6SOLO) +#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb" +#define PHYS_SDRAM_SIZE (512u * 1024 * 1024) +#endif #include "mx6sabre_common.h" #define CONFIG_SYS_FSL_USDHC_NUM 3 -#if defined(CONFIG_ENV_IS_IN_MMC) #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ +#define CONFIG_SYS_MMC_ENV_PART 0 /* user partition */ + +#ifdef CONFIG_SYS_USE_SPINOR +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(4, 9)<<8)) #endif -#define CONFIG_CMD_PCI +/* + * imx6 q/dl/solo pcie would be failed to work properly in kernel, if + * the pcie module is iniialized/enumerated both in uboot and linux + * kernel. + * rootcause:imx6 q/dl/solo pcie don't have the reset mechanism. + * it is only be RESET by the POR. So, the pcie module only be + * initialized/enumerated once in one POR. + * Set to use pcie in kernel defaultly, mask the pcie config here. + * Remove the mask freely, if the uboot pcie functions, rather than + * the kernel's, are required. + */ +/* #define CONFIG_CMD_PCI */ #ifdef CONFIG_CMD_PCI #define CONFIG_PCI #define CONFIG_PCI_PNP @@ -48,12 +64,6 @@ #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #endif -/* I2C Configs */ -#define CONFIG_CMD_I2C -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_SPEED 100000 - /* PMIC */ #define CONFIG_POWER #define CONFIG_POWER_I2C |