diff options
Diffstat (limited to 'include/mmc.h')
| -rw-r--r-- | include/mmc.h | 120 |
1 files changed, 85 insertions, 35 deletions
diff --git a/include/mmc.h b/include/mmc.h index 44c8959..dd47dfc 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -16,7 +16,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -43,11 +43,13 @@ #define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40) #define MMC_MODE_HS 0x001 -#define MMC_MODE_HS_52MHz 0x010 +#define MMC_MODE_HS_52MHz 0x002 #define MMC_MODE_4BIT 0x100 #define MMC_MODE_8BIT 0x200 #define EMMC_MODE_4BIT_DDR 0x400 #define EMMC_MODE_8BIT_DDR 0x800 +#define MMC_MODE_SPI 0x010 +#define MMC_MODE_HC 0x020 #define SD_DATA_4BIT 0x00040000 @@ -78,14 +80,32 @@ #define MMC_CMD_READ_MULTIPLE_BLOCK 18 #define MMC_CMD_WRITE_SINGLE_BLOCK 24 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 +#define MMC_CMD_ERASE_GROUP_START 35 +#define MMC_CMD_ERASE_GROUP_END 36 +#define MMC_CMD_ERASE 38 #define MMC_CMD_APP_CMD 55 +#define MMC_CMD_SPI_READ_OCR 58 +#define MMC_CMD_SPI_CRC_ON_OFF 59 #define SD_CMD_SEND_RELATIVE_ADDR 3 #define SD_CMD_SWITCH_FUNC 6 #define SD_CMD_SEND_IF_COND 8 -#define SD_CMD_SELECT_PARTITION 43 +#define SD_CMD_SELECT_PARTITION 43 +#define SD_CMD_MANAGE_PARTITIONS 44 +#define SD_CMD_QUERY_PARTITIONS 45 +#define SD_SUBCMD_JOIN_PART 0x21 +#define SD_SUBCMD_SPLIT_PART 0x22 +#define SD_SUBCMD_SET_USER_AREA_SIZE 0x23 +#define SD_SUBCMD_EXCHG_PART 0x31 +#define SD_SUBCMD_SET_PART_ATTR 0x61 +#define SD_SUBCMD_SET_DEV_ATTR 0x62 +#define SD_SUBCMD_QUERY_SIZES 0xa1 +#define SD_SUBCMD_QUERY_PART_ATTR 0xb1 +#define SD_SUBCMD_QUERY_DEV_ATTR 0xb2 #define SD_CMD_APP_SET_BUS_WIDTH 6 +#define SD_CMD_ERASE_WR_BLK_START 32 +#define SD_CMD_ERASE_WR_BLK_END 33 #define SD_CMD_APP_SEND_OP_COND 41 #define SD_CMD_APP_SEND_SCR 51 @@ -95,9 +115,18 @@ #define MMC_HS_TIMING 0x00000100 #define MMC_HS_52MHZ 0x2 -#define EMMC_MODE_DDR_3V 0x4 -#define OCR_BUSY 0x80000000 -#define OCR_HCS 0x40000000 +#define EMMC_MODE_DDR_3V 0x4 +#define OCR_BUSY 0x80000000 +#define OCR_HCS 0x40000000 +#define OCR_VOLTAGE_MASK 0x007FFF80 +#define OCR_ACCESS_MODE 0x60000000 + +#define SECURE_ERASE 0x80000000 + +#define MMC_STATUS_MASK (~0x0206BF7F) +#define MMC_STATUS_RDY_FOR_DATA (1 << 8) +#define MMC_STATUS_CURR_STATE (0xf << 9) +#define MMC_STATUS_ERROR (1 << 19) #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ @@ -134,7 +163,7 @@ */ #define EXT_CSD_BOOT_BUS_WIDTH 177 /* RW */ -#define EXT_CSD_BOOT_CONFIG 179 /* RW */ +#define EXT_CSD_PART_CONF 179 /* R/W */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */ #define EXT_CSD_HS_TIMING 185 /* R/W */ #define EXT_CSD_CARD_TYPE 196 /* RO */ @@ -146,12 +175,12 @@ * EXT_CSD field definitions */ -#define EXT_CSD_CMD_SET_NORMAL (1<<0) -#define EXT_CSD_CMD_SET_SECURE (1<<1) -#define EXT_CSD_CMD_SET_CPSECURE (1<<2) +#define EXT_CSD_CMD_SET_NORMAL (1 << 0) +#define EXT_CSD_CMD_SET_SECURE (1 << 1) +#define EXT_CSD_CMD_SET_CPSECURE (1 << 2) -#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ -#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ +#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ +#define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ @@ -162,7 +191,7 @@ #define EXT_CSD_BOOT_BUS_WIDTH_1BIT 0 #define EXT_CSD_BOOT_BUS_WIDTH_4BIT 1 #define EXT_CSD_BOOT_BUS_WIDTH_8BIT 2 -#define EXT_CSD_BOOT_BUS_WIDTH_DDR (1 << 4) +#define EXT_CSD_BOOT_BUS_WIDTH_DDR (1 << 4) #define EXT_CSD_BOOT_PARTITION_ENABLE_MASK (0x7 << 3) #define EXT_CSD_BOOT_PARTITION_DISABLE (0x0) @@ -179,21 +208,25 @@ #define R1_APP_CMD (1 << 5) #define MMC_RSP_PRESENT (1 << 0) -#define MMC_RSP_136 (1 << 1) /* 136 bit response */ -#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ -#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ -#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ +#define MMC_RSP_136 (1 << 1) /* 136 bit response */ +#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ +#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ +#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ -#define MMC_RSP_NONE (0) -#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_NONE (0) +#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ MMC_RSP_BUSY) -#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) -#define MMC_RSP_R3 (MMC_RSP_PRESENT) -#define MMC_RSP_R4 (MMC_RSP_PRESENT) -#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) -#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) -#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) +#define MMC_RSP_R3 (MMC_RSP_PRESENT) +#define MMC_RSP_R4 (MMC_RSP_PRESENT) +#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) + +#define MMCPART_NOAVAILABLE (0xff) +#define PART_ACCESS_MASK (0x7) +#define PART_SUPPORT (0x1) struct mmc_cid { unsigned long psn; @@ -204,6 +237,16 @@ struct mmc_cid { char pnm[7]; }; +/* + * WARNING! + * + * This structure is used by atmel_mci.c only. + * It works for the AVR32 architecture but NOT + * for ARM/AT91 architectures. + * Its use is highly depreciated. + * After the atmel_mci.c driver for AVR32 has + * been replaced this structure will be removed. + */ struct mmc_csd { u8 csd_structure:2, @@ -268,6 +311,7 @@ struct mmc { void *priv; uint voltages; uint version; + uint has_init; uint f_min; uint f_max; int high_capacity; @@ -280,19 +324,20 @@ struct mmc { uint csd[4]; uint cid[4]; ushort rca; + char part_config; + char part_num; + char boot_part_num; uint tran_speed; uint read_bl_len; uint write_bl_len; + uint erase_grp_size; u64 capacity; -#ifdef CONFIG_BOOT_PARTITION_ACCESS - uint boot_config; - uint boot_size_mult; -#endif block_dev_desc_t block_dev; int (*send_cmd)(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data); void (*set_ios)(struct mmc *mmc); int (*init)(struct mmc *mmc); + uint b_max; }; int mmc_register(struct mmc *mmc); @@ -303,13 +348,18 @@ void mmc_set_clock(struct mmc *mmc, uint clock); struct mmc *find_mmc_device(int dev_num); int mmc_set_dev(int dev_num); void print_mmc_devices(char separator); +int get_mmc_num(void); int board_mmc_getcd(u8 *cd, struct mmc *mmc); -#ifdef CONFIG_BOOT_PARTITION_ACCESS -int mmc_switch_partition(struct mmc *mmc, uint part, uint enable_boot); -int sd_switch_partition(struct mmc *mmc, uint part); -#endif - -#ifndef CONFIG_GENERIC_MMC +int mmc_switch_part(int dev_num, unsigned int part_num); +int sd_switch_part(int dev_num, unsigned int part_num); +int mmc_switch_boot_part(int dev_num, unsigned int part_num); +int sd_switch_boot_part(int dev_num, unsigned int part_num); + +#ifdef CONFIG_GENERIC_MMC +int atmel_mci_init(void *regs); +#define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI) +struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); +#else int mmc_legacy_init(int verbose); #endif #endif /* _MMC_H_ */ |