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-rw-r--r--include/configs/dbau1x00.h3
-rw-r--r--include/configs/pb1x00.h3
-rw-r--r--include/configs/qemu-mips.h3
-rw-r--r--include/configs/qemu-mips64.h3
-rw-r--r--include/configs/vct.h3
5 files changed, 15 insertions, 0 deletions
diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h
index e0bf3dc..8a7447d 100644
--- a/include/configs/dbau1x00.h
+++ b/include/configs/dbau1x00.h
@@ -15,6 +15,9 @@
#define CONFIG_DBAU1X00 1
#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
+
#ifdef CONFIG_DBAU1000
/* Also known as Merlot */
#define CONFIG_SOC_AU1000 1
diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h
index 1c04a58..61e6af3 100644
--- a/include/configs/pb1x00.h
+++ b/include/configs/pb1x00.h
@@ -15,6 +15,9 @@
#define CONFIG_PB1X00 1
#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
+
#ifdef CONFIG_PB1000
#define CONFIG_SOC_AU1000 1
#else
diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
index 98ed8bc..1548d3e 100644
--- a/include/configs/qemu-mips.h
+++ b/include/configs/qemu-mips.h
@@ -13,6 +13,9 @@
#define __CONFIG_H
#define CONFIG_QEMU_MIPS
+
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_MISC_INIT_R
#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */
diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h
index e8f5a4c..61cafad 100644
--- a/include/configs/qemu-mips64.h
+++ b/include/configs/qemu-mips64.h
@@ -13,6 +13,9 @@
#define __CONFIG_H
#define CONFIG_QEMU_MIPS
+
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_MISC_INIT_R
#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */
diff --git a/include/configs/vct.h b/include/configs/vct.h
index 217ba2f..83e4163 100644
--- a/include/configs/vct.h
+++ b/include/configs/vct.h
@@ -25,6 +25,9 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
+
#define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)