diff options
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/CPCI750.h | 4 | ||||
| -rw-r--r-- | include/configs/MVBLM7.h | 6 | ||||
| -rw-r--r-- | include/configs/SIMPC8313.h | 14 | ||||
| -rw-r--r-- | include/configs/eNET.h | 47 |
4 files changed, 53 insertions, 18 deletions
diff --git a/include/configs/CPCI750.h b/include/configs/CPCI750.h index d516c3c..1c8c68b 100644 --- a/include/configs/CPCI750.h +++ b/include/configs/CPCI750.h @@ -59,7 +59,7 @@ #define CONFIG_BAUDRATE 9600 /* console baudrate = 9600 */ -#undef CONFIG_ECC /* enable ECC support */ +#define CONFIG_MV64360_ECC /* enable ECC support */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -628,5 +628,7 @@ #define CONFIG_SYS_BOARD_ASM_INIT 1 #define CPCI750_SLAVE_TEST (((in8(0xf0300000) & 0x80) == 0) ? 0 : 1) +#define CPCI750_ECC_TEST (((in8(0xf0300000) & 0x02) == 0) ? 1 : 0) +#define CONFIG_SYS_PLD_VER 0xf0e00000 #endif /* __CONFIG_H */ diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index 26897c6..c28eb64 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -234,7 +234,11 @@ #define CONFIG_BOOTP_SEND_HOSTNAME /* USB */ +#define CONFIG_SYS_USB_HOST +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL #define CONFIG_HAS_FSL_DR_USB +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* * Environment @@ -267,6 +271,8 @@ #define CONFIG_CMD_PCI #define CONFIG_CMD_I2C #define CONFIG_CMD_FPGA +#define CONFIG_CMD_USB +#define CONFIG_DOS_PARTITION #undef CONFIG_WATCHDOG diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 84af8df..9104f1a 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -126,6 +126,7 @@ #else #define CONFIG_SYS_NAND_BASE 0xE2800000 #endif +#define CONFIG_SYS_FPGA_BASE 0xFF000000 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define NAND_MAX_CHIPS 1 @@ -184,6 +185,16 @@ #define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR0_PRELIM #define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR0_PRELIM +#define CONFIG_SYS_BR1_PRELIM ( CONFIG_SYS_FPGA_BASE \ + | BR_PS_16 \ + | BR_MS_UPMA \ + | BR_V ) +#define CONFIG_SYS_OR1_PRELIM ( OR_AM_2MB \ + | OR_UPM_BCTLD) + +#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_FPGA_BASE +#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_2MB) + /* * JFFS2 configuration */ @@ -407,7 +418,8 @@ | SICRH_ETSEC2_G \ | SICRH_TSOBI1 \ | SICRH_TSOBI2 ) -#define CONFIG_SYS_SICRL (SICRL_USBDR \ +#define CONFIG_SYS_SICRL ( SICRL_LBC \ + | SICRL_USBDR \ | SICRL_ETSEC2_A ) #define CONFIG_SYS_HID0_INIT 0x000000000 diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 6a68bf4..361fe61 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -21,6 +21,7 @@ * MA 02111-1307 USA */ +#include <asm/ibmpc.h> /* * board/config.h - configuration options, board specific */ @@ -52,7 +53,27 @@ * bottom (processor) board MUST be removed! */ #undef CONFIG_WATCHDOG -#undef CONFIG_HW_WATCHDOG +#define CONFIG_HW_WATCHDOG + + /*----------------------------------------------------------------------- + * Serial Configuration + */ +#define CONFIG_SERIAL_MULTI +#undef CONFIG_SERIAL_SOFTWARE_FIFO +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK 1843200 +#define CONFIG_BAUDRATE 9600 +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} + +#define CONFIG_SYS_NS16550_COM1 UART0_BASE +#define CONFIG_SYS_NS16550_COM2 UART1_BASE +#define CONFIG_SYS_NS16550_COM3 (0x1000 + UART0_BASE) +#define CONFIG_SYS_NS16550_COM4 (0x1000 + UART1_BASE) +#define CONFIG_SYS_NS16550_PORT_MAPPED /*----------------------------------------------------------------------- * Video Configuration @@ -65,8 +86,6 @@ */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -#define CONFIG_BAUDRATE 9600 - /*----------------------------------------------------------------------- * Command line configuration. */ @@ -86,9 +105,10 @@ #define CONFIG_CMD_LOADS /* loads */ #define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */ #define CONFIG_CMD_MISC /* Misc functions like sleep etc*/ -#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #undef CONFIG_CMD_NFS /* NFS support */ #define CONFIG_CMD_PCI /* PCI support */ +#define CONFIG_CMD_PING /* ICMP echo support */ #define CONFIG_CMD_RUN /* run command in env variable */ #define CONFIG_CMD_SAVEENV /* saveenv */ #define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ @@ -121,10 +141,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ -#define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_HZ 1000 /* incrementer freq: 1kHz */ /*----------------------------------------------------------------------- * SDRAM Configuration @@ -143,7 +160,7 @@ * CPU Features */ #define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */ -#undef CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */ +#define CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */ #define CONFIG_SYS_SC520_TIMER /* use SC520 swtimers */ #undef CONFIG_SYS_GENERIC_TIMER /* use the i8254 PIT timers */ #undef CONFIG_SYS_TSC_TIMER /* use the Pentium TSC timers */ @@ -182,7 +199,7 @@ CONFIG_SYS_FLASH_BASE_1, \ CONFIG_SYS_FLASH_BASE_2} #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#undef CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT #define CONFIG_SYS_FLASH_LEGACY_512Kx8 @@ -210,13 +227,11 @@ #define CONFIG_SYS_THIRD_PCI_IRQ 11 #define CONFIG_SYS_FORTH_PCI_IRQ 15 -/*----------------------------------------------------------------------- - * Hardware watchdog configuration + /* + * Network device (TRL8100B) support */ -#define CONFIG_SYS_WATCHDOG_PIO_BIT 0x8000 -#define CONFIG_SYS_WATCHDIG_PIO_DATA SC520_PIODATA15_0 -#define CONFIG_SYS_WATCHDIG_PIO_CLR SC520_PIOCLR15_0 -#define CONFIG_SYS_WATCHDIG_PIO_SET SC520_PIOSET15_0 +#define CONFIG_NET_MULTI +#define CONFIG_RTL8139 /*----------------------------------------------------------------------- * FPGA configuration |