23 files changed, 379 insertions, 22 deletions
diff --git a/include/configs/HWW1U1A.h b/include/configs/HWW1U1A.h
index 01597b9..f08d78b 100644
--- a/include/configs/HWW1U1A.h
+++ b/include/configs/HWW1U1A.h
@@ -422,7 +422,7 @@ const char *hww1u1a_get_ps1(void);
 #define CONFIG_MD5
 #define CONFIG_SHA1
 #define CONFIG_CMD_MD5SUM
-#define CONFIG_CMD_SHA1
+#define CONFIG_CMD_SHA1SUM
 #define CONFIG_CMD_ASKENV
 #define CONFIG_CMD_SETEXPR
 
diff --git a/include/configs/MBX.h b/include/configs/MBX.h
index cb5b023..79780bd 100644
--- a/include/configs/MBX.h
+++ b/include/configs/MBX.h
@@ -87,7 +87,6 @@
  * Command line configuration.
  */
 #define CONFIG_CMD_NET
-#define CONFIG_CMD_DFL
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_PCMCIA
 #define CONFIG_CMD_IDE
diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h
index 619a800..84ba78f 100644
--- a/include/configs/MigoR.h
+++ b/include/configs/MigoR.h
@@ -38,7 +38,6 @@
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_NFS
-#define CONFIG_CMD_DFL
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_SAVEENV
 
diff --git a/include/configs/adp-ag102.h b/include/configs/adp-ag102.h
new file mode 100644
index 0000000..a4628e4
--- /dev/null
+++ b/include/configs/adp-ag102.h
@@ -0,0 +1,375 @@
+/*
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/ag102.h>
+
+/*
+ * CPU and Board Configuration Options
+ */
+#define CONFIG_ADP_AG102
+
+#define CONFIG_USE_INTERRUPT
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_MEM_REMAP
+#endif
+
+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_TEXT_BASE	0x04200000
+#else
+#define CONFIG_SYS_TEXT_BASE	0x00000000
+#endif
+
+/*
+ * Timer
+ */
+
+/*
+ * According to the discussion in u-boot mailing list before,
+ * CONFIG_SYS_HZ at 1000 is mandatory.
+ */
+#define CONFIG_SYS_HZ		1000
+#define CONFIG_SYS_CLK_FREQ	(66000000 * 2)
+#define VERSION_CLOCK		CONFIG_SYS_CLK_FREQ
+
+/*
+ * Use Externel CLOCK or PCLK
+ */
+#undef CONFIG_FTRTC010_EXTCLK
+
+#ifndef CONFIG_FTRTC010_EXTCLK
+#define CONFIG_FTRTC010_PCLK
+#endif
+
+#ifdef CONFIG_FTRTC010_EXTCLK
+#define TIMER_CLOCK	32768			/* CONFIG_FTRTC010_EXTCLK */
+#else
+#define TIMER_CLOCK	CONFIG_SYS_HZ		/* CONFIG_FTRTC010_PCLK */
+#endif
+
+#define TIMER_LOAD_VAL	0xffffffff
+
+/*
+ * Real Time Clock
+ */
+#define CONFIG_RTC_FTRTC010
+
+/*
+ * Real Time Clock Divider
+ * RTC_DIV_COUNT			(OSC_CLK/OSC_5MHZ)
+ */
+#define OSC_5MHZ			(5*1000000)
+#define OSC_CLK				(2*OSC_5MHZ)
+#define RTC_DIV_COUNT			(OSC_CLK/OSC_5MHZ)
+
+/*
+ * Serial console configuration
+ */
+
+/* FTUART is a high speed NS 16C550A compatible UART */
+#define CONFIG_BAUDRATE			38400
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_COM1		CONFIG_FTUART010_01_BASE
+#define CONFIG_SYS_NS16550_REG_SIZE	-4
+#define CONFIG_SYS_NS16550_CLK		33000000	/* AG102 */
+
+/* valid baudrates */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Ethernet
+ */
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_MAX_ADDR	32	/* this comes from <linux/phy.h> */
+#define CONFIG_SYS_DISCOVER_PHY
+#define CONFIG_FTGMAC100
+#define CONFIG_FTGMAC100_EGIGA
+
+#define CONFIG_BOOTDELAY	3
+
+/*
+ * SD (MMC) controller
+ */
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_FTSDC010
+#define CONFIG_FTSDC010_NUMBER		1
+#define CONFIG_FTSDC010_SDIO
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_ELF
+
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+
+/*
+ * PCI
+ */
+#define CONFIG_PCI
+#define CONFIG_FTPCI100
+#define CONFIG_FTPCI100_MEM_BASE        0xa0000000
+#define CONFIG_FTPCI100_IO_SIZE         FTPCI100_BASE_IO_SIZE(256) /* 256M */
+#define CONFIG_FTPCI100_MEM_SIZE        FTPCI100_MEM_SIZE(128)  /* 128M */
+#define CONFIG_FTPCI100_MEM_BASE_SIZE1  0x50
+
+#define CONFIG_PCI_MEM_BUS	0xa0000000
+#define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE	0x01000000		/* 256M */
+
+#define CONFIG_PCI_IO_BUS	0x90000000
+#define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE	0x00100000		/* 1M */
+
+/*
+ * USB
+ */
+#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
+#if defined(CONFIG_FTPCI100)
+#define __io /* enable outl & inl */
+#define CONFIG_CMD_USB
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS      5
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_EHCI
+#define CONFIG_PCI_EHCI_DEVICE 0
+#define CONFIG_USB_EHCI_PCI
+#define CONFIG_PREBOOT                          "usb start;"
+#endif /* #if defiend(CONFIG_FTPCI100) */
+#endif /* #if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI) */
+
+/*
+ * IDE/ATA stuff
+ */
+#define __io
+#define CONFIG_IDE_AHB
+#define CONFIG_IDE_FTIDE020
+
+#undef	CONFIG_IDE_8xx_DIRECT		/* no pcmcia interface required */
+#undef	CONFIG_IDE_LED			/* no led for ide supported	*/
+#define CONFIG_IDE_RESET	1	/* reset for ide supported	*/
+#define CONFIG_IDE_PREINIT	1	/* preinit for ide		*/
+
+/* max: 2 IDE busses */
+#define CONFIG_SYS_IDE_MAXBUS		1	/* origin: 2 */
+/* max: 2 drives per IDE bus */
+#define CONFIG_SYS_IDE_MAXDEVICE	1	/* origin: (MAXBUS * 2) */
+
+#define CONFIG_SYS_ATA_BASE_ADDR	CONFIG_FTIDE020S_BASE
+#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
+#define CONFIG_SYS_ATA_IDE1_OFFSET	0x0000
+
+#define CONFIG_SYS_ATA_DATA_OFFSET	0x0000	/* for data I/O */
+#define CONFIG_SYS_ATA_REG_OFFSET	0x0000	/* for normal regs access */
+#define CONFIG_SYS_ATA_ALT_OFFSET	0x0000	/* for alternate regs */
+
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SUPPORT_VFAT
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP			/* undef to save memory */
+#define CONFIG_SYS_PROMPT	"NDS32 # "	/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size */
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE	\
+	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/* max number of command args */
+#define CONFIG_SYS_MAXARGS	16
+
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
+
+/*
+ * size in bytes reserved for initial data
+*/
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+
+/*
+ * AHB Controller configuration
+ */
+#define CONFIG_FTAHBC020S
+
+#ifdef CONFIG_FTAHBC020S
+#include <faraday/ftahbc020s.h>
+
+/* Address of PHYS_SDRAM_0 before memory remap is at 0x(100)00000 */
+#define CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE	0x100
+
+/*
+ * CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6: this define is used in lowlevel_init.S,
+ * hence we cannot use FTAHBC020S_BSR_SIZE(2048) since it will use ffs() wrote
+ * in C language.
+ */
+#define CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6 \
+	(FTAHBC020S_SLAVE_BSR_BASE(CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE) | \
+					 FTAHBC020S_SLAVE_BSR_SIZE(0xb))
+#endif
+
+/*
+ * Watchdog
+ */
+#define CONFIG_FTWDT010_WATCHDOG
+
+/*
+ * PCU Power Control Unit configuration
+ */
+#define CONFIG_ANDES_PCU
+
+#ifdef CONFIG_ANDES_PCU
+#include <andestech/andes_pcu.h>
+
+#endif
+
+/*
+ * DDR DRAM controller configuration
+ */
+#define CONFIG_DWCDDR21MCTL
+
+#ifdef CONFIG_DWCDDR21MCTL
+#include <synopsys/dwcddr21mctl.h>
+/* DCR:
+ *   2GB: 0x000025d2, 2GB (1Gb x8 2 ranks) Micron/innoDisk/Transcend
+ *   1GB: 0x000021d2, 1GB (1Gb x8 1 rank) Micron/Transcend/innoDisk
+ * 512MB: 0x000025cc, Micron 512MB (512Mb x16 2 ranks)
+ * 512MB: 0x000021ca, Trenscend/innoDisk 512MB (512Mb x8 1 rank)
+ * 256MB: 0x000020d4, Micron 256MB (1Gb x16 1 ranks)
+ */
+#define CONFIG_SYS_DWCDDR21MCTL_CCR	0x00020004
+#define CONFIG_SYS_DWCDDR21MCTL_CCR2	(DWCDDR21MCTL_CCR_DTT(0x1)	| \
+					DWCDDR21MCTL_CCR_DFTLM(0x4)	| \
+					DWCDDR21MCTL_CCR_HOSTEN(0x1))
+
+/* 0x04: 0x000020d4 */
+#define CONFIG_SYS_DWCDDR21MCTL_DCR	0x000020ca
+
+/* 0x08: 0x0000000f */
+#define CONFIG_SYS_DWCDDR21MCTL_IOCR	0x0000000f
+
+/* 0x10: 0x00034812 */
+#define CONFIG_SYS_DWCDDR21MCTL_DRR	(DWCDDR21MCTL_DRR_TRFC(0x12)	| \
+					DWCDDR21MCTL_DRR_TRFPRD(0x0348))
+/* 0x24 */
+#define CONFIG_SYS_DWCDDR21MCTL_DLLCR0	DWCDDR21MCTL_DLLCR_PHASE(0x0)
+
+/* 0x4c: 0x00000040 */
+#define CONFIG_SYS_DWCDDR21MCTL_RSLR0	0x00000040
+
+/* 0x5c: 0x000055CF */
+#define CONFIG_SYS_DWCDDR21MCTL_RDGR0	0x000055cf
+
+/* 0xa4: 0x00100000 */
+#define CONFIG_SYS_DWCDDR21MCTL_DTAR	(DWCDDR21MCTL_DTAR_DTBANK(0x0)	| \
+					DWCDDR21MCTL_DTAR_DTROW(0x0100)	| \
+					DWCDDR21MCTL_DTAR_DTCOL(0x0))
+/* 0x1f0: 0x00000852 */
+#define CONFIG_SYS_DWCDDR21MCTL_MR	(DWCDDR21MCTL_MR_WR(0x4)	| \
+					DWCDDR21MCTL_MR_CL(0x5)		| \
+					DWCDDR21MCTL_MR_BL(0x2))
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#if defined(CONFIG_MEM_REMAP) || defined(CONFIG_SKIP_LOWLEVEL_INIT)
+#define PHYS_SDRAM_0		0x00000000	/* SDRAM Bank #1 */
+#if defined(CONFIG_MEM_REMAP)
+#define PHYS_SDRAM_0_AT_INIT	0x80000000	/* SDRAM Bank #1 before remap*/
+#endif
+#else	/* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */
+#define PHYS_SDRAM_0		0x80000000	/* SDRAM Bank #1 */
+#endif
+
+#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
+#define PHYS_SDRAM_0_SIZE	0x10000000	/* 256 MB */
+
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_0
+
+#ifdef CONFIG_MEM_REMAP
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0xA0000 - \
+					GENERATED_GBL_DATA_SIZE)
+#else
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+					GENERATED_GBL_DATA_SIZE)
+#endif /* CONFIG_MEM_REMAP */
+
+/*
+ * Load address and memory test area should agree with
+ * board/faraday/a320/config.mk
+ * Be careful not to overwrite U-boot itself.
+ */
+#define CONFIG_SYS_LOAD_ADDR		0x0CF00000
+
+/* memtest works on 63 MB in DRAM */
+#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_0
+#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_0 + 0x03F00000)
+
+/*
+ * Static memory controller configuration
+ */
+
+/*
+ * FLASH and environment organization
+ */
+#define CONFIG_SYS_NO_FLASH
+
+/*
+ * Env Storage Settings
+ */
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			4096
+
+#endif	/* __CONFIG_H */
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index 6a02188..159857d 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -107,7 +107,6 @@
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_IMI
 #undef CONFIG_CMD_IMLS
-#undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_LOADS
 
 #define CONFIG_CMD_PING
diff --git a/include/configs/debris.h b/include/configs/debris.h
index 60c7c40..303630d 100644
--- a/include/configs/debris.h
+++ b/include/configs/debris.h
@@ -148,7 +148,7 @@
 #define CONFIG_CMD_ELF
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_KGBD
+#define CONFIG_CMD_KGDB
 #define CONFIG_CMD_PCI
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_SAVES
diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h
index d517334..1f66023 100644
--- a/include/configs/digsy_mtc.h
+++ b/include/configs/digsy_mtc.h
@@ -119,7 +119,6 @@
 #ifdef CONFIG_VIDEO
 #define CONFIG_CMD_BMP
 #endif
-#define CONFIG_CMD_DFL
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_DHCP
diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h
index f19360d..221d3e0 100644
--- a/include/configs/ep8260.h
+++ b/include/configs/ep8260.h
@@ -325,7 +325,6 @@
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_SNTP
 
-#undef CONFIG_CMD_DCR
 #undef CONFIG_CMD_XIMG
 
 /* Where do the internal registers live? */
diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h
index 462cc7e..efff309 100644
--- a/include/configs/gplugd.h
+++ b/include/configs/gplugd.h
@@ -70,7 +70,6 @@
 #define CONFIG_SYS_NO_FLASH		/* Declare no flash (NOR/SPI) */
 #include <config_cmd_default.h>
 #define CONFIG_CMD_I2C
-#define CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_FPGA
 #define CONFIG_CMD_USB
 #define CONFIG_CMD_EXT2
diff --git a/include/configs/jadecpu.h b/include/configs/jadecpu.h
index f72ee02..d644fea 100644
--- a/include/configs/jadecpu.h
+++ b/include/configs/jadecpu.h
@@ -130,7 +130,6 @@
 #undef CONFIG_CMD_XIMG
 
 #define CONFIG_CMD_BMP
-#define CONFIG_CMD_CAN
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_ELF
 #define CONFIG_CMD_FAT
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 621dbb8..d505a41 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -447,7 +447,6 @@
  */
 #define CONFIG_CMD_CHIP_CONFIG
 #define CONFIG_CMD_DATE
-#define CONFIG_CMD_LOG
 #define CONFIG_CMD_NAND
 #define CONFIG_CMD_PCI
 #define CONFIG_CMD_SNTP
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index a6f2864..68215fd 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -435,7 +435,6 @@
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_IRQ
-#define CONFIG_CMD_LOG
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_NFS
diff --git a/include/configs/makalu.h b/include/configs/makalu.h
index fcc789d..6c1b136 100644
--- a/include/configs/makalu.h
+++ b/include/configs/makalu.h
@@ -252,7 +252,6 @@
  */
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_DTT
-#define CONFIG_CMD_LOG
 #define CONFIG_CMD_PCI
 #define CONFIG_CMD_SNTP
 
diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h
index 7cf641f..f110490 100644
--- a/include/configs/ms7722se.h
+++ b/include/configs/ms7722se.h
@@ -35,7 +35,6 @@
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_NFS
 #define CONFIG_CMD_PING
-#define CONFIG_CMD_DFL
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_MEMORY
 #define CONFIG_CMD_SAVEENV
diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h
index 03f52f3..52e15cc 100644
--- a/include/configs/ms7750se.h
+++ b/include/configs/ms7750se.h
@@ -38,7 +38,6 @@
  */
 /*#include <config_cmd_default.h>*/
 
-#define CONFIG_CMD_DFL
 #define CONFIG_CMD_FLASH
 #define CONFIG_CMD_SAVEENV
 
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 01360f6..4ac17cc 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -122,7 +122,7 @@
 #define CONFIG_CMD_NET      /* bootp, tftpboot, rarpboot    */
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
-#define CONFIG_CMD_SETECPR	/* Evaluate expressions		*/
+#define CONFIG_CMD_SETEXPR	/* Evaluate expressions		*/
 
 #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h
index dc5ec3a..5d0c385 100644
--- a/include/configs/quad100hd.h
+++ b/include/configs/quad100hd.h
@@ -69,7 +69,6 @@
 #define CONFIG_CMD_I2C
 #undef CONFIG_CMD_IRQ
 #define CONFIG_CMD_JFFS2
-#undef CONFIG_CMD_LOG
 #undef CONFIG_CMD_MII
 #define CONFIG_CMD_NAND
 #undef CONFIG_CMD_PING
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index 0ce3fa8..9cdfc14 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -15,7 +15,6 @@
  */
 #include <config_cmd_default.h>
 
-#define CONFIG_CMD_DFL
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_FLASH
 #define CONFIG_CMD_PCI
diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h
index 73d2a87..708bff7 100644
--- a/include/configs/sh7757lcr.h
+++ b/include/configs/sh7757lcr.h
@@ -41,7 +41,6 @@
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_NFS
-#define CONFIG_CMD_DFL
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_SF
 #define CONFIG_CMD_RUN
diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h
index 1e71bcc..9c32bfc 100644
--- a/include/configs/sh7785lcr.h
+++ b/include/configs/sh7785lcr.h
@@ -37,7 +37,6 @@
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_NFS
-#define CONFIG_CMD_DFL
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_RUN
 #define CONFIG_CMD_SAVEENV
diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index 5fef8cc..a791815 100644
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -41,7 +41,7 @@
 
 /* I2C driver configuration */
 #define CONFIG_HARD_I2C
-#define CONFIG_SPEAR_I2C
+#define CONFIG_DW_I2C
 #define CONFIG_SYS_I2C_SPEED			400000
 #define CONFIG_SYS_I2C_SLAVE			0x02
 
diff --git a/include/configs/u8500_href.h b/include/configs/u8500_href.h
index 4747fbd..95028de 100644
--- a/include/configs/u8500_href.h
+++ b/include/configs/u8500_href.h
@@ -95,7 +95,6 @@
 #define CONFIG_CMD_MMC
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_EXT2
-#define CONFIG_CMD_EMMC
 #define CONFIG_CMD_SOURCE
 #define CONFIG_CMD_I2C
 
diff --git a/include/configs/zeus.h b/include/configs/zeus.h
index 63279b0..2556e3b 100644
--- a/include/configs/zeus.h
+++ b/include/configs/zeus.h
@@ -78,7 +78,6 @@
 #define CONFIG_CMD_ELF
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_IRQ
-#define CONFIG_CMD_LOG
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_NFS