diff options
Diffstat (limited to 'include/configs')
136 files changed, 162 insertions, 420 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 7d3ebf3..3ad9f80 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -50,9 +50,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -65,7 +62,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ @@ -225,13 +222,11 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD #define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_SYS_FSL_DDR3 #ifndef CONFIG_SPL_BUILD #define CONFIG_FSL_DDR_INTERACTIVE #endif diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index eecbd75..a6f73f2 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -46,8 +46,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE /* BOOKE */ -#define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ @@ -72,7 +70,6 @@ #define CONFIG_SYS_MEMTEST_END 0x01ffffff /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #undef CONFIG_SYS_DDR_RAW_TIMING #undef CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -87,7 +84,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 6663a92..8aec315 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_TEXT_BASE 0x11000000 #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif -#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769 1 #ifdef CONFIG_SPIFLASH #define CONFIG_RAMBOOT_SPIFLASH #define CONFIG_SYS_RAMBOOT @@ -69,8 +68,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE /* BOOKE */ -#define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ @@ -127,7 +124,6 @@ #define CONFIG_SYS_MEMTEST_END 0x01ffffff /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x54 /* I2C access */ #define SPD_EEPROM_ADDRESS2 0x56 /* I2C access */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 79cf09e..53ee98c 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -68,8 +68,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE /* BOOKE */ -#define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ @@ -128,7 +126,6 @@ #define CONFIG_PANIC_HANG /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x50 diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 753ce13..7107a47 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -24,7 +24,6 @@ #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR -#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ESDHC_USE_PIO #define CONFIG_GENERIC_MMC diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 12b1ce5..3d3eeb5 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -60,21 +60,16 @@ #define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/ /* - * define CONFIG_SYS_FSL_DDR2 to use unified DDR driver - * undefine it to use old spd_sdram.c + * SYS_FSL_DDR2 is selected in Kconfig to use unified DDR driver + * unselect it to use old spd_sdram.c */ -#define CONFIG_SYS_FSL_DDR2 -#ifdef CONFIG_SYS_FSL_DDR2 -#define CONFIG_SYS_FSL_DDRC_GEN2 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x52 #define SPD_EEPROM_ADDRESS2 0x51 -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 2 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xDeadBeef -#endif /* * 32-bit data path mode. diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index b17a6c5..ce33405 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -37,10 +37,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -/* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ - #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ @@ -99,7 +95,6 @@ /* DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD @@ -110,7 +105,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 2 diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 9fd7109..3389a77 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -18,10 +18,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ - /* * default CCARBAR is at 0xff700000 * assume U-Boot is less than 0.5MB @@ -72,7 +68,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR1 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #undef CONFIG_FSL_DDR_INTERACTIVE @@ -82,7 +77,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 2dad188..00a18b5 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -14,8 +14,6 @@ #define __CONFIG_H /* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_SYS_TEXT_BASE 0xfff80000 @@ -45,7 +43,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR1 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #undef CONFIG_FSL_DDR_INTERACTIVE @@ -55,7 +52,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 4bab893..b9c62e1 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -11,10 +11,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ - #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xfff80000 #endif @@ -56,7 +52,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD @@ -68,7 +63,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_VERY_BIG_RAM -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 2 diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 41ba9e7..c241b51 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -13,10 +13,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ - #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xfff80000 #endif @@ -66,7 +62,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD @@ -78,7 +73,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 0f035dd..6faa230 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -14,8 +14,6 @@ #define __CONFIG_H /* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_SYS_TEXT_BASE 0xfff80000 @@ -45,7 +43,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR1 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #undef CONFIG_FSL_DDR_INTERACTIVE @@ -55,7 +52,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 343287e..e0d010a 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -19,8 +19,6 @@ #define __CONFIG_H /* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_CPM2 1 /* has CPM2 */ /* @@ -69,7 +67,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR1 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #undef CONFIG_FSL_DDR_INTERACTIVE @@ -79,7 +76,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 3cddb5f..0d3707f 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -10,10 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ - #define CONFIG_SYS_TEXT_BASE 0xfff80000 #define CONFIG_SYS_SRIO @@ -54,7 +50,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD @@ -65,7 +60,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index bd15645..3e00f69 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -10,10 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ - #define CONFIG_FSL_ELBC 1 /* Has Enhance localbus controller */ #define CONFIG_SYS_SRIO @@ -81,7 +77,6 @@ extern unsigned long get_clock_freq(void); #endif /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD @@ -93,7 +88,6 @@ extern unsigned long get_clock_freq(void); /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index bffcad1..5ca01e8 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -26,8 +26,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_MP 1 /* support multiple processors */ #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ @@ -84,7 +82,6 @@ /* DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD @@ -96,7 +93,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 2 diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 761032e..c5f3634 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -79,7 +79,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD for DDR */ #define CONFIG_DDR_SPD @@ -92,7 +91,6 @@ #define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT mapping size */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 8845ea9..fb66bb6 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -101,7 +101,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD @@ -114,7 +113,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT mapping size */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_DIMM_SLOTS_PER_CTLR 2 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 4d0ae9d..cd9cd9a 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -11,7 +11,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_E500 /* BOOKE e500 family */ #include <asm/config_mpc85xx.h> #define CONFIG_NAND_FSL_IFC @@ -131,8 +130,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE /* BOOKE */ -#define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ @@ -227,7 +224,6 @@ #define CONFIG_PANIC_HANG /* do not reset board on panic */ /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 1 diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 169f94a..505b417 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -86,8 +86,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE /* BOOKE */ -#define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE @@ -138,7 +136,6 @@ /* DDR Setup */ #define CONFIG_DDR_SPD #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_FSL_DDR3 #ifdef CONFIG_DDR_ECC #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER @@ -148,7 +145,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index d5728a1..d8ff10e 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -23,8 +23,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE /* BOOKE */ -#define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_MP /* support multiple processors */ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ @@ -70,7 +68,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SDRAM_SIZE 512u /* DDR is 512M */ #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 7a3fa03..3cd5c3c 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -28,9 +28,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -43,7 +40,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ @@ -168,7 +165,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x52 diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 303c73b..c9a1334 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -12,9 +12,6 @@ #define __T1024QDS_H /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ #define CONFIG_ENABLE_36BIT_PHYS @@ -25,7 +22,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_ENV_OVERWRITE @@ -251,9 +248,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 -#endif #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index e451851..36eba4e 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -12,9 +12,6 @@ #define __T1024RDB_H /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ #define CONFIG_ENABLE_36BIT_PHYS @@ -25,7 +22,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_ENV_OVERWRITE @@ -63,9 +60,9 @@ #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" -#if defined(CONFIG_T1024RDB) +#if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_nand_rcw.cfg -#elif defined(CONFIG_T1023RDB) +#elif defined(CONFIG_TARGET_T1023RDB) #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_nand_rcw.cfg #endif #define CONFIG_SPL_NAND_BOOT @@ -82,9 +79,9 @@ #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif -#if defined(CONFIG_T1024RDB) +#if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_spi_rcw.cfg -#elif defined(CONFIG_T1023RDB) +#elif defined(CONFIG_TARGET_T1023RDB) #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_spi_rcw.cfg #endif #define CONFIG_SPL_SPI_BOOT @@ -101,9 +98,9 @@ #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_MPC85XX_NO_RESETVEC #endif -#if defined(CONFIG_T1024RDB) +#if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_sd_rcw.cfg -#elif defined(CONFIG_T1023RDB) +#elif defined(CONFIG_TARGET_T1023RDB) #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_sd_rcw.cfg #endif #define CONFIG_SPL_MMC_BOOT @@ -178,9 +175,9 @@ #define CONFIG_ENV_SPI_MODE 0 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ -#if defined(CONFIG_T1024RDB) +#if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_ENV_SECT_SIZE 0x10000 -#elif defined(CONFIG_T1023RDB) +#elif defined(CONFIG_TARGET_T1023RDB) #define CONFIG_ENV_SECT_SIZE 0x40000 #endif #elif defined(CONFIG_SDCARD) @@ -193,9 +190,9 @@ #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE 0x2000 -#if defined(CONFIG_T1024RDB) +#if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_ENV_OFFSET (2 * CONFIG_SYS_NAND_BLOCK_SIZE) -#elif defined(CONFIG_T1023RDB) +#elif defined(CONFIG_TARGET_T1023RDB) #define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE) #endif #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) @@ -274,14 +271,12 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_FSL_DDR_INTERACTIVE -#if defined(CONFIG_T1024RDB) +#if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ -#elif defined(CONFIG_T1023RDB) -#define CONFIG_SYS_FSL_DDR4 +#elif defined(CONFIG_TARGET_T1023RDB) #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_SYS_SDRAM_SIZE 2048 #endif @@ -304,9 +299,9 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) /* NOR Flash Timing Params */ -#if defined(CONFIG_T1024RDB) +#if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80 -#elif defined(CONFIG_T1023RDB) +#elif defined(CONFIG_TARGET_T1023RDB) #define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(0) | \ CSOR_NAND_TRHZ_80 | CSOR_NOR_ADM_SHFT_MODE_EN) #endif @@ -333,7 +328,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} -#ifdef CONFIG_T1024RDB +#ifdef CONFIG_TARGET_T1024RDB /* CPLD on IFC */ #define CONFIG_SYS_CPLD_BASE 0xffdf0000 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) @@ -372,7 +367,7 @@ unsigned long get_board_ddr_clk(void); | CSPR_V) #define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) -#if defined(CONFIG_T1024RDB) +#if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ @@ -381,7 +376,7 @@ unsigned long get_board_ddr_clk(void); | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) -#elif defined(CONFIG_T1023RDB) +#elif defined(CONFIG_TARGET_T1023RDB) #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ @@ -709,7 +704,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_DPAA_FMAN -#ifdef CONFIG_T1024RDB +#ifdef CONFIG_TARGET_T1024RDB #define CONFIG_QE #define CONFIG_U_QE #endif @@ -733,10 +728,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_QE_FW_ADDR (512 * 0x920) #elif defined(CONFIG_NAND) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#if defined(CONFIG_T1024RDB) +#if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_SYS_QE_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) -#elif defined(CONFIG_T1023RDB) +#elif defined(CONFIG_TARGET_T1023RDB) #define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_SYS_QE_FW_ADDR (12 * CONFIG_SYS_NAND_BLOCK_SIZE) #endif @@ -764,12 +759,12 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PHYLIB_10G #define CONFIG_PHY_REALTEK #define CONFIG_PHY_AQUANTIA -#if defined(CONFIG_T1024RDB) +#if defined(CONFIG_TARGET_T1024RDB) #define RGMII_PHY1_ADDR 0x2 #define RGMII_PHY2_ADDR 0x6 #define SGMII_AQR_PHY_ADDR 0x2 #define FM1_10GEC1_PHY_ADDR 0x1 -#elif defined(CONFIG_T1023RDB) +#elif defined(CONFIG_TARGET_T1023RDB) #define RGMII_PHY1_ADDR 0x1 #define SGMII_RTK_PHY_ADDR 0x3 #define SGMII_AQR_PHY_ADDR 0x2 diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 7779c31..8d6d986 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -26,7 +26,6 @@ /* * T1040 QDS board configuration file */ -#define CONFIG_T1040QDS #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE @@ -36,9 +35,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -57,7 +53,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI_INDIRECT_BRIDGE @@ -167,14 +163,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 -#endif #define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 41cb43c..d574bbb 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -10,7 +10,6 @@ /* * T104x RDB board configuration file */ -#define CONFIG_E500 /* BOOKE e500 family */ #include <asm/config_mpc85xx.h> #ifdef CONFIG_RAMBOOT_PBL @@ -147,8 +146,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -167,7 +164,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI_INDIRECT_BRIDGE @@ -271,14 +268,10 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 -#endif #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 878dbed..210d8d8 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -14,19 +14,14 @@ #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ #define CONFIG_USB_EHCI #if defined(CONFIG_ARCH_T2080) -#define CONFIG_T2080QDS #define CONFIG_FSL_SATA_V2 #define CONFIG_SYS_SRIO /* Enable Serial RapidIO Support */ #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO2 /* SRIO port 2 */ #elif defined(CONFIG_ARCH_T2081) -#define CONFIG_T2081QDS #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ #define CONFIG_ENABLE_36BIT_PHYS @@ -37,7 +32,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_ENV_OVERWRITE @@ -225,7 +220,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index ee27a8f..1941188 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -11,15 +11,11 @@ #ifndef __T2080RDB_H #define __T2080RDB_H -#define CONFIG_T2080RDB #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ #define CONFIG_USB_EHCI #define CONFIG_FSL_SATA_V2 /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ #define CONFIG_ENABLE_36BIT_PHYS @@ -30,7 +26,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_ENV_OVERWRITE @@ -209,7 +205,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 5b3c6fa..e15b0ea 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -60,9 +60,6 @@ #define CONFIG_CMD_REGINFO /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -75,7 +72,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ @@ -130,13 +127,11 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 /* * IFC Definitions diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index 0775603..f32fb4d 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -115,11 +115,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -/* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 -/* #define CONFIG_MPC85xx */ - #define CONFIG_MP #define CONFIG_ENV_OVERWRITE @@ -181,7 +176,6 @@ /* DDR Setup */ #define CONFIG_DDR_ECC_ENABLE -#define CONFIG_SYS_FSL_DDR3 #ifndef CONFIG_DDR_ECC_ENABLE #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD @@ -195,7 +189,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Default settings for DDR3 */ diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 49c14df..0161dbe 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -281,12 +281,9 @@ #endif #ifdef CONFIG_USB_MUSB_GADGET -/* Removing USB gadget and can be enabled adter adding support usb DM */ -#ifndef CONFIG_DM_ETH #define CONFIG_USB_ETHER #define CONFIG_USB_ETH_RNDIS #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" -#endif /* CONFIG_DM_ETH */ #endif /* CONFIG_USB_MUSB_GADGET */ /* @@ -350,6 +347,7 @@ #define CONFIG_ENV_OFFSET 0x0 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) #define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_SYS_MMC_MAX_DEVICE 2 #elif defined(CONFIG_NOR_BOOT) #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index ad0de2c8..31b3925 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -76,7 +76,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} #define CONFIG_GENERIC_MMC 1 -#define CONFIG_OMAP_HSMMC 1 #define CONFIG_DOS_PARTITION 1 /* diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 3247a4a..c0d3617 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -78,7 +78,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 12a2877..1c76de0 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -29,7 +29,6 @@ /* SD/MMC support */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/apf27.h b/include/configs/apf27.h index e9d8232..314ac89 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -309,7 +309,6 @@ */ #ifdef CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_MXC_MMC #define CONFIG_MXC_MCI_REGS_BASE 0x10014000 #endif diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 296fbd1..2dd9d31 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -86,7 +86,6 @@ * SD/MMC configuration */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC #define CONFIG_DOS_PARTITION /* diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 2e43a09..528ed6f 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -29,7 +29,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index eb2419c..13d5ca1 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -49,7 +49,6 @@ /* MMC/SD IP block */ #if defined(CONFIG_EMMC_BOOT) #define CONFIG_GENERIC_MMC - #define CONFIG_OMAP_HSMMC #define CONFIG_SUPPORT_EMMC_BOOT #endif /* CONFIG_EMMC_BOOT */ diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h index ac338c4..8056426 100644 --- a/include/configs/brxre1.h +++ b/include/configs/brxre1.h @@ -44,7 +44,6 @@ /* MMC/SD IP block */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_SUPPORT_EMMC_BOOT /* Always 64 KiB env size */ diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index b7df2bc..96d3a0d 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -25,14 +25,11 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -#define CONFIG_MACH_TYPE MACH_TYPE_CARDHU - /* I2C */ #define CONFIG_SYS_I2C_TEGRA /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index 6eed4bc..9439863 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -31,7 +31,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 1ce27e3..0c72443 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -81,7 +81,6 @@ 115200} #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* USB */ diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index bae9697..874a889 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -88,7 +88,6 @@ #define CONFIG_OMAP_GPIO #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* USB */ diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index e9db97f..e141dfb 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -21,14 +21,11 @@ #define CONFIG_TEGRA_UARTA_SDIO1 #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -#define CONFIG_MACH_TYPE MACH_TYPE_COLIBRI_T20 - /* I2C */ #define CONFIG_SYS_I2C_TEGRA /* SD/MMC support */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* USB host support */ #define CONFIG_USB_EHCI diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index 4d13856..d78eb67 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -29,7 +29,6 @@ /* SD/MMC support */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 933b179..4cfd5b9 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -60,8 +60,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_NUM 1 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 - #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index e0290e7..1736097 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -35,8 +35,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE /* BOOKE */ -#define CONFIG_E500 /* BOOKE e500 family */ #define CONFIG_CONTROLCENTERD #define CONFIG_MP /* support multiple processors */ @@ -124,8 +122,6 @@ #define CONFIG_SYS_SDRAM_SIZE 1024 #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_FSL_DDR3 -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index c4d172d..c9c00c5 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -46,9 +46,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -61,7 +58,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ @@ -179,7 +176,6 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index 0307b14..14e207e 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -38,9 +38,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -51,7 +48,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ @@ -126,7 +123,6 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index ceb9cea..0ad6e4c 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -313,9 +313,7 @@ /* SD/MMC configuration */ #ifndef CONFIG_USE_NOR -#define CONFIG_DAVINCI_MMC_SD1 #define CONFIG_GENERIC_MMC -#define CONFIG_DAVINCI_MMC #endif /* diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 04ab48d..a0f04f9 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -25,7 +25,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/e2220-1170.h b/include/configs/e2220-1170.h index d4aca55..064906d 100644 --- a/include/configs/e2220-1170.h +++ b/include/configs/e2220-1170.h @@ -23,7 +23,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h index a83c617..9080b9a 100644 --- a/include/configs/edb93xx.h +++ b/include/configs/edb93xx.h @@ -229,16 +229,6 @@ #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE -/* Define to enable MMC on SPI support */ -/* #define CONFIG_EP93XX_SPI_MMC */ - -#ifdef CONFIG_EP93XX_SPI_MMC -#define CONFIG_EP93XX_SPI -#define CONFIG_GENERIC_MMC -#define CONFIG_MMC_SPI -#define CONFIG_MMC_SPI_NPOWER_EGPIO 9 -#endif - #define CONFIG_USB_OHCI_NEW #define CONFIG_USB_OHCI_EP93XX #define CONFIG_SYS_USB_OHCI_CPU_INIT diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h index 77b647e..554ca0e 100644 --- a/include/configs/evb_rk3288.h +++ b/include/configs/evb_rk3288.h @@ -12,11 +12,20 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 + +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* SPL @ 32k for 34k + * u-boot directly after @ 68k for 400k or so + * ENV @ 992k + */ +#define CONFIG_ENV_OFFSET ((1024-32) * 1024) +#else /* SPL @ 32k for ~36k * ENV @ 96k * u-boot @ 128K */ #define CONFIG_ENV_OFFSET (96 * 1024) +#endif #define CONFIG_SYS_WHITE_ON_BLACK diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 9328a22..cdbe154 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -39,8 +39,6 @@ /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC -#define CONFIG_EXYNOS_DWMMC #define CONFIG_BOUNCE_BUFFER /* PWM */ diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h index 77b647e..554ca0e 100644 --- a/include/configs/fennec_rk3288.h +++ b/include/configs/fennec_rk3288.h @@ -12,11 +12,20 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 + +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* SPL @ 32k for 34k + * u-boot directly after @ 68k for 400k or so + * ENV @ 992k + */ +#define CONFIG_ENV_OFFSET ((1024-32) * 1024) +#else /* SPL @ 32k for ~36k * ENV @ 96k * u-boot @ 128K */ #define CONFIG_ENV_OFFSET (96 * 1024) +#endif #define CONFIG_SYS_WHITE_ON_BLACK diff --git a/include/configs/harmony.h b/include/configs/harmony.h index cf3c493..e9781cc 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -28,7 +28,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* NAND support */ #define CONFIG_CMD_NAND diff --git a/include/configs/hikey.h b/include/configs/hikey.h index c725833..4048bce 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -72,8 +72,6 @@ /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC -#define CONFIG_HIKEY_DWMMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_FS_EXT4 diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index 9f07657..b224706 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -26,7 +26,6 @@ #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR -#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index 633941b..0ea6fcb 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -17,11 +17,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ /* - * Machine type - */ -#define CONFIG_MACH_TYPE MACH_TYPE_ICONNECT - -/* * Compression configuration */ #define CONFIG_BZIP2 diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 30168bc..0936344 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -138,7 +138,6 @@ * SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_MXC_MMC #define CONFIG_DOS_PARTITION /* diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index c1fa2c6..febedca 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -27,7 +27,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index e9e69a7..81da8ff 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -62,7 +62,6 @@ /* MMC/SD */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #undef CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_IS_IN_FAT @@ -77,6 +76,7 @@ #define CONFIG_CADENCE_QSPI #define CONFIG_CQSPI_REF_CLK 384000000 #define CONFIG_CQSPI_DECODER 0x0 +#define CONFIG_BOUNCE_BUFFER #endif #endif /* __CONFIG_K2G_EVM_H */ diff --git a/include/configs/kc1.h b/include/configs/kc1.h index 7a4ba09..c0562fd 100644 --- a/include/configs/kc1.h +++ b/include/configs/kc1.h @@ -89,7 +89,6 @@ */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC /* * Power diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index affcb48..b4cdb67 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -29,15 +29,12 @@ #define CONFIG_SYS_FSL_PBL_RCW board/keymile/kmp204x/rcw_kmp204x.cfg /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MP /* support multiple processors */ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ @@ -104,7 +101,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h index 4f0bd84..bc28525 100644 --- a/include/configs/kylin_rk3036.h +++ b/include/configs/kylin_rk3036.h @@ -19,9 +19,20 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */ #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ -#define CONFIG_ENV_OFFSET (SZ_4M - SZ_64K) /* reserved area */ -#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) -#define CONFIG_SYS_REDUNDAND_ENVIRONMENT + +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* SPL @ 32k for 34k + * u-boot directly after @ 68k for 400k or so + * ENV @ 992k + */ +#define CONFIG_ENV_OFFSET ((1024-32) * 1024) +#else +/* SPL @ 32k for ~36k + * ENV @ 96k + * u-boot @ 128K + */ +#define CONFIG_ENV_OFFSET (96 * 1024) +#endif #endif diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 3b118bb..402dab2 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -215,9 +215,7 @@ #define CONFIG_ENV_SIZE (16 << 10) /* SD/MMC configuration */ -#define CONFIG_DAVINCI_MMC_SD1 #define CONFIG_GENERIC_MMC -#define CONFIG_DAVINCI_MMC /* * Enable MMC commands only when diff --git a/include/configs/mcx.h b/include/configs/mcx.h index f15abd3..fd8cf1d 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -81,7 +81,6 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -#define CONFIG_OMAP_HSMMC #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index d42976b..1e94dac 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -21,7 +21,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* NAND support */ #define CONFIG_CMD_NAND diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 7abffdb..643413f 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -235,15 +235,13 @@ #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME XILINX_BOARD_NAME #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" -#define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 /* architecture dependent code */ #define CONFIG_SYS_USR_EXCEP /* user exception */ #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" +#ifndef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ "nor0=flash-0\0"\ "mtdparts=mtdparts=flash-0:"\ @@ -253,6 +251,7 @@ "setenv stdin nc\0" \ "serial=setenv stdout serial;"\ "setenv stdin serial\0" +#endif #define CONFIG_CMDLINE_EDITING @@ -284,7 +283,6 @@ #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" -#define CONFIG_SPL_RAM_DEVICE #ifdef CONFIG_SYS_FLASH_BASE # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE #endif diff --git a/include/configs/miniarm_rk3288.h b/include/configs/miniarm_rk3288.h index 9451365..5a623ca 100644 --- a/include/configs/miniarm_rk3288.h +++ b/include/configs/miniarm_rk3288.h @@ -17,11 +17,20 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 + +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* SPL @ 32k for 34k + * u-boot directly after @ 68k for 400k or so + * ENV @ 992k + */ +#define CONFIG_ENV_OFFSET ((1024-32) * 1024) +#else /* SPL @ 32k for ~36k * ENV @ 96k * u-boot @ 128K */ #define CONFIG_ENV_OFFSET (96 * 1024) +#endif #define CONFIG_SYS_WHITE_ON_BLACK diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 6e9b871..0a1563c 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -94,10 +94,8 @@ /* Secure boot (HAB) support */ #ifdef CONFIG_SECURE_BOOT #define CONFIG_CSF_SIZE 0x2000 -#define CONFIG_SYS_FSL_SEC_COMPAT 4 #define CONFIG_FSL_CAAM #define CONFIG_CMD_DEKBLOB -#define CONFIG_SYS_FSL_SEC_LE #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_DRIVERS_MISC_SUPPORT #endif diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index b9f25cf..be4d147 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -149,4 +149,12 @@ #define CONFIG_IOMUX_LPSR +/* USB Configs */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_RTL8152 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#endif + #endif /* __CONFIG_H */ diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 4348b43..16fedfb 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -74,10 +74,8 @@ /* Secure boot (HAB) support */ #ifdef CONFIG_SECURE_BOOT #define CONFIG_CSF_SIZE 0x2000 -#define CONFIG_SYS_FSL_SEC_COMPAT 4 #define CONFIG_FSL_CAAM #define CONFIG_CMD_DEKBLOB -#define CONFIG_SYS_FSL_SEC_LE #endif #endif diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 04c3ce9..b26bc01 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -150,7 +150,6 @@ #ifdef CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC #define CONFIG_BOUNCE_BUFFER -#define CONFIG_MXS_MMC #endif /* NAND */ diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 99ce60f..d2b8e39 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -94,7 +94,6 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* USB */ diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index ae49054..be0889d 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -26,7 +26,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 1a67584..0559462 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -48,7 +48,6 @@ /* MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC /* SPL */ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 30d3aa8..e6d7db0 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -28,7 +28,8 @@ #define CONFIG_REVISION_TAG 1 /* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */ -#if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032) +#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \ + (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) #define CONFIG_STATUS_LED #define CONFIG_BOARD_SPECIFIC_LED #define CONFIG_GPIO_LED @@ -36,8 +37,6 @@ #define RED_LED_GPIO 27 #elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) #define RED_LED_GPIO 16 -#else -#error "status LED not defined for this machine." #endif #define RED_LED_DEV 0 #define STATUS_LED_BIT RED_LED_GPIO diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index b38811e..71ae2be 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -31,7 +31,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG -#define CONFIG_CMDLINE_EDITING /* cmd line edit/history */ /* Hardware drivers */ @@ -124,9 +123,7 @@ "saveenv;" #define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x81000000\0" \ - "uimage=uImage\0" \ - "zimage=zImage\0" \ + DEFAULT_LINUX_BOOT_ENV \ "mtdids=" MTDIDS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ "mmcdev=0\0" \ @@ -156,18 +153,17 @@ "${optargs};" \ "run addmtdparts; " \ "run vrfb_arg\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ + "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ "bootscript=echo 'Running bootscript from mmc ...'; " \ "source ${loadaddr}\0" \ "loaduimage=mmc rescan; " \ - "fatload mmc ${mmcdev} ${loadaddr} ${uimage}\0" \ + "load mmc ${mmcdev} ${loadaddr} uImage\0" \ "loadzimage=mmc rescan; " \ - "fatload mmc ${mmcdev} ${loadaddr} ${zimage}\0" \ + "load mmc ${mmcdev} ${loadaddr} zImage\0" \ "ramdisksize=64000\0" \ - "ramdiskaddr=0x82000000\0" \ "ramdiskimage=rootfs.ext2.gz.uboot\0" \ "loadramdisk=mmc rescan; " \ - "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}\0" \ + "load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \ "ramargs=run setconsole; setenv bootargs console=${console} " \ "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \ "mmcargs=run setconsole; setenv bootargs console=${console} " \ @@ -184,15 +180,14 @@ "ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \ "nfsrootpath=/opt/nfs-exports/omap\0" \ "autoload=no\0" \ - "fdtaddr=0x86000000\0" \ - "loadfdtimage=mmc rescan; " \ - "fatload mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \ + "loadfdt=mmc rescan; " \ + "load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \ "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \ "run mmcargs; " \ "run common_bootargs; " \ "run dump_bootargs; " \ "run loadzimage; " \ - "run loadfdtimage; " \ + "run loadfdt; " \ "bootz ${loadaddr} - ${fdtaddr}\0" \ "mmcramboot=echo 'Booting uImage kernel from mmc w/ramdisk...'; " \ "run ramargs; " \ @@ -200,22 +195,22 @@ "run dump_bootargs; " \ "run loaduimage; " \ "run loadramdisk; " \ - "bootm ${loadaddr} ${ramdiskaddr}\0" \ + "bootm ${loadaddr} ${rdaddr}\0" \ "mmcrambootz=echo 'Booting zImage kernel from mmc w/ramdisk...'; " \ "run ramargs; " \ "run common_bootargs; " \ "run dump_bootargs; " \ "run loadzimage; " \ "run loadramdisk; " \ - "run loadfdtimage; " \ - "bootz ${loadaddr} ${ramdiskaddr} ${fdtaddr};\0" \ + "run loadfdt; " \ + "bootz ${loadaddr} ${rdaddr} ${fdtaddr};\0" \ "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \ "run ramargs; " \ "run common_bootargs; " \ "run dump_bootargs; " \ "tftpboot ${loadaddr} ${zimage}; " \ - "tftpboot ${ramdiskaddr} ${ramdiskimage}; " \ - "bootm ${loadaddr} ${ramdiskaddr}\0" \ + "tftpboot ${rdaddr} ${ramdiskimage}; " \ + "bootm ${loadaddr} ${rdaddr}\0" \ "tftpbootz=echo 'Booting kernel NFS rootfs...'; " \ "dhcp;" \ "run nfsargs;" \ @@ -228,7 +223,6 @@ "run autoboot" /* Miscellaneous configurable options */ -#define CONFIG_AUTO_COMPLETE /* memtest works on */ #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index cdc93c3..43da339 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -315,9 +315,6 @@ #define CONFIG_CMD_UBIFS #endif -#ifdef CONFIG_USE_SPIFLASH -#endif - #if !defined(CONFIG_USE_NAND) && \ !defined(CONFIG_SYS_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH) @@ -329,7 +326,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_DAVINCI_MMC #ifdef CONFIG_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 8668495..f91a762 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -258,10 +258,6 @@ #endif #endif -/* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 - #define CONFIG_MP #define CONFIG_FSL_ELBC @@ -318,7 +314,6 @@ #endif /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 1 @@ -336,7 +331,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Default settings for DDR3 */ diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index a9b2020..63825b0 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -38,10 +38,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -/* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 - #define CONFIG_MP #define CONFIG_FSL_ELBC @@ -85,7 +81,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_512M #define CONFIG_CHIP_SELECTS_PER_CTRL 1 @@ -94,7 +89,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Default settings for DDR3 */ diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h index cd981b9..a1a518e 100644 --- a/include/configs/p2371-0000.h +++ b/include/configs/p2371-0000.h @@ -23,7 +23,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 7ff545c..b80d8db 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -23,7 +23,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/p2571.h b/include/configs/p2571.h index 7daaf8e..ef1ae3f 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -24,7 +24,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h index 0864e4d..e1e3d72 100644 --- a/include/configs/p2771-0000.h +++ b/include/configs/p2771-0000.h @@ -19,7 +19,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 0cefee3..13d5aa9 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -24,7 +24,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 3963efd..f3cf954 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -70,9 +70,6 @@ #define CONFIG_SYS_FSL_ESDHC_NUM 1 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/ -#define CONFIG_SYS_FSL_ERRATUM_ESDHC135 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 8ad5af1..889ef40 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -21,7 +21,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* NAND support */ #define CONFIG_CMD_NAND diff --git a/include/configs/popmetal_rk3288.h b/include/configs/popmetal_rk3288.h index 77b647e..554ca0e 100644 --- a/include/configs/popmetal_rk3288.h +++ b/include/configs/popmetal_rk3288.h @@ -12,11 +12,20 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 + +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* SPL @ 32k for 34k + * u-boot directly after @ 68k for 400k or so + * ENV @ 992k + */ +#define CONFIG_ENV_OFFSET ((1024-32) * 1024) +#else /* SPL @ 32k for ~36k * ENV @ 96k * u-boot @ 128K */ #define CONFIG_ENV_OFFSET (96 * 1024) +#endif #define CONFIG_SYS_WHITE_ON_BLACK diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 2c85f65..9517674 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -12,10 +12,6 @@ #define CONFIG_CMD_REGINFO -/* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ - #undef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xf01000 /* 15 MB */ diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 27dfbce..1fd33a0 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -38,7 +38,6 @@ /* MMC/SD IP block */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_FAT_WRITE diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 535797a..33b1f0e 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -41,7 +41,6 @@ /* MMC/SD IP block */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_FAT_WRITE @@ -88,6 +87,13 @@ #define CONFIG_G_DNL_VENDOR_NUM 0x2207 #define CONFIG_G_DNL_PRODUCT_NUM 0x320a +/* usb host support */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_DWC2 +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_ETHER_ASIX +#endif #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00000000\0" \ "pxefile_addr_r=0x00100000\0" \ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index eab3f04..db0657b 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -28,7 +28,6 @@ /* MMC/SD IP block */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index 9ec71c4..be53e65 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -14,7 +14,9 @@ /* First try to boot from SD (index 0), then eMMC (index 1 */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(MMC, mmc, 1) + func(MMC, mmc, 1) \ + func(PXE, pxe, na) \ + func(DHCP, dchp, na) /* Enable gpt partition table */ #define CONFIG_CMD_GPT diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 45d8824..ce539a0 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -24,21 +24,6 @@ (&((struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR)->clo) #endif -/* - * 2835 is a SKU in a series for which the 2708 is the first or primary SoC, - * so 2708 has historically been used rather than a dedicated 2835 ID. - * - * We don't define a machine type for bcm2709/bcm2836 since the RPi Foundation - * chose to use someone else's previously registered machine ID (3139, MX51_GGC) - * rather than obtaining a valid ID:-/ - * - * For the bcm2837, hopefully a machine type is not needed, since everything - * is DT. - */ -#ifdef CONFIG_BCM2835 -#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708 -#endif - /* Memory layout */ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x00000000 diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h index c55f6b9..9ee68dd 100644 --- a/include/configs/s32v234evb.h +++ b/include/configs/s32v234evb.h @@ -82,8 +82,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR #define CONFIG_SYS_FSL_ESDHC_NUM 1 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 - #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC /* #define CONFIG_CMD_EXT2 EXT2 Support */ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 617be27..281a993 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -36,8 +36,6 @@ /* * High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_SBC8548 1 /* SBC8548 board specific */ /* @@ -98,7 +96,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #undef CONFIG_DDR_ECC /* only for ECC DDR module */ /* @@ -119,7 +116,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_VERY_BIG_RAM -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 2 diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 87056db..f02634b 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -57,7 +57,6 @@ #undef CONFIG_DDR_ECC /* only for ECC DDR module */ #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef -#define CONFIG_NUM_DDR_CONTROLLERS 2 #define CACHE_LINE_INTERLEAVING 0x20000000 #define PAGE_INTERLEAVING 0x21000000 #define BANK_INTERLEAVING 0x22000000 @@ -103,7 +102,6 @@ #define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT mapping size */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_DIMM_SLOTS_PER_CTLR 2 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 3ee6555..388010c 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -33,7 +33,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index e4d0ad9..e93ce93 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -78,7 +78,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION #define CONFIG_SPI diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index df5fe21..fd35f71 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -52,7 +52,6 @@ #define CONFIG_SYS_MAXARGS 32 /* setting board specific options */ -#define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB #define CONFIG_AUTO_COMPLETE #define CONFIG_ENV_OVERWRITE 1 /* Overwrite ethaddr / serial# */ #define CONFIG_AUTO_COMPLETE diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 0a3d242..4d05786 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -96,7 +96,6 @@ */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC /* * Power diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 2c40827..6285266 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -144,9 +144,6 @@ #ifdef CONFIG_CMD_MMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC -#define CONFIG_SOCFPGA_DWMMC -#define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH 1024 /* FIXME */ /* using smaller max blk cnt to avoid flooding the limited stack we have */ #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 /* FIXME -- SPL only? */ @@ -207,6 +204,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() #endif #define CONFIG_CQSPI_DECODER 0 +#define CONFIG_BOUNCE_BUFFER /* * Designware SPI support @@ -308,7 +306,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * 0xFFFF_FF00 ...... End of SRAM */ #define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_RAM_DEVICE #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE (64 * 1024) diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 81afed0..6480116 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -18,8 +18,6 @@ #define __CONFIG_H /* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_SOCRATES 1 #define CONFIG_SYS_TEXT_BASE 0xfff80000 @@ -70,7 +68,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD @@ -82,7 +79,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_VERY_BIG_RAM -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 2 diff --git a/include/configs/strider.h b/include/configs/strider.h index 9733299..3be2597 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -26,7 +26,6 @@ #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR -#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index bfd1bd7..09a3064 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -74,6 +74,7 @@ #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ #define CONFIG_CQSPI_DECODER 0 #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 +#define CONFIG_BOUNCE_BUFFER #endif diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index b0bfc0d..d58e5ba 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -35,7 +35,7 @@ /* * High Level Configuration Options */ -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64) #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ #endif @@ -141,7 +141,6 @@ /* mmc config */ #ifdef CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_MMC_SUNXI #define CONFIG_MMC_SUNXI_SLOT 0 #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ @@ -183,7 +182,9 @@ #define CONFIG_SPL_FRAMEWORK +#ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */ #define CONFIG_SPL_BOARD_LOAD_IMAGE +#endif #if defined(CONFIG_MACH_SUN9I) #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index e2b1171..0f59eb1 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -13,9 +13,6 @@ #define CONFIG_CMD_REGINFO /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -28,7 +25,7 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ @@ -86,13 +83,11 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 #define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 /* * IFC Definitions diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 44201a2..5ddc848 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -73,7 +73,6 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -#define CONFIG_OMAP_HSMMC #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 03fc42c..42d3060 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -71,7 +71,6 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 115200 #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* GPIO banks */ diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index 067e171..dbc9fc0 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -22,7 +22,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/tec.h b/include/configs/tec.h index c03dabf..278668c 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -21,7 +21,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* NAND support */ #define CONFIG_CMD_NAND diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 5144d5a..4560019 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -118,9 +118,6 @@ #ifdef CONFIG_GENERIC_MMC #undef CONFIG_GENERIC_MMC #endif -#ifdef CONFIG_TEGRA_MMC -#undef CONFIG_TEGRA_MMC -#endif #ifdef CONFIG_CMD_MMC #endif diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 23a0e78..f30fec8 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -98,7 +98,6 @@ /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_RAM_DEVICE #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 86ab1e0..a43b977 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -114,7 +114,6 @@ #define CONFIG_OMAP_GPIO #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /** diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index d909f25..9c8eabf 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -53,7 +53,6 @@ #define CONFIG_CMD_ASKEN #define CONFIG_OMAP_GPIO #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION #define CONFIG_FS_FAT diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index d841b3f..809d015 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -56,7 +56,7 @@ * supports X-MODEM loading via UART, and we leverage this and then use * Y-MODEM to load u-boot.img, when booted over UART. */ -#define CONFIG_SPL_TEXT_BASE 0x402F0400 +#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index dbe494a..6a94cd7 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -124,8 +124,7 @@ "fit_bootfile=fitImage.itb\0" \ "update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile}\0" \ "args_fit=setenv bootargs console=${console} \0" \ - "loadfit=run args_fit; bootm ${loadaddr}:kernel@1 " \ - "${loadaddr}:ramdisk@1 ${loadaddr}:${fdtfile};\0" \ + "loadfit=run args_fit; bootm ${loadaddr}#${fdtfile};\0" \ /* * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined, diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h index 6d9d4b2..de14b85 100644 --- a/include/configs/ti_armv7_omap.h +++ b/include/configs/ti_armv7_omap.h @@ -20,9 +20,6 @@ #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 #define CONFIG_SYS_I2C_OMAP24XX -/* MMC/SD IP block */ -#define CONFIG_OMAP_HSMMC - /* SPI IP Block */ #define CONFIG_OMAP3_SPI diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 1c36d07..a300f38 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -24,7 +24,6 @@ #define CONFIG_ARM_ERRATA_430973 #define CONFIG_ARM_ERRATA_621766 -#define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM * 64 bytes before this address should be set aside for u-boot.img's @@ -89,7 +88,6 @@ /* MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* I2C */ diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index ff00614..874351d 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -29,7 +29,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in SPI */ #define CONFIG_ENV_IS_IN_SPI_FLASH diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h index 9050ae4..261daef 100644 --- a/include/configs/ts4800.h +++ b/include/configs/ts4800.h @@ -21,8 +21,6 @@ #define CONFIG_HW_WATCHDOG -#define CONFIG_MACH_TYPE MACH_TYPE_TS48XX - /* text base address used when linking */ #define CONFIG_SYS_TEXT_BASE 0x90008000 @@ -59,8 +57,6 @@ #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 - #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/venice2.h b/include/configs/venice2.h index 7c7b200..ec12133 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -24,7 +24,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/ventana.h b/include/configs/ventana.h index f5459a8..615acfe 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -18,11 +18,8 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -#define CONFIG_MACH_TYPE MACH_TYPE_VENTANA - /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 20f0d6e..f122c98 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -68,8 +68,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_NUM 1 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 - #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/whistler.h b/include/configs/whistler.h index ffd9a2c..30a48e8 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -19,14 +19,11 @@ #define CONFIG_TEGRA_UARTA_UAA_UAB #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -#define CONFIG_MACH_TYPE MACH_TYPE_WHISTLER - /* I2C */ #define CONFIG_SYS_I2C_TEGRA /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* * Environment in eMMC, at the end of 2nd "boot sector". Note: This assumes diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 74cbfcf..9be9d47 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -86,6 +86,10 @@ # ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000 # endif +# define CONFIG_ENV_IS_IN_FAT +# define FAT_ENV_DEVICE_AND_PART "0:auto" +# define FAT_ENV_FILE "uboot.env" +# define FAT_ENV_INTERFACE "mmc" #endif #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQMP_USB) @@ -105,7 +109,6 @@ #if defined(CONFIG_ZYNQMP_USB) #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 -#define CONFIG_USB_XHCI_ZYNQMP #define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000 #define DFU_DEFAULT_POLL_TIMEOUT 300 @@ -123,17 +126,43 @@ #define DFU_ALT_INFO \ DFU_ALT_INFO_RAM + +#ifndef CONFIG_SPL_BUILD +# define CONFIG_USB_FUNCTION_FASTBOOT +# define CONFIG_CMD_FASTBOOT +# define CONFIG_ANDROID_BOOT_IMAGE +# define CONFIG_FASTBOOT_BUF_ADDR 0x100000 +# define CONFIG_FASTBOOT_BUF_SIZE 0x6000000 +# define CONFIG_FASTBOOT_FLASH +# ifdef CONFIG_ZYNQ_SDHCI +# define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 +# endif +# define CONFIG_PARTITION_UUIDS +# define CONFIG_CMD_GPT + +# define CONFIG_RANDOM_UUID +# define PARTS_DEFAULT \ + "partitions=uuid_disk=${uuid_gpt_disk};" \ + "name=""boot"",size=16M,uuid=${uuid_gpt_boot};" \ + "name=""Linux"",size=-M,uuid=${uuid_gpt_Linux}\0" +#endif #endif #if !defined(DFU_ALT_INFO) # define DFU_ALT_INFO #endif +#if !defined(PARTS_DEFAULT) +# define PARTS_DEFAULT +#endif + #define CONFIG_BOARD_LATE_INIT /* Do not preserve environment */ +#if !defined(CONFIG_ENV_IS_IN_FAT) #define CONFIG_ENV_IS_NOWHERE 1 -#define CONFIG_ENV_SIZE 0x1000 +#endif +#define CONFIG_ENV_SIZE 0x8000 /* Monitor Command Prompt */ /* Console I/O Buffer Size */ @@ -258,7 +287,6 @@ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_RAM_DEVICE /* u-boot is like dtb */ #define CONFIG_SPL_FS_LOAD_ARGS_NAME "u-boot.bin" diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h index b19a552..e3797a8 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h @@ -12,7 +12,6 @@ #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_SDHCI1 -#define CONFIG_AHCI #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} #include <configs/xilinx_zynqmp.h> diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index df36ad7..0d5b1ff 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -35,14 +35,12 @@ /* * DDR config */ -#define CONFIG_SYS_FSL_DDR2 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x54 /* Both channels use the */ #define SPD_EEPROM_ADDRESS2 0x54 /* same SPD data */ #define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */ -#define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_DDR_ECC diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index fee8c34..b88aeb4 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -14,8 +14,6 @@ /* * High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_XPEDITE5200 1 #define CONFIG_SYS_BOARD_NAME "XPedite5200" #define CONFIG_SYS_FORM_PMC_XMC 1 @@ -34,13 +32,11 @@ /* * DDR config */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x54 -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 2 #define CONFIG_DDR_ECC diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index 7e811d5..5d78560 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -14,8 +14,6 @@ /* * High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_SYS_BOARD_NAME "XPedite5370" #define CONFIG_SYS_FORM_3U_VPX 1 #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ @@ -43,7 +41,6 @@ /* * DDR config */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD @@ -51,7 +48,6 @@ #define SPD_EEPROM_ADDRESS1 0x54 /* Both channels use the */ #define SPD_EEPROM_ADDRESS2 0x54 /* same SPD data */ #define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */ -#define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_DDR_ECC diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 4dfb79d..35e6350 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -14,8 +14,6 @@ /* * High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_XPEDITE550X 1 #define CONFIG_SYS_BOARD_NAME "XPedite5500" #define CONFIG_SYS_FORM_PMC_XMC 1 @@ -44,13 +42,11 @@ /* * DDR config */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x54 #define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */ -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 2 #define CONFIG_DDR_ECC diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index 7038e6b..e3e19dc 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_TIMER_COUNTER \ (&((struct gpt_regs *)IMX_GPT1_BASE)->counter) -#define CONFIG_MACH_TYPE MACH_TYPE_ZMX25 /* * Environment settings */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 2fe6897..36dc140 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -43,7 +43,6 @@ # define CONFIG_PHY_MARVELL # define CONFIG_PHY_REALTEK # define CONFIG_PHY_XILINX -# define CONFIG_BOOTP_SERVERIP # define CONFIG_BOOTP_BOOTPATH # define CONFIG_BOOTP_GATEWAY # define CONFIG_BOOTP_HOSTNAME @@ -247,9 +246,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -/* Physical Memory map */ -#define CONFIG_SYS_TEXT_BASE 0x4000000 - #ifndef CONFIG_NR_DRAM_BANKS # define CONFIG_NR_DRAM_BANKS 1 #endif @@ -294,7 +290,6 @@ #define CONFIG_CMD_SPL #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_RAM_DEVICE #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" |