diff options
Diffstat (limited to 'include/configs')
31 files changed, 1013 insertions, 1286 deletions
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 0c0ae02..c9a0f60 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -91,7 +91,6 @@ extern unsigned long get_clock_freq(void); #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN /* possible DLL fix needed */ #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index bdc93b6..92b7d6a 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -589,7 +589,7 @@ +------+----------------+------------------------------------------------------------ | # | Name | Comment +------+----------------+------------------------------------------------------------ - | IRQ1 | UINTER_3V | S interupt chips interrupt (common) + | IRQ1 | UINTER_3V | S interrupt chips interrupt (common) | IRQ3 | IRQ_DSP | DSP interrupt | IRQ4 | IRQ_DSP1 | Extra DSP interrupt +------+----------------+------------------------------------------------------------ diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index 4f14a02..95f3a2c 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -536,16 +536,16 @@ extern unsigned long get_clock_freq(void); #define CONFIG_FMAN_ENET #endif +#define CONFIG_SYS_FMAN_FW #ifndef CONFIG_NAND /* Default address of microcode for the Linux Fman driver */ /* QE microcode/firmware address */ #define CONFIG_SYS_FMAN_FW_ADDR 0xEF000000 -#define CONFIG_SYS_FMAN_FW_ADDR_PHYS CONFIG_SYS_FMAN_FW_ADDR #else #define CONFIG_SYS_QE_FW_IN_NAND 0x1f00000 -#define CONFIG_SYS_FMAN_FW_ADDR 0x10000000 -#define CONFIG_SYS_FMAN_FW_LENGTH 0x10000 #endif +#define CONFIG_SYS_FMAN_FW_LENGTH 0x10000 +#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_FMAN_FW_LENGTH) #ifdef CONFIG_FMAN_ENET #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h new file mode 100644 index 0000000..638dbe7 --- /dev/null +++ b/include/configs/P2041RDB.h @@ -0,0 +1,646 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * P2041 RDB board configuration file + * + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_P2041RDB +#define CONFIG_PHYS_64BIT +#define CONFIG_PPC_P2041 + +#ifdef CONFIG_RAMBOOT_PBL +#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#endif + +/* High Level Configuration Options */ +#define CONFIG_BOOKE +#define CONFIG_E500 /* BOOKE e500 family */ +#define CONFIG_E500MC /* BOOKE e500mc family */ +#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ +#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ +#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ +#define CONFIG_MP /* support multiple processors */ + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#endif + +#ifndef CONFIG_RESET_VECTOR_ADDRESS +#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#endif + +#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ +#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ +#define CONFIG_PCI /* Enable PCI/PCIE */ +#define CONFIG_PCIE1 /* PCIE controler 1 */ +#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ + +#define CONFIG_SYS_SRIO +#define CONFIG_SRIO1 /* SRIO port 1 */ +#define CONFIG_SRIO2 /* SRIO port 2 */ + +#define CONFIG_FSL_LAW /* Use common FSL init code */ + +#define CONFIG_ENV_OVERWRITE + +#ifdef CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_NOWHERE +#else +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#endif + +#if defined(CONFIG_SPIFLASH) + #define CONFIG_SYS_EXTRA_ENV_RELOC + #define CONFIG_ENV_IS_IN_SPI_FLASH + #define CONFIG_ENV_SPI_BUS 0 + #define CONFIG_ENV_SPI_CS 0 + #define CONFIG_ENV_SPI_MAX_HZ 10000000 + #define CONFIG_ENV_SPI_MODE 0 + #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ + #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ + #define CONFIG_ENV_SECT_SIZE 0x10000 +#elif defined(CONFIG_SDCARD) + #define CONFIG_SYS_EXTRA_ENV_RELOC + #define CONFIG_ENV_IS_IN_MMC + #define CONFIG_SYS_MMC_ENV_DEV 0 + #define CONFIG_ENV_SIZE 0x2000 + #define CONFIG_ENV_OFFSET (512 * 1097) +#else + #define CONFIG_ENV_IS_IN_FLASH + #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE \ + - CONFIG_ENV_SECT_SIZE) + #define CONFIG_ENV_SIZE 0x2000 + #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ +#endif + +#define CONFIG_SYS_CLK_FREQ 66666666 + +/* + * These can be toggled for performance analysis, otherwise use default. + */ +#define CONFIG_SYS_CACHE_STASHING +#define CONFIG_BACKSIDE_L2_CACHE +#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E +#define CONFIG_BTB /* toggle branch predition */ + +#define CONFIG_ENABLE_36BIT_PHYS + +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_ADDR_MAP +#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ +#endif + +#define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ +#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00400000 +#define CONFIG_SYS_ALT_MEMTEST +#define CONFIG_PANIC_HANG /* do not reset board on panic */ + +/* + * Config the L3 Cache as L3 SRAM + */ +#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | \ + CONFIG_RAMBOOT_TEXT_BASE) +#else +#define CONFIG_SYS_INIT_L3_ADDR_PHYS CONFIG_SYS_INIT_L3_ADDR +#endif +#define CONFIG_SYS_L3_SIZE (1024 << 10) +#define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE) + +/* + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) + */ +#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 /* CCSRBAR Default */ +#define CONFIG_SYS_CCSRBAR 0xfe000000 /* relocated CCSRBAR */ +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_CCSRBAR_PHYS 0xffe000000ull +#else +#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR +#endif +/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR + +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_DCSRBAR 0xf0000000 +#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull +#endif + +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 + +/* + * DDR Setup + */ +#define CONFIG_VERY_BIG_RAM +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE + +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) + +#define CONFIG_DDR_SPD +#define CONFIG_FSL_DDR3 + +#define CONFIG_SYS_SPD_BUS_NUM 0 +#define SPD_EEPROM_ADDRESS 0x52 +#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ + +/* + * Local Bus Definitions + */ + +/* Set the local bus clock 1/8 of platform clock */ +#define CONFIG_SYS_LBC_LCRR LCRR_CLKDIV_8 + +#define CONFIG_SYS_FLASH_BASE 0xe8000000 /* Start of PromJet */ +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe8000000ull +#else +#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE +#endif + +#define CONFIG_SYS_BR0_PRELIM \ + (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) +#define CONFIG_SYS_OR0_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \ + | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR) + +#define CONFIG_FSL_CPLD +#define CPLD_BASE 0xffdf0000 /* CPLD registers */ +#ifdef CONFIG_PHYS_64BIT +#define CPLD_BASE_PHYS 0xfffdf0000ull +#else +#define CPLD_BASE_PHYS CPLD_BASE +#endif + +#define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(CPLD_BASE_PHYS) | BR_PS_8 | BR_V) +#define CONFIG_SYS_OR3_PRELIM 0xffffeff7 /* 32KB but only 4k mapped */ + +#define PIXIS_LBMAP_SWITCH 7 +#define PIXIS_LBMAP_MASK 0xf0 +#define PIXIS_LBMAP_SHIFT 4 +#define PIXIS_LBMAP_ALTBANK 0x40 + +#define CONFIG_SYS_FLASH_QUIET_TEST +#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Write Timeout (ms) */ + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#if defined(CONFIG_RAMBOOT_PBL) +#define CONFIG_SYS_RAMBOOT +#endif + +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_HWCONFIG + +/* define to use L1 as initial stack */ +#define CONFIG_L1_INIT_RAM +#define CONFIG_SYS_INIT_RAM_LOCK +#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR +/* The assembler doesn't like typecast */ +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ + ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#else +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS +#endif +#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 + +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) + +/* Serial Port - controlled on board with jumper J8 + * open - index 2 + * shorted - index 1 + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) + +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} + +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) +#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) +#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) +#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) + +/* Use the HUSH parser */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP +#define CONFIG_OF_STDOUT_VIA_ALIAS + +/* new uImage format support */ +#define CONFIG_FIT +#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ + +/* I2C */ +#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ +#define CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_CMD_TREE +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_OFFSET 0x118000 +#define CONFIG_SYS_I2C2_OFFSET 0x118100 + +/* + * RapidIO + */ +#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull +#else +#define CONFIG_SYS_SRIO1_MEM_PHYS 0xa0000000 +#endif +#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ + +#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull +#else +#define CONFIG_SYS_SRIO2_MEM_PHYS 0xb0000000 +#endif +#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ + +/* + * eSPI - Enhanced SPI + */ +#define CONFIG_FSL_ESPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED 10000000 +#define CONFIG_SF_DEFAULT_MODE 0 + +/* + * General PCI + * Memory space is mapped 1-1, but I/O space must start from 0. + */ + +/* controller 1, direct to uli, tgtid 3, Base address 20000 */ +#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#else +#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 +#endif +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull +#else +#define CONFIG_SYS_PCIE1_IO_PHYS 0xf8000000 +#endif +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ + +/* controller 2, Slot 2, tgtid 2, Base address 201000 */ +#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#else +#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 +#endif +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull +#else +#define CONFIG_SYS_PCIE2_IO_PHYS 0xf8010000 +#endif +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ + +/* controller 3, Slot 1, tgtid 1, Base address 202000 */ +#define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull +#else +#define CONFIG_SYS_PCIE3_MEM_BUS 0xc0000000 +#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc0000000 +#endif +#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 +#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull +#else +#define CONFIG_SYS_PCIE3_IO_PHYS 0xf8020000 +#endif +#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ + +/* Qman/Bman */ +#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ +#define CONFIG_SYS_BMAN_NUM_PORTALS 10 +#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#else +#define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE +#endif +#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000 +#define CONFIG_SYS_QMAN_NUM_PORTALS 10 +#define CONFIG_SYS_QMAN_MEM_BASE 0xf4200000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_QMAN_MEM_PHYS 0xff4200000ull +#else +#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE +#endif +#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 + +#define CONFIG_SYS_DPAA_FMAN +#define CONFIG_SYS_DPAA_PME +/* Default address of microcode for the Linux Fman driver */ +#define CONFIG_SYS_FMAN_FW +#if defined(CONFIG_SPIFLASH) +/* + * env is stored at 0x100000, sector size is 0x10000, ucode is stored after + * env, so we got 0x110000. + */ +#define CONFIG_SYS_QE_FW_IN_SPIFLASH 0x110000 +#elif defined(CONFIG_SDCARD) +/* + * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is + * about 545KB (1089 blocks), Env is stored after the image, and the env size is + * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130. + */ +#define CONFIG_SYS_QE_FW_IN_MMC (512 * 1130) +#elif defined(CONFIG_NAND) +#define CONFIG_SYS_QE_FW_IN_NAND (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#else +#define CONFIG_SYS_FMAN_FW_ADDR 0xEF000000 +#endif +#define CONFIG_SYS_FMAN_FW_LENGTH 0x10000 +#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_FMAN_FW_LENGTH) + +#ifdef CONFIG_SYS_DPAA_FMAN +#define CONFIG_FMAN_ENET +#endif + +#ifdef CONFIG_PCI +#define CONFIG_NET_MULTI +#define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_E1000 + +#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ +#define CONFIG_DOS_PARTITION +#endif /* CONFIG_PCI */ + +/* SATA */ +#define CONFIG_FSL_SATA_V2 +#ifdef CONFIG_FSL_SATA_V2 +#define CONFIG_LIBATA +#define CONFIG_FSL_SATA + +#define CONFIG_SYS_SATA_MAX_DEVICE 2 +#define CONFIG_SATA1 +#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR +#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA +#define CONFIG_SATA2 +#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR +#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA + +#define CONFIG_LBA48 +#define CONFIG_CMD_SATA +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2 +#endif + +#ifdef CONFIG_FMAN_ENET +#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2 +#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x3 +#define CONFIG_SYS_FM1_DTSEC3_PHY_ADDR 0x4 +#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 0x1 +#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x0 + +#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR 0x1c +#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR 0x1d +#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e +#define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR 0x1f + +#define CONFIG_SYS_TBIPA_VALUE 8 +#define CONFIG_MII /* MII PHY management */ +#define CONFIG_ETHPRIME "FM1@DTSEC1" +#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ +#endif + +/* + * Environment + */ +#define CONFIG_LOADS_ECHO /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ELF +#define CONFIG_CMD_ERRATA +#define CONFIG_CMD_GREPENV +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SETEXPR + +#ifdef CONFIG_PCI +#define CONFIG_CMD_PCI +#define CONFIG_CMD_NET +#endif + +/* +* USB +*/ +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_CMD_EXT2 + +#define CONFIG_MMC + +#ifdef CONFIG_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_CMDLINE_EDITING /* Command-line editing */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#ifdef CONFIG_CMD_KGDB +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_HZ 1000 /* decrementer freq 1ms ticks */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 64 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux */ +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ + +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#endif + +/* + * Environment Configuration + */ +#define CONFIG_ROOTPATH /opt/nfsroot +#define CONFIG_BOOTFILE uImage +#define CONFIG_UBOOTPATH u-boot.bin + +/* default location for tftp and bootm */ +#define CONFIG_LOADADDR 1000000 + +#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ + +#define CONFIG_BAUDRATE 115200 + +#define __USB_PHY_TYPE utmi + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ + "bank_intlv=cs0_cs1\0" \ + "netdev=eth0\0" \ + "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ + "ubootaddr=" MK_STR(CONFIG_SYS_TEXT_BASE) "\0" \ + "tftpflash=tftpboot $loadaddr $uboot && " \ + "protect off $ubootaddr +$filesize && " \ + "erase $ubootaddr +$filesize && " \ + "cp.b $loadaddr $ubootaddr $filesize && " \ + "protect on $ubootaddr +$filesize && " \ + "cmp.b $loadaddr $ubootaddr $filesize\0" \ + "consoledev=ttyS0\0" \ + "usb_phy_type=" MK_STR(__USB_PHY_TYPE) "\0" \ + "usb_dr_mode=host\0" \ + "ramdiskaddr=2000000\0" \ + "ramdiskfile=p2041rdb/ramdisk.uboot\0" \ + "fdtaddr=c00000\0" \ + "fdtfile=p2041rdb/p2041rdb.dtb\0" \ + "bdev=sda3\0" \ + "c=ffe\0" + +#define CONFIG_HDBOOT \ + "setenv bootargs root=/dev/$bdev rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" + +#define CONFIG_NFSBOOTCOMMAND \ + "setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$serverip:$rootpath " \ + "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" + +#define CONFIG_RAMBOOTCOMMAND \ + "setenv bootargs root=/dev/ram rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $ramdiskaddr $ramdiskfile;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr $ramdiskaddr $fdtaddr" + +#define CONFIG_BOOTCOMMAND CONFIG_HDBOOT + +#ifdef CONFIG_SECURE_BOOT +#include <asm/fsl_secure_boot.h> +#endif + +#endif /* __CONFIG_H */ diff --git a/include/configs/PCI5441.h b/include/configs/PCI5441.h index 70775e7..ae5bc2e 100644 --- a/include/configs/PCI5441.h +++ b/include/configs/PCI5441.h @@ -118,6 +118,7 @@ * TMRMS represents the desired mecs per tick (msecs per interrupt). *----------------------------------------------------------------------*/ #define CONFIG_SYS_HZ 1000 /* Always 1000 */ +#define CONFIG_SYS_LOW_RES_TIMER #define CONFIG_SYS_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */ #define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */ #define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/ diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h index b466c4b..95c30cc 100644 --- a/include/configs/PK1C20.h +++ b/include/configs/PK1C20.h @@ -128,6 +128,7 @@ * TMRMS represents the desired mecs per tick (msecs per interrupt). *----------------------------------------------------------------------*/ #define CONFIG_SYS_HZ 1000 /* Always 1000 */ +#define CONFIG_SYS_LOW_RES_TIMER #define CONFIG_SYS_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */ #define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */ #define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period */ diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 7c9dd79..5cd517d 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -39,7 +39,7 @@ #define CONFIG_SYS_TEXT_BASE 0x80000000 -/* IMMR Base Addres Register, use Freescale default: 0xff400000 */ +/* IMMR Base Address Register, use Freescale default: 0xff400000 */ #define CONFIG_SYS_IMMR 0xff400000 /* System clock. Primary input clock when in PCI host mode */ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 79a958d..b336723 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -147,10 +147,16 @@ * DDR Setup */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory */ + #if defined(CONFIG_TQM_BIGFLASH) || \ (!defined(CONFIG_TQM8548_AG) && !defined(CONFIG_TQM8548_BE)) #define CONFIG_SYS_PPC_DDR_WIMGE (MAS2_I | MAS2_G) +#define CONFIG_SYS_DDR_EARLY_SIZE_MB (512) +#else +#define CONFIG_SYS_PPC_DDR_WIMGE (0) +#define CONFIG_SYS_DDR_EARLY_SIZE_MB (2 * 1024) #endif + #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #ifdef CONFIG_TQM8548_AG #define CONFIG_VERY_BIG_RAM diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 80ad342..18aaadf 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -190,7 +190,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ - "console=ttyS2,115200n8\0" \ + "console=ttyO2,115200n8\0" \ "mmcargs=setenv bootargs console=${console} " \ "root=/dev/mmcblk0p2 rw " \ "rootfstype=ext3 rootwait\0" \ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index c9cc22a..adf9906 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -487,12 +487,27 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME /* Default address of microcode for the Linux Fman driver */ -#define CONFIG_SYS_FMAN_FW_ADDR 0xEF000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_FMAN_FW_ADDR_PHYS 0xFEF000000ULL +#define CONFIG_SYS_FMAN_FW +#if defined(CONFIG_SPIFLASH) +/* + * env is stored at 0x100000, sector size is 0x10000, ucode is stored after + * env, so we got 0x110000. + */ +#define CONFIG_SYS_QE_FW_IN_SPIFLASH 0x110000 +#elif defined(CONFIG_SDCARD) +/* + * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is + * about 545KB (1089 blocks), Env is stored after the image, and the env size is + * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130. + */ +#define CONFIG_SYS_QE_FW_IN_MMC (512 * 1130) +#elif defined(CONFIG_NAND) +#define CONFIG_SYS_QE_FW_IN_NAND (6 * CONFIG_SYS_NAND_BLOCK_SIZE) #else -#define CONFIG_SYS_FMAN_FW_ADDR_PHYS CONFIG_SYS_FMAN_FW_ADDR +#define CONFIG_SYS_FMAN_FW_ADDR 0xEF000000 #endif +#define CONFIG_SYS_FMAN_FW_LENGTH 0x10000 +#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_FMAN_FW_LENGTH) #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET @@ -580,6 +595,7 @@ #define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_CMD_EXT2 +#define CONFIG_HAS_FSL_DR_USB #define CONFIG_MMC @@ -664,8 +680,7 @@ "fdtaddr=c00000\0" \ "fdtfile=p4080ds/p4080ds.dtb\0" \ "bdev=sda3\0" \ - "c=ffe\0" \ - "fman_ucode="MK_STR(CONFIG_SYS_FMAN_FW_ADDR_PHYS)"\0" + "c=ffe\0" #define CONFIG_HDBOOT \ "setenv bootargs root=/dev/$bdev rw " \ diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index c738b3a..ec5223c 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -86,10 +86,38 @@ #define CONFIG_BZIP2 /* + * Video + */ +#define CONFIG_VIDEO + +#ifdef CONFIG_VIDEO +#define CONFIG_VIDEO_MB862xx +#define CONFIG_VIDEO_MB862xx_ACCEL +#define CONFIG_VIDEO_CORALP +#define CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_VIDEO_SW_CURSOR +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SPLASH_SCREEN +#define CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) /* decompressed img */ + +/* Coral-PA clock frequency, geo and other both 133MHz */ +#define CONFIG_SYS_MB862xx_CCF 0x00050000 +/* Video SDRAM parameters */ +#define CONFIG_SYS_MB862xx_MMR 0x11d7fa72 +#endif + +/* * Command line configuration. */ #include <config_cmd_default.h> +#ifdef CONFIG_VIDEO +#define CONFIG_CMD_BMP +#endif #define CONFIG_CMD_DFL #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h index a04ac49..7d3363a 100644 --- a/include/configs/efikamx.h +++ b/include/configs/efikamx.h @@ -38,6 +38,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_SYS_TEXT_BASE 0x97800000 + #define CONFIG_SYS_L2CACHE_OFF /* @@ -47,6 +49,7 @@ #define CONFIG_CMD_SF #define CONFIG_CMD_MMC #define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #undef CONFIG_CMD_IMLS diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 34bd899..89e4911 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -47,4 +47,15 @@ #define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */ #define CONFIG_BOARD_EARLY_INIT_F + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA2_MMC +#define CONFIG_CMD_MMC + +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT #endif /* __CONFIG_H */ diff --git a/include/configs/hcu4.h b/include/configs/hcu4.h deleted file mode 100644 index c56efde..0000000 --- a/include/configs/hcu4.h +++ /dev/null @@ -1,275 +0,0 @@ -/* - *(C) Copyright 2005-2008 Netstal Maschinen AG - * Niklaus Giger (Niklaus.Giger@netstal.com) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************************************ - * hcu4.h - configuration for HCU4 board (similar to hcu5.h) - ***********************************************************************/ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/*----------------------------------------------------------------------- - * High Level Configuration Options - *----------------------------------------------------------------------*/ -#define CONFIG_HCU4 1 /* Board is HCU4 */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ -#define CONFIG_405GP 1 -#define CONFIG_4xx 1 -#define CONFIG_HOSTNAME hcu4 - -#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 - -/* - * Include common defines/options for all boards produced by Netstal Maschinen - */ -#include "netstal-common.h" - -#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ - -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ -#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ - -/*----------------------------------------------------------------------- - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) -*----------------------------------------------------------------------*/ -#define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ - - -#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ -#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - -/* ... with on-chip memory here (4KBytes) */ -#define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000 -#define CONFIG_SYS_OCM_DATA_SIZE 0x00001000 -/* Do not set up locked dcache as init ram. */ -#undef CONFIG_SYS_INIT_DCACHE_CS - -/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */ -#define CONFIG_SYS_TEMP_STACK_OCM 1 - -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* OCM */ -#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) - -/*----------------------------------------------------------------------- - * Serial Port - *----------------------------------------------------------------------*/ -/* - * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1. - * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31. - * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value. - * The Linux BASE_BAUD define should match this configuration. - * baseBaud = cpuClock/(uartDivisor*16) - * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock, - * set Linux BASE_BAUD to 403200. - */ -#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ -#define CONFIG_SYS_BASE_BAUD 691200 - -/* Set console baudrate to 9600 */ -#define CONFIG_BAUDRATE 9600 - -/*----------------------------------------------------------------------- - * Flash - *----------------------------------------------------------------------*/ - -/* Use common CFI driver */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -/* board provides its own flash_init code */ -#define CONFIG_FLASH_CFI_LEGACY 1 -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT -#define CONFIG_SYS_FLASH_LEGACY_512Kx8 1 - -/* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_EMPTY_INFO - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 8 /* max number of sectors on one chip */ - -/*----------------------------------------------------------------------- - * Environment - *----------------------------------------------------------------------*/ - -#undef CONFIG_ENV_IS_IN_NVRAM -#define CONFIG_ENV_IS_IN_FLASH -#undef CONFIG_ENV_IS_NOWHERE - -#ifdef CONFIG_ENV_IS_IN_EEPROM -/* Put the environment after the SDRAM configuration */ -#define PROM_SIZE 2048 -#define CONFIG_ENV_OFFSET 512 -#define CONFIG_ENV_SIZE (PROM_SIZE-CONFIG_ENV_OFFSET) -#endif - -#ifdef CONFIG_ENV_IS_IN_FLASH -/* Put the environment in Flash */ -#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ -#define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */ - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) -#endif - -/*----------------------------------------------------------------------- - * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the - * the first internal I2C controller of the PPC440EPx - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_SPD_BUS_NUM 0 - -#define CONFIG_IPADDR 172.25.1.14 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_NETSTAL_DEF_ENV \ - CONFIG_NETSTAL_DEF_ENV_POWERPC \ - "" - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_I2C -#define CONFIG_CMD_IMMAP -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_MII -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_SDRAM - -/* SPD EEPROM (sdram speed config) disabled */ -#define CONFIG_SPD_EEPROM 1 -#define SPD_EEPROM_ADDRESS 0x50 - -/* POST support */ -#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ - CONFIG_SYS_POST_CPU | \ - CONFIG_SYS_POST_UART | \ - CONFIG_SYS_POST_I2C | \ - CONFIG_SYS_POST_CACHE | \ - CONFIG_SYS_POST_ETHER | \ - CONFIG_SYS_POST_SPR) - -#define CONFIG_SYS_POST_UART_TABLE { CONFIG_SYS_NS16550_COM1 } -#undef CONFIG_LOGBUFFER -#define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */ -#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ - -/*----------------------------------------------------------------------- - * Miscellaneous configurable options - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -#if defined(CONFIG_CMD_KGDB) - #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else - #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ - - -#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ - -/*----------------------------------------------------------------------- - * External Bus Controller (EBC) Setup - */ - -#define CONFIG_SYS_EBC_CFG 0x98400000 - -/* Memory Bank 0 (Flash Bank 0) initialization */ -#define CONFIG_SYS_EBC_PB0AP 0x02005400 -#define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */ - -#define CONFIG_SYS_EBC_PB1AP 0x03041200 -#define CONFIG_SYS_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */ - -#define CONFIG_SYS_EBC_PB2AP 0x02054500 -#define CONFIG_SYS_EBC_PB2CR 0x78018000 /* BAS=,BS=MB,BU=R/W,BW=bit */ - -#define CONFIG_SYS_EBC_PB3AP 0x01840300 -#define CONFIG_SYS_EBC_PB3CR 0x7c0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */ - -#define CONFIG_SYS_EBC_PB4AP 0x01800300 -#define CONFIG_SYS_EBC_PB4CR 0x7e0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */ - -#define CONFIG_SYS_GPIO0_OR 0xF27FFFFF /* GPIO value */ -#define CONFIG_SYS_GPIO0_TCR 0x7FFE0000 /* GPIO value */ -#define CONFIG_SYS_GPIO0_ODR 0x00E897FC /* GPIO value */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20)/* Initial Memory map for Linux */ - -/* Init Memory Controller: - * - * BR0/1 and OR0/1 (FLASH) - */ - -#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */ -#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ - - -/* Configuration Port location */ -#define CONFIG_PORT_ADDR 0xF0000500 - -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#endif - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -#endif /* __CONFIG_H */ diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h deleted file mode 100644 index 0c8fdf5..0000000 --- a/include/configs/hcu5.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - * (C) Copyright 2007-2008 Netstal Maschinen AG - * Niklaus Giger (Niklaus.Giger@netstal.com) - * - * (C) Copyright 2006-2007 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * (C) Copyright 2006 - * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com - * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************************************ - * hcu5.h - configuration for HCU5 board (derived from sequoia.h) - ***********************************************************************/ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/*----------------------------------------------------------------------- - * High Level Configuration Options - *----------------------------------------------------------------------*/ -#define CONFIG_HCU5 1 /* Board is HCU5 */ -#define CONFIG_440EPX 1 /* Specific PPC440EPx */ -#define CONFIG_440 1 /* ... PPC440 family */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ -#define CONFIG_HOSTNAME hcu5 - -#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 - -/* - * Include common defines/options for all boards produced by Netstal Maschinen - */ -#include "netstal-common.h" - -#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ -#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ - -/*----------------------------------------------------------------------- - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ - -#define CONFIG_SYS_TLB_FOR_BOOT_FLASH 3 -#define CONFIG_SYS_BOOT_BASE_ADDR 0xfff00000 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ -#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */ -#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE -#define CONFIG_SYS_PCI_BASE 0xe0000000 /* Internal PCI regs */ -#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ -#define CONFIG_SYS_PCI_MEMBASE1 CONFIG_SYS_PCI_MEMBASE + 0x10000000 -#define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000 -#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000 - -#define CONFIG_SYS_USB2D0_BASE 0xe0000100 -#define CONFIG_SYS_USB_DEVICE 0xe0000000 -#define CONFIG_SYS_USB_HOST 0xe0000400 - -/*----------------------------------------------------------------------- - * Initial RAM & stack pointer - *----------------------------------------------------------------------*/ -/* 440EPx/440GRx have 16KB of internal SRAM, so no need for D-Cache */ -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_BASE /* OCM */ - -#define CONFIG_SYS_INIT_RAM_SIZE (4 << 10) -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) - -/*----------------------------------------------------------------------- - * Serial Port - *----------------------------------------------------------------------*/ -#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */ -#define CONFIG_BAUDRATE 115200 - -/*----------------------------------------------------------------------- - * Environment - *----------------------------------------------------------------------*/ - -#undef CONFIG_ENV_IS_IN_NVRAM -#define CONFIG_ENV_IS_IN_FLASH -#undef CONFIG_ENV_IS_IN_EEPROM -#undef CONFIG_ENV_IS_NOWHERE - -#ifdef CONFIG_ENV_IS_IN_EEPROM -/* Put the environment after the SDRAM and bootstrap configuration */ -#define PROM_SIZE 2048 -#define CONFIG_SYS_BOOSTRAP_OPTION_OFFSET 512 -#define CONFIG_ENV_OFFSET (CONFIG_SYS_BOOSTRAP_OPTION_OFFSET + 0x10) -#define CONFIG_ENV_SIZE (PROM_SIZE-CONFIG_ENV_OFFSET) -#endif - -#ifdef CONFIG_ENV_IS_IN_FLASH -/* Put the environment in Flash */ -#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ -#define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */ - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) - -#endif - -/*----------------------------------------------------------------------- - * DDR SDRAM - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_MBYTES_SDRAM (128) /* 128 MB or 256 MB */ -#define CONFIG_SYS_DDR_CACHED_ADDR 0x50000000 /* setup 2nd TLB cached here */ -#undef CONFIG_DDR_DATA_EYE /* Do not use DDR2 optimization */ -#define CONFIG_DDR_ECC 1 /* enable ECC */ - -/* Following two definitions must be kept in sync with config.h of vxWorks */ -#define USER_RESERVED_MEM ( 0) /* in kB */ -#define PM_RESERVED_MEM ( 64) /* in kB: pmLib reserved area size */ -#define CONFIG_PRAM ( USER_RESERVED_MEM + PM_RESERVED_MEM ) - -#define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ - /* 440EPx errata CHIP 11 */ - -/*----------------------------------------------------------------------- - * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the - * the second internal I2C controller of the PPC440EPx - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_SPD_BUS_NUM 1 - -/* Setup some board specific values for the default environment variables */ -#define CONFIG_IPADDR 172.25.1.15 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_NETSTAL_DEF_ENV \ - CONFIG_NETSTAL_DEF_ENV_POWERPC \ - "" - -#define CONFIG_M88E1111_PHY 1 -#define CONFIG_IBM_EMAC4_V4 1 - -#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ -#define CONFIG_PHY1_ADDR 2 - -/* USB */ -#define CONFIG_USB_OHCI -#define CONFIG_USB_STORAGE - -/* Comment this out to enable USB 1.1 device */ -#define USB_2_0_DEVICE - -/* Partitions */ -#define CONFIG_MAC_PARTITION -#define CONFIG_DOS_PARTITION -#define CONFIG_ISO_PARTITION - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_FAT -#define CONFIG_CMD_I2C -#define CONFIG_CMD_IMMAP -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_MII -#define CONFIG_CMD_NET -#define CONFIG_CMD_NFS -#define CONFIG_CMD_PING -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_SDRAM -#define CONFIG_CMD_USB - -/* POST support */ -#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ - CONFIG_SYS_POST_UART | \ - CONFIG_SYS_POST_I2C | \ - CONFIG_SYS_POST_CACHE | \ - CONFIG_SYS_POST_FPU | \ - CONFIG_SYS_POST_ETHER | \ - CONFIG_SYS_POST_SPR) - -#define CONFIG_SYS_POST_UART_TABLE { CONFIG_SYS_NS16550_COM1 } -#define CONFIG_SYS_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */ -#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ - -#define CONFIG_SUPPORT_VFAT - -/*----------------------------------------------------------------------- - * Miscellaneous configurable options - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ - -/*----------------------------------------------------------------------- - * PCI stuff - *----------------------------------------------------------------------*/ -/* General PCI */ -#define CONFIG_PCI 1 /* include pci support */ -#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */ -#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr map to CONFIG_SYS_PCI_MEMBASE*/ - -/* Board-specific PCI */ -#define CONFIG_SYS_PCI_TARGET_INIT -#define CONFIG_SYS_PCI_MASTER_INIT - -#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ -#define CONFIG_SYS_PCI_SUBSYS_ID 0xcafe /* Whatever */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -/*----------------------------------------------------------------------- - * Flash - *----------------------------------------------------------------------*/ - -/* Use common CFI driver */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -/* board provides its own flash_init code */ -#define CONFIG_FLASH_CFI_LEGACY 1 -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT -#define CONFIG_SYS_FLASH_LEGACY_512Kx8 1 - -/* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_EMPTY_INFO - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 8 /* max number of sectors on one chip */ - -/*----------------------------------------------------------------------- - * External Bus Controller (EBC) Setup - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_FLASH CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_CS_1 0xC8000000 /* CAN */ -#define CONFIG_SYS_CS_2 0xCC000000 /* CPLD and IMC-Bus Standard */ -#define CONFIG_SYS_CPLD CONFIG_SYS_CS_2 -#define CONFIG_SYS_CS_3 0xCE000000 /* CPLD and IMC-Bus Fast */ - -#define CONFIG_SYS_BOOTFLASH_CS 0 /* Boot Flash chip connected to CSx */ -#define CONFIG_SYS_EBC_PB0AP 0x02005400 -#define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* (CONFIG_SYS_FLASH | 0xda000) */ -#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */ - -/* Memory Bank 1 CAN-Chips initialization */ -#define CONFIG_SYS_EBC_PB1AP 0x02054500 -#define CONFIG_SYS_EBC_PB1CR 0xC8018000 - -/* Memory Bank 2 CPLD/IMC-Bus standard initialization */ -#define CONFIG_SYS_EBC_PB2AP 0x01840300 -#define CONFIG_SYS_EBC_PB2CR 0xCC0BA000 - -/* Memory Bank 3 IMC-Bus fast mode initialization */ -#define CONFIG_SYS_EBC_PB3AP 0x01800300 -#define CONFIG_SYS_EBC_PB3CR 0xCE0BA000 - -/* Memory Bank 4 (not used) initialization */ -#undef CONFIG_SYS_EBC_PB4AP -#undef CONFIG_SYS_EBC_PB4CR - -/* Memory Bank 5 (not used) initialization */ -#undef CONFIG_SYS_EBC_PB5AP -#undef CONFIG_SYS_EBC_PB5CR - -#define HCU_CPLD_VERSION_REGISTER ( CONFIG_SYS_CPLD + 0x0F00000 ) -#define HCU_HW_VERSION_REGISTER ( CONFIG_SYS_CPLD + 0x1400000 ) - -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#ifdef CONFIG_SYS_HUSH_PARSER - #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#endif - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -#endif /* __CONFIG_H */ diff --git a/include/configs/incaip.h b/include/configs/incaip.h index f2950e8..0e5ad2b 100644 --- a/include/configs/incaip.h +++ b/include/configs/incaip.h @@ -31,6 +31,8 @@ #define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */ #define CONFIG_INCA_IP 1 /* on a INCA-IP Board */ +#define CONFIG_XWAY_SWAP_BYTES + /* * Clock for the MIPS core (MHz) * allowed values: 100000000, 133000000, and 150000000 (default) @@ -39,7 +41,7 @@ #define CONFIG_CPU_CLOCK_RATE 150000000 #endif -#define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */ +#define CONFIG_SYS_XWAY_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 70c9dad..bc1edaf 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -83,27 +83,11 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE #define CONFIG_SYS_BOARD_DRAM_INIT /* Used board specific dram_init */ -/* - * How to get access to the slot ID. Put this here to make it easy - * to modify in a centralized location. This is used in the HDLC - * driver to set the MAC. -*/ -#define CONFIG_CHECK_ETHERNET_PRESENT -#define CONFIG_SYS_SLOT_ID_BASE CONFIG_SYS_KMBEC_FPGA_BASE -#define CONFIG_SYS_SLOT_ID_OFF (0x07) /* register offset */ -#define CONFIG_SYS_SLOT_ID_MASK (0x3f) /* mask for slot ID bits */ - #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_MAX_I2C_BUS 1 #define CONFIG_SYS_I2C_INIT_BOARD #define CONFIG_I2C_MUX -/* EEprom support */ -#define CONFIG_SYS_I2C_MULTI_EEPROMS -#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 - /* Support the IVM EEprom */ #define CONFIG_SYS_IVM_EEPROM_ADR 0x50 #define CONFIG_SYS_IVM_EEPROM_MAX_LEN 0x400 @@ -128,11 +112,12 @@ #define CONFIG_MTD_DEVICE #define CONFIG_MTD_CONCAT -/* common powerpc specific env settings */ +#define CONFIG_CMD_CRAMFS +#define CONFIG_CRAMFS_CMDLINE + #ifndef CONFIG_KM_DEF_ENV_BOOTPARAMS #define CONFIG_KM_DEF_ENV_BOOTPARAMS \ - "bootparams=empty\0" \ - "initial_boot_bank=0\0" + "actual_bank=0\0" #endif #ifndef CONFIG_KM_DEF_NETDEV @@ -151,98 +136,49 @@ #define str(s) #s /* - * bootrunner - * - run all commands in 'subbootcmds' - * - on error, stop running the remaing commands - */ -#define CONFIG_KM_DEF_ENV_BOOTRUNNER \ - "bootrunner=" \ - "break=0; " \ - "for subbootcmd in ${subbootcmds}; do " \ - "if test ${break} -eq 0; then; " \ - "print ${subbootcmd}; " \ - "run ${subbootcmd} || break=1; " \ - "fi; " \ - "done\0" \ - "" - -/* * boottargets - * - set 'subbootcmds' for the bootrunner + * - set 'subbootcmds' * - set 'bootcmd' and 'altbootcmd' * available targets: * - 'release': for a standalone system kernel/rootfs from flash - * - * - 'commonargs': bootargs common to all targets */ #define CONFIG_KM_DEF_ENV_BOOTTARGETS \ - "commonargs=" \ - "addip " \ - "addtty " \ - "addmem " \ - "addinit " \ - "addvar " \ - "addmtdparts " \ - "addbootcount " \ - "\0" \ - "release=" \ - "setenv actual_bank ${initial_boot_bank} && " \ - "setenv subbootcmds \"" \ - "checkboardid " \ - "ubiattach ubicopy " \ - "cramfsloadfdt cramfsloadkernel " \ - "flashargs ${commonargs} " \ - "addpanic boot " \ - "\" && " \ - "setenv bootcmd \'" \ - "run actual bootrunner; reset" \ - "\' && " \ - "setenv altbootcmd \'" \ - "run backup bootrunner; reset" \ - "\' && " \ - "saveenv && saveenv && " \ - "reset\0" \ - "debug_env=" \ - "tftp 200000 " CONFIG_KM_ARCH_DBG_FILE " && " \ + "subbootcmds=ubiattach ubicopy cramfsloadfdt cramfsloadkernel " \ + "flashargs add_default addpanic boot\0" \ + "develop=" \ + "tftp 200000 scripts/develop-${arch}.txt && " \ "env import -t 200000 ${filesize} && " \ - "run debug_env_common\0" \ + "run setup_debug_env\0" \ + "ramfs=" \ + "tftp 200000 scripts/ramfs-${arch}.txt && " \ + "env import -t 200000 ${filesize} && " \ + "run setup_debug_env\0" \ "" /* * bootargs * - modify 'bootargs' * - * - 'addip': add ip configuration - * - 'addmem': limit kernel memory mem= + * - 'add_default': default bootargs common for all arm/ppc boards * - 'addpanic': add kernel panic options - * - 'addtty': add console=... - * - 'addvar': add phram device for /var * - 'flashargs': defaults arguments for flash base boot * - * processor specific settings - * - 'addbootcount': add boot counter - * - 'addmtdparts': add mtd partition information */ #define CONFIG_KM_DEF_ENV_BOOTARGS \ - "addinit=" \ - "setenv bootargs ${bootargs} init=${init}\0" \ - "addip=" \ + "add_default=" \ "setenv bootargs ${bootargs} " \ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off\0" \ - "addmem=" \ - "setenv bootargs ${bootargs} mem=${pnvramaddr}\0" \ + ":${hostname}:${netdev}:off3" \ + " console=" CONFIG_KM_CONSOLE_TTY ",${baudrate}" \ + " mem=${pnvramaddr} init=${init}" \ + " phram.phram=phvar,${varaddr}," xstr(CONFIG_KM_PHRAM) \ + " ubi.mtd=" CONFIG_KM_UBI_LINUX_MTD_NAME " " \ + CONFIG_KM_DEF_BOOT_ARGS_CPU \ + "\0" \ "addpanic=" \ "setenv bootargs ${bootargs} panic=1 panic_on_oops=1\0" \ - "addtty=" \ - "setenv bootargs ${bootargs}" \ - " console=" CONFIG_KM_CONSOLE_TTY ",${baudrate}\0" \ - "addvar=" \ - "setenv bootargs ${bootargs} phram.phram=phvar," \ - "${varaddr}," xstr(CONFIG_KM_PHRAM) "\0" \ "flashargs=" \ "setenv bootargs " \ - "ubi.mtd=" CONFIG_KM_UBI_LINUX_MTD_NAME " " \ "root=mtdblock:rootfs${boot_bank} " \ "rootfstype=squashfs ro\0" \ "" @@ -261,9 +197,7 @@ */ #define CONFIG_KM_DEF_ENV_FLASH_BOOT \ "cramfsaddr=" xstr(CONFIG_KM_CRAMFS_ADDR) "\0" \ - "cramfsloadkernel=" \ - "cramfsload ${kernel_addr_r} uImage && " \ - "setenv actual_kernel_addr ${kernel_addr_r}\0" \ + "cramfsloadkernel=cramfsload ${load_addr_r} uImage\0" \ "ubiattach=ubi part " CONFIG_KM_UBI_PARTITION_NAME "\0" \ "ubicopy=ubi read "xstr(CONFIG_KM_CRAMFS_ADDR) \ " bootfs${boot_bank}\0" \ @@ -276,15 +210,11 @@ * - 'default': setup default environment */ #define CONFIG_KM_DEF_ENV_CONSTANTS \ - "actual=setenv boot_bank ${actual_bank}\0" \ - "backup=setenv boot_bank ${backup_bank}\0" \ - "actual_bank=${initial_boot_bank}\0" \ "backup_bank=0\0" \ - "default=" \ - "setenv default 'run newenv; reset' && " \ - "run release && saveenv; reset\0" \ - "checkboardid=km_checkbidhwk\0" \ + "release=run newenv; reset\0" \ "pnvramsize=" xstr(CONFIG_KM_PNVRAM) "\0" \ + "testbootcmd=setenv boot_bank ${test_bank}; " \ + "run ${subbootcmds}; reset\0" \ "" #ifndef CONFIG_KM_DEF_ENV @@ -292,24 +222,26 @@ CONFIG_KM_DEF_ENV_BOOTPARAMS \ CONFIG_KM_DEF_NETDEV \ CONFIG_KM_DEF_ENV_CPU \ - CONFIG_KM_DEF_ENV_BOOTRUNNER \ CONFIG_KM_DEF_ENV_BOOTTARGETS \ CONFIG_KM_DEF_ENV_BOOTARGS \ CONFIG_KM_DEF_ENV_FLASH_BOOT \ CONFIG_KM_DEF_ENV_CONSTANTS \ "altbootcmd=run bootcmd\0" \ - "bootcmd=run default\0" \ + "bootcmd=km_checkbidhwk && " \ + " setenv bootcmd \'setenv boot_bank ${actual_bank}; " \ + "run ${subbootcmds}; reset\' && " \ + "setenv altbootcmd \'setenv boot_bank ${backup_bank}; " \ + "run ${subbootcmds}; reset\' && " \ + "saveenv && saveenv && boot\0" \ "bootlimit=2\0" \ "init=/sbin/init-overlay.sh\0" \ - "kernel_addr_r="xstr(CONFIG_KM_KERNEL_ADDR) "\0" \ - "load=tftpboot ${u-boot_addr_r} ${u-boot}\0" \ + "load_addr_r="xstr(CONFIG_KM_KERNEL_ADDR) "\0" \ + "load=tftpboot ${load_addr_r} ${u-boot}\0" \ "mtdids=" MTDIDS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ "stderr=serial\0" \ "stdin=serial\0" \ "stdout=serial\0" \ - "u-boot="xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ - "u-boot_addr_r="xstr(CONFIG_KM_KERNEL_ADDR) "\0" \ "" #endif /* CONFIG_KM_DEF_ENV */ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index d6db8d7..506755b 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -29,6 +29,12 @@ #define CONFIG_CMD_DTT #define CONFIG_JFFS2_CMDLINE +/* EEprom support 24C08, 24C16, 24C64 */ +#define CONFIG_SYS_I2C_MULTI_EEPROMS +#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* 8 Byte write page */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 + #define CONFIG_ENV_SIZE 0x04000 /* Size of Environment */ #define CONFIG_FLASH_CFI_MTD @@ -66,23 +72,22 @@ #define CONFIG_KM_KERNEL_ADDR 0x400000 /* 3968Kbytes */ #define CONFIG_KM_FDT_ADDR 0x7E0000 /* 128Kbytes */ +/* architecture specific default bootargs */ +#define CONFIG_KM_DEF_BOOT_ARGS_CPU "" + #define CONFIG_KM_DEF_ENV_CPU \ - "addbootcount=true\0" \ - "addmtdparts=true\0" \ - "boot=bootm ${actual_kernel_addr} - ${actual_fdt_addr}\0" \ + "boot=bootm ${load_addr_r} - ${fdt_addr_r}\0" \ "cramfsloadfdt=" \ "cramfsload ${fdt_addr_r} " \ - "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb && " \ - "setenv actual_fdt_addr ${fdt_addr_r}\0" \ + "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \ "fdt_addr_r=" xstr(CONFIG_KM_FDT_ADDR) "\0" \ + "u-boot="xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ "update=" \ "protect off " xstr(BOOTFLASH_START) " +${filesize} && "\ "erase " xstr(BOOTFLASH_START) " +${filesize} && " \ - "cp.b ${u-boot_addr_r} " xstr(BOOTFLASH_START) \ + "cp.b ${load_addr_r} " xstr(BOOTFLASH_START) \ " ${filesize} && " \ "protect on " xstr(BOOTFLASH_START) " +${filesize}\0" \ "" -#define CONFIG_KM_ARCH_DBG_FILE "scripts/debug-ppc-env.txt" - #endif /* __CONFIG_KEYMILE_POWERPC_H */ diff --git a/include/configs/km/km82xx-common.h b/include/configs/km/km82xx-common.h index 446c1d0..0360cd3 100644 --- a/include/configs/km/km82xx-common.h +++ b/include/configs/km/km82xx-common.h @@ -87,7 +87,7 @@ "newenv=" \ "prot off 0xFE0C0000 +0x40000 && " \ "era 0xFE0C0000 +0x40000\0" \ - "rootpath=/opt/eldk/ppc_82xx\0" \ + "arch=ppc_82xx\0" \ "" #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE @@ -139,6 +139,13 @@ } while (0) #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ +#ifndef __ASSEMBLY__ +void set_sda(int state); +void set_scl(int state); +int get_sda(void); +int get_scl(void); +#endif + /* I2C SYSMON (LM75, AD7414 is almost compatible) */ #define CONFIG_DTT_LM75 /* ON Semi's LM75 */ #define CONFIG_DTT_SENSORS {0} /* Sensor addresses */ diff --git a/include/configs/km/km8321-common.h b/include/configs/km/km8321-common.h index 6fab45e..902ae26 100644 --- a/include/configs/km/km8321-common.h +++ b/include/configs/km/km8321-common.h @@ -33,8 +33,7 @@ #define CONFIG_MPC832x /* MPC832x CPU specific */ #define CONFIG_KM8321 /* Keymile PBEC8321 board specific */ -#define CONFIG_KM_DEF_ROOTPATH \ - "rootpath=/opt/eldk/ppc_8xx\0" +#define CONFIG_KM_DEF_ARCH "arch=ppc_8xx\0" /* include common defines/options for all 83xx Keymile boards */ #include "km83xx-common.h" diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h index 85b6ed2..2b1a84a 100644 --- a/include/configs/km/km83xx-common.h +++ b/include/configs/km/km83xx-common.h @@ -302,14 +302,13 @@ #define CONFIG_KM_DEF_ENV "km-common=empty\0" #endif -#ifndef CONFIG_KM_DEF_ROOTPATH -#define CONFIG_KM_DEF_ROOTPATH \ - "rootpath=/opt/eldk/ppc_82xx\0" +#ifndef CONFIG_KM_DEF_ARCH +#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0" #endif #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_KM_DEF_ENV \ - CONFIG_KM_DEF_ROOTPATH \ + CONFIG_KM_DEF_ARCH \ "dtt_bus=pca9547:70:a\0" \ "EEprom_ivm=pca9547:70:9\0" \ "newenv=" \ diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index f1eea26..2e3b182 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -67,18 +67,17 @@ #define CONFIG_KM_CRAMFS_ADDR 0x2400000 #define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */ +/* architecture specific default bootargs */ +#define CONFIG_KM_DEF_BOOT_ARGS_CPU \ + "bootcountaddr=${bootcountaddr} ${mtdparts}" + #define CONFIG_KM_DEF_ENV_CPU \ - "addbootcount=" \ - "setenv bootargs ${bootargs} " \ - "bootcountaddr=${bootcountaddr}\0" \ - "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "boot=bootm ${actual_kernel_addr} - -\0" \ + "boot=bootm ${load_addr_r} - -\0" \ "cramfsloadfdt=true\0" \ + "u-boot="xstr(CONFIG_HOSTNAME) "/u-boot.kwb\0" \ CONFIG_KM_DEF_ENV_UPDATE \ "" -#define CONFIG_KM_ARCH_DBG_FILE "scripts/debug-arm-env.txt" - #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ #define CONFIG_MISC_INIT_R @@ -196,6 +195,12 @@ int get_scl(void); #endif +/* EEprom support 24C128, 24C256 valid for environment eeprom */ +#define CONFIG_SYS_I2C_MULTI_EEPROMS +#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 + #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 @@ -229,7 +234,7 @@ int get_scl(void); #define CONFIG_KM_DEF_ENV_UPDATE \ "update=" \ "spi on;sf probe 0;sf erase 0 50000;" \ - "sf write ${u-boot_addr_r} 0 ${filesize};" \ + "sf write ${load_addr_r} 0 ${filesize};" \ "spi off\0" /* @@ -243,7 +248,7 @@ int get_scl(void); " ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && " \ "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \ " ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0" \ - "rootpath=/opt/eldk/arm\0" \ + "arch=arm\0" \ "EEprom_ivm=" KM_IVM_BUS "\0" \ "" diff --git a/include/configs/mcu25.h b/include/configs/mcu25.h deleted file mode 100644 index a162291..0000000 --- a/include/configs/mcu25.h +++ /dev/null @@ -1,281 +0,0 @@ -/* - *(C) Copyright 2005-2007 Netstal Maschinen AG - * Niklaus Giger (Niklaus.Giger@netstal.com) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************************************ - * mcu25.h - configuration for MCU25 board (similar to hcu4.h) - ***********************************************************************/ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/*----------------------------------------------------------------------- - * High Level Configuration Options - *----------------------------------------------------------------------*/ -#define CONFIG_MCU25 1 /* Board is MCU25 */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ -#define CONFIG_405GP 1 -#define CONFIG_4xx 1 -#define CONFIG_HOSTNAME mcu25 - -#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 - -/* - * Include common defines/options for all boards produced by Netstal Maschinen - */ -#include "netstal-common.h" - -#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ - -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ -#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ - -/*----------------------------------------------------------------------- - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) -*----------------------------------------------------------------------*/ -#define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ - - -#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ -#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - -/* ... with on-chip memory here (4KBytes) */ -#define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000 -#define CONFIG_SYS_OCM_DATA_SIZE 0x00001000 -/* Do not set up locked dcache as init ram. */ -#undef CONFIG_SYS_INIT_DCACHE_CS - -/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */ -#define CONFIG_SYS_TEMP_STACK_OCM 1 - -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* OCM */ -#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) - -/*----------------------------------------------------------------------- - * Serial Port - *----------------------------------------------------------------------*/ -/* - * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1. - * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31. - * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value. - * The Linux BASE_BAUD define should match this configuration. - * baseBaud = cpuClock/(uartDivisor*16) - * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock, - * set Linux BASE_BAUD to 403200. - */ -#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ -#define CONFIG_SYS_BASE_BAUD 691200 - -/* Set console baudrate to 9600 */ -#define CONFIG_BAUDRATE 9600 - -/*----------------------------------------------------------------------- - * Flash - *----------------------------------------------------------------------*/ - -/* Use common CFI driver */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -/* board provides its own flash_init code */ -#define CONFIG_FLASH_CFI_LEGACY 1 -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT -#define CONFIG_SYS_FLASH_LEGACY_512Kx8 1 - -/* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_EMPTY_INFO - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 8 /* max number of sectors on one chip */ - -/*----------------------------------------------------------------------- - * Environment - *----------------------------------------------------------------------*/ - -#undef CONFIG_ENV_IS_IN_NVRAM -#define CONFIG_ENV_IS_IN_FLASH -#undef CONFIG_ENV_IS_NOWHERE - -#ifdef CONFIG_ENV_IS_IN_EEPROM -/* Put the environment after the SDRAM configuration */ -#define PROM_SIZE 2048 -#define CONFIG_ENV_OFFSET 512 -#define CONFIG_ENV_SIZE (PROM_SIZE-CONFIG_ENV_OFFSET) -#endif - -#ifdef CONFIG_ENV_IS_IN_FLASH -/* Put the environment in Flash */ -#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ -#define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */ - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) -#endif - -/*----------------------------------------------------------------------- - * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the - * the first internal I2C controller of the PPC440EPx - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_SPD_BUS_NUM 0 - -/* Setup some board specific values for the default environment variables */ -#define CONFIG_IPADDR 172.25.1.25 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_NETSTAL_DEF_ENV \ - CONFIG_NETSTAL_DEF_ENV_POWERPC \ - "" - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_I2C -#define CONFIG_CMD_IMMAP -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_MII -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_SDRAM - -/* SPD EEPROM (sdram speed config) disabled */ -#define CONFIG_SPD_EEPROM 1 -#define SPD_EEPROM_ADDRESS 0x50 - -/* POST support */ -#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ - CONFIG_SYS_POST_CPU | \ - CONFIG_SYS_POST_UART | \ - CONFIG_SYS_POST_I2C | \ - CONFIG_SYS_POST_CACHE | \ - CONFIG_SYS_POST_ETHER | \ - CONFIG_SYS_POST_SPR) - -#define CONFIG_SYS_POST_UART_TABLE { CONFIG_SYS_NS16550_COM1 } -#undef CONFIG_LOGBUFFER -#define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */ -#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ - -/*----------------------------------------------------------------------- - * Miscellaneous configurable options - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -#if defined(CONFIG_CMD_KGDB) - #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else - #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ - - -#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ - -/*----------------------------------------------------------------------- - * External Bus Controller (EBC) Setup - */ - -#define CONFIG_SYS_EBC_CFG 0x98400000 - -/* Memory Bank 0 (Flash Bank 0) initialization */ -#define CONFIG_SYS_EBC_PB0AP 0x02005400 -#define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit*/ - -#define CONFIG_SYS_EBC_PB1AP 0x03041200 -#define CONFIG_SYS_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */ - -#define CONFIG_SYS_EBC_PB2AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */ -#define CONFIG_SYS_EBC_PB2CR 0x7A09A000u - -#define CONFIG_SYS_EBC_PB3AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */ -#define CONFIG_SYS_EBC_PB3CR 0x7B09A000u - -#define CONFIG_SYS_EBC_PB4AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */ -#define CONFIG_SYS_EBC_PB4CR 0x7C09A000u - -#define CONFIG_SYS_EBC_PB5AP 0x00800200u -#define CONFIG_SYS_EBC_PB5CR 0x7D81A000u - -#define CONFIG_SYS_EBC_PB6AP 0x01040200u -#define CONFIG_SYS_EBC_PB6CR 0x7D91A000u - -#define CONFIG_SYS_GPIO0_OR 0x087FFFFF /* GPIO value */ -#define CONFIG_SYS_GPIO0_TCR 0x7FFF8000 /* GPIO value */ -#define CONFIG_SYS_GPIO0_ODR 0xFFFF0000 /* GPIO value */ -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -/* Init Memory Controller: - * - * BR0/1 and OR0/1 (FLASH) - */ - -#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */ -#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ - - -/* Configuration Port location */ -#define CONFIG_PORT_ADDR 0xF0000500 - -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#endif - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -#endif /* __CONFIG_H */ diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 5f70023..35ceacd 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -162,8 +162,10 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET) +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_GBL_DATA_OFFSET) /*----------------------------------------------------------------------- * FLASH and environment organization diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h deleted file mode 100644 index 122f139..0000000 --- a/include/configs/netstal-common.h +++ /dev/null @@ -1,261 +0,0 @@ -/* - * (C) Copyright 2008 - * Niklaus Giger, Netstal Maschinen AG, niklaus.giger@netstal.com - * adapted from amcc-common.h by - * (C) Copyright 2008 - * * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * Common configuration options for all Netstal boards - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __NETSTAL_COMMON_H -#define __NETSTAL_COMMON_H - -#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ -#define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ - -/* - * UART - */ -#define CONFIG_CONS_INDEX 1 /* Use UART0 */ -#define CONFIG_SERIAL_MULTI -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK get_serial_clock() -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} - -/* - * I2C - */ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F - -/* This is the 7bit address of the device, not including P. */ -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 - -/* The EEPROM can do 16byte ( 1 << 4 ) page writes. */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE - -/* - * Ethernet/EMAC/PHY - */ -#define CONFIG_PPC4xx_EMAC -#define CONFIG_MII /* MII PHY management */ -#define CONFIG_PHY_ADDR 1 /* PHY address */ -#define CONFIG_NET_MULTI 1 -#if defined(CONFIG_440) -#define CONFIG_NETCONSOLE /* include NetConsole support */ -#define CONFIG_SYS_RX_ETH_BUFFER 32 /* number of eth rx buffers */ -#else -#define CONFIG_SYS_RX_ETH_BUFFER 16 /* number of eth rx buffers */ -#endif -#define CONFIG_HAS_ETH0 - -/* - * Commands - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ASKENV -#if defined(CONFIG_440) -#define CONFIG_CMD_CACHE -#endif -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_ELF -#define CONFIG_CMD_I2C -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_MII -#define CONFIG_CMD_NET -#define CONFIG_CMD_NFS -#define CONFIG_CMD_PING -#define CONFIG_CMD_REGINFO -#define CONFIG_BOOT_RETRY_TIME 30 -#define CONFIG_RESET_TO_RETRY -/* - * Miscellaneous configurable options - */ -#define CONFIG_BOOTDELAY 1 /* autoboot after 1 second */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ -#define CONFIG_SYS_EXTBDINFO /* To use extended board_into (bd_t) */ - -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ - -#define CONFIG_CMDLINE_EDITING /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ -#define CONFIG_LOOPW /* enable loopw command */ -#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_VERSION_VARIABLE /* include version env variable */ -#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/ - -#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ -#ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#endif - -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_SUBNETMASK - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -/* - * Internal Definitions - */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Pass open firmware flat tree - */ -#define CONFIG_OF_LIBFDT -#define CONFIG_OF_BOARD_SETUP - -/* - * Booting and default environment - */ -#define CONFIG_PREBOOT "echo;" \ - "echo Type \"run net_nfs\" to mount root filesystem over NFS;" \ - "echo" -#define CONFIG_BOOTCOMMAND "run vx" - -/* - * Only very few boards have default console not on ttyS0 (like Taishan) - */ -#if !defined(CONFIG_USE_TTY) -#define CONFIG_USE_TTY ttyS0 -#endif - -/* - * Only some 4xx PPC's are equipped with an FPU - */ -#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) -#define CONFIG_NETSTAL_DEF_ENV_ROOTPATH "rootpath=/opt/eldk/ppc_4xxFP\0" -#else -#define CONFIG_NETSTAL_DEF_ENV_ROOTPATH "rootpath=/opt/eldk/ppc_4xx\0" -#endif - -/* - * Only some boards need to extend the bootargs by some additional - * parameters (like Makalu) - */ -#if !defined(CONFIG_ADDMISC) -#define CONFIG_ADDMISC "addmisc=setenv bootargs ${bootargs}\0" -#endif - -#define xstr(s) str(s) -#define str(s) #s - -/* Setup some values for the default environment variables */ -#define CONFIG_SERVERIP 172.25.1.1 -#define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE - -#define CONFIG_SYS_TFTP_LOADADDR 0x01000000 -#define CONFIG_SYS_VXWORKS_ADD_PARAMS "u=dpu pw=netstal8752" -#define CONFIG_SYS_VXWORKS_SERVERNAME "c" -/* - * General common environment variables shared by all boards produced by Netstal Maschinen - */ -#define CONFIG_NETSTAL_DEF_ENV \ - "netdev=eth0\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ - "addtty=setenv bootargs ${bootargs}" \ - " console=" xstr(CONFIG_USE_TTY) ",${baudrate}\0" \ - CONFIG_ADDMISC \ - "initrd_high=30000000\0" \ - "kernel_addr_r=400000\0" \ - "fdt_addr_r=800000\0" \ - "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ - "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ - "uload=tftp " xstr(CONFIG_SYS_TFTP_LOADADDR) " " \ - xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ - "vx_rom=" xstr(CONFIG_HOSTNAME) "/" \ - xstr(CONFIG_HOSTNAME) "_vx_rom\0" \ - "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;"\ - "era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \ - "cp.b ${fileaddr} "xstr(CONFIG_SYS_MONITOR_BASE) \ - " ${filesize}; setenv filesize\0" \ - "upd=run uload update\0" \ - "vx=setenv bootfile ${vx_rom}; tftp " \ - xstr(CONFIG_SYS_TFTP_LOADADDR) "; bootvx\0" \ - CONFIG_NETSTAL_DEF_ENV_ROOTPATH - -/* - * Default environment for arch/powerpc booting - * for boards that are ported to arch/powerpc - */ -#define CONFIG_NETSTAL_DEF_ENV_POWERPC \ - "flash_self=run ramargs addip addtty addmisc;" \ - "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ - "flash_nfs=run nfsargs addip addtty addmisc;" \ - "bootm ${kernel_addr} - ${fdt_addr}\0" \ - "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ - "tftp ${fdt_addr_r} ${fdt_file}; " \ - "run nfsargs addip addtty addmisc;" \ - "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ - "fdt_file=" xstr(CONFIG_HOSTNAME) "/" xstr(CONFIG_HOSTNAME) ".dtb\0" - -#endif /* __NETSTAL_COMMON_H */ diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h index 53f2084..d57d53c 100644 --- a/include/configs/nios2-generic.h +++ b/include/configs/nios2-generic.h @@ -52,6 +52,7 @@ /* * TIMER */ +#define CONFIG_SYS_LOW_RES_TIMER #define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_TIMER_BASE #define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_TIMER_IRQ #define CONFIG_SYS_HZ 1000 /* Always 1000 */ diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index 6a92ec3..1b5d931 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -126,6 +126,11 @@ #define SCB9328_SDRAM_1 0x08000000 /* SDRAM bank #1 */ #define SCB9328_SDRAM_1_SIZE 0x01000000 /* 16 MB */ +#define CONFIG_SYS_TEXT_BASE 0x10000000 + +#define CONFIG_SYS_SDRAM_BASE SCB9328_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (SCB9328_SDRAM_1 + 0xf00000) + /* * Configuration for FLASH memory for the Synertronixx board */ diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 06ce3e2..7d29144 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -41,4 +41,15 @@ #define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */ #define CONFIG_BOARD_EARLY_INIT_F + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA2_MMC +#define CONFIG_CMD_MMC + +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT #endif /* __CONFIG_H */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index d5dd94f..141da26 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -43,7 +43,7 @@ #define CONFIG_STXSSA 1 /* Silicon Tx GPPP SSA board specific*/ #define CONFIG_MPC8560 1 -#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 #define CONFIG_PCI /* PCI ethernet support */ #define CONFIG_TSEC_ENET /* tsec ethernet support*/ @@ -194,6 +194,11 @@ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #endif +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_OF_STDOUT_VIA_ALIAS 1 + /* * I2C */ diff --git a/include/configs/tnetv107x_evm.h b/include/configs/tnetv107x_evm.h index 3627ce7..4bced0c 100644 --- a/include/configs/tnetv107x_evm.h +++ b/include/configs/tnetv107x_evm.h @@ -57,6 +57,12 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_STACKSIZE (256*1024) +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + /* Serial Driver Info */ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h new file mode 100644 index 0000000..374c88a --- /dev/null +++ b/include/configs/zmx25.h @@ -0,0 +1,180 @@ +/* + * (c) 2011 Graf-Syteco, Matthias Weisser + * <weisserm@arcor.de> + * + * Configuation settings for the zmx25 board + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_MX25 +#define CONFIG_MX25_CLK32 32768 /* OSC32K frequency */ +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_TEXT_BASE 0xA0000000 + +/* + * Environment settings + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "gs_fast_boot=setenv bootdelay 5\0" \ + "gs_slow_boot=setenv bootdelay 10\0" \ + "bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \ + "fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \ + "bootm 0x81000000; bootelf 0x81000000\0" + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define BOARD_LATE_INIT + +/* + * Compressions + */ +#define CONFIG_LZO + +/* + * Hardware drivers + */ + +/* + * GPIO + */ +#define CONFIG_MXC_GPIO + +/* + * Serial + */ +#define CONFIG_MXC_UART +#define CONFIG_SYS_MX25_UART2 +#define CONFIG_CONS_INDEX 1 /* use UART2 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * Ethernet + */ +#define CONFIG_FEC_MXC +#define CONFIG_FEC_MXC_PHYADDR 0x00 +#define CONFIG_MII +#define CONFIG_NET_MULTI + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#define CONFIG_CMD_NET +#define CONFIG_CMD_CACHE + +#define CONFIG_SYS_64BIT_VSPRINTF + +/* + * Additional command + */ +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_USB + +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* + * USB + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_MXC +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORT 2 +#define CONFIG_MXC_USB_PORTSC 0xC0000000 +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_VFAT +#endif /* CONFIG_CMD_USB */ + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */ +#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_SP_ADDR 0x78020000 /* end of internal SRAM */ + +/* + * FLASH and environment organization + */ +#define CONFIG_SYS_FLASH_BASE 0xA0000000 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 256 + +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000) +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SECT_SIZE (128 * 1024) +#define CONFIG_ENV_SIZE (128 * 1024) + +/* + * CFI FLASH driver setup + */ +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* ~10x faster */ + +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024)) +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE) + +#define CONFIG_SYS_PROMPT "zmx25> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING + +#define CONFIG_PREBOOT "" + +#define CONFIG_BOOTDELAY 5 +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_PROMPT "boot in %d s\n", bootdelay +#define CONFIG_AUTOBOOT_DELAY_STR "delaygs" +#define CONFIG_AUTOBOOT_STOP_STR "stopgs" + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (0x400000 - 0x8000) +#define CONFIG_STACKSIZE (32*1024) /* regular stack */ + +#endif /* __CONFIG_H */ |