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-rw-r--r--include/configs/ATUM8548.h2
-rw-r--r--include/configs/MPC8349EMDS.h9
-rw-r--r--include/configs/MPC8540ADS.h1
-rw-r--r--include/configs/MPC8540EVAL.h2
-rw-r--r--include/configs/MPC8541CDS.h1
-rw-r--r--include/configs/MPC8544DS.h2
-rw-r--r--include/configs/MPC8548CDS.h1
-rw-r--r--include/configs/MPC8555CDS.h1
-rw-r--r--include/configs/MPC8560ADS.h1
-rw-r--r--include/configs/MPC8568MDS.h1
-rw-r--r--include/configs/MPC8610HPCD.h1
-rw-r--r--include/configs/MPC8641HPCN.h1
-rw-r--r--include/configs/PM854.h1
-rw-r--r--include/configs/PM856.h1
-rw-r--r--include/configs/SBC8540.h1
-rw-r--r--include/configs/TQM85xx.h2
-rw-r--r--include/configs/ms7720se.h134
-rw-r--r--include/configs/sbc8548.h1
-rw-r--r--include/configs/sbc8560.h1
-rw-r--r--include/configs/stxgp3.h1
-rw-r--r--include/configs/stxssa.h1
21 files changed, 166 insertions, 0 deletions
diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h
index f7020b4..c14376e 100644
--- a/include/configs/ATUM8548.h
+++ b/include/configs/ATUM8548.h
@@ -63,6 +63,8 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
+
#define MPC85xx_DDR_SDRAM_CLK_CNTL /* 85xx has clock control reg */
#define CONFIG_SYS_CLK_FREQ 33000000
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 437a9a5..07f2f30 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -355,6 +355,15 @@
#define CFG_I2C_OFFSET 0x3000
#define CFG_I2C2_OFFSET 0x3100
+/* SPI */
+#define CONFIG_HARD_SPI /* SPI with hardware support */
+#undef CONFIG_SOFT_SPI /* SPI bit-banged */
+
+/* GPIOs. Used as SPI chip selects */
+#define CFG_GPIO1_PRELIM
+#define CFG_GPIO1_DIR 0xC0000000 /* SPI CS on 0, LED on 1 */
+#define CFG_GPIO1_DAT 0xC0000000 /* Both are active LOW */
+
/* TSEC */
#define CFG_TSEC1_OFFSET 0x24000
#define CFG_TSEC1 (CFG_IMMR+CFG_TSEC1_OFFSET)
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index afce7fb..5ea7b25 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -55,6 +55,7 @@
#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h
index 2868dcb..bf64f27 100644
--- a/include/configs/MPC8540EVAL.h
+++ b/include/configs/MPC8540EVAL.h
@@ -43,6 +43,8 @@
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_DDR_DLL /* possible DLL fix needed */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
+
/* Using Localbus SDRAM to emulate flash before we can program the flash,
* normally you only need a flash-boot image(u-boot.bin),if unsure undef this.
* Not availabe for EVAL board
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index c83382f..7334088 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -47,6 +47,7 @@
#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 5a96db5..a894209 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -42,6 +42,8 @@
#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
+
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 90beb25..a3db9f4 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -55,6 +55,7 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 76d673c..93877ae 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -47,6 +47,7 @@
#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 5f10555..08884b3 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -52,6 +52,7 @@
#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 2b089d9..a12d193 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -49,6 +49,7 @@
/*#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER*/ /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index ac4b3e1..a53953c 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -493,6 +493,7 @@
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
+#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index ab875f0..985182f 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -555,6 +555,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
+#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
diff --git a/include/configs/PM854.h b/include/configs/PM854.h
index f0d0399..819bee7 100644
--- a/include/configs/PM854.h
+++ b/include/configs/PM854.h
@@ -51,6 +51,7 @@
#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_MEM_INIT_VALUE 0xDEADBEEF
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/PM856.h b/include/configs/PM856.h
index ae2645c..8902f42 100644
--- a/include/configs/PM856.h
+++ b/include/configs/PM856.h
@@ -51,6 +51,7 @@
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
#define CONFIG_MEM_INIT_VALUE 0xDEADBEEF
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h
index 3ca85b8..2bbfe9a 100644
--- a/include/configs/SBC8540.h
+++ b/include/configs/SBC8540.h
@@ -56,6 +56,7 @@
#undef CONFIG_PCI /* pci ethernet support */
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index f3b1a53..dd0654b 100644
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -50,6 +50,8 @@
#define CONFIG_CPM2 1 /* has CPM2 */
#endif
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
+
/*
* sysclk for MPC85xx
*
diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h
new file mode 100644
index 0000000..8a94c28
--- /dev/null
+++ b/include/configs/ms7720se.h
@@ -0,0 +1,134 @@
+/*
+ * Configuation settings for the Hitachi Solution Engine 7720
+ *
+ * Copyright (C) 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MS7720SE_H
+#define __MS7720SE_H
+
+#undef DEBUG
+#define CONFIG_SH 1
+#define CONFIG_SH3 1
+#define CONFIG_CPU_SH7720 1
+#define CONFIG_MS7720SE 1
+
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_PCMCIA
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_EXT2
+
+#define CFG_CMD_PCMCIA 0x01
+#define CFG_CMD_IDE 0x02
+
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
+ CFG_CMD_IDE|CFG_CMD_PCMCIA) & \
+ ~(CFG_CMD_FPGA))
+
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_BOOTARGS "console=ttySC0,115200"
+#define CONFIG_BOOTFILE /boot/zImage
+#define CONFIG_LOADADDR 0x8E000000
+
+#define CONFIG_VERSION_VARIABLE
+#undef CONFIG_SHOW_BOOT_PROGRESS
+
+/* MEMORY */
+#define MS7720SE_SDRAM_BASE 0x8C000000
+#define MS7720SE_FLASH_BASE_1 0xA0000000
+#define MS7720SE_FLASH_BANK_SIZE (8 * 1024 * 1024)
+
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Buffer size for input from the Console */
+#define CFG_PBSIZE 256 /* Buffer size for Console output */
+#define CFG_MAXARGS 16 /* max args accepted for monitor commands */
+/* Buffer size for Boot Arguments passed to kernel */
+#define CFG_BARGSIZE 512
+/* List of legal baudrate settings for this board */
+#define CFG_BAUDRATE_TABLE { 115200 }
+
+/* SCIF */
+#define CFG_SCIF_CONSOLE 1
+#define CONFIG_CONS_SCIF0 1
+
+#define CFG_MEMTEST_START MS7720SE_SDRAM_BASE
+#define CFG_MEMTEST_END (CFG_MEMTEST_START + (60 * 1024 * 1024))
+
+#define CFG_SDRAM_BASE MS7720SE_SDRAM_BASE
+#define CFG_SDRAM_SIZE (64 * 1024 * 1024)
+
+#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 32 * 1024 * 1024)
+#define CFG_MONITOR_BASE MS7720SE_FLASH_BASE_1
+#define CFG_MONITOR_LEN (128 * 1024)
+#define CFG_MALLOC_LEN (256 * 1024)
+#define CFG_GBL_DATA_SIZE 256
+#define CFG_BOOTMAPSZ (8 * 1024 * 1024)
+
+
+/* FLASH */
+#define CFG_FLASH_CFI
+#define CFG_FLASH_CFI_DRIVER
+#undef CFG_FLASH_QUIET_TEST
+#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
+
+#define CFG_FLASH_BASE MS7720SE_FLASH_BASE_1
+
+#define CFG_MAX_FLASH_SECT 150
+#define CFG_MAX_FLASH_BANKS 1
+#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
+
+#define CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_SECT_SIZE (64 * 1024)
+#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+#define CFG_FLASH_ERASE_TOUT 120000
+#define CFG_FLASH_WRITE_TOUT 500
+
+/* Board Clock */
+#define CONFIG_SYS_CLK_FREQ 33333333
+#define TMU_CLK_DIVIDER 4 /* 4 (default), 16, 64, 256 or 1024 */
+#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+
+/* PCMCIA */
+#define CONFIG_IDE_PCMCIA 1
+#define CONFIG_MARUBUN_PCCARD 1
+#define CONFIG_PCMCIA_SLOT_A 1
+#define CFG_IDE_MAXDEVICE 1
+#define CFG_MARUBUN_MRSHPC 0xb83fffe0
+#define CFG_MARUBUN_MW1 0xb8400000
+#define CFG_MARUBUN_MW2 0xb8500000
+#define CFG_MARUBUN_IO 0xb8600000
+
+#define CFG_PIO_MODE 1
+#define CFG_IDE_MAXBUS 1
+#define CONFIG_DOS_PARTITION 1
+#define CFG_ATA_BASE_ADDR CFG_MARUBUN_IO /* base address */
+#define CFG_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */
+#define CFG_ATA_DATA_OFFSET 0 /* data reg offset */
+#define CFG_ATA_REG_OFFSET 0 /* reg offset */
+#define CFG_ATA_ALT_OFFSET 0x200 /* alternate register offset */
+
+#endif /* __MS7720SE_H */
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index c050a06..0a7a904 100644
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -56,6 +56,7 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define MPC85xx_DDR_SDRAM_CLK_CNTL /* 85xx has clock control reg */
diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h
index b71ba78..f9ede5f 100644
--- a/include/configs/sbc8560.h
+++ b/include/configs/sbc8560.h
@@ -50,6 +50,7 @@
#undef CONFIG_PCI /* pci ethernet support */
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index 3baa32c..047e1cf 100644
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -51,6 +51,7 @@
#define CONFIG_DDR_DLL /* possible DLL fix needed */
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/* sysclk for MPC85xx
*/
diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index 9457bce..e09dd71 100644
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -51,6 +51,7 @@
#undef CONFIG_DDR_DLL /* possible DLL fix needed */
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/* sysclk for MPC85xx
*/
generated by cgit v1.1 at 2025-01-02 04:11:46 +0000