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-rw-r--r--include/configs/MPC8313ERDB.h14
-rw-r--r--include/configs/MPC8349EMDS.h10
-rw-r--r--include/configs/at91cap9adk.h2
-rw-r--r--include/configs/at91sam9260ek.h2
-rw-r--r--include/configs/kilauea.h1
-rw-r--r--include/configs/makalu.h29
-rw-r--r--include/configs/ml401.h21
-rw-r--r--include/configs/mx31ads.h4
-rw-r--r--include/configs/xupv2p.h21
9 files changed, 77 insertions, 27 deletions
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 6eec240..f9fa535 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -42,9 +42,12 @@
/*
* On-board devices
+ *
+ * TSEC1 is VSC switch
+ * TSEC2 is SoC TSEC
*/
#define CONFIG_VSC7385_ENET
-
+#define CONFIG_TSEC2
#ifdef CFG_66MHZ
#define CONFIG_83XX_CLKIN 66666667 /* in Hz */
@@ -80,7 +83,7 @@
#ifdef CONFIG_VSC7385_ENET
-#define CONFIG_TSEC2
+#define CONFIG_TSEC1
/* The flash address and size of the VSC7385 firmware image */
#define CONFIG_VSC7385_IMAGE 0xFE7FE000
@@ -209,7 +212,7 @@
/*
* Local Bus LCRR and LBCR regs
*/
-#define CFG_LCRR LCRR_EADC_1 | LCRR_CLKDIV_2 /* 0x00010002 */
+#define CFG_LCRR LCRR_EADC_1 | LCRR_CLKDIV_4
#define CFG_LBC_LBCR ( 0x00040000 /* TODO */ \
| (0xFF << LBCR_BMT_SHIFT) \
| 0xF ) /* 0x0004ff0f */
@@ -523,13 +526,8 @@
*/
#define CONFIG_ENV_OVERWRITE
-#ifdef CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:E0:0C:00:95:01
-#endif
-
-#ifdef CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:E0:0C:00:95:02
-#endif
#define CONFIG_IPADDR 10.0.0.2
#define CONFIG_SERVERIP 10.0.0.1
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 364ffac..cf552c2 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -602,6 +602,16 @@
HRCWH_TSEC2M_IN_GMII )
#endif
+/*
+ * System performance
+ */
+#define CFG_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
+#define CFG_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
+#define CFG_SPCR_TSEC1EP 3 /* TSEC1 emergency priority (0-3) */
+#define CFG_SPCR_TSEC2EP 3 /* TSEC2 emergency priority (0-3) */
+#define CFG_SCCR_TSEC1CM 1 /* TSEC1 clock mode (0-3) */
+#define CFG_SCCR_TSEC2CM 1 /* TSEC2 & I2C0 clock mode (0-3) */
+
/* System IO Config */
#define CFG_SICRH SICRH_TSOBI1
#define CFG_SICRL SICRL_LDP_A
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h
index dab21d0..c891fa8 100644
--- a/include/configs/at91cap9adk.h
+++ b/include/configs/at91cap9adk.h
@@ -1,6 +1,6 @@
/*
* (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* Configuation settings for the AT91CAP9ADK board.
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 96d1b8d..41c418f 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -1,6 +1,6 @@
/*
* (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* Configuation settings for the AT91SAM9260EK board.
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 57cc90a..c7c42a4 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -292,6 +292,7 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_SUBNETMASK
/*
* Command line configuration.
diff --git a/include/configs/makalu.h b/include/configs/makalu.h
index 6556666..67243d4 100644
--- a/include/configs/makalu.h
+++ b/include/configs/makalu.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2007
+ * (C) Copyright 2007-2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -172,22 +172,28 @@
":${hostname}:${netdev}:off panic=1\0" \
"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
"addmisc=setenv bootargs ${bootargs} rtc-x1205.probe=0,0x6f\0" \
- "net_nfs=tftp 200000 ${bootfile};" \
+ "flash_self_old=run ramargs addip addtty addmisc;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "flash_self=run ramargs addip addtty addmisc;" \
+ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
+ "flash_nfs_old=run nfsargs addip addtty addmisc;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_nfs=run nfsargs addip addtty addmisc;" \
+ "bootm ${kernel_addr} - ${fdt_addr}\0" \
+ "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
"run nfsargs addip addtty addmisc;" \
- "bootm 200000\0" \
- "net_nfs_fdt=tftp 200000 ${bootfile};" \
- "tftp ${fdt_addr} ${fdt_file};" \
+ "bootm ${kernel_addr_r}\0" \
+ "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
+ "tftp ${fdt_addr_r} ${fdt_file}; " \
"run nfsargs addip addtty addmisc;" \
- "bootm 200000 - ${fdt_addr}\0" \
- "flash_nfs=run nfsargs addip addtty addmisc;" \
- "bootm ${kernel_addr}\0" \
- "flash_self=run ramargs addip addtty addmisc;" \
- "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
"rootpath=/opt/eldk/ppc_4xx\0" \
"bootfile=makalu/uImage\0" \
"fdt_file=makalu/makalu.dtb\0" \
- "fdt_addr=400000\0" \
+ "kernel_addr_r=400000\0" \
+ "fdt_addr_r=800000\0" \
"kernel_addr=fc000000\0" \
+ "fdt_addr=fc1e0000\0" \
"ramdisk_addr=fc200000\0" \
"initrd_high=30000000\0" \
"load=tftp 200000 makalu/u-boot.bin\0" \
@@ -212,6 +218,7 @@
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_SUBNETMASK
/*
* Command line configuration.
diff --git a/include/configs/ml401.h b/include/configs/ml401.h
index 360e2e1..7e0df87 100644
--- a/include/configs/ml401.h
+++ b/include/configs/ml401.h
@@ -56,9 +56,11 @@
/* ethernet */
#ifdef XILINX_EMAC_BASEADDR
#define CONFIG_XILINX_EMAC 1
+#define CFG_ENET
#else
#ifdef XILINX_EMACLITE_BASEADDR
#define CONFIG_XILINX_EMACLITE 1
+#define CFG_ENET
#endif
#endif
#undef ET_DEBUG
@@ -70,18 +72,28 @@
#endif
/* interrupt controller */
+#ifdef XILINX_INTC_BASEADDR
#define CFG_INTC_0 1
#define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR
#define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
+#endif
/* timer */
+#ifdef XILINX_TIMER_BASEADDR
+#if (XILINX_TIMER_IRQ != -1)
#define CFG_TIMER_0 1
#define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR
#define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ
#define FREQUENCE XILINX_CLOCK_FREQ
#define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 )
+#endif
+#else
+#ifdef XILINX_CLOCK_FREQ
#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
-
+#else
+#error BAD CLOCK FREQ
+#endif
+#endif
/* FSL */
/* #define CFG_FSL_2 */
/* #define FSL_INTR_2 1 */
@@ -195,7 +207,12 @@
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MFSL
-#define CONFIG_CMD_PING
+
+#ifndef CFG_ENET
+ #undef CONFIG_CMD_NET
+#else
+ #define CONFIG_CMD_PING
+#endif
#if defined(CONFIG_SYSTEMACE)
#define CONFIG_CMD_EXT2
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 7614b95..2ea48a6 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -28,7 +28,7 @@
#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
#define CONFIG_MX31 1 /* in a mx31 */
#define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */
-#define CONFIG_MX31_CLK32 32000
+#define CONFIG_MX31_CLK32 32768
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
@@ -139,7 +139,7 @@
#define CFG_LOAD_ADDR CONFIG_LOADADDR
-#define CFG_HZ 32000
+#define CFG_HZ CONFIG_MX31_CLK32 /* use 32kHz clock as source */
#define CONFIG_CMDLINE_EDITING 1
diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h
index 30fb303..c738567 100644
--- a/include/configs/xupv2p.h
+++ b/include/configs/xupv2p.h
@@ -63,9 +63,11 @@
/* ethernet */
#ifdef XILINX_EMAC_BASEADDR
#define CONFIG_XILINX_EMAC 1
+#define CFG_ENET
#else
#ifdef XILINX_EMACLITE_BASEADDR
#define CONFIG_XILINX_EMACLITE 1
+#define CFG_ENET
#endif
#endif
#undef ET_DEBUG
@@ -77,18 +79,28 @@
#endif
/* interrupt controller */
+#ifdef XILINX_INTC_BASEADDR
#define CFG_INTC_0 1
#define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR
#define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
+#endif
/* timer */
+#ifdef XILINX_TIMER_BASEADDR
+#if (XILINX_TIMER_IRQ != -1)
#define CFG_TIMER_0 1
#define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR
#define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ
#define FREQUENCE XILINX_CLOCK_FREQ
#define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 )
+#endif
+#else
+#ifdef XILINX_CLOCK_FREQ
#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
-
+#else
+#error BAD CLOCK FREQ
+#endif
+#endif
/*
* memory layout - Example
* TEXT_BASE = 0x3600_0000;
@@ -162,7 +174,12 @@
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_PING
+
+#ifndef CFG_ENET
+ #undef CONFIG_CMD_NET
+#else
+ #define CONFIG_CMD_PING
+#endif
#ifdef XILINX_SYSACE_BASEADDR
#define CONFIG_CMD_EXT2
generated by cgit v1.1 at 2024-12-21 13:50:23 +0000