diff options
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/ATUM8548.h | 5 | ||||
-rw-r--r-- | include/configs/MPC8536DS.h | 14 | ||||
-rw-r--r-- | include/configs/MPC8540ADS.h | 1 | ||||
-rw-r--r-- | include/configs/MPC8541CDS.h | 1 | ||||
-rw-r--r-- | include/configs/MPC8544DS.h | 6 | ||||
-rw-r--r-- | include/configs/MPC8548CDS.h | 6 | ||||
-rw-r--r-- | include/configs/MPC8555CDS.h | 1 | ||||
-rw-r--r-- | include/configs/MPC8560ADS.h | 1 | ||||
-rw-r--r-- | include/configs/MPC8568MDS.h | 6 | ||||
-rw-r--r-- | include/configs/MPC8572DS.h | 16 | ||||
-rw-r--r-- | include/configs/MPC8610HPCD.h | 6 | ||||
-rw-r--r-- | include/configs/MPC8641HPCN.h | 6 | ||||
-rw-r--r-- | include/configs/TQM85xx.h | 5 | ||||
-rw-r--r-- | include/configs/sbc8548.h | 5 | ||||
-rw-r--r-- | include/configs/sbc8641d.h | 5 |
15 files changed, 11 insertions, 73 deletions
diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h index 2450adb..1b74526 100644 --- a/include/configs/ATUM8548.h +++ b/include/configs/ATUM8548.h @@ -287,11 +287,6 @@ #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -/* PCI view of System Memory */ -#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000 - #endif /* CONFIG_PCI */ #if defined(CONFIG_TSEC_ENET) diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 38be10d..c4389cc 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -41,6 +41,7 @@ #define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ @@ -134,14 +135,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_DDR_ERR_DIS 0x00000000 #define CONFIG_SYS_DDR_SBE 0x00010000 -/* FIXME: Not used in fixed_sdram function */ -#define CONFIG_SYS_DDR_MODE 0x00000022 -#define CONFIG_SYS_DDR_CS1_BNDS 0x00000000 -#define CONFIG_SYS_DDR_CS2_BNDS 0x00000FFF /* Not done */ -#define CONFIG_SYS_DDR_CS3_BNDS 0x00000FFF /* Not done */ -#define CONFIG_SYS_DDR_CS4_BNDS 0x00000FFF /* Not done */ -#define CONFIG_SYS_DDR_CS5_BNDS 0x00000FFF /* Not done */ - /* Make sure required options are set */ #ifndef CONFIG_SPD_EEPROM #error ("CONFIG_SPD_EEPROM is required") @@ -314,11 +307,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); * Memory space is mapped 1-1, but I/O space must start from 0. */ -/* PCI view of System Memory */ -#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000 - #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE #define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 5a14969..79a52d9 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -46,6 +46,7 @@ #endif #define CONFIG_PCI +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index eede26a..7ada8a2 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -38,6 +38,7 @@ #define CONFIG_MPC8541CDS 1 /* MPC8541CDS board specific */ #define CONFIG_PCI +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 0987448..cdbbea6 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -41,6 +41,7 @@ #define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ @@ -275,11 +276,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_PCI1_IO_PHYS 0xe1000000 #define CONFIG_SYS_PCI1_IO_SIZE 0x00010000 /* 64k */ -/* PCI view of System Memory */ -#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000 - /* controller 2, Slot 1, tgtid 1, Base address 9000 */ #define CONFIG_SYS_PCIE2_MEM_BASE 0x80000000 #define CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_BASE diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 892c52e..083afba 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -43,6 +43,7 @@ #undef CONFIG_PCI2 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -419,11 +420,6 @@ extern unsigned long get_clock_freq(void); #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -/* PCI view of System Memory */ -#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000 - #endif /* CONFIG_PCI */ diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 41870f1..f9419cc 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -38,6 +38,7 @@ #define CONFIG_MPC8555CDS 1 /* MPC8555CDS board specific */ #define CONFIG_PCI +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 0d3a500..f67d489 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -43,6 +43,7 @@ #define CONFIG_MPC8560 1 #define CONFIG_PCI +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ba2f152..ab3e6d6 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -38,6 +38,7 @@ #define CONFIG_PCIE1 1 /* PCIE controller */ #define CONFIG_FSL_PCI_INIT 1 /* use common fsl pci init code */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_QE /* Enable QE */ #define CONFIG_ENV_OVERWRITE @@ -388,11 +389,6 @@ extern unsigned long get_clock_freq(void); #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */ -/* PCI view of System Memory */ -#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000 - #endif /* CONFIG_PCI */ #ifndef CONFIG_NET_MULTI diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 5688589..eefb06c 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -42,6 +42,7 @@ #define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ @@ -135,16 +136,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_DDR_SBE 0x00010000 /* - * FIXME: Not used in fixed_sdram function - */ -#define CONFIG_SYS_DDR_MODE 0x00000022 -#define CONFIG_SYS_DDR_CS1_BNDS 0x00000000 -#define CONFIG_SYS_DDR_CS2_BNDS 0x00000FFF /* Not done */ -#define CONFIG_SYS_DDR_CS3_BNDS 0x00000FFF /* Not done */ -#define CONFIG_SYS_DDR_CS4_BNDS 0x00000FFF /* Not done */ -#define CONFIG_SYS_DDR_CS5_BNDS 0x00000FFF /* Not done */ - -/* * Make sure required options are set */ #ifndef CONFIG_SPD_EEPROM @@ -335,11 +326,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); * Memory space is mapped 1-1, but I/O space must start from 0. */ -/* PCI view of System Memory */ -#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000 - /* controller 3, direct to uli, tgtid 3, Base address 8000 */ #define CONFIG_SYS_PCIE3_MEM_BASE 0x80000000 #define CONFIG_SYS_PCIE3_MEM_PHYS CONFIG_SYS_PCIE3_MEM_BASE diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 678e1e1..fe80e5d 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -41,6 +41,7 @@ #define CONFIG_PCIE1 1 /* PCIe 1 connected to ULI bridge */ #define CONFIG_PCIE2 1 /* PCIe 2 connected to slot */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #define CONFIG_ENV_OVERWRITE @@ -278,11 +279,6 @@ #define CONFIG_SYS_PCI1_IO_PHYS 0xe1000000 #define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */ -/* PCI view of System Memory */ -#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000 - /* For RTL8139 */ #define KSEG1ADDR(x) ({u32 _x = le32_to_cpu(*(u32 *)(x)); (&_x); }) #define _IO_BASE 0x00000000 diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index e5710c0..80c8bee 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -49,6 +49,7 @@ #define CONFIG_PCI1 1 /* PCIE controler 1 (ULI bridge) */ #define CONFIG_PCI2 1 /* PCIE controler 2 (slot) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL law init code */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -304,11 +305,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 #define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */ -/* PCI view of System Memory */ -#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000 - /* For RTL8139 */ #define KSEG1ADDR(x) ({u32 _x=le32_to_cpu(*(u32 *)(x)); (&_x);}) #define _IO_BASE 0x00000000 diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index b05f43d..2d4048a 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -403,11 +403,6 @@ #define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE #define CONFIG_SYS_PCI1_IO_SIZE 0x1000000 /* 16M */ -/* PCI view of System Memory */ -#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000 - #ifdef CONFIG_PCIE1 /* * General PCI express diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 54f3e66..aefd30a 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -387,11 +387,6 @@ #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -/* PCI view of System Memory */ -#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000 - #endif /* CONFIG_PCI */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 14d1c88..09a9901 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -308,11 +308,6 @@ #define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE #define CONFIG_SYS_PCI1_IO_SIZE 0x1000000 /* 16M */ -/* PCI view of System Memory */ -#define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 -#define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000 - #define CONFIG_SYS_PCI2_MEM_BASE 0xa0000000 #define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BASE #define CONFIG_SYS_PCI2_MEM_SIZE 0x10000000 /* 256M */ |